pciehp.h 11 KB

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  1. /*
  2. * PCI Express Hot Plug Controller Driver
  3. *
  4. * Copyright (C) 1995,2001 Compaq Computer Corporation
  5. * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
  6. * Copyright (C) 2001 IBM Corp.
  7. * Copyright (C) 2003-2004 Intel Corporation
  8. *
  9. * All rights reserved.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or (at
  14. * your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  19. * NON INFRINGEMENT. See the GNU General Public License for more
  20. * details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  25. *
  26. * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
  27. *
  28. */
  29. #ifndef _PCIEHP_H
  30. #define _PCIEHP_H
  31. #include <linux/types.h>
  32. #include <linux/pci.h>
  33. #include <linux/delay.h>
  34. #include <asm/semaphore.h>
  35. #include <asm/io.h>
  36. #include <linux/pcieport_if.h>
  37. #include "pci_hotplug.h"
  38. #define MY_NAME "pciehp"
  39. extern int pciehp_poll_mode;
  40. extern int pciehp_poll_time;
  41. extern int pciehp_debug;
  42. /*#define dbg(format, arg...) do { if (pciehp_debug) printk(KERN_DEBUG "%s: " format, MY_NAME , ## arg); } while (0)*/
  43. #define dbg(format, arg...) do { if (pciehp_debug) printk("%s: " format, MY_NAME , ## arg); } while (0)
  44. #define err(format, arg...) printk(KERN_ERR "%s: " format, MY_NAME , ## arg)
  45. #define info(format, arg...) printk(KERN_INFO "%s: " format, MY_NAME , ## arg)
  46. #define warn(format, arg...) printk(KERN_WARNING "%s: " format, MY_NAME , ## arg)
  47. struct pci_func {
  48. struct pci_func *next;
  49. u8 bus;
  50. u8 device;
  51. u8 function;
  52. u8 is_a_board;
  53. u16 status;
  54. u8 configured;
  55. u8 switch_save;
  56. u8 presence_save;
  57. u32 base_length[0x06];
  58. u8 base_type[0x06];
  59. u16 reserved2;
  60. u32 config_space[0x20];
  61. struct pci_resource *mem_head;
  62. struct pci_resource *p_mem_head;
  63. struct pci_resource *io_head;
  64. struct pci_resource *bus_head;
  65. struct pci_dev* pci_dev;
  66. };
  67. struct slot {
  68. struct slot *next;
  69. u8 bus;
  70. u8 device;
  71. u32 number;
  72. u8 is_a_board;
  73. u8 configured;
  74. u8 state;
  75. u8 switch_save;
  76. u8 presence_save;
  77. u32 capabilities;
  78. u16 reserved2;
  79. struct timer_list task_event;
  80. u8 hp_slot;
  81. struct controller *ctrl;
  82. struct hpc_ops *hpc_ops;
  83. struct hotplug_slot *hotplug_slot;
  84. struct list_head slot_list;
  85. };
  86. struct pci_resource {
  87. struct pci_resource * next;
  88. u32 base;
  89. u32 length;
  90. };
  91. struct event_info {
  92. u32 event_type;
  93. u8 hp_slot;
  94. };
  95. struct controller {
  96. struct controller *next;
  97. struct semaphore crit_sect; /* critical section semaphore */
  98. void *hpc_ctlr_handle; /* HPC controller handle */
  99. int num_slots; /* Number of slots on ctlr */
  100. int slot_num_inc; /* 1 or -1 */
  101. struct pci_resource *mem_head;
  102. struct pci_resource *p_mem_head;
  103. struct pci_resource *io_head;
  104. struct pci_resource *bus_head;
  105. struct pci_dev *pci_dev;
  106. struct pci_bus *pci_bus;
  107. struct event_info event_queue[10];
  108. struct slot *slot;
  109. struct hpc_ops *hpc_ops;
  110. wait_queue_head_t queue; /* sleep & wake process */
  111. u8 next_event;
  112. u8 seg;
  113. u8 bus;
  114. u8 device;
  115. u8 function;
  116. u8 rev;
  117. u8 slot_device_offset;
  118. u8 add_support;
  119. enum pci_bus_speed speed;
  120. u32 first_slot; /* First physical slot number */ /* PCIE only has 1 slot */
  121. u8 slot_bus; /* Bus where the slots handled by this controller sit */
  122. u8 ctrlcap;
  123. u16 vendor_id;
  124. u8 cap_base;
  125. };
  126. struct irq_mapping {
  127. u8 barber_pole;
  128. u8 valid_INT;
  129. u8 interrupt[4];
  130. };
  131. struct resource_lists {
  132. struct pci_resource *mem_head;
  133. struct pci_resource *p_mem_head;
  134. struct pci_resource *io_head;
  135. struct pci_resource *bus_head;
  136. struct irq_mapping *irqs;
  137. };
  138. #define INT_BUTTON_IGNORE 0
  139. #define INT_PRESENCE_ON 1
  140. #define INT_PRESENCE_OFF 2
  141. #define INT_SWITCH_CLOSE 3
  142. #define INT_SWITCH_OPEN 4
  143. #define INT_POWER_FAULT 5
  144. #define INT_POWER_FAULT_CLEAR 6
  145. #define INT_BUTTON_PRESS 7
  146. #define INT_BUTTON_RELEASE 8
  147. #define INT_BUTTON_CANCEL 9
  148. #define STATIC_STATE 0
  149. #define BLINKINGON_STATE 1
  150. #define BLINKINGOFF_STATE 2
  151. #define POWERON_STATE 3
  152. #define POWEROFF_STATE 4
  153. #define PCI_TO_PCI_BRIDGE_CLASS 0x00060400
  154. /* Error messages */
  155. #define INTERLOCK_OPEN 0x00000002
  156. #define ADD_NOT_SUPPORTED 0x00000003
  157. #define CARD_FUNCTIONING 0x00000005
  158. #define ADAPTER_NOT_SAME 0x00000006
  159. #define NO_ADAPTER_PRESENT 0x00000009
  160. #define NOT_ENOUGH_RESOURCES 0x0000000B
  161. #define DEVICE_TYPE_NOT_SUPPORTED 0x0000000C
  162. #define WRONG_BUS_FREQUENCY 0x0000000D
  163. #define POWER_FAILURE 0x0000000E
  164. #define REMOVE_NOT_SUPPORTED 0x00000003
  165. #define DISABLE_CARD 1
  166. /* Field definitions in Slot Capabilities Register */
  167. #define ATTN_BUTTN_PRSN 0x00000001
  168. #define PWR_CTRL_PRSN 0x00000002
  169. #define MRL_SENS_PRSN 0x00000004
  170. #define ATTN_LED_PRSN 0x00000008
  171. #define PWR_LED_PRSN 0x00000010
  172. #define HP_SUPR_RM_SUP 0x00000020
  173. #define ATTN_BUTTN(cap) (cap & ATTN_BUTTN_PRSN)
  174. #define POWER_CTRL(cap) (cap & PWR_CTRL_PRSN)
  175. #define MRL_SENS(cap) (cap & MRL_SENS_PRSN)
  176. #define ATTN_LED(cap) (cap & ATTN_LED_PRSN)
  177. #define PWR_LED(cap) (cap & PWR_LED_PRSN)
  178. #define HP_SUPR_RM(cap) (cap & HP_SUPR_RM_SUP)
  179. /*
  180. * error Messages
  181. */
  182. #define msg_initialization_err "Initialization failure, error=%d\n"
  183. #define msg_HPC_rev_error "Unsupported revision of the PCI hot plug controller found.\n"
  184. #define msg_HPC_non_pcie "The PCI hot plug controller is not supported by this driver.\n"
  185. #define msg_HPC_not_supported "This system is not supported by this version of pciephd module. Upgrade to a newer version of pciehpd\n"
  186. #define msg_unable_to_save "Unable to store PCI hot plug add resource information. This system must be rebooted before adding any PCI devices.\n"
  187. #define msg_button_on "PCI slot #%d - powering on due to button press.\n"
  188. #define msg_button_off "PCI slot #%d - powering off due to button press.\n"
  189. #define msg_button_cancel "PCI slot #%d - action canceled due to button press.\n"
  190. #define msg_button_ignore "PCI slot #%d - button press ignored. (action in progress...)\n"
  191. /* controller functions */
  192. extern int pciehprm_find_available_resources (struct controller *ctrl);
  193. extern int pciehp_event_start_thread (void);
  194. extern void pciehp_event_stop_thread (void);
  195. extern struct pci_func *pciehp_slot_create (unsigned char busnumber);
  196. extern struct pci_func *pciehp_slot_find (unsigned char bus, unsigned char device, unsigned char index);
  197. extern int pciehp_enable_slot (struct slot *slot);
  198. extern int pciehp_disable_slot (struct slot *slot);
  199. extern u8 pciehp_handle_attention_button (u8 hp_slot, void *inst_id);
  200. extern u8 pciehp_handle_switch_change (u8 hp_slot, void *inst_id);
  201. extern u8 pciehp_handle_presence_change (u8 hp_slot, void *inst_id);
  202. extern u8 pciehp_handle_power_fault (u8 hp_slot, void *inst_id);
  203. /* extern void long_delay (int delay); */
  204. /* resource functions */
  205. extern int pciehp_resource_sort_and_combine (struct pci_resource **head);
  206. /* pci functions */
  207. extern int pciehp_set_irq (u8 bus_num, u8 dev_num, u8 int_pin, u8 irq_num);
  208. /*extern int pciehp_get_bus_dev (struct controller *ctrl, u8 *bus_num, u8 *dev_num, struct slot *slot);*/
  209. extern int pciehp_save_config (struct controller *ctrl, int busnumber, int num_ctlr_slots, int first_device_num);
  210. extern int pciehp_save_used_resources (struct controller *ctrl, struct pci_func * func, int flag);
  211. extern int pciehp_save_slot_config (struct controller *ctrl, struct pci_func * new_slot);
  212. extern void pciehp_destroy_board_resources (struct pci_func * func);
  213. extern int pciehp_return_board_resources (struct pci_func * func, struct resource_lists * resources);
  214. extern void pciehp_destroy_resource_list (struct resource_lists * resources);
  215. extern int pciehp_configure_device (struct controller* ctrl, struct pci_func* func);
  216. extern int pciehp_unconfigure_device (struct pci_func* func);
  217. /* Global variables */
  218. extern struct controller *pciehp_ctrl_list;
  219. extern struct pci_func *pciehp_slot_list[256];
  220. /* Inline functions */
  221. static inline struct slot *pciehp_find_slot(struct controller *ctrl, u8 device)
  222. {
  223. struct slot *p_slot, *tmp_slot = NULL;
  224. p_slot = ctrl->slot;
  225. dbg("p_slot = %p\n", p_slot);
  226. while (p_slot && (p_slot->device != device)) {
  227. tmp_slot = p_slot;
  228. p_slot = p_slot->next;
  229. dbg("In while loop, p_slot = %p\n", p_slot);
  230. }
  231. if (p_slot == NULL) {
  232. err("ERROR: pciehp_find_slot device=0x%x\n", device);
  233. p_slot = tmp_slot;
  234. }
  235. return p_slot;
  236. }
  237. static inline int wait_for_ctrl_irq(struct controller *ctrl)
  238. {
  239. int retval = 0;
  240. DECLARE_WAITQUEUE(wait, current);
  241. dbg("%s : start\n", __FUNCTION__);
  242. add_wait_queue(&ctrl->queue, &wait);
  243. if (!pciehp_poll_mode)
  244. /* Sleep for up to 1 second */
  245. msleep_interruptible(1000);
  246. else
  247. msleep_interruptible(2500);
  248. remove_wait_queue(&ctrl->queue, &wait);
  249. if (signal_pending(current))
  250. retval = -EINTR;
  251. dbg("%s : end\n", __FUNCTION__);
  252. return retval;
  253. }
  254. /* Puts node back in the resource list pointed to by head */
  255. static inline void return_resource(struct pci_resource **head, struct pci_resource *node)
  256. {
  257. if (!node || !head)
  258. return;
  259. node->next = *head;
  260. *head = node;
  261. }
  262. #define SLOT_NAME_SIZE 10
  263. static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot)
  264. {
  265. snprintf(buffer, buffer_size, "%04d_%04d", slot->bus, slot->number);
  266. }
  267. enum php_ctlr_type {
  268. PCI,
  269. ISA,
  270. ACPI
  271. };
  272. typedef u8(*php_intr_callback_t) (unsigned int change_id, void *instance_id);
  273. int pcie_init(struct controller *ctrl, struct pcie_device *dev,
  274. php_intr_callback_t attention_button_callback,
  275. php_intr_callback_t switch_change_callback,
  276. php_intr_callback_t presence_change_callback,
  277. php_intr_callback_t power_fault_callback);
  278. /* This has no meaning for PCI Express, as there is only 1 slot per port */
  279. int pcie_get_ctlr_slot_config(struct controller *ctrl,
  280. int *num_ctlr_slots,
  281. int *first_device_num,
  282. int *physical_slot_num,
  283. u8 *ctrlcap);
  284. struct hpc_ops {
  285. int (*power_on_slot) (struct slot *slot);
  286. int (*power_off_slot) (struct slot *slot);
  287. int (*get_power_status) (struct slot *slot, u8 *status);
  288. int (*get_attention_status) (struct slot *slot, u8 *status);
  289. int (*set_attention_status) (struct slot *slot, u8 status);
  290. int (*get_latch_status) (struct slot *slot, u8 *status);
  291. int (*get_adapter_status) (struct slot *slot, u8 *status);
  292. int (*get_max_bus_speed) (struct slot *slot, enum pci_bus_speed *speed);
  293. int (*get_cur_bus_speed) (struct slot *slot, enum pci_bus_speed *speed);
  294. int (*get_max_lnk_width) (struct slot *slot, enum pcie_link_width *value);
  295. int (*get_cur_lnk_width) (struct slot *slot, enum pcie_link_width *value);
  296. int (*query_power_fault) (struct slot *slot);
  297. void (*green_led_on) (struct slot *slot);
  298. void (*green_led_off) (struct slot *slot);
  299. void (*green_led_blink) (struct slot *slot);
  300. void (*release_ctlr) (struct controller *ctrl);
  301. int (*check_lnk_status) (struct controller *ctrl);
  302. };
  303. #endif /* _PCIEHP_H */