superio.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508
  1. /* National Semiconductor NS87560UBD Super I/O controller used in
  2. * HP [BCJ]x000 workstations.
  3. *
  4. * This chip is a horrid piece of engineering, and National
  5. * denies any knowledge of its existence. Thus no datasheet is
  6. * available off www.national.com.
  7. *
  8. * (C) Copyright 2000 Linuxcare, Inc.
  9. * (C) Copyright 2000 Linuxcare Canada, Inc.
  10. * (C) Copyright 2000 Martin K. Petersen <mkp@linuxcare.com>
  11. * (C) Copyright 2000 Alex deVries <alex@onefishtwo.ca>
  12. * (C) Copyright 2001 John Marvin <jsm fc hp com>
  13. * (C) Copyright 2003 Grant Grundler <grundler parisc-linux org>
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License as
  17. * published by the Free Software Foundation; either version 2 of
  18. * the License, or (at your option) any later version.
  19. *
  20. * The initial version of this is by Martin Peterson. Alex deVries
  21. * has spent a bit of time trying to coax it into working.
  22. *
  23. * Major changes to get basic interrupt infrastructure working to
  24. * hopefully be able to support all SuperIO devices. Currently
  25. * works with serial. -- John Marvin <jsm@fc.hp.com>
  26. */
  27. /* NOTES:
  28. *
  29. * Function 0 is an IDE controller. It is identical to a PC87415 IDE
  30. * controller (and identifies itself as such).
  31. *
  32. * Function 1 is a "Legacy I/O" controller. Under this function is a
  33. * whole mess of legacy I/O peripherals. Of course, HP hasn't enabled
  34. * all the functionality in hardware, but the following is available:
  35. *
  36. * Two 16550A compatible serial controllers
  37. * An IEEE 1284 compatible parallel port
  38. * A floppy disk controller
  39. *
  40. * Function 2 is a USB controller.
  41. *
  42. * We must be incredibly careful during initialization. Since all
  43. * interrupts are routed through function 1 (which is not allowed by
  44. * the PCI spec), we need to program the PICs on the legacy I/O port
  45. * *before* we attempt to set up IDE and USB. @#$!&
  46. *
  47. * According to HP, devices are only enabled by firmware if they have
  48. * a physical device connected.
  49. *
  50. * Configuration register bits:
  51. * 0x5A: FDC, SP1, IDE1, SP2, IDE2, PAR, Reserved, P92
  52. * 0x5B: RTC, 8259, 8254, DMA1, DMA2, KBC, P61, APM
  53. *
  54. */
  55. #include <linux/errno.h>
  56. #include <linux/init.h>
  57. #include <linux/module.h>
  58. #include <linux/types.h>
  59. #include <linux/interrupt.h>
  60. #include <linux/ioport.h>
  61. #include <linux/serial.h>
  62. #include <linux/pci.h>
  63. #include <linux/parport.h>
  64. #include <linux/parport_pc.h>
  65. #include <linux/termios.h>
  66. #include <linux/tty.h>
  67. #include <linux/serial_core.h>
  68. #include <linux/delay.h>
  69. #include <asm/io.h>
  70. #include <asm/hardware.h>
  71. #include <asm/superio.h>
  72. static struct superio_device sio_dev;
  73. #undef DEBUG_SUPERIO_INIT
  74. #ifdef DEBUG_SUPERIO_INIT
  75. #define DBG_INIT(x...) printk(x)
  76. #else
  77. #define DBG_INIT(x...)
  78. #endif
  79. static irqreturn_t
  80. superio_interrupt(int parent_irq, void *devp, struct pt_regs *regs)
  81. {
  82. u8 results;
  83. u8 local_irq;
  84. /* Poll the 8259 to see if there's an interrupt. */
  85. outb (OCW3_POLL,IC_PIC1+0);
  86. results = inb(IC_PIC1+0);
  87. /*
  88. * Bit 7: 1 = active Interrupt; 0 = no Interrupt pending
  89. * Bits 6-3: zero
  90. * Bits 2-0: highest priority, active requesting interrupt ID (0-7)
  91. */
  92. if ((results & 0x80) == 0) {
  93. /* I suspect "spurious" interrupts are from unmasking an IRQ.
  94. * We don't know if an interrupt was/is pending and thus
  95. * just call the handler for that IRQ as if it were pending.
  96. */
  97. return IRQ_NONE;
  98. }
  99. /* Check to see which device is interrupting */
  100. local_irq = results & 0x0f;
  101. if (local_irq == 2 || local_irq > 7) {
  102. printk(KERN_ERR "SuperIO: slave interrupted!\n");
  103. return IRQ_HANDLED;
  104. }
  105. if (local_irq == 7) {
  106. /* Could be spurious. Check in service bits */
  107. outb(OCW3_ISR,IC_PIC1+0);
  108. results = inb(IC_PIC1+0);
  109. if ((results & 0x80) == 0) { /* if ISR7 not set: spurious */
  110. printk(KERN_WARNING "SuperIO: spurious interrupt!\n");
  111. return IRQ_HANDLED;
  112. }
  113. }
  114. /* Call the appropriate device's interrupt */
  115. __do_IRQ(local_irq, regs);
  116. /* set EOI - forces a new interrupt if a lower priority device
  117. * still needs service.
  118. */
  119. outb((OCW2_SEOI|local_irq),IC_PIC1 + 0);
  120. return IRQ_HANDLED;
  121. }
  122. /* Initialize Super I/O device */
  123. static void __devinit
  124. superio_init(struct superio_device *sio)
  125. {
  126. struct pci_dev *pdev = sio->lio_pdev;
  127. u16 word;
  128. if (sio->suckyio_irq_enabled)
  129. return;
  130. if (!pdev) BUG();
  131. if (!sio->usb_pdev) BUG();
  132. /* use the IRQ iosapic found for USB INT D... */
  133. pdev->irq = sio->usb_pdev->irq;
  134. /* ...then properly fixup the USB to point at suckyio PIC */
  135. sio->usb_pdev->irq = superio_fixup_irq(sio->usb_pdev);
  136. printk (KERN_INFO "SuperIO: Found NS87560 Legacy I/O device at %s (IRQ %i) \n",
  137. pci_name(pdev),pdev->irq);
  138. pci_read_config_dword (pdev, SIO_SP1BAR, &sio->sp1_base);
  139. sio->sp1_base &= ~1;
  140. printk (KERN_INFO "SuperIO: Serial port 1 at 0x%x\n", sio->sp1_base);
  141. pci_read_config_dword (pdev, SIO_SP2BAR, &sio->sp2_base);
  142. sio->sp2_base &= ~1;
  143. printk (KERN_INFO "SuperIO: Serial port 2 at 0x%x\n", sio->sp2_base);
  144. pci_read_config_dword (pdev, SIO_PPBAR, &sio->pp_base);
  145. sio->pp_base &= ~1;
  146. printk (KERN_INFO "SuperIO: Parallel port at 0x%x\n", sio->pp_base);
  147. pci_read_config_dword (pdev, SIO_FDCBAR, &sio->fdc_base);
  148. sio->fdc_base &= ~1;
  149. printk (KERN_INFO "SuperIO: Floppy controller at 0x%x\n", sio->fdc_base);
  150. pci_read_config_dword (pdev, SIO_ACPIBAR, &sio->acpi_base);
  151. sio->acpi_base &= ~1;
  152. printk (KERN_INFO "SuperIO: ACPI at 0x%x\n", sio->acpi_base);
  153. request_region (IC_PIC1, 0x1f, "pic1");
  154. request_region (IC_PIC2, 0x1f, "pic2");
  155. request_region (sio->acpi_base, 0x1f, "acpi");
  156. /* Enable the legacy I/O function */
  157. pci_read_config_word (pdev, PCI_COMMAND, &word);
  158. word |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | PCI_COMMAND_IO;
  159. pci_write_config_word (pdev, PCI_COMMAND, word);
  160. pci_set_master (pdev);
  161. pci_enable_device(pdev);
  162. /*
  163. * Next project is programming the onboard interrupt controllers.
  164. * PDC hasn't done this for us, since it's using polled I/O.
  165. *
  166. * XXX Use dword writes to avoid bugs in Elroy or Suckyio Config
  167. * space access. PCI is by nature a 32-bit bus and config
  168. * space can be sensitive to that.
  169. */
  170. /* 0x64 - 0x67 :
  171. DMA Rtg 2
  172. DMA Rtg 3
  173. DMA Chan Ctl
  174. TRIGGER_1 == 0x82 USB & IDE level triggered, rest to edge
  175. */
  176. pci_write_config_dword (pdev, 0x64, 0x82000000U);
  177. /* 0x68 - 0x6b :
  178. TRIGGER_2 == 0x00 all edge triggered (not used)
  179. CFG_IR_SER == 0x43 SerPort1 = IRQ3, SerPort2 = IRQ4
  180. CFG_IR_PF == 0x65 ParPort = IRQ5, FloppyCtlr = IRQ6
  181. CFG_IR_IDE == 0x07 IDE1 = IRQ7, reserved
  182. */
  183. pci_write_config_dword (pdev, TRIGGER_2, 0x07654300U);
  184. /* 0x6c - 0x6f :
  185. CFG_IR_INTAB == 0x00
  186. CFG_IR_INTCD == 0x10 USB = IRQ1
  187. CFG_IR_PS2 == 0x00
  188. CFG_IR_FXBUS == 0x00
  189. */
  190. pci_write_config_dword (pdev, CFG_IR_INTAB, 0x00001000U);
  191. /* 0x70 - 0x73 :
  192. CFG_IR_USB == 0x00 not used. USB is connected to INTD.
  193. CFG_IR_ACPI == 0x00 not used.
  194. DMA Priority == 0x4c88 Power on default value. NFC.
  195. */
  196. pci_write_config_dword (pdev, CFG_IR_USB, 0x4c880000U);
  197. /* PIC1 Initialization Command Word register programming */
  198. outb (0x11,IC_PIC1+0); /* ICW1: ICW4 write req | ICW1 */
  199. outb (0x00,IC_PIC1+1); /* ICW2: interrupt vector table - not used */
  200. outb (0x04,IC_PIC1+1); /* ICW3: Cascade */
  201. outb (0x01,IC_PIC1+1); /* ICW4: x86 mode */
  202. /* PIC1 Program Operational Control Words */
  203. outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
  204. outb (0xc2,IC_PIC1+0); /* OCW2: priority (3-7,0-2) */
  205. /* PIC2 Initialization Command Word register programming */
  206. outb (0x11,IC_PIC2+0); /* ICW1: ICW4 write req | ICW1 */
  207. outb (0x00,IC_PIC2+1); /* ICW2: N/A */
  208. outb (0x02,IC_PIC2+1); /* ICW3: Slave ID code */
  209. outb (0x01,IC_PIC2+1); /* ICW4: x86 mode */
  210. /* Program Operational Control Words */
  211. outb (0xff,IC_PIC1+1); /* OCW1: Mask all interrupts */
  212. outb (0x68,IC_PIC1+0); /* OCW3: OCW3 select | ESMM | SMM */
  213. /* Write master mask reg */
  214. outb (0xff,IC_PIC1+1);
  215. /* Setup USB power regulation */
  216. outb(1, sio->acpi_base + USB_REG_CR);
  217. if (inb(sio->acpi_base + USB_REG_CR) & 1)
  218. printk(KERN_INFO "SuperIO: USB regulator enabled\n");
  219. else
  220. printk(KERN_ERR "USB regulator not initialized!\n");
  221. if (request_irq(pdev->irq, superio_interrupt, SA_INTERRUPT,
  222. "SuperIO", (void *)sio)) {
  223. printk(KERN_ERR "SuperIO: could not get irq\n");
  224. BUG();
  225. return;
  226. }
  227. sio->suckyio_irq_enabled = 1;
  228. }
  229. static void superio_disable_irq(unsigned int irq)
  230. {
  231. u8 r8;
  232. if ((irq < 1) || (irq == 2) || (irq > 7)) {
  233. printk(KERN_ERR "SuperIO: Illegal irq number.\n");
  234. BUG();
  235. return;
  236. }
  237. /* Mask interrupt */
  238. r8 = inb(IC_PIC1+1);
  239. r8 |= (1 << irq);
  240. outb (r8,IC_PIC1+1);
  241. }
  242. static void superio_enable_irq(unsigned int irq)
  243. {
  244. u8 r8;
  245. if ((irq < 1) || (irq == 2) || (irq > 7)) {
  246. printk(KERN_ERR "SuperIO: Illegal irq number (%d).\n", irq);
  247. BUG();
  248. return;
  249. }
  250. /* Unmask interrupt */
  251. r8 = inb(IC_PIC1+1);
  252. r8 &= ~(1 << irq);
  253. outb (r8,IC_PIC1+1);
  254. }
  255. static unsigned int superio_startup_irq(unsigned int irq)
  256. {
  257. superio_enable_irq(irq);
  258. return 0;
  259. }
  260. static struct hw_interrupt_type superio_interrupt_type = {
  261. .typename = "SuperIO",
  262. .startup = superio_startup_irq,
  263. .shutdown = superio_disable_irq,
  264. .enable = superio_enable_irq,
  265. .disable = superio_disable_irq,
  266. .ack = no_ack_irq,
  267. .end = no_end_irq,
  268. };
  269. #ifdef DEBUG_SUPERIO_INIT
  270. static unsigned short expected_device[3] = {
  271. PCI_DEVICE_ID_NS_87415,
  272. PCI_DEVICE_ID_NS_87560_LIO,
  273. PCI_DEVICE_ID_NS_87560_USB
  274. };
  275. #endif
  276. int superio_fixup_irq(struct pci_dev *pcidev)
  277. {
  278. int local_irq, i;
  279. #ifdef DEBUG_SUPERIO_INIT
  280. int fn;
  281. fn = PCI_FUNC(pcidev->devfn);
  282. /* Verify the function number matches the expected device id. */
  283. if (expected_device[fn] != pcidev->device) {
  284. BUG();
  285. return -1;
  286. }
  287. printk("superio_fixup_irq(%s) ven 0x%x dev 0x%x from %p\n",
  288. pci_name(pcidev),
  289. pcidev->vendor, pcidev->device,
  290. __builtin_return_address(0));
  291. #endif
  292. for (i = 0; i < 16; i++) {
  293. irq_desc[i].handler = &superio_interrupt_type;
  294. }
  295. /*
  296. * We don't allocate a SuperIO irq for the legacy IO function,
  297. * since it is a "bridge". Instead, we will allocate irq's for
  298. * each legacy device as they are initialized.
  299. */
  300. switch(pcidev->device) {
  301. case PCI_DEVICE_ID_NS_87415: /* Function 0 */
  302. local_irq = IDE_IRQ;
  303. break;
  304. case PCI_DEVICE_ID_NS_87560_LIO: /* Function 1 */
  305. sio_dev.lio_pdev = pcidev; /* save for superio_init() */
  306. return -1;
  307. case PCI_DEVICE_ID_NS_87560_USB: /* Function 2 */
  308. sio_dev.usb_pdev = pcidev; /* save for superio_init() */
  309. local_irq = USB_IRQ;
  310. break;
  311. default:
  312. local_irq = -1;
  313. BUG();
  314. break;
  315. }
  316. return local_irq;
  317. }
  318. static struct uart_port serial[] = {
  319. {
  320. .iotype = UPIO_PORT,
  321. .line = 0,
  322. .type = PORT_16550A,
  323. .uartclk = 115200*16,
  324. .fifosize = 16,
  325. },
  326. {
  327. .iotype = UPIO_PORT,
  328. .line = 1,
  329. .type = PORT_16550A,
  330. .uartclk = 115200*16,
  331. .fifosize = 16,
  332. }
  333. };
  334. static void __devinit superio_serial_init(void)
  335. {
  336. #ifdef CONFIG_SERIAL_8250
  337. int retval;
  338. serial[0].iobase = sio_dev.sp1_base;
  339. serial[0].irq = SP1_IRQ;
  340. retval = early_serial_setup(&serial[0]);
  341. if (retval < 0) {
  342. printk(KERN_WARNING "SuperIO: Register Serial #0 failed.\n");
  343. return;
  344. }
  345. serial[1].iobase = sio_dev.sp2_base;
  346. serial[1].irq = SP2_IRQ;
  347. retval = early_serial_setup(&serial[1]);
  348. if (retval < 0)
  349. printk(KERN_WARNING "SuperIO: Register Serial #1 failed.\n");
  350. #endif /* CONFIG_SERIAL_8250 */
  351. }
  352. static void __devinit superio_parport_init(void)
  353. {
  354. #ifdef CONFIG_PARPORT_PC
  355. if (!parport_pc_probe_port(sio_dev.pp_base,
  356. 0 /*base_hi*/,
  357. PAR_IRQ,
  358. PARPORT_DMA_NONE /* dma */,
  359. NULL /*struct pci_dev* */) )
  360. printk(KERN_WARNING "SuperIO: Probing parallel port failed.\n");
  361. #endif /* CONFIG_PARPORT_PC */
  362. }
  363. static void superio_fixup_pci(struct pci_dev *pdev)
  364. {
  365. u8 prog;
  366. pdev->class |= 0x5;
  367. pci_write_config_byte(pdev, PCI_CLASS_PROG, pdev->class);
  368. pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
  369. printk("PCI: Enabled native mode for NS87415 (pif=0x%x)\n", prog);
  370. }
  371. DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_87415, superio_fixup_pci);
  372. static int __devinit superio_probe(struct pci_dev *dev, const struct pci_device_id *id)
  373. {
  374. /*
  375. ** superio_probe(00:0e.0) ven 0x100b dev 0x2 sv 0x0 sd 0x0 class 0x1018a
  376. ** superio_probe(00:0e.1) ven 0x100b dev 0xe sv 0x0 sd 0x0 class 0x68000
  377. ** superio_probe(00:0e.2) ven 0x100b dev 0x12 sv 0x0 sd 0x0 class 0xc0310
  378. */
  379. DBG_INIT("superio_probe(%s) ven 0x%x dev 0x%x sv 0x%x sd 0x%x class 0x%x\n",
  380. pci_name(dev),
  381. dev->vendor, dev->device,
  382. dev->subsystem_vendor, dev->subsystem_device,
  383. dev->class);
  384. superio_init(&sio_dev);
  385. if (dev->device == PCI_DEVICE_ID_NS_87560_LIO) { /* Function 1 */
  386. superio_parport_init();
  387. superio_serial_init();
  388. /* REVISIT XXX : superio_fdc_init() ? */
  389. return 0;
  390. } else if (dev->device == PCI_DEVICE_ID_NS_87415) { /* Function 0 */
  391. DBG_INIT("superio_probe: ignoring IDE 87415\n");
  392. } else if (dev->device == PCI_DEVICE_ID_NS_87560_USB) { /* Function 2 */
  393. DBG_INIT("superio_probe: ignoring USB OHCI controller\n");
  394. } else {
  395. DBG_INIT("superio_probe: WTF? Fire Extinguisher?\n");
  396. }
  397. /* Let appropriate other driver claim this device. */
  398. return -ENODEV;
  399. }
  400. static struct pci_device_id superio_tbl[] = {
  401. { PCI_VENDOR_ID_NS, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  402. { 0, }
  403. };
  404. static struct pci_driver superio_driver = {
  405. .name = "SuperIO",
  406. .id_table = superio_tbl,
  407. .probe = superio_probe,
  408. };
  409. static int __init superio_modinit(void)
  410. {
  411. return pci_register_driver(&superio_driver);
  412. }
  413. static void __exit superio_exit(void)
  414. {
  415. pci_unregister_driver(&superio_driver);
  416. }
  417. module_init(superio_modinit);
  418. module_exit(superio_exit);