islpci_mgt.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513
  1. /*
  2. *
  3. * Copyright (C) 2002 Intersil Americas Inc.
  4. * Copyright 2004 Jens Maurer <Jens.Maurer@gmx.net>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. *
  19. */
  20. #include <linux/config.h>
  21. #include <linux/netdevice.h>
  22. #include <linux/module.h>
  23. #include <linux/pci.h>
  24. #include <asm/io.h>
  25. #include <asm/system.h>
  26. #include <linux/if_arp.h>
  27. #include "prismcompat.h"
  28. #include "isl_38xx.h"
  29. #include "islpci_mgt.h"
  30. #include "isl_oid.h" /* additional types and defs for isl38xx fw */
  31. #include "isl_ioctl.h"
  32. #include <net/iw_handler.h>
  33. /******************************************************************************
  34. Global variable definition section
  35. ******************************************************************************/
  36. int pc_debug = VERBOSE;
  37. module_param(pc_debug, int, 0);
  38. /******************************************************************************
  39. Driver general functions
  40. ******************************************************************************/
  41. #if VERBOSE > SHOW_ERROR_MESSAGES
  42. void
  43. display_buffer(char *buffer, int length)
  44. {
  45. if ((pc_debug & SHOW_BUFFER_CONTENTS) == 0)
  46. return;
  47. while (length > 0) {
  48. printk("[%02x]", *buffer & 255);
  49. length--;
  50. buffer++;
  51. }
  52. printk("\n");
  53. }
  54. #endif
  55. /*****************************************************************************
  56. Queue handling for management frames
  57. ******************************************************************************/
  58. /*
  59. * Helper function to create a PIMFOR management frame header.
  60. */
  61. static void
  62. pimfor_encode_header(int operation, u32 oid, u32 length, pimfor_header_t *h)
  63. {
  64. h->version = PIMFOR_VERSION;
  65. h->operation = operation;
  66. h->device_id = PIMFOR_DEV_ID_MHLI_MIB;
  67. h->flags = 0;
  68. h->oid = cpu_to_be32(oid);
  69. h->length = cpu_to_be32(length);
  70. }
  71. /*
  72. * Helper function to analyze a PIMFOR management frame header.
  73. */
  74. static pimfor_header_t *
  75. pimfor_decode_header(void *data, int len)
  76. {
  77. pimfor_header_t *h = data;
  78. while ((void *) h < data + len) {
  79. if (h->flags & PIMFOR_FLAG_LITTLE_ENDIAN) {
  80. le32_to_cpus(&h->oid);
  81. le32_to_cpus(&h->length);
  82. } else {
  83. be32_to_cpus(&h->oid);
  84. be32_to_cpus(&h->length);
  85. }
  86. if (h->oid != OID_INL_TUNNEL)
  87. return h;
  88. h++;
  89. }
  90. return NULL;
  91. }
  92. /*
  93. * Fill the receive queue for management frames with fresh buffers.
  94. */
  95. int
  96. islpci_mgmt_rx_fill(struct net_device *ndev)
  97. {
  98. islpci_private *priv = netdev_priv(ndev);
  99. isl38xx_control_block *cb = /* volatile not needed */
  100. (isl38xx_control_block *) priv->control_block;
  101. u32 curr = le32_to_cpu(cb->driver_curr_frag[ISL38XX_CB_RX_MGMTQ]);
  102. #if VERBOSE > SHOW_ERROR_MESSAGES
  103. DEBUG(SHOW_FUNCTION_CALLS, "islpci_mgmt_rx_fill \n");
  104. #endif
  105. while (curr - priv->index_mgmt_rx < ISL38XX_CB_MGMT_QSIZE) {
  106. u32 index = curr % ISL38XX_CB_MGMT_QSIZE;
  107. struct islpci_membuf *buf = &priv->mgmt_rx[index];
  108. isl38xx_fragment *frag = &cb->rx_data_mgmt[index];
  109. if (buf->mem == NULL) {
  110. buf->mem = kmalloc(MGMT_FRAME_SIZE, GFP_ATOMIC);
  111. if (!buf->mem) {
  112. printk(KERN_WARNING
  113. "Error allocating management frame.\n");
  114. return -ENOMEM;
  115. }
  116. buf->size = MGMT_FRAME_SIZE;
  117. }
  118. if (buf->pci_addr == 0) {
  119. buf->pci_addr = pci_map_single(priv->pdev, buf->mem,
  120. MGMT_FRAME_SIZE,
  121. PCI_DMA_FROMDEVICE);
  122. if (!buf->pci_addr) {
  123. printk(KERN_WARNING
  124. "Failed to make memory DMA'able\n.");
  125. return -ENOMEM;
  126. }
  127. }
  128. /* be safe: always reset control block information */
  129. frag->size = cpu_to_le16(MGMT_FRAME_SIZE);
  130. frag->flags = 0;
  131. frag->address = cpu_to_le32(buf->pci_addr);
  132. curr++;
  133. /* The fragment address in the control block must have
  134. * been written before announcing the frame buffer to
  135. * device */
  136. wmb();
  137. cb->driver_curr_frag[ISL38XX_CB_RX_MGMTQ] = cpu_to_le32(curr);
  138. }
  139. return 0;
  140. }
  141. /*
  142. * Create and transmit a management frame using "operation" and "oid",
  143. * with arguments data/length.
  144. * We either return an error and free the frame, or we return 0 and
  145. * islpci_mgt_cleanup_transmit() frees the frame in the tx-done
  146. * interrupt.
  147. */
  148. static int
  149. islpci_mgt_transmit(struct net_device *ndev, int operation, unsigned long oid,
  150. void *data, int length)
  151. {
  152. islpci_private *priv = netdev_priv(ndev);
  153. isl38xx_control_block *cb =
  154. (isl38xx_control_block *) priv->control_block;
  155. void *p;
  156. int err = -EINVAL;
  157. unsigned long flags;
  158. isl38xx_fragment *frag;
  159. struct islpci_membuf buf;
  160. u32 curr_frag;
  161. int index;
  162. int frag_len = length + PIMFOR_HEADER_SIZE;
  163. #if VERBOSE > SHOW_ERROR_MESSAGES
  164. DEBUG(SHOW_FUNCTION_CALLS, "islpci_mgt_transmit\n");
  165. #endif
  166. if (frag_len > MGMT_FRAME_SIZE) {
  167. printk(KERN_DEBUG "%s: mgmt frame too large %d\n",
  168. ndev->name, frag_len);
  169. goto error;
  170. }
  171. err = -ENOMEM;
  172. p = buf.mem = kmalloc(frag_len, GFP_KERNEL);
  173. if (!buf.mem) {
  174. printk(KERN_DEBUG "%s: cannot allocate mgmt frame\n",
  175. ndev->name);
  176. goto error;
  177. }
  178. buf.size = frag_len;
  179. /* create the header directly in the fragment data area */
  180. pimfor_encode_header(operation, oid, length, (pimfor_header_t *) p);
  181. p += PIMFOR_HEADER_SIZE;
  182. if (data)
  183. memcpy(p, data, length);
  184. else
  185. memset(p, 0, length);
  186. #if VERBOSE > SHOW_ERROR_MESSAGES
  187. {
  188. pimfor_header_t *h = buf.mem;
  189. DEBUG(SHOW_PIMFOR_FRAMES,
  190. "PIMFOR: op %i, oid 0x%08lx, device %i, flags 0x%x length 0x%x \n",
  191. h->operation, oid, h->device_id, h->flags, length);
  192. /* display the buffer contents for debugging */
  193. display_buffer((char *) h, sizeof (pimfor_header_t));
  194. display_buffer(p, length);
  195. }
  196. #endif
  197. err = -ENOMEM;
  198. buf.pci_addr = pci_map_single(priv->pdev, buf.mem, frag_len,
  199. PCI_DMA_TODEVICE);
  200. if (!buf.pci_addr) {
  201. printk(KERN_WARNING "%s: cannot map PCI memory for mgmt\n",
  202. ndev->name);
  203. goto error_free;
  204. }
  205. /* Protect the control block modifications against interrupts. */
  206. spin_lock_irqsave(&priv->slock, flags);
  207. curr_frag = le32_to_cpu(cb->driver_curr_frag[ISL38XX_CB_TX_MGMTQ]);
  208. if (curr_frag - priv->index_mgmt_tx >= ISL38XX_CB_MGMT_QSIZE) {
  209. printk(KERN_WARNING "%s: mgmt tx queue is still full\n",
  210. ndev->name);
  211. goto error_unlock;
  212. }
  213. /* commit the frame to the tx device queue */
  214. index = curr_frag % ISL38XX_CB_MGMT_QSIZE;
  215. priv->mgmt_tx[index] = buf;
  216. frag = &cb->tx_data_mgmt[index];
  217. frag->size = cpu_to_le16(frag_len);
  218. frag->flags = 0; /* for any other than the last fragment, set to 1 */
  219. frag->address = cpu_to_le32(buf.pci_addr);
  220. /* The fragment address in the control block must have
  221. * been written before announcing the frame buffer to
  222. * device */
  223. wmb();
  224. cb->driver_curr_frag[ISL38XX_CB_TX_MGMTQ] = cpu_to_le32(curr_frag + 1);
  225. spin_unlock_irqrestore(&priv->slock, flags);
  226. /* trigger the device */
  227. islpci_trigger(priv);
  228. return 0;
  229. error_unlock:
  230. spin_unlock_irqrestore(&priv->slock, flags);
  231. error_free:
  232. kfree(buf.mem);
  233. error:
  234. return err;
  235. }
  236. /*
  237. * Receive a management frame from the device.
  238. * This can be an arbitrary number of traps, and at most one response
  239. * frame for a previous request sent via islpci_mgt_transmit().
  240. */
  241. int
  242. islpci_mgt_receive(struct net_device *ndev)
  243. {
  244. islpci_private *priv = netdev_priv(ndev);
  245. isl38xx_control_block *cb =
  246. (isl38xx_control_block *) priv->control_block;
  247. u32 curr_frag;
  248. #if VERBOSE > SHOW_ERROR_MESSAGES
  249. DEBUG(SHOW_FUNCTION_CALLS, "islpci_mgt_receive \n");
  250. #endif
  251. /* Only once per interrupt, determine fragment range to
  252. * process. This avoids an endless loop (i.e. lockup) if
  253. * frames come in faster than we can process them. */
  254. curr_frag = le32_to_cpu(cb->device_curr_frag[ISL38XX_CB_RX_MGMTQ]);
  255. barrier();
  256. for (; priv->index_mgmt_rx < curr_frag; priv->index_mgmt_rx++) {
  257. pimfor_header_t *header;
  258. u32 index = priv->index_mgmt_rx % ISL38XX_CB_MGMT_QSIZE;
  259. struct islpci_membuf *buf = &priv->mgmt_rx[index];
  260. u16 frag_len;
  261. int size;
  262. struct islpci_mgmtframe *frame;
  263. /* I have no idea (and no documentation) if flags != 0
  264. * is possible. Drop the frame, reuse the buffer. */
  265. if (le16_to_cpu(cb->rx_data_mgmt[index].flags) != 0) {
  266. printk(KERN_WARNING "%s: unknown flags 0x%04x\n",
  267. ndev->name,
  268. le16_to_cpu(cb->rx_data_mgmt[index].flags));
  269. continue;
  270. }
  271. /* The device only returns the size of the header(s) here. */
  272. frag_len = le16_to_cpu(cb->rx_data_mgmt[index].size);
  273. /*
  274. * We appear to have no way to tell the device the
  275. * size of a receive buffer. Thus, if this check
  276. * triggers, we likely have kernel heap corruption. */
  277. if (frag_len > MGMT_FRAME_SIZE) {
  278. printk(KERN_WARNING
  279. "%s: Bogus packet size of %d (%#x).\n",
  280. ndev->name, frag_len, frag_len);
  281. frag_len = MGMT_FRAME_SIZE;
  282. }
  283. /* Ensure the results of device DMA are visible to the CPU. */
  284. pci_dma_sync_single_for_cpu(priv->pdev, buf->pci_addr,
  285. buf->size, PCI_DMA_FROMDEVICE);
  286. /* Perform endianess conversion for PIMFOR header in-place. */
  287. header = pimfor_decode_header(buf->mem, frag_len);
  288. if (!header) {
  289. printk(KERN_WARNING "%s: no PIMFOR header found\n",
  290. ndev->name);
  291. continue;
  292. }
  293. /* The device ID from the PIMFOR packet received from
  294. * the MVC is always 0. We forward a sensible device_id.
  295. * Not that anyone upstream would care... */
  296. header->device_id = priv->ndev->ifindex;
  297. #if VERBOSE > SHOW_ERROR_MESSAGES
  298. DEBUG(SHOW_PIMFOR_FRAMES,
  299. "PIMFOR: op %i, oid 0x%08x, device %i, flags 0x%x length 0x%x \n",
  300. header->operation, header->oid, header->device_id,
  301. header->flags, header->length);
  302. /* display the buffer contents for debugging */
  303. display_buffer((char *) header, PIMFOR_HEADER_SIZE);
  304. display_buffer((char *) header + PIMFOR_HEADER_SIZE,
  305. header->length);
  306. #endif
  307. /* nobody sends these */
  308. if (header->flags & PIMFOR_FLAG_APPLIC_ORIGIN) {
  309. printk(KERN_DEBUG
  310. "%s: errant PIMFOR application frame\n",
  311. ndev->name);
  312. continue;
  313. }
  314. /* Determine frame size, skipping OID_INL_TUNNEL headers. */
  315. size = PIMFOR_HEADER_SIZE + header->length;
  316. frame = kmalloc(sizeof (struct islpci_mgmtframe) + size,
  317. GFP_ATOMIC);
  318. if (!frame) {
  319. printk(KERN_WARNING
  320. "%s: Out of memory, cannot handle oid 0x%08x\n",
  321. ndev->name, header->oid);
  322. continue;
  323. }
  324. frame->ndev = ndev;
  325. memcpy(&frame->buf, header, size);
  326. frame->header = (pimfor_header_t *) frame->buf;
  327. frame->data = frame->buf + PIMFOR_HEADER_SIZE;
  328. #if VERBOSE > SHOW_ERROR_MESSAGES
  329. DEBUG(SHOW_PIMFOR_FRAMES,
  330. "frame: header: %p, data: %p, size: %d\n",
  331. frame->header, frame->data, size);
  332. #endif
  333. if (header->operation == PIMFOR_OP_TRAP) {
  334. #if VERBOSE > SHOW_ERROR_MESSAGES
  335. printk(KERN_DEBUG
  336. "TRAP: oid 0x%x, device %i, flags 0x%x length %i\n",
  337. header->oid, header->device_id, header->flags,
  338. header->length);
  339. #endif
  340. /* Create work to handle trap out of interrupt
  341. * context. */
  342. INIT_WORK(&frame->ws, prism54_process_trap, frame);
  343. schedule_work(&frame->ws);
  344. } else {
  345. /* Signal the one waiting process that a response
  346. * has been received. */
  347. if ((frame = xchg(&priv->mgmt_received, frame)) != NULL) {
  348. printk(KERN_WARNING
  349. "%s: mgmt response not collected\n",
  350. ndev->name);
  351. kfree(frame);
  352. }
  353. #if VERBOSE > SHOW_ERROR_MESSAGES
  354. DEBUG(SHOW_TRACING, "Wake up Mgmt Queue\n");
  355. #endif
  356. wake_up(&priv->mgmt_wqueue);
  357. }
  358. }
  359. return 0;
  360. }
  361. /*
  362. * Cleanup the transmit queue by freeing all frames handled by the device.
  363. */
  364. void
  365. islpci_mgt_cleanup_transmit(struct net_device *ndev)
  366. {
  367. islpci_private *priv = netdev_priv(ndev);
  368. isl38xx_control_block *cb = /* volatile not needed */
  369. (isl38xx_control_block *) priv->control_block;
  370. u32 curr_frag;
  371. #if VERBOSE > SHOW_ERROR_MESSAGES
  372. DEBUG(SHOW_FUNCTION_CALLS, "islpci_mgt_cleanup_transmit\n");
  373. #endif
  374. /* Only once per cleanup, determine fragment range to
  375. * process. This avoids an endless loop (i.e. lockup) if
  376. * the device became confused, incrementing device_curr_frag
  377. * rapidly. */
  378. curr_frag = le32_to_cpu(cb->device_curr_frag[ISL38XX_CB_TX_MGMTQ]);
  379. barrier();
  380. for (; priv->index_mgmt_tx < curr_frag; priv->index_mgmt_tx++) {
  381. int index = priv->index_mgmt_tx % ISL38XX_CB_MGMT_QSIZE;
  382. struct islpci_membuf *buf = &priv->mgmt_tx[index];
  383. pci_unmap_single(priv->pdev, buf->pci_addr, buf->size,
  384. PCI_DMA_TODEVICE);
  385. buf->pci_addr = 0;
  386. kfree(buf->mem);
  387. buf->mem = NULL;
  388. buf->size = 0;
  389. }
  390. }
  391. /*
  392. * Perform one request-response transaction to the device.
  393. */
  394. int
  395. islpci_mgt_transaction(struct net_device *ndev,
  396. int operation, unsigned long oid,
  397. void *senddata, int sendlen,
  398. struct islpci_mgmtframe **recvframe)
  399. {
  400. islpci_private *priv = netdev_priv(ndev);
  401. const long wait_cycle_jiffies = (ISL38XX_WAIT_CYCLE * 10 * HZ) / 1000;
  402. long timeout_left = ISL38XX_MAX_WAIT_CYCLES * wait_cycle_jiffies;
  403. int err;
  404. DEFINE_WAIT(wait);
  405. *recvframe = NULL;
  406. if (down_interruptible(&priv->mgmt_sem))
  407. return -ERESTARTSYS;
  408. prepare_to_wait(&priv->mgmt_wqueue, &wait, TASK_UNINTERRUPTIBLE);
  409. err = islpci_mgt_transmit(ndev, operation, oid, senddata, sendlen);
  410. if (err)
  411. goto out;
  412. err = -ETIMEDOUT;
  413. while (timeout_left > 0) {
  414. int timeleft;
  415. struct islpci_mgmtframe *frame;
  416. set_current_state(TASK_UNINTERRUPTIBLE);
  417. timeleft = schedule_timeout(wait_cycle_jiffies);
  418. frame = xchg(&priv->mgmt_received, NULL);
  419. if (frame) {
  420. if (frame->header->oid == oid) {
  421. *recvframe = frame;
  422. err = 0;
  423. goto out;
  424. } else {
  425. printk(KERN_DEBUG
  426. "%s: expecting oid 0x%x, received 0x%x.\n",
  427. ndev->name, (unsigned int) oid,
  428. frame->header->oid);
  429. kfree(frame);
  430. frame = NULL;
  431. }
  432. }
  433. if (timeleft == 0) {
  434. printk(KERN_DEBUG
  435. "%s: timeout waiting for mgmt response %lu, "
  436. "triggering device\n",
  437. ndev->name, timeout_left);
  438. islpci_trigger(priv);
  439. }
  440. timeout_left += timeleft - wait_cycle_jiffies;
  441. }
  442. printk(KERN_WARNING "%s: timeout waiting for mgmt response\n",
  443. ndev->name);
  444. /* TODO: we should reset the device here */
  445. out:
  446. finish_wait(&priv->mgmt_wqueue, &wait);
  447. up(&priv->mgmt_sem);
  448. return err;
  449. }