lmc_media.c 34 KB

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  1. /* $Id: lmc_media.c,v 1.13 2000/04/11 05:25:26 asj Exp $ */
  2. #include <linux/config.h>
  3. #include <linux/kernel.h>
  4. #include <linux/string.h>
  5. #include <linux/timer.h>
  6. #include <linux/ptrace.h>
  7. #include <linux/errno.h>
  8. #include <linux/ioport.h>
  9. #include <linux/slab.h>
  10. #include <linux/interrupt.h>
  11. #include <linux/pci.h>
  12. #include <linux/in.h>
  13. #include <linux/if_arp.h>
  14. #include <linux/netdevice.h>
  15. #include <linux/etherdevice.h>
  16. #include <linux/skbuff.h>
  17. #include <linux/inet.h>
  18. #include <linux/bitops.h>
  19. #include <net/syncppp.h>
  20. #include <asm/processor.h> /* Processor type for cache alignment. */
  21. #include <asm/io.h>
  22. #include <asm/dma.h>
  23. #include <asm/uaccess.h>
  24. #include "lmc.h"
  25. #include "lmc_var.h"
  26. #include "lmc_ioctl.h"
  27. #include "lmc_debug.h"
  28. #define CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE 1
  29. /*
  30. * Copyright (c) 1997-2000 LAN Media Corporation (LMC)
  31. * All rights reserved. www.lanmedia.com
  32. *
  33. * This code is written by:
  34. * Andrew Stanley-Jones (asj@cban.com)
  35. * Rob Braun (bbraun@vix.com),
  36. * Michael Graff (explorer@vix.com) and
  37. * Matt Thomas (matt@3am-software.com).
  38. *
  39. * This software may be used and distributed according to the terms
  40. * of the GNU General Public License version 2, incorporated herein by reference.
  41. */
  42. /*
  43. * For lack of a better place, put the SSI cable stuff here.
  44. */
  45. char *lmc_t1_cables[] = {
  46. "V.10/RS423", "EIA530A", "reserved", "X.21", "V.35",
  47. "EIA449/EIA530/V.36", "V.28/EIA232", "none", NULL
  48. };
  49. /*
  50. * protocol independent method.
  51. */
  52. static void lmc_set_protocol (lmc_softc_t * const, lmc_ctl_t *);
  53. /*
  54. * media independent methods to check on media status, link, light LEDs,
  55. * etc.
  56. */
  57. static void lmc_ds3_init (lmc_softc_t * const);
  58. static void lmc_ds3_default (lmc_softc_t * const);
  59. static void lmc_ds3_set_status (lmc_softc_t * const, lmc_ctl_t *);
  60. static void lmc_ds3_set_100ft (lmc_softc_t * const, int);
  61. static int lmc_ds3_get_link_status (lmc_softc_t * const);
  62. static void lmc_ds3_set_crc_length (lmc_softc_t * const, int);
  63. static void lmc_ds3_set_scram (lmc_softc_t * const, int);
  64. static void lmc_ds3_watchdog (lmc_softc_t * const);
  65. static void lmc_hssi_init (lmc_softc_t * const);
  66. static void lmc_hssi_default (lmc_softc_t * const);
  67. static void lmc_hssi_set_status (lmc_softc_t * const, lmc_ctl_t *);
  68. static void lmc_hssi_set_clock (lmc_softc_t * const, int);
  69. static int lmc_hssi_get_link_status (lmc_softc_t * const);
  70. static void lmc_hssi_set_link_status (lmc_softc_t * const, int);
  71. static void lmc_hssi_set_crc_length (lmc_softc_t * const, int);
  72. static void lmc_hssi_watchdog (lmc_softc_t * const);
  73. static void lmc_ssi_init (lmc_softc_t * const);
  74. static void lmc_ssi_default (lmc_softc_t * const);
  75. static void lmc_ssi_set_status (lmc_softc_t * const, lmc_ctl_t *);
  76. static void lmc_ssi_set_clock (lmc_softc_t * const, int);
  77. static void lmc_ssi_set_speed (lmc_softc_t * const, lmc_ctl_t *);
  78. static int lmc_ssi_get_link_status (lmc_softc_t * const);
  79. static void lmc_ssi_set_link_status (lmc_softc_t * const, int);
  80. static void lmc_ssi_set_crc_length (lmc_softc_t * const, int);
  81. static void lmc_ssi_watchdog (lmc_softc_t * const);
  82. static void lmc_t1_init (lmc_softc_t * const);
  83. static void lmc_t1_default (lmc_softc_t * const);
  84. static void lmc_t1_set_status (lmc_softc_t * const, lmc_ctl_t *);
  85. static int lmc_t1_get_link_status (lmc_softc_t * const);
  86. static void lmc_t1_set_circuit_type (lmc_softc_t * const, int);
  87. static void lmc_t1_set_crc_length (lmc_softc_t * const, int);
  88. static void lmc_t1_set_clock (lmc_softc_t * const, int);
  89. static void lmc_t1_watchdog (lmc_softc_t * const);
  90. static void lmc_dummy_set_1 (lmc_softc_t * const, int);
  91. static void lmc_dummy_set2_1 (lmc_softc_t * const, lmc_ctl_t *);
  92. static inline void write_av9110_bit (lmc_softc_t *, int);
  93. static void write_av9110 (lmc_softc_t *, u_int32_t, u_int32_t, u_int32_t,
  94. u_int32_t, u_int32_t);
  95. lmc_media_t lmc_ds3_media = {
  96. lmc_ds3_init, /* special media init stuff */
  97. lmc_ds3_default, /* reset to default state */
  98. lmc_ds3_set_status, /* reset status to state provided */
  99. lmc_dummy_set_1, /* set clock source */
  100. lmc_dummy_set2_1, /* set line speed */
  101. lmc_ds3_set_100ft, /* set cable length */
  102. lmc_ds3_set_scram, /* set scrambler */
  103. lmc_ds3_get_link_status, /* get link status */
  104. lmc_dummy_set_1, /* set link status */
  105. lmc_ds3_set_crc_length, /* set CRC length */
  106. lmc_dummy_set_1, /* set T1 or E1 circuit type */
  107. lmc_ds3_watchdog
  108. };
  109. lmc_media_t lmc_hssi_media = {
  110. lmc_hssi_init, /* special media init stuff */
  111. lmc_hssi_default, /* reset to default state */
  112. lmc_hssi_set_status, /* reset status to state provided */
  113. lmc_hssi_set_clock, /* set clock source */
  114. lmc_dummy_set2_1, /* set line speed */
  115. lmc_dummy_set_1, /* set cable length */
  116. lmc_dummy_set_1, /* set scrambler */
  117. lmc_hssi_get_link_status, /* get link status */
  118. lmc_hssi_set_link_status, /* set link status */
  119. lmc_hssi_set_crc_length, /* set CRC length */
  120. lmc_dummy_set_1, /* set T1 or E1 circuit type */
  121. lmc_hssi_watchdog
  122. };
  123. lmc_media_t lmc_ssi_media = { lmc_ssi_init, /* special media init stuff */
  124. lmc_ssi_default, /* reset to default state */
  125. lmc_ssi_set_status, /* reset status to state provided */
  126. lmc_ssi_set_clock, /* set clock source */
  127. lmc_ssi_set_speed, /* set line speed */
  128. lmc_dummy_set_1, /* set cable length */
  129. lmc_dummy_set_1, /* set scrambler */
  130. lmc_ssi_get_link_status, /* get link status */
  131. lmc_ssi_set_link_status, /* set link status */
  132. lmc_ssi_set_crc_length, /* set CRC length */
  133. lmc_dummy_set_1, /* set T1 or E1 circuit type */
  134. lmc_ssi_watchdog
  135. };
  136. lmc_media_t lmc_t1_media = {
  137. lmc_t1_init, /* special media init stuff */
  138. lmc_t1_default, /* reset to default state */
  139. lmc_t1_set_status, /* reset status to state provided */
  140. lmc_t1_set_clock, /* set clock source */
  141. lmc_dummy_set2_1, /* set line speed */
  142. lmc_dummy_set_1, /* set cable length */
  143. lmc_dummy_set_1, /* set scrambler */
  144. lmc_t1_get_link_status, /* get link status */
  145. lmc_dummy_set_1, /* set link status */
  146. lmc_t1_set_crc_length, /* set CRC length */
  147. lmc_t1_set_circuit_type, /* set T1 or E1 circuit type */
  148. lmc_t1_watchdog
  149. };
  150. static void
  151. lmc_dummy_set_1 (lmc_softc_t * const sc, int a)
  152. {
  153. }
  154. static void
  155. lmc_dummy_set2_1 (lmc_softc_t * const sc, lmc_ctl_t * a)
  156. {
  157. }
  158. /*
  159. * HSSI methods
  160. */
  161. static void
  162. lmc_hssi_init (lmc_softc_t * const sc)
  163. {
  164. sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5200;
  165. lmc_gpio_mkoutput (sc, LMC_GEP_HSSI_CLOCK);
  166. }
  167. static void
  168. lmc_hssi_default (lmc_softc_t * const sc)
  169. {
  170. sc->lmc_miireg16 = LMC_MII16_LED_ALL;
  171. sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
  172. sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
  173. sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
  174. }
  175. /*
  176. * Given a user provided state, set ourselves up to match it. This will
  177. * always reset the card if needed.
  178. */
  179. static void
  180. lmc_hssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
  181. {
  182. if (ctl == NULL)
  183. {
  184. sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source);
  185. lmc_set_protocol (sc, NULL);
  186. return;
  187. }
  188. /*
  189. * check for change in clock source
  190. */
  191. if (ctl->clock_source && !sc->ictl.clock_source)
  192. {
  193. sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT);
  194. sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT;
  195. }
  196. else if (!ctl->clock_source && sc->ictl.clock_source)
  197. {
  198. sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
  199. sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
  200. }
  201. lmc_set_protocol (sc, ctl);
  202. }
  203. /*
  204. * 1 == internal, 0 == external
  205. */
  206. static void
  207. lmc_hssi_set_clock (lmc_softc_t * const sc, int ie)
  208. {
  209. int old;
  210. old = sc->ictl.clock_source;
  211. if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
  212. {
  213. sc->lmc_gpio |= LMC_GEP_HSSI_CLOCK;
  214. LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
  215. sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
  216. if(old != ie)
  217. printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
  218. }
  219. else
  220. {
  221. sc->lmc_gpio &= ~(LMC_GEP_HSSI_CLOCK);
  222. LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
  223. sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
  224. if(old != ie)
  225. printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
  226. }
  227. }
  228. /*
  229. * return hardware link status.
  230. * 0 == link is down, 1 == link is up.
  231. */
  232. static int
  233. lmc_hssi_get_link_status (lmc_softc_t * const sc)
  234. {
  235. /*
  236. * We're using the same code as SSI since
  237. * they're practically the same
  238. */
  239. return lmc_ssi_get_link_status(sc);
  240. }
  241. static void
  242. lmc_hssi_set_link_status (lmc_softc_t * const sc, int state)
  243. {
  244. if (state == LMC_LINK_UP)
  245. sc->lmc_miireg16 |= LMC_MII16_HSSI_TA;
  246. else
  247. sc->lmc_miireg16 &= ~LMC_MII16_HSSI_TA;
  248. lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
  249. }
  250. /*
  251. * 0 == 16bit, 1 == 32bit
  252. */
  253. static void
  254. lmc_hssi_set_crc_length (lmc_softc_t * const sc, int state)
  255. {
  256. if (state == LMC_CTL_CRC_LENGTH_32)
  257. {
  258. /* 32 bit */
  259. sc->lmc_miireg16 |= LMC_MII16_HSSI_CRC;
  260. sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
  261. }
  262. else
  263. {
  264. /* 16 bit */
  265. sc->lmc_miireg16 &= ~LMC_MII16_HSSI_CRC;
  266. sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
  267. }
  268. lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
  269. }
  270. static void
  271. lmc_hssi_watchdog (lmc_softc_t * const sc)
  272. {
  273. /* HSSI is blank */
  274. }
  275. /*
  276. * DS3 methods
  277. */
  278. /*
  279. * Set cable length
  280. */
  281. static void
  282. lmc_ds3_set_100ft (lmc_softc_t * const sc, int ie)
  283. {
  284. if (ie == LMC_CTL_CABLE_LENGTH_GT_100FT)
  285. {
  286. sc->lmc_miireg16 &= ~LMC_MII16_DS3_ZERO;
  287. sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_GT_100FT;
  288. }
  289. else if (ie == LMC_CTL_CABLE_LENGTH_LT_100FT)
  290. {
  291. sc->lmc_miireg16 |= LMC_MII16_DS3_ZERO;
  292. sc->ictl.cable_length = LMC_CTL_CABLE_LENGTH_LT_100FT;
  293. }
  294. lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
  295. }
  296. static void
  297. lmc_ds3_default (lmc_softc_t * const sc)
  298. {
  299. sc->lmc_miireg16 = LMC_MII16_LED_ALL;
  300. sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
  301. sc->lmc_media->set_cable_length (sc, LMC_CTL_CABLE_LENGTH_LT_100FT);
  302. sc->lmc_media->set_scrambler (sc, LMC_CTL_OFF);
  303. sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
  304. }
  305. /*
  306. * Given a user provided state, set ourselves up to match it. This will
  307. * always reset the card if needed.
  308. */
  309. static void
  310. lmc_ds3_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
  311. {
  312. if (ctl == NULL)
  313. {
  314. sc->lmc_media->set_cable_length (sc, sc->ictl.cable_length);
  315. sc->lmc_media->set_scrambler (sc, sc->ictl.scrambler_onoff);
  316. lmc_set_protocol (sc, NULL);
  317. return;
  318. }
  319. /*
  320. * check for change in cable length setting
  321. */
  322. if (ctl->cable_length && !sc->ictl.cable_length)
  323. lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_GT_100FT);
  324. else if (!ctl->cable_length && sc->ictl.cable_length)
  325. lmc_ds3_set_100ft (sc, LMC_CTL_CABLE_LENGTH_LT_100FT);
  326. /*
  327. * Check for change in scrambler setting (requires reset)
  328. */
  329. if (ctl->scrambler_onoff && !sc->ictl.scrambler_onoff)
  330. lmc_ds3_set_scram (sc, LMC_CTL_ON);
  331. else if (!ctl->scrambler_onoff && sc->ictl.scrambler_onoff)
  332. lmc_ds3_set_scram (sc, LMC_CTL_OFF);
  333. lmc_set_protocol (sc, ctl);
  334. }
  335. static void
  336. lmc_ds3_init (lmc_softc_t * const sc)
  337. {
  338. int i;
  339. sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC5245;
  340. /* writes zeros everywhere */
  341. for (i = 0; i < 21; i++)
  342. {
  343. lmc_mii_writereg (sc, 0, 17, i);
  344. lmc_mii_writereg (sc, 0, 18, 0);
  345. }
  346. /* set some essential bits */
  347. lmc_mii_writereg (sc, 0, 17, 1);
  348. lmc_mii_writereg (sc, 0, 18, 0x25); /* ser, xtx */
  349. lmc_mii_writereg (sc, 0, 17, 5);
  350. lmc_mii_writereg (sc, 0, 18, 0x80); /* emode */
  351. lmc_mii_writereg (sc, 0, 17, 14);
  352. lmc_mii_writereg (sc, 0, 18, 0x30); /* rcgen, tcgen */
  353. /* clear counters and latched bits */
  354. for (i = 0; i < 21; i++)
  355. {
  356. lmc_mii_writereg (sc, 0, 17, i);
  357. lmc_mii_readreg (sc, 0, 18);
  358. }
  359. }
  360. /*
  361. * 1 == DS3 payload scrambled, 0 == not scrambled
  362. */
  363. static void
  364. lmc_ds3_set_scram (lmc_softc_t * const sc, int ie)
  365. {
  366. if (ie == LMC_CTL_ON)
  367. {
  368. sc->lmc_miireg16 |= LMC_MII16_DS3_SCRAM;
  369. sc->ictl.scrambler_onoff = LMC_CTL_ON;
  370. }
  371. else
  372. {
  373. sc->lmc_miireg16 &= ~LMC_MII16_DS3_SCRAM;
  374. sc->ictl.scrambler_onoff = LMC_CTL_OFF;
  375. }
  376. lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
  377. }
  378. /*
  379. * return hardware link status.
  380. * 0 == link is down, 1 == link is up.
  381. */
  382. static int
  383. lmc_ds3_get_link_status (lmc_softc_t * const sc)
  384. {
  385. u_int16_t link_status, link_status_11;
  386. int ret = 1;
  387. lmc_mii_writereg (sc, 0, 17, 7);
  388. link_status = lmc_mii_readreg (sc, 0, 18);
  389. /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions
  390. * led0 yellow = far-end adapter is in Red alarm condition
  391. * led1 blue = received an Alarm Indication signal
  392. * (upstream failure)
  393. * led2 Green = power to adapter, Gate Array loaded & driver
  394. * attached
  395. * led3 red = Loss of Signal (LOS) or out of frame (OOF)
  396. * conditions detected on T3 receive signal
  397. */
  398. lmc_led_on(sc, LMC_DS3_LED2);
  399. if ((link_status & LMC_FRAMER_REG0_DLOS) ||
  400. (link_status & LMC_FRAMER_REG0_OOFS)){
  401. ret = 0;
  402. if(sc->last_led_err[3] != 1){
  403. u16 r1;
  404. lmc_mii_writereg (sc, 0, 17, 01); /* Turn on Xbit error as our cisco does */
  405. r1 = lmc_mii_readreg (sc, 0, 18);
  406. r1 &= 0xfe;
  407. lmc_mii_writereg(sc, 0, 18, r1);
  408. printk(KERN_WARNING "%s: Red Alarm - Loss of Signal or Loss of Framing\n", sc->name);
  409. }
  410. lmc_led_on(sc, LMC_DS3_LED3); /* turn on red LED */
  411. sc->last_led_err[3] = 1;
  412. }
  413. else {
  414. lmc_led_off(sc, LMC_DS3_LED3); /* turn on red LED */
  415. if(sc->last_led_err[3] == 1){
  416. u16 r1;
  417. lmc_mii_writereg (sc, 0, 17, 01); /* Turn off Xbit error */
  418. r1 = lmc_mii_readreg (sc, 0, 18);
  419. r1 |= 0x01;
  420. lmc_mii_writereg(sc, 0, 18, r1);
  421. }
  422. sc->last_led_err[3] = 0;
  423. }
  424. lmc_mii_writereg(sc, 0, 17, 0x10);
  425. link_status_11 = lmc_mii_readreg(sc, 0, 18);
  426. if((link_status & LMC_FRAMER_REG0_AIS) ||
  427. (link_status_11 & LMC_FRAMER_REG10_XBIT)) {
  428. ret = 0;
  429. if(sc->last_led_err[0] != 1){
  430. printk(KERN_WARNING "%s: AIS Alarm or XBit Error\n", sc->name);
  431. printk(KERN_WARNING "%s: Remote end has loss of signal or framing\n", sc->name);
  432. }
  433. lmc_led_on(sc, LMC_DS3_LED0);
  434. sc->last_led_err[0] = 1;
  435. }
  436. else {
  437. lmc_led_off(sc, LMC_DS3_LED0);
  438. sc->last_led_err[0] = 0;
  439. }
  440. lmc_mii_writereg (sc, 0, 17, 9);
  441. link_status = lmc_mii_readreg (sc, 0, 18);
  442. if(link_status & LMC_FRAMER_REG9_RBLUE){
  443. ret = 0;
  444. if(sc->last_led_err[1] != 1){
  445. printk(KERN_WARNING "%s: Blue Alarm - Receiving all 1's\n", sc->name);
  446. }
  447. lmc_led_on(sc, LMC_DS3_LED1);
  448. sc->last_led_err[1] = 1;
  449. }
  450. else {
  451. lmc_led_off(sc, LMC_DS3_LED1);
  452. sc->last_led_err[1] = 0;
  453. }
  454. return ret;
  455. }
  456. /*
  457. * 0 == 16bit, 1 == 32bit
  458. */
  459. static void
  460. lmc_ds3_set_crc_length (lmc_softc_t * const sc, int state)
  461. {
  462. if (state == LMC_CTL_CRC_LENGTH_32)
  463. {
  464. /* 32 bit */
  465. sc->lmc_miireg16 |= LMC_MII16_DS3_CRC;
  466. sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
  467. }
  468. else
  469. {
  470. /* 16 bit */
  471. sc->lmc_miireg16 &= ~LMC_MII16_DS3_CRC;
  472. sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
  473. }
  474. lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
  475. }
  476. static void
  477. lmc_ds3_watchdog (lmc_softc_t * const sc)
  478. {
  479. }
  480. /*
  481. * SSI methods
  482. */
  483. static void
  484. lmc_ssi_init (lmc_softc_t * const sc)
  485. {
  486. u_int16_t mii17;
  487. int cable;
  488. sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1000;
  489. mii17 = lmc_mii_readreg (sc, 0, 17);
  490. cable = (mii17 & LMC_MII17_SSI_CABLE_MASK) >> LMC_MII17_SSI_CABLE_SHIFT;
  491. sc->ictl.cable_type = cable;
  492. lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK);
  493. }
  494. static void
  495. lmc_ssi_default (lmc_softc_t * const sc)
  496. {
  497. sc->lmc_miireg16 = LMC_MII16_LED_ALL;
  498. /*
  499. * make TXCLOCK always be an output
  500. */
  501. lmc_gpio_mkoutput (sc, LMC_GEP_SSI_TXCLOCK);
  502. sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
  503. sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
  504. sc->lmc_media->set_speed (sc, NULL);
  505. sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
  506. }
  507. /*
  508. * Given a user provided state, set ourselves up to match it. This will
  509. * always reset the card if needed.
  510. */
  511. static void
  512. lmc_ssi_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
  513. {
  514. if (ctl == NULL)
  515. {
  516. sc->lmc_media->set_clock_source (sc, sc->ictl.clock_source);
  517. sc->lmc_media->set_speed (sc, &sc->ictl);
  518. lmc_set_protocol (sc, NULL);
  519. return;
  520. }
  521. /*
  522. * check for change in clock source
  523. */
  524. if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_INT
  525. && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_EXT)
  526. {
  527. sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_INT);
  528. sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_INT;
  529. }
  530. else if (ctl->clock_source == LMC_CTL_CLOCK_SOURCE_EXT
  531. && sc->ictl.clock_source == LMC_CTL_CLOCK_SOURCE_INT)
  532. {
  533. sc->lmc_media->set_clock_source (sc, LMC_CTL_CLOCK_SOURCE_EXT);
  534. sc->lmc_timing = LMC_CTL_CLOCK_SOURCE_EXT;
  535. }
  536. if (ctl->clock_rate != sc->ictl.clock_rate)
  537. sc->lmc_media->set_speed (sc, ctl);
  538. lmc_set_protocol (sc, ctl);
  539. }
  540. /*
  541. * 1 == internal, 0 == external
  542. */
  543. static void
  544. lmc_ssi_set_clock (lmc_softc_t * const sc, int ie)
  545. {
  546. int old;
  547. old = ie;
  548. if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
  549. {
  550. sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK);
  551. LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
  552. sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
  553. if(ie != old)
  554. printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
  555. }
  556. else
  557. {
  558. sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK;
  559. LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
  560. sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
  561. if(ie != old)
  562. printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
  563. }
  564. }
  565. static void
  566. lmc_ssi_set_speed (lmc_softc_t * const sc, lmc_ctl_t * ctl)
  567. {
  568. lmc_ctl_t *ictl = &sc->ictl;
  569. lmc_av9110_t *av;
  570. /* original settings for clock rate of:
  571. * 100 Khz (8,25,0,0,2) were incorrect
  572. * they should have been 80,125,1,3,3
  573. * There are 17 param combinations to produce this freq.
  574. * For 1.5 Mhz use 120,100,1,1,2 (226 param. combinations)
  575. */
  576. if (ctl == NULL)
  577. {
  578. av = &ictl->cardspec.ssi;
  579. ictl->clock_rate = 1500000;
  580. av->f = ictl->clock_rate;
  581. av->n = 120;
  582. av->m = 100;
  583. av->v = 1;
  584. av->x = 1;
  585. av->r = 2;
  586. write_av9110 (sc, av->n, av->m, av->v, av->x, av->r);
  587. return;
  588. }
  589. av = &ctl->cardspec.ssi;
  590. if (av->f == 0)
  591. return;
  592. ictl->clock_rate = av->f; /* really, this is the rate we are */
  593. ictl->cardspec.ssi = *av;
  594. write_av9110 (sc, av->n, av->m, av->v, av->x, av->r);
  595. }
  596. /*
  597. * return hardware link status.
  598. * 0 == link is down, 1 == link is up.
  599. */
  600. static int
  601. lmc_ssi_get_link_status (lmc_softc_t * const sc)
  602. {
  603. u_int16_t link_status;
  604. u_int32_t ticks;
  605. int ret = 1;
  606. int hw_hdsk = 1;
  607. /*
  608. * missing CTS? Hmm. If we require CTS on, we may never get the
  609. * link to come up, so omit it in this test.
  610. *
  611. * Also, it seems that with a loopback cable, DCD isn't asserted,
  612. * so just check for things like this:
  613. * DSR _must_ be asserted.
  614. * One of DCD or CTS must be asserted.
  615. */
  616. /* LMC 1000 (SSI) LED definitions
  617. * led0 Green = power to adapter, Gate Array loaded &
  618. * driver attached
  619. * led1 Green = DSR and DTR and RTS and CTS are set
  620. * led2 Green = Cable detected
  621. * led3 red = No timing is available from the
  622. * cable or the on-board frequency
  623. * generator.
  624. */
  625. link_status = lmc_mii_readreg (sc, 0, 16);
  626. /* Is the transmit clock still available */
  627. ticks = LMC_CSR_READ (sc, csr_gp_timer);
  628. ticks = 0x0000ffff - (ticks & 0x0000ffff);
  629. lmc_led_on (sc, LMC_MII16_LED0);
  630. /* ====== transmit clock determination ===== */
  631. if (sc->lmc_timing == LMC_CTL_CLOCK_SOURCE_INT) {
  632. lmc_led_off(sc, LMC_MII16_LED3);
  633. }
  634. else if (ticks == 0 ) { /* no clock found ? */
  635. ret = 0;
  636. if(sc->last_led_err[3] != 1){
  637. sc->stats.tx_lossOfClockCnt++;
  638. printk(KERN_WARNING "%s: Lost Clock, Link Down\n", sc->name);
  639. }
  640. sc->last_led_err[3] = 1;
  641. lmc_led_on (sc, LMC_MII16_LED3); /* turn ON red LED */
  642. }
  643. else {
  644. if(sc->last_led_err[3] == 1)
  645. printk(KERN_WARNING "%s: Clock Returned\n", sc->name);
  646. sc->last_led_err[3] = 0;
  647. lmc_led_off (sc, LMC_MII16_LED3); /* turn OFF red LED */
  648. }
  649. if ((link_status & LMC_MII16_SSI_DSR) == 0) { /* Also HSSI CA */
  650. ret = 0;
  651. hw_hdsk = 0;
  652. }
  653. #ifdef CONFIG_LMC_IGNORE_HARDWARE_HANDSHAKE
  654. if ((link_status & (LMC_MII16_SSI_CTS | LMC_MII16_SSI_DCD)) == 0){
  655. ret = 0;
  656. hw_hdsk = 0;
  657. }
  658. #endif
  659. if(hw_hdsk == 0){
  660. if(sc->last_led_err[1] != 1)
  661. printk(KERN_WARNING "%s: DSR not asserted\n", sc->name);
  662. sc->last_led_err[1] = 1;
  663. lmc_led_off(sc, LMC_MII16_LED1);
  664. }
  665. else {
  666. if(sc->last_led_err[1] != 0)
  667. printk(KERN_WARNING "%s: DSR now asserted\n", sc->name);
  668. sc->last_led_err[1] = 0;
  669. lmc_led_on(sc, LMC_MII16_LED1);
  670. }
  671. if(ret == 1) {
  672. lmc_led_on(sc, LMC_MII16_LED2); /* Over all good status? */
  673. }
  674. return ret;
  675. }
  676. static void
  677. lmc_ssi_set_link_status (lmc_softc_t * const sc, int state)
  678. {
  679. if (state == LMC_LINK_UP)
  680. {
  681. sc->lmc_miireg16 |= (LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS);
  682. printk (LMC_PRINTF_FMT ": asserting DTR and RTS\n", LMC_PRINTF_ARGS);
  683. }
  684. else
  685. {
  686. sc->lmc_miireg16 &= ~(LMC_MII16_SSI_DTR | LMC_MII16_SSI_RTS);
  687. printk (LMC_PRINTF_FMT ": deasserting DTR and RTS\n", LMC_PRINTF_ARGS);
  688. }
  689. lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
  690. }
  691. /*
  692. * 0 == 16bit, 1 == 32bit
  693. */
  694. static void
  695. lmc_ssi_set_crc_length (lmc_softc_t * const sc, int state)
  696. {
  697. if (state == LMC_CTL_CRC_LENGTH_32)
  698. {
  699. /* 32 bit */
  700. sc->lmc_miireg16 |= LMC_MII16_SSI_CRC;
  701. sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
  702. sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4;
  703. }
  704. else
  705. {
  706. /* 16 bit */
  707. sc->lmc_miireg16 &= ~LMC_MII16_SSI_CRC;
  708. sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
  709. sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2;
  710. }
  711. lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
  712. }
  713. /*
  714. * These are bits to program the ssi frequency generator
  715. */
  716. static inline void
  717. write_av9110_bit (lmc_softc_t * sc, int c)
  718. {
  719. /*
  720. * set the data bit as we need it.
  721. */
  722. sc->lmc_gpio &= ~(LMC_GEP_CLK);
  723. if (c & 0x01)
  724. sc->lmc_gpio |= LMC_GEP_DATA;
  725. else
  726. sc->lmc_gpio &= ~(LMC_GEP_DATA);
  727. LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
  728. /*
  729. * set the clock to high
  730. */
  731. sc->lmc_gpio |= LMC_GEP_CLK;
  732. LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
  733. /*
  734. * set the clock to low again.
  735. */
  736. sc->lmc_gpio &= ~(LMC_GEP_CLK);
  737. LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
  738. }
  739. static void
  740. write_av9110 (lmc_softc_t * sc, u_int32_t n, u_int32_t m, u_int32_t v,
  741. u_int32_t x, u_int32_t r)
  742. {
  743. int i;
  744. #if 0
  745. printk (LMC_PRINTF_FMT ": speed %u, %d %d %d %d %d\n",
  746. LMC_PRINTF_ARGS, sc->ictl.clock_rate, n, m, v, x, r);
  747. #endif
  748. sc->lmc_gpio |= LMC_GEP_SSI_GENERATOR;
  749. sc->lmc_gpio &= ~(LMC_GEP_DATA | LMC_GEP_CLK);
  750. LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
  751. /*
  752. * Set the TXCLOCK, GENERATOR, SERIAL, and SERIALCLK
  753. * as outputs.
  754. */
  755. lmc_gpio_mkoutput (sc, (LMC_GEP_DATA | LMC_GEP_CLK
  756. | LMC_GEP_SSI_GENERATOR));
  757. sc->lmc_gpio &= ~(LMC_GEP_SSI_GENERATOR);
  758. LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
  759. /*
  760. * a shifting we will go...
  761. */
  762. for (i = 0; i < 7; i++)
  763. write_av9110_bit (sc, n >> i);
  764. for (i = 0; i < 7; i++)
  765. write_av9110_bit (sc, m >> i);
  766. for (i = 0; i < 1; i++)
  767. write_av9110_bit (sc, v >> i);
  768. for (i = 0; i < 2; i++)
  769. write_av9110_bit (sc, x >> i);
  770. for (i = 0; i < 2; i++)
  771. write_av9110_bit (sc, r >> i);
  772. for (i = 0; i < 5; i++)
  773. write_av9110_bit (sc, 0x17 >> i);
  774. /*
  775. * stop driving serial-related signals
  776. */
  777. lmc_gpio_mkinput (sc,
  778. (LMC_GEP_DATA | LMC_GEP_CLK
  779. | LMC_GEP_SSI_GENERATOR));
  780. }
  781. static void
  782. lmc_ssi_watchdog (lmc_softc_t * const sc)
  783. {
  784. u_int16_t mii17;
  785. struct ssicsr2
  786. {
  787. unsigned short dtr:1, dsr:1, rts:1, cable:3, crc:1, led0:1, led1:1,
  788. led2:1, led3:1, fifo:1, ll:1, rl:1, tm:1, loop:1;
  789. };
  790. struct ssicsr2 *ssicsr;
  791. mii17 = lmc_mii_readreg (sc, 0, 17);
  792. ssicsr = (struct ssicsr2 *) &mii17;
  793. if (ssicsr->cable == 7)
  794. {
  795. lmc_led_off (sc, LMC_MII16_LED2);
  796. }
  797. else
  798. {
  799. lmc_led_on (sc, LMC_MII16_LED2);
  800. }
  801. }
  802. /*
  803. * T1 methods
  804. */
  805. /*
  806. * The framer regs are multiplexed through MII regs 17 & 18
  807. * write the register address to MII reg 17 and the * data to MII reg 18. */
  808. static void
  809. lmc_t1_write (lmc_softc_t * const sc, int a, int d)
  810. {
  811. lmc_mii_writereg (sc, 0, 17, a);
  812. lmc_mii_writereg (sc, 0, 18, d);
  813. }
  814. /* Save a warning
  815. static int
  816. lmc_t1_read (lmc_softc_t * const sc, int a)
  817. {
  818. lmc_mii_writereg (sc, 0, 17, a);
  819. return lmc_mii_readreg (sc, 0, 18);
  820. }
  821. */
  822. static void
  823. lmc_t1_init (lmc_softc_t * const sc)
  824. {
  825. u_int16_t mii16;
  826. int i;
  827. sc->ictl.cardtype = LMC_CTL_CARDTYPE_LMC1200;
  828. mii16 = lmc_mii_readreg (sc, 0, 16);
  829. /* reset 8370 */
  830. mii16 &= ~LMC_MII16_T1_RST;
  831. lmc_mii_writereg (sc, 0, 16, mii16 | LMC_MII16_T1_RST);
  832. lmc_mii_writereg (sc, 0, 16, mii16);
  833. /* set T1 or E1 line. Uses sc->lmcmii16 reg in function so update it */
  834. sc->lmc_miireg16 = mii16;
  835. lmc_t1_set_circuit_type(sc, LMC_CTL_CIRCUIT_TYPE_T1);
  836. mii16 = sc->lmc_miireg16;
  837. lmc_t1_write (sc, 0x01, 0x1B); /* CR0 - primary control */
  838. lmc_t1_write (sc, 0x02, 0x42); /* JAT_CR - jitter atten config */
  839. lmc_t1_write (sc, 0x14, 0x00); /* LOOP - loopback config */
  840. lmc_t1_write (sc, 0x15, 0x00); /* DL3_TS - external data link timeslot */
  841. lmc_t1_write (sc, 0x18, 0xFF); /* PIO - programmable I/O */
  842. lmc_t1_write (sc, 0x19, 0x30); /* POE - programmable OE */
  843. lmc_t1_write (sc, 0x1A, 0x0F); /* CMUX - clock input mux */
  844. lmc_t1_write (sc, 0x20, 0x41); /* LIU_CR - RX LIU config */
  845. lmc_t1_write (sc, 0x22, 0x76); /* RLIU_CR - RX LIU config */
  846. lmc_t1_write (sc, 0x40, 0x03); /* RCR0 - RX config */
  847. lmc_t1_write (sc, 0x45, 0x00); /* RALM - RX alarm config */
  848. lmc_t1_write (sc, 0x46, 0x05); /* LATCH - RX alarm/err/cntr latch */
  849. lmc_t1_write (sc, 0x68, 0x40); /* TLIU_CR - TX LIU config */
  850. lmc_t1_write (sc, 0x70, 0x0D); /* TCR0 - TX framer config */
  851. lmc_t1_write (sc, 0x71, 0x05); /* TCR1 - TX config */
  852. lmc_t1_write (sc, 0x72, 0x0B); /* TFRM - TX frame format */
  853. lmc_t1_write (sc, 0x73, 0x00); /* TERROR - TX error insert */
  854. lmc_t1_write (sc, 0x74, 0x00); /* TMAN - TX manual Sa/FEBE config */
  855. lmc_t1_write (sc, 0x75, 0x00); /* TALM - TX alarm signal config */
  856. lmc_t1_write (sc, 0x76, 0x00); /* TPATT - TX test pattern config */
  857. lmc_t1_write (sc, 0x77, 0x00); /* TLB - TX inband loopback config */
  858. lmc_t1_write (sc, 0x90, 0x05); /* CLAD_CR - clock rate adapter config */
  859. lmc_t1_write (sc, 0x91, 0x05); /* CSEL - clad freq sel */
  860. lmc_t1_write (sc, 0xA6, 0x00); /* DL1_CTL - DL1 control */
  861. lmc_t1_write (sc, 0xB1, 0x00); /* DL2_CTL - DL2 control */
  862. lmc_t1_write (sc, 0xD0, 0x47); /* SBI_CR - sys bus iface config */
  863. lmc_t1_write (sc, 0xD1, 0x70); /* RSB_CR - RX sys bus config */
  864. lmc_t1_write (sc, 0xD4, 0x30); /* TSB_CR - TX sys bus config */
  865. for (i = 0; i < 32; i++)
  866. {
  867. lmc_t1_write (sc, 0x0E0 + i, 0x00); /* SBCn - sys bus per-channel ctl */
  868. lmc_t1_write (sc, 0x100 + i, 0x00); /* TPCn - TX per-channel ctl */
  869. lmc_t1_write (sc, 0x180 + i, 0x00); /* RPCn - RX per-channel ctl */
  870. }
  871. for (i = 1; i < 25; i++)
  872. {
  873. lmc_t1_write (sc, 0x0E0 + i, 0x0D); /* SBCn - sys bus per-channel ctl */
  874. }
  875. mii16 |= LMC_MII16_T1_XOE;
  876. lmc_mii_writereg (sc, 0, 16, mii16);
  877. sc->lmc_miireg16 = mii16;
  878. }
  879. static void
  880. lmc_t1_default (lmc_softc_t * const sc)
  881. {
  882. sc->lmc_miireg16 = LMC_MII16_LED_ALL;
  883. sc->lmc_media->set_link_status (sc, LMC_LINK_DOWN);
  884. sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1);
  885. sc->lmc_media->set_crc_length (sc, LMC_CTL_CRC_LENGTH_16);
  886. /* Right now we can only clock from out internal source */
  887. sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
  888. }
  889. /* * Given a user provided state, set ourselves up to match it. This will * always reset the card if needed.
  890. */
  891. static void
  892. lmc_t1_set_status (lmc_softc_t * const sc, lmc_ctl_t * ctl)
  893. {
  894. if (ctl == NULL)
  895. {
  896. sc->lmc_media->set_circuit_type (sc, sc->ictl.circuit_type);
  897. lmc_set_protocol (sc, NULL);
  898. return;
  899. }
  900. /*
  901. * check for change in circuit type */
  902. if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_T1
  903. && sc->ictl.circuit_type ==
  904. LMC_CTL_CIRCUIT_TYPE_E1) sc->lmc_media->set_circuit_type (sc,
  905. LMC_CTL_CIRCUIT_TYPE_E1);
  906. else if (ctl->circuit_type == LMC_CTL_CIRCUIT_TYPE_E1
  907. && sc->ictl.circuit_type == LMC_CTL_CIRCUIT_TYPE_T1)
  908. sc->lmc_media->set_circuit_type (sc, LMC_CTL_CIRCUIT_TYPE_T1);
  909. lmc_set_protocol (sc, ctl);
  910. }
  911. /*
  912. * return hardware link status.
  913. * 0 == link is down, 1 == link is up.
  914. */ static int
  915. lmc_t1_get_link_status (lmc_softc_t * const sc)
  916. {
  917. u_int16_t link_status;
  918. int ret = 1;
  919. /* LMC5245 (DS3) & LMC1200 (DS1) LED definitions
  920. * led0 yellow = far-end adapter is in Red alarm condition
  921. * led1 blue = received an Alarm Indication signal
  922. * (upstream failure)
  923. * led2 Green = power to adapter, Gate Array loaded & driver
  924. * attached
  925. * led3 red = Loss of Signal (LOS) or out of frame (OOF)
  926. * conditions detected on T3 receive signal
  927. */
  928. lmc_trace(sc->lmc_device, "lmc_t1_get_link_status in");
  929. lmc_led_on(sc, LMC_DS3_LED2);
  930. lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM1_STATUS);
  931. link_status = lmc_mii_readreg (sc, 0, 18);
  932. if (link_status & T1F_RAIS) { /* turn on blue LED */
  933. ret = 0;
  934. if(sc->last_led_err[1] != 1){
  935. printk(KERN_WARNING "%s: Receive AIS/Blue Alarm. Far end in RED alarm\n", sc->name);
  936. }
  937. lmc_led_on(sc, LMC_DS3_LED1);
  938. sc->last_led_err[1] = 1;
  939. }
  940. else {
  941. if(sc->last_led_err[1] != 0){
  942. printk(KERN_WARNING "%s: End AIS/Blue Alarm\n", sc->name);
  943. }
  944. lmc_led_off (sc, LMC_DS3_LED1);
  945. sc->last_led_err[1] = 0;
  946. }
  947. /*
  948. * Yellow Alarm is nasty evil stuff, looks at data patterns
  949. * inside the channel and confuses it with HDLC framing
  950. * ignore all yellow alarms.
  951. *
  952. * Do listen to MultiFrame Yellow alarm which while implemented
  953. * different ways isn't in the channel and hence somewhat
  954. * more reliable
  955. */
  956. if (link_status & T1F_RMYEL) {
  957. ret = 0;
  958. if(sc->last_led_err[0] != 1){
  959. printk(KERN_WARNING "%s: Receive Yellow AIS Alarm\n", sc->name);
  960. }
  961. lmc_led_on(sc, LMC_DS3_LED0);
  962. sc->last_led_err[0] = 1;
  963. }
  964. else {
  965. if(sc->last_led_err[0] != 0){
  966. printk(KERN_WARNING "%s: End of Yellow AIS Alarm\n", sc->name);
  967. }
  968. lmc_led_off(sc, LMC_DS3_LED0);
  969. sc->last_led_err[0] = 0;
  970. }
  971. /*
  972. * Loss of signal and los of frame
  973. * Use the green bit to identify which one lit the led
  974. */
  975. if(link_status & T1F_RLOF){
  976. ret = 0;
  977. if(sc->last_led_err[3] != 1){
  978. printk(KERN_WARNING "%s: Local Red Alarm: Loss of Framing\n", sc->name);
  979. }
  980. lmc_led_on(sc, LMC_DS3_LED3);
  981. sc->last_led_err[3] = 1;
  982. }
  983. else {
  984. if(sc->last_led_err[3] != 0){
  985. printk(KERN_WARNING "%s: End Red Alarm (LOF)\n", sc->name);
  986. }
  987. if( ! (link_status & T1F_RLOS))
  988. lmc_led_off(sc, LMC_DS3_LED3);
  989. sc->last_led_err[3] = 0;
  990. }
  991. if(link_status & T1F_RLOS){
  992. ret = 0;
  993. if(sc->last_led_err[2] != 1){
  994. printk(KERN_WARNING "%s: Local Red Alarm: Loss of Signal\n", sc->name);
  995. }
  996. lmc_led_on(sc, LMC_DS3_LED3);
  997. sc->last_led_err[2] = 1;
  998. }
  999. else {
  1000. if(sc->last_led_err[2] != 0){
  1001. printk(KERN_WARNING "%s: End Red Alarm (LOS)\n", sc->name);
  1002. }
  1003. if( ! (link_status & T1F_RLOF))
  1004. lmc_led_off(sc, LMC_DS3_LED3);
  1005. sc->last_led_err[2] = 0;
  1006. }
  1007. sc->lmc_xinfo.t1_alarm1_status = link_status;
  1008. lmc_mii_writereg (sc, 0, 17, T1FRAMER_ALARM2_STATUS);
  1009. sc->lmc_xinfo.t1_alarm2_status = lmc_mii_readreg (sc, 0, 18);
  1010. lmc_trace(sc->lmc_device, "lmc_t1_get_link_status out");
  1011. return ret;
  1012. }
  1013. /*
  1014. * 1 == T1 Circuit Type , 0 == E1 Circuit Type
  1015. */
  1016. static void
  1017. lmc_t1_set_circuit_type (lmc_softc_t * const sc, int ie)
  1018. {
  1019. if (ie == LMC_CTL_CIRCUIT_TYPE_T1) {
  1020. sc->lmc_miireg16 |= LMC_MII16_T1_Z;
  1021. sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_T1;
  1022. printk(KERN_INFO "%s: In T1 Mode\n", sc->name);
  1023. }
  1024. else {
  1025. sc->lmc_miireg16 &= ~LMC_MII16_T1_Z;
  1026. sc->ictl.circuit_type = LMC_CTL_CIRCUIT_TYPE_E1;
  1027. printk(KERN_INFO "%s: In E1 Mode\n", sc->name);
  1028. }
  1029. lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
  1030. }
  1031. /*
  1032. * 0 == 16bit, 1 == 32bit */
  1033. static void
  1034. lmc_t1_set_crc_length (lmc_softc_t * const sc, int state)
  1035. {
  1036. if (state == LMC_CTL_CRC_LENGTH_32)
  1037. {
  1038. /* 32 bit */
  1039. sc->lmc_miireg16 |= LMC_MII16_T1_CRC;
  1040. sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_32;
  1041. sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_4;
  1042. }
  1043. else
  1044. {
  1045. /* 16 bit */ sc->lmc_miireg16 &= ~LMC_MII16_T1_CRC;
  1046. sc->ictl.crc_length = LMC_CTL_CRC_LENGTH_16;
  1047. sc->lmc_crcSize = LMC_CTL_CRC_BYTESIZE_2;
  1048. }
  1049. lmc_mii_writereg (sc, 0, 16, sc->lmc_miireg16);
  1050. }
  1051. /*
  1052. * 1 == internal, 0 == external
  1053. */
  1054. static void
  1055. lmc_t1_set_clock (lmc_softc_t * const sc, int ie)
  1056. {
  1057. int old;
  1058. old = ie;
  1059. if (ie == LMC_CTL_CLOCK_SOURCE_EXT)
  1060. {
  1061. sc->lmc_gpio &= ~(LMC_GEP_SSI_TXCLOCK);
  1062. LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
  1063. sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_EXT;
  1064. if(old != ie)
  1065. printk (LMC_PRINTF_FMT ": clock external\n", LMC_PRINTF_ARGS);
  1066. }
  1067. else
  1068. {
  1069. sc->lmc_gpio |= LMC_GEP_SSI_TXCLOCK;
  1070. LMC_CSR_WRITE (sc, csr_gp, sc->lmc_gpio);
  1071. sc->ictl.clock_source = LMC_CTL_CLOCK_SOURCE_INT;
  1072. if(old != ie)
  1073. printk (LMC_PRINTF_FMT ": clock internal\n", LMC_PRINTF_ARGS);
  1074. }
  1075. }
  1076. static void
  1077. lmc_t1_watchdog (lmc_softc_t * const sc)
  1078. {
  1079. }
  1080. static void
  1081. lmc_set_protocol (lmc_softc_t * const sc, lmc_ctl_t * ctl)
  1082. {
  1083. if (ctl == 0)
  1084. {
  1085. sc->ictl.keepalive_onoff = LMC_CTL_ON;
  1086. return;
  1087. }
  1088. }