smc91x.c 60 KB

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  1. /*
  2. * smc91x.c
  3. * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
  4. *
  5. * Copyright (C) 1996 by Erik Stahlman
  6. * Copyright (C) 2001 Standard Microsystems Corporation
  7. * Developed by Simple Network Magic Corporation
  8. * Copyright (C) 2003 Monta Vista Software, Inc.
  9. * Unified SMC91x driver by Nicolas Pitre
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. * Arguments:
  26. * io = for the base address
  27. * irq = for the IRQ
  28. * nowait = 0 for normal wait states, 1 eliminates additional wait states
  29. *
  30. * original author:
  31. * Erik Stahlman <erik@vt.edu>
  32. *
  33. * hardware multicast code:
  34. * Peter Cammaert <pc@denkart.be>
  35. *
  36. * contributors:
  37. * Daris A Nevil <dnevil@snmc.com>
  38. * Nicolas Pitre <nico@cam.org>
  39. * Russell King <rmk@arm.linux.org.uk>
  40. *
  41. * History:
  42. * 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
  43. * 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
  44. * 03/16/01 Daris A Nevil modified smc9194.c for use with LAN91C111
  45. * 08/22/01 Scott Anderson merge changes from smc9194 to smc91111
  46. * 08/21/01 Pramod B Bhardwaj added support for RevB of LAN91C111
  47. * 12/20/01 Jeff Sutherland initial port to Xscale PXA with DMA support
  48. * 04/07/03 Nicolas Pitre unified SMC91x driver, killed irq races,
  49. * more bus abstraction, big cleanup, etc.
  50. * 29/09/03 Russell King - add driver model support
  51. * - ethtool support
  52. * - convert to use generic MII interface
  53. * - add link up/down notification
  54. * - don't try to handle full negotiation in
  55. * smc_phy_configure
  56. * - clean up (and fix stack overrun) in PHY
  57. * MII read/write functions
  58. * 22/09/04 Nicolas Pitre big update (see commit log for details)
  59. */
  60. static const char version[] =
  61. "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@cam.org>\n";
  62. /* Debugging level */
  63. #ifndef SMC_DEBUG
  64. #define SMC_DEBUG 0
  65. #endif
  66. #include <linux/config.h>
  67. #include <linux/init.h>
  68. #include <linux/module.h>
  69. #include <linux/kernel.h>
  70. #include <linux/sched.h>
  71. #include <linux/slab.h>
  72. #include <linux/delay.h>
  73. #include <linux/interrupt.h>
  74. #include <linux/errno.h>
  75. #include <linux/ioport.h>
  76. #include <linux/crc32.h>
  77. #include <linux/device.h>
  78. #include <linux/spinlock.h>
  79. #include <linux/ethtool.h>
  80. #include <linux/mii.h>
  81. #include <linux/workqueue.h>
  82. #include <linux/netdevice.h>
  83. #include <linux/etherdevice.h>
  84. #include <linux/skbuff.h>
  85. #include <asm/io.h>
  86. #include <asm/irq.h>
  87. #include "smc91x.h"
  88. #ifdef CONFIG_ISA
  89. /*
  90. * the LAN91C111 can be at any of the following port addresses. To change,
  91. * for a slightly different card, you can add it to the array. Keep in
  92. * mind that the array must end in zero.
  93. */
  94. static unsigned int smc_portlist[] __initdata = {
  95. 0x200, 0x220, 0x240, 0x260, 0x280, 0x2A0, 0x2C0, 0x2E0,
  96. 0x300, 0x320, 0x340, 0x360, 0x380, 0x3A0, 0x3C0, 0x3E0, 0
  97. };
  98. #ifndef SMC_IOADDR
  99. # define SMC_IOADDR -1
  100. #endif
  101. static unsigned long io = SMC_IOADDR;
  102. module_param(io, ulong, 0400);
  103. MODULE_PARM_DESC(io, "I/O base address");
  104. #ifndef SMC_IRQ
  105. # define SMC_IRQ -1
  106. #endif
  107. static int irq = SMC_IRQ;
  108. module_param(irq, int, 0400);
  109. MODULE_PARM_DESC(irq, "IRQ number");
  110. #endif /* CONFIG_ISA */
  111. #ifndef SMC_NOWAIT
  112. # define SMC_NOWAIT 0
  113. #endif
  114. static int nowait = SMC_NOWAIT;
  115. module_param(nowait, int, 0400);
  116. MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
  117. /*
  118. * Transmit timeout, default 5 seconds.
  119. */
  120. static int watchdog = 1000;
  121. module_param(watchdog, int, 0400);
  122. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  123. MODULE_LICENSE("GPL");
  124. /*
  125. * The internal workings of the driver. If you are changing anything
  126. * here with the SMC stuff, you should have the datasheet and know
  127. * what you are doing.
  128. */
  129. #define CARDNAME "smc91x"
  130. /*
  131. * Use power-down feature of the chip
  132. */
  133. #define POWER_DOWN 1
  134. /*
  135. * Wait time for memory to be free. This probably shouldn't be
  136. * tuned that much, as waiting for this means nothing else happens
  137. * in the system
  138. */
  139. #define MEMORY_WAIT_TIME 16
  140. /*
  141. * This selects whether TX packets are sent one by one to the SMC91x internal
  142. * memory and throttled until transmission completes. This may prevent
  143. * RX overruns a litle by keeping much of the memory free for RX packets
  144. * but to the expense of reduced TX throughput and increased IRQ overhead.
  145. * Note this is not a cure for a too slow data bus or too high IRQ latency.
  146. */
  147. #define THROTTLE_TX_PKTS 0
  148. /*
  149. * The MII clock high/low times. 2x this number gives the MII clock period
  150. * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
  151. */
  152. #define MII_DELAY 1
  153. /* store this information for the driver.. */
  154. struct smc_local {
  155. /*
  156. * If I have to wait until memory is available to send a
  157. * packet, I will store the skbuff here, until I get the
  158. * desired memory. Then, I'll send it out and free it.
  159. */
  160. struct sk_buff *pending_tx_skb;
  161. struct tasklet_struct tx_task;
  162. /*
  163. * these are things that the kernel wants me to keep, so users
  164. * can find out semi-useless statistics of how well the card is
  165. * performing
  166. */
  167. struct net_device_stats stats;
  168. /* version/revision of the SMC91x chip */
  169. int version;
  170. /* Contains the current active transmission mode */
  171. int tcr_cur_mode;
  172. /* Contains the current active receive mode */
  173. int rcr_cur_mode;
  174. /* Contains the current active receive/phy mode */
  175. int rpc_cur_mode;
  176. int ctl_rfduplx;
  177. int ctl_rspeed;
  178. u32 msg_enable;
  179. u32 phy_type;
  180. struct mii_if_info mii;
  181. /* work queue */
  182. struct work_struct phy_configure;
  183. int work_pending;
  184. spinlock_t lock;
  185. #ifdef SMC_CAN_USE_DATACS
  186. u32 __iomem *datacs;
  187. #endif
  188. #ifdef SMC_USE_PXA_DMA
  189. /* DMA needs the physical address of the chip */
  190. u_long physaddr;
  191. #endif
  192. void __iomem *base;
  193. };
  194. #if SMC_DEBUG > 0
  195. #define DBG(n, args...) \
  196. do { \
  197. if (SMC_DEBUG >= (n)) \
  198. printk(args); \
  199. } while (0)
  200. #define PRINTK(args...) printk(args)
  201. #else
  202. #define DBG(n, args...) do { } while(0)
  203. #define PRINTK(args...) printk(KERN_DEBUG args)
  204. #endif
  205. #if SMC_DEBUG > 3
  206. static void PRINT_PKT(u_char *buf, int length)
  207. {
  208. int i;
  209. int remainder;
  210. int lines;
  211. lines = length / 16;
  212. remainder = length % 16;
  213. for (i = 0; i < lines ; i ++) {
  214. int cur;
  215. for (cur = 0; cur < 8; cur++) {
  216. u_char a, b;
  217. a = *buf++;
  218. b = *buf++;
  219. printk("%02x%02x ", a, b);
  220. }
  221. printk("\n");
  222. }
  223. for (i = 0; i < remainder/2 ; i++) {
  224. u_char a, b;
  225. a = *buf++;
  226. b = *buf++;
  227. printk("%02x%02x ", a, b);
  228. }
  229. printk("\n");
  230. }
  231. #else
  232. #define PRINT_PKT(x...) do { } while(0)
  233. #endif
  234. /* this enables an interrupt in the interrupt mask register */
  235. #define SMC_ENABLE_INT(x) do { \
  236. unsigned char mask; \
  237. spin_lock_irq(&lp->lock); \
  238. mask = SMC_GET_INT_MASK(); \
  239. mask |= (x); \
  240. SMC_SET_INT_MASK(mask); \
  241. spin_unlock_irq(&lp->lock); \
  242. } while (0)
  243. /* this disables an interrupt from the interrupt mask register */
  244. #define SMC_DISABLE_INT(x) do { \
  245. unsigned char mask; \
  246. spin_lock_irq(&lp->lock); \
  247. mask = SMC_GET_INT_MASK(); \
  248. mask &= ~(x); \
  249. SMC_SET_INT_MASK(mask); \
  250. spin_unlock_irq(&lp->lock); \
  251. } while (0)
  252. /*
  253. * Wait while MMU is busy. This is usually in the order of a few nanosecs
  254. * if at all, but let's avoid deadlocking the system if the hardware
  255. * decides to go south.
  256. */
  257. #define SMC_WAIT_MMU_BUSY() do { \
  258. if (unlikely(SMC_GET_MMU_CMD() & MC_BUSY)) { \
  259. unsigned long timeout = jiffies + 2; \
  260. while (SMC_GET_MMU_CMD() & MC_BUSY) { \
  261. if (time_after(jiffies, timeout)) { \
  262. printk("%s: timeout %s line %d\n", \
  263. dev->name, __FILE__, __LINE__); \
  264. break; \
  265. } \
  266. cpu_relax(); \
  267. } \
  268. } \
  269. } while (0)
  270. /*
  271. * this does a soft reset on the device
  272. */
  273. static void smc_reset(struct net_device *dev)
  274. {
  275. struct smc_local *lp = netdev_priv(dev);
  276. void __iomem *ioaddr = lp->base;
  277. unsigned int ctl, cfg;
  278. struct sk_buff *pending_skb;
  279. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  280. /* Disable all interrupts, block TX tasklet */
  281. spin_lock(&lp->lock);
  282. SMC_SELECT_BANK(2);
  283. SMC_SET_INT_MASK(0);
  284. pending_skb = lp->pending_tx_skb;
  285. lp->pending_tx_skb = NULL;
  286. spin_unlock(&lp->lock);
  287. /* free any pending tx skb */
  288. if (pending_skb) {
  289. dev_kfree_skb(pending_skb);
  290. lp->stats.tx_errors++;
  291. lp->stats.tx_aborted_errors++;
  292. }
  293. /*
  294. * This resets the registers mostly to defaults, but doesn't
  295. * affect EEPROM. That seems unnecessary
  296. */
  297. SMC_SELECT_BANK(0);
  298. SMC_SET_RCR(RCR_SOFTRST);
  299. /*
  300. * Setup the Configuration Register
  301. * This is necessary because the CONFIG_REG is not affected
  302. * by a soft reset
  303. */
  304. SMC_SELECT_BANK(1);
  305. cfg = CONFIG_DEFAULT;
  306. /*
  307. * Setup for fast accesses if requested. If the card/system
  308. * can't handle it then there will be no recovery except for
  309. * a hard reset or power cycle
  310. */
  311. if (nowait)
  312. cfg |= CONFIG_NO_WAIT;
  313. /*
  314. * Release from possible power-down state
  315. * Configuration register is not affected by Soft Reset
  316. */
  317. cfg |= CONFIG_EPH_POWER_EN;
  318. SMC_SET_CONFIG(cfg);
  319. /* this should pause enough for the chip to be happy */
  320. /*
  321. * elaborate? What does the chip _need_? --jgarzik
  322. *
  323. * This seems to be undocumented, but something the original
  324. * driver(s) have always done. Suspect undocumented timing
  325. * info/determined empirically. --rmk
  326. */
  327. udelay(1);
  328. /* Disable transmit and receive functionality */
  329. SMC_SELECT_BANK(0);
  330. SMC_SET_RCR(RCR_CLEAR);
  331. SMC_SET_TCR(TCR_CLEAR);
  332. SMC_SELECT_BANK(1);
  333. ctl = SMC_GET_CTL() | CTL_LE_ENABLE;
  334. /*
  335. * Set the control register to automatically release successfully
  336. * transmitted packets, to make the best use out of our limited
  337. * memory
  338. */
  339. if(!THROTTLE_TX_PKTS)
  340. ctl |= CTL_AUTO_RELEASE;
  341. else
  342. ctl &= ~CTL_AUTO_RELEASE;
  343. SMC_SET_CTL(ctl);
  344. /* Reset the MMU */
  345. SMC_SELECT_BANK(2);
  346. SMC_SET_MMU_CMD(MC_RESET);
  347. SMC_WAIT_MMU_BUSY();
  348. }
  349. /*
  350. * Enable Interrupts, Receive, and Transmit
  351. */
  352. static void smc_enable(struct net_device *dev)
  353. {
  354. struct smc_local *lp = netdev_priv(dev);
  355. void __iomem *ioaddr = lp->base;
  356. int mask;
  357. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  358. /* see the header file for options in TCR/RCR DEFAULT */
  359. SMC_SELECT_BANK(0);
  360. SMC_SET_TCR(lp->tcr_cur_mode);
  361. SMC_SET_RCR(lp->rcr_cur_mode);
  362. SMC_SELECT_BANK(1);
  363. SMC_SET_MAC_ADDR(dev->dev_addr);
  364. /* now, enable interrupts */
  365. mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
  366. if (lp->version >= (CHIP_91100 << 4))
  367. mask |= IM_MDINT;
  368. SMC_SELECT_BANK(2);
  369. SMC_SET_INT_MASK(mask);
  370. /*
  371. * From this point the register bank must _NOT_ be switched away
  372. * to something else than bank 2 without proper locking against
  373. * races with any tasklet or interrupt handlers until smc_shutdown()
  374. * or smc_reset() is called.
  375. */
  376. }
  377. /*
  378. * this puts the device in an inactive state
  379. */
  380. static void smc_shutdown(struct net_device *dev)
  381. {
  382. struct smc_local *lp = netdev_priv(dev);
  383. void __iomem *ioaddr = lp->base;
  384. struct sk_buff *pending_skb;
  385. DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
  386. /* no more interrupts for me */
  387. spin_lock(&lp->lock);
  388. SMC_SELECT_BANK(2);
  389. SMC_SET_INT_MASK(0);
  390. pending_skb = lp->pending_tx_skb;
  391. lp->pending_tx_skb = NULL;
  392. spin_unlock(&lp->lock);
  393. if (pending_skb)
  394. dev_kfree_skb(pending_skb);
  395. /* and tell the card to stay away from that nasty outside world */
  396. SMC_SELECT_BANK(0);
  397. SMC_SET_RCR(RCR_CLEAR);
  398. SMC_SET_TCR(TCR_CLEAR);
  399. #ifdef POWER_DOWN
  400. /* finally, shut the chip down */
  401. SMC_SELECT_BANK(1);
  402. SMC_SET_CONFIG(SMC_GET_CONFIG() & ~CONFIG_EPH_POWER_EN);
  403. #endif
  404. }
  405. /*
  406. * This is the procedure to handle the receipt of a packet.
  407. */
  408. static inline void smc_rcv(struct net_device *dev)
  409. {
  410. struct smc_local *lp = netdev_priv(dev);
  411. void __iomem *ioaddr = lp->base;
  412. unsigned int packet_number, status, packet_len;
  413. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  414. packet_number = SMC_GET_RXFIFO();
  415. if (unlikely(packet_number & RXFIFO_REMPTY)) {
  416. PRINTK("%s: smc_rcv with nothing on FIFO.\n", dev->name);
  417. return;
  418. }
  419. /* read from start of packet */
  420. SMC_SET_PTR(PTR_READ | PTR_RCV | PTR_AUTOINC);
  421. /* First two words are status and packet length */
  422. SMC_GET_PKT_HDR(status, packet_len);
  423. packet_len &= 0x07ff; /* mask off top bits */
  424. DBG(2, "%s: RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
  425. dev->name, packet_number, status,
  426. packet_len, packet_len);
  427. back:
  428. if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
  429. if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
  430. /* accept VLAN packets */
  431. status &= ~RS_TOOLONG;
  432. goto back;
  433. }
  434. if (packet_len < 6) {
  435. /* bloody hardware */
  436. printk(KERN_ERR "%s: fubar (rxlen %u status %x\n",
  437. dev->name, packet_len, status);
  438. status |= RS_TOOSHORT;
  439. }
  440. SMC_WAIT_MMU_BUSY();
  441. SMC_SET_MMU_CMD(MC_RELEASE);
  442. lp->stats.rx_errors++;
  443. if (status & RS_ALGNERR)
  444. lp->stats.rx_frame_errors++;
  445. if (status & (RS_TOOSHORT | RS_TOOLONG))
  446. lp->stats.rx_length_errors++;
  447. if (status & RS_BADCRC)
  448. lp->stats.rx_crc_errors++;
  449. } else {
  450. struct sk_buff *skb;
  451. unsigned char *data;
  452. unsigned int data_len;
  453. /* set multicast stats */
  454. if (status & RS_MULTICAST)
  455. lp->stats.multicast++;
  456. /*
  457. * Actual payload is packet_len - 6 (or 5 if odd byte).
  458. * We want skb_reserve(2) and the final ctrl word
  459. * (2 bytes, possibly containing the payload odd byte).
  460. * Furthermore, we add 2 bytes to allow rounding up to
  461. * multiple of 4 bytes on 32 bit buses.
  462. * Hence packet_len - 6 + 2 + 2 + 2.
  463. */
  464. skb = dev_alloc_skb(packet_len);
  465. if (unlikely(skb == NULL)) {
  466. printk(KERN_NOTICE "%s: Low memory, packet dropped.\n",
  467. dev->name);
  468. SMC_WAIT_MMU_BUSY();
  469. SMC_SET_MMU_CMD(MC_RELEASE);
  470. lp->stats.rx_dropped++;
  471. return;
  472. }
  473. /* Align IP header to 32 bits */
  474. skb_reserve(skb, 2);
  475. /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
  476. if (lp->version == 0x90)
  477. status |= RS_ODDFRAME;
  478. /*
  479. * If odd length: packet_len - 5,
  480. * otherwise packet_len - 6.
  481. * With the trailing ctrl byte it's packet_len - 4.
  482. */
  483. data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
  484. data = skb_put(skb, data_len);
  485. SMC_PULL_DATA(data, packet_len - 4);
  486. SMC_WAIT_MMU_BUSY();
  487. SMC_SET_MMU_CMD(MC_RELEASE);
  488. PRINT_PKT(data, packet_len - 4);
  489. dev->last_rx = jiffies;
  490. skb->dev = dev;
  491. skb->protocol = eth_type_trans(skb, dev);
  492. netif_rx(skb);
  493. lp->stats.rx_packets++;
  494. lp->stats.rx_bytes += data_len;
  495. }
  496. }
  497. #ifdef CONFIG_SMP
  498. /*
  499. * On SMP we have the following problem:
  500. *
  501. * A = smc_hardware_send_pkt()
  502. * B = smc_hard_start_xmit()
  503. * C = smc_interrupt()
  504. *
  505. * A and B can never be executed simultaneously. However, at least on UP,
  506. * it is possible (and even desirable) for C to interrupt execution of
  507. * A or B in order to have better RX reliability and avoid overruns.
  508. * C, just like A and B, must have exclusive access to the chip and
  509. * each of them must lock against any other concurrent access.
  510. * Unfortunately this is not possible to have C suspend execution of A or
  511. * B taking place on another CPU. On UP this is no an issue since A and B
  512. * are run from softirq context and C from hard IRQ context, and there is
  513. * no other CPU where concurrent access can happen.
  514. * If ever there is a way to force at least B and C to always be executed
  515. * on the same CPU then we could use read/write locks to protect against
  516. * any other concurrent access and C would always interrupt B. But life
  517. * isn't that easy in a SMP world...
  518. */
  519. #define smc_special_trylock(lock) \
  520. ({ \
  521. int __ret; \
  522. local_irq_disable(); \
  523. __ret = spin_trylock(lock); \
  524. if (!__ret) \
  525. local_irq_enable(); \
  526. __ret; \
  527. })
  528. #define smc_special_lock(lock) spin_lock_irq(lock)
  529. #define smc_special_unlock(lock) spin_unlock_irq(lock)
  530. #else
  531. #define smc_special_trylock(lock) (1)
  532. #define smc_special_lock(lock) do { } while (0)
  533. #define smc_special_unlock(lock) do { } while (0)
  534. #endif
  535. /*
  536. * This is called to actually send a packet to the chip.
  537. */
  538. static void smc_hardware_send_pkt(unsigned long data)
  539. {
  540. struct net_device *dev = (struct net_device *)data;
  541. struct smc_local *lp = netdev_priv(dev);
  542. void __iomem *ioaddr = lp->base;
  543. struct sk_buff *skb;
  544. unsigned int packet_no, len;
  545. unsigned char *buf;
  546. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  547. if (!smc_special_trylock(&lp->lock)) {
  548. netif_stop_queue(dev);
  549. tasklet_schedule(&lp->tx_task);
  550. return;
  551. }
  552. skb = lp->pending_tx_skb;
  553. if (unlikely(!skb)) {
  554. smc_special_unlock(&lp->lock);
  555. return;
  556. }
  557. lp->pending_tx_skb = NULL;
  558. packet_no = SMC_GET_AR();
  559. if (unlikely(packet_no & AR_FAILED)) {
  560. printk("%s: Memory allocation failed.\n", dev->name);
  561. lp->stats.tx_errors++;
  562. lp->stats.tx_fifo_errors++;
  563. smc_special_unlock(&lp->lock);
  564. goto done;
  565. }
  566. /* point to the beginning of the packet */
  567. SMC_SET_PN(packet_no);
  568. SMC_SET_PTR(PTR_AUTOINC);
  569. buf = skb->data;
  570. len = skb->len;
  571. DBG(2, "%s: TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
  572. dev->name, packet_no, len, len, buf);
  573. PRINT_PKT(buf, len);
  574. /*
  575. * Send the packet length (+6 for status words, length, and ctl.
  576. * The card will pad to 64 bytes with zeroes if packet is too small.
  577. */
  578. SMC_PUT_PKT_HDR(0, len + 6);
  579. /* send the actual data */
  580. SMC_PUSH_DATA(buf, len & ~1);
  581. /* Send final ctl word with the last byte if there is one */
  582. SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG);
  583. /*
  584. * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
  585. * have the effect of having at most one packet queued for TX
  586. * in the chip's memory at all time.
  587. *
  588. * If THROTTLE_TX_PKTS is not set then the queue is stopped only
  589. * when memory allocation (MC_ALLOC) does not succeed right away.
  590. */
  591. if (THROTTLE_TX_PKTS)
  592. netif_stop_queue(dev);
  593. /* queue the packet for TX */
  594. SMC_SET_MMU_CMD(MC_ENQUEUE);
  595. SMC_ACK_INT(IM_TX_EMPTY_INT);
  596. smc_special_unlock(&lp->lock);
  597. dev->trans_start = jiffies;
  598. lp->stats.tx_packets++;
  599. lp->stats.tx_bytes += len;
  600. SMC_ENABLE_INT(IM_TX_INT | IM_TX_EMPTY_INT);
  601. done: if (!THROTTLE_TX_PKTS)
  602. netif_wake_queue(dev);
  603. dev_kfree_skb(skb);
  604. }
  605. /*
  606. * Since I am not sure if I will have enough room in the chip's ram
  607. * to store the packet, I call this routine which either sends it
  608. * now, or set the card to generates an interrupt when ready
  609. * for the packet.
  610. */
  611. static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  612. {
  613. struct smc_local *lp = netdev_priv(dev);
  614. void __iomem *ioaddr = lp->base;
  615. unsigned int numPages, poll_count, status;
  616. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  617. BUG_ON(lp->pending_tx_skb != NULL);
  618. /*
  619. * The MMU wants the number of pages to be the number of 256 bytes
  620. * 'pages', minus 1 (since a packet can't ever have 0 pages :))
  621. *
  622. * The 91C111 ignores the size bits, but earlier models don't.
  623. *
  624. * Pkt size for allocating is data length +6 (for additional status
  625. * words, length and ctl)
  626. *
  627. * If odd size then last byte is included in ctl word.
  628. */
  629. numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
  630. if (unlikely(numPages > 7)) {
  631. printk("%s: Far too big packet error.\n", dev->name);
  632. lp->stats.tx_errors++;
  633. lp->stats.tx_dropped++;
  634. dev_kfree_skb(skb);
  635. return 0;
  636. }
  637. smc_special_lock(&lp->lock);
  638. /* now, try to allocate the memory */
  639. SMC_SET_MMU_CMD(MC_ALLOC | numPages);
  640. /*
  641. * Poll the chip for a short amount of time in case the
  642. * allocation succeeds quickly.
  643. */
  644. poll_count = MEMORY_WAIT_TIME;
  645. do {
  646. status = SMC_GET_INT();
  647. if (status & IM_ALLOC_INT) {
  648. SMC_ACK_INT(IM_ALLOC_INT);
  649. break;
  650. }
  651. } while (--poll_count);
  652. smc_special_unlock(&lp->lock);
  653. lp->pending_tx_skb = skb;
  654. if (!poll_count) {
  655. /* oh well, wait until the chip finds memory later */
  656. netif_stop_queue(dev);
  657. DBG(2, "%s: TX memory allocation deferred.\n", dev->name);
  658. SMC_ENABLE_INT(IM_ALLOC_INT);
  659. } else {
  660. /*
  661. * Allocation succeeded: push packet to the chip's own memory
  662. * immediately.
  663. */
  664. smc_hardware_send_pkt((unsigned long)dev);
  665. }
  666. return 0;
  667. }
  668. /*
  669. * This handles a TX interrupt, which is only called when:
  670. * - a TX error occurred, or
  671. * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
  672. */
  673. static void smc_tx(struct net_device *dev)
  674. {
  675. struct smc_local *lp = netdev_priv(dev);
  676. void __iomem *ioaddr = lp->base;
  677. unsigned int saved_packet, packet_no, tx_status, pkt_len;
  678. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  679. /* If the TX FIFO is empty then nothing to do */
  680. packet_no = SMC_GET_TXFIFO();
  681. if (unlikely(packet_no & TXFIFO_TEMPTY)) {
  682. PRINTK("%s: smc_tx with nothing on FIFO.\n", dev->name);
  683. return;
  684. }
  685. /* select packet to read from */
  686. saved_packet = SMC_GET_PN();
  687. SMC_SET_PN(packet_no);
  688. /* read the first word (status word) from this packet */
  689. SMC_SET_PTR(PTR_AUTOINC | PTR_READ);
  690. SMC_GET_PKT_HDR(tx_status, pkt_len);
  691. DBG(2, "%s: TX STATUS 0x%04x PNR 0x%02x\n",
  692. dev->name, tx_status, packet_no);
  693. if (!(tx_status & ES_TX_SUC))
  694. lp->stats.tx_errors++;
  695. if (tx_status & ES_LOSTCARR)
  696. lp->stats.tx_carrier_errors++;
  697. if (tx_status & (ES_LATCOL | ES_16COL)) {
  698. PRINTK("%s: %s occurred on last xmit\n", dev->name,
  699. (tx_status & ES_LATCOL) ?
  700. "late collision" : "too many collisions");
  701. lp->stats.tx_window_errors++;
  702. if (!(lp->stats.tx_window_errors & 63) && net_ratelimit()) {
  703. printk(KERN_INFO "%s: unexpectedly large number of "
  704. "bad collisions. Please check duplex "
  705. "setting.\n", dev->name);
  706. }
  707. }
  708. /* kill the packet */
  709. SMC_WAIT_MMU_BUSY();
  710. SMC_SET_MMU_CMD(MC_FREEPKT);
  711. /* Don't restore Packet Number Reg until busy bit is cleared */
  712. SMC_WAIT_MMU_BUSY();
  713. SMC_SET_PN(saved_packet);
  714. /* re-enable transmit */
  715. SMC_SELECT_BANK(0);
  716. SMC_SET_TCR(lp->tcr_cur_mode);
  717. SMC_SELECT_BANK(2);
  718. }
  719. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  720. static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
  721. {
  722. struct smc_local *lp = netdev_priv(dev);
  723. void __iomem *ioaddr = lp->base;
  724. unsigned int mii_reg, mask;
  725. mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
  726. mii_reg |= MII_MDOE;
  727. for (mask = 1 << (bits - 1); mask; mask >>= 1) {
  728. if (val & mask)
  729. mii_reg |= MII_MDO;
  730. else
  731. mii_reg &= ~MII_MDO;
  732. SMC_SET_MII(mii_reg);
  733. udelay(MII_DELAY);
  734. SMC_SET_MII(mii_reg | MII_MCLK);
  735. udelay(MII_DELAY);
  736. }
  737. }
  738. static unsigned int smc_mii_in(struct net_device *dev, int bits)
  739. {
  740. struct smc_local *lp = netdev_priv(dev);
  741. void __iomem *ioaddr = lp->base;
  742. unsigned int mii_reg, mask, val;
  743. mii_reg = SMC_GET_MII() & ~(MII_MCLK | MII_MDOE | MII_MDO);
  744. SMC_SET_MII(mii_reg);
  745. for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
  746. if (SMC_GET_MII() & MII_MDI)
  747. val |= mask;
  748. SMC_SET_MII(mii_reg);
  749. udelay(MII_DELAY);
  750. SMC_SET_MII(mii_reg | MII_MCLK);
  751. udelay(MII_DELAY);
  752. }
  753. return val;
  754. }
  755. /*
  756. * Reads a register from the MII Management serial interface
  757. */
  758. static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
  759. {
  760. struct smc_local *lp = netdev_priv(dev);
  761. void __iomem *ioaddr = lp->base;
  762. unsigned int phydata;
  763. SMC_SELECT_BANK(3);
  764. /* Idle - 32 ones */
  765. smc_mii_out(dev, 0xffffffff, 32);
  766. /* Start code (01) + read (10) + phyaddr + phyreg */
  767. smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
  768. /* Turnaround (2bits) + phydata */
  769. phydata = smc_mii_in(dev, 18);
  770. /* Return to idle state */
  771. SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
  772. DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  773. __FUNCTION__, phyaddr, phyreg, phydata);
  774. SMC_SELECT_BANK(2);
  775. return phydata;
  776. }
  777. /*
  778. * Writes a register to the MII Management serial interface
  779. */
  780. static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
  781. int phydata)
  782. {
  783. struct smc_local *lp = netdev_priv(dev);
  784. void __iomem *ioaddr = lp->base;
  785. SMC_SELECT_BANK(3);
  786. /* Idle - 32 ones */
  787. smc_mii_out(dev, 0xffffffff, 32);
  788. /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
  789. smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
  790. /* Return to idle state */
  791. SMC_SET_MII(SMC_GET_MII() & ~(MII_MCLK|MII_MDOE|MII_MDO));
  792. DBG(3, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  793. __FUNCTION__, phyaddr, phyreg, phydata);
  794. SMC_SELECT_BANK(2);
  795. }
  796. /*
  797. * Finds and reports the PHY address
  798. */
  799. static void smc_phy_detect(struct net_device *dev)
  800. {
  801. struct smc_local *lp = netdev_priv(dev);
  802. int phyaddr;
  803. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  804. lp->phy_type = 0;
  805. /*
  806. * Scan all 32 PHY addresses if necessary, starting at
  807. * PHY#1 to PHY#31, and then PHY#0 last.
  808. */
  809. for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
  810. unsigned int id1, id2;
  811. /* Read the PHY identifiers */
  812. id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
  813. id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
  814. DBG(3, "%s: phy_id1=0x%x, phy_id2=0x%x\n",
  815. dev->name, id1, id2);
  816. /* Make sure it is a valid identifier */
  817. if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
  818. id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
  819. /* Save the PHY's address */
  820. lp->mii.phy_id = phyaddr & 31;
  821. lp->phy_type = id1 << 16 | id2;
  822. break;
  823. }
  824. }
  825. }
  826. /*
  827. * Sets the PHY to a configuration as determined by the user
  828. */
  829. static int smc_phy_fixed(struct net_device *dev)
  830. {
  831. struct smc_local *lp = netdev_priv(dev);
  832. void __iomem *ioaddr = lp->base;
  833. int phyaddr = lp->mii.phy_id;
  834. int bmcr, cfg1;
  835. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  836. /* Enter Link Disable state */
  837. cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
  838. cfg1 |= PHY_CFG1_LNKDIS;
  839. smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
  840. /*
  841. * Set our fixed capabilities
  842. * Disable auto-negotiation
  843. */
  844. bmcr = 0;
  845. if (lp->ctl_rfduplx)
  846. bmcr |= BMCR_FULLDPLX;
  847. if (lp->ctl_rspeed == 100)
  848. bmcr |= BMCR_SPEED100;
  849. /* Write our capabilities to the phy control register */
  850. smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
  851. /* Re-Configure the Receive/Phy Control register */
  852. SMC_SELECT_BANK(0);
  853. SMC_SET_RPC(lp->rpc_cur_mode);
  854. SMC_SELECT_BANK(2);
  855. return 1;
  856. }
  857. /*
  858. * smc_phy_reset - reset the phy
  859. * @dev: net device
  860. * @phy: phy address
  861. *
  862. * Issue a software reset for the specified PHY and
  863. * wait up to 100ms for the reset to complete. We should
  864. * not access the PHY for 50ms after issuing the reset.
  865. *
  866. * The time to wait appears to be dependent on the PHY.
  867. *
  868. * Must be called with lp->lock locked.
  869. */
  870. static int smc_phy_reset(struct net_device *dev, int phy)
  871. {
  872. struct smc_local *lp = netdev_priv(dev);
  873. unsigned int bmcr;
  874. int timeout;
  875. smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
  876. for (timeout = 2; timeout; timeout--) {
  877. spin_unlock_irq(&lp->lock);
  878. msleep(50);
  879. spin_lock_irq(&lp->lock);
  880. bmcr = smc_phy_read(dev, phy, MII_BMCR);
  881. if (!(bmcr & BMCR_RESET))
  882. break;
  883. }
  884. return bmcr & BMCR_RESET;
  885. }
  886. /*
  887. * smc_phy_powerdown - powerdown phy
  888. * @dev: net device
  889. *
  890. * Power down the specified PHY
  891. */
  892. static void smc_phy_powerdown(struct net_device *dev)
  893. {
  894. struct smc_local *lp = netdev_priv(dev);
  895. unsigned int bmcr;
  896. int phy = lp->mii.phy_id;
  897. if (lp->phy_type == 0)
  898. return;
  899. /* We need to ensure that no calls to smc_phy_configure are
  900. pending.
  901. flush_scheduled_work() cannot be called because we are
  902. running with the netlink semaphore held (from
  903. devinet_ioctl()) and the pending work queue contains
  904. linkwatch_event() (scheduled by netif_carrier_off()
  905. above). linkwatch_event() also wants the netlink semaphore.
  906. */
  907. while(lp->work_pending)
  908. yield();
  909. bmcr = smc_phy_read(dev, phy, MII_BMCR);
  910. smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
  911. }
  912. /*
  913. * smc_phy_check_media - check the media status and adjust TCR
  914. * @dev: net device
  915. * @init: set true for initialisation
  916. *
  917. * Select duplex mode depending on negotiation state. This
  918. * also updates our carrier state.
  919. */
  920. static void smc_phy_check_media(struct net_device *dev, int init)
  921. {
  922. struct smc_local *lp = netdev_priv(dev);
  923. void __iomem *ioaddr = lp->base;
  924. if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
  925. /* duplex state has changed */
  926. if (lp->mii.full_duplex) {
  927. lp->tcr_cur_mode |= TCR_SWFDUP;
  928. } else {
  929. lp->tcr_cur_mode &= ~TCR_SWFDUP;
  930. }
  931. SMC_SELECT_BANK(0);
  932. SMC_SET_TCR(lp->tcr_cur_mode);
  933. }
  934. }
  935. /*
  936. * Configures the specified PHY through the MII management interface
  937. * using Autonegotiation.
  938. * Calls smc_phy_fixed() if the user has requested a certain config.
  939. * If RPC ANEG bit is set, the media selection is dependent purely on
  940. * the selection by the MII (either in the MII BMCR reg or the result
  941. * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
  942. * is controlled by the RPC SPEED and RPC DPLX bits.
  943. */
  944. static void smc_phy_configure(void *data)
  945. {
  946. struct net_device *dev = data;
  947. struct smc_local *lp = netdev_priv(dev);
  948. void __iomem *ioaddr = lp->base;
  949. int phyaddr = lp->mii.phy_id;
  950. int my_phy_caps; /* My PHY capabilities */
  951. int my_ad_caps; /* My Advertised capabilities */
  952. int status;
  953. DBG(3, "%s:smc_program_phy()\n", dev->name);
  954. spin_lock_irq(&lp->lock);
  955. /*
  956. * We should not be called if phy_type is zero.
  957. */
  958. if (lp->phy_type == 0)
  959. goto smc_phy_configure_exit;
  960. if (smc_phy_reset(dev, phyaddr)) {
  961. printk("%s: PHY reset timed out\n", dev->name);
  962. goto smc_phy_configure_exit;
  963. }
  964. /*
  965. * Enable PHY Interrupts (for register 18)
  966. * Interrupts listed here are disabled
  967. */
  968. smc_phy_write(dev, phyaddr, PHY_MASK_REG,
  969. PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
  970. PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
  971. PHY_INT_SPDDET | PHY_INT_DPLXDET);
  972. /* Configure the Receive/Phy Control register */
  973. SMC_SELECT_BANK(0);
  974. SMC_SET_RPC(lp->rpc_cur_mode);
  975. /* If the user requested no auto neg, then go set his request */
  976. if (lp->mii.force_media) {
  977. smc_phy_fixed(dev);
  978. goto smc_phy_configure_exit;
  979. }
  980. /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
  981. my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
  982. if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
  983. printk(KERN_INFO "Auto negotiation NOT supported\n");
  984. smc_phy_fixed(dev);
  985. goto smc_phy_configure_exit;
  986. }
  987. my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
  988. if (my_phy_caps & BMSR_100BASE4)
  989. my_ad_caps |= ADVERTISE_100BASE4;
  990. if (my_phy_caps & BMSR_100FULL)
  991. my_ad_caps |= ADVERTISE_100FULL;
  992. if (my_phy_caps & BMSR_100HALF)
  993. my_ad_caps |= ADVERTISE_100HALF;
  994. if (my_phy_caps & BMSR_10FULL)
  995. my_ad_caps |= ADVERTISE_10FULL;
  996. if (my_phy_caps & BMSR_10HALF)
  997. my_ad_caps |= ADVERTISE_10HALF;
  998. /* Disable capabilities not selected by our user */
  999. if (lp->ctl_rspeed != 100)
  1000. my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
  1001. if (!lp->ctl_rfduplx)
  1002. my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
  1003. /* Update our Auto-Neg Advertisement Register */
  1004. smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
  1005. lp->mii.advertising = my_ad_caps;
  1006. /*
  1007. * Read the register back. Without this, it appears that when
  1008. * auto-negotiation is restarted, sometimes it isn't ready and
  1009. * the link does not come up.
  1010. */
  1011. status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
  1012. DBG(2, "%s: phy caps=%x\n", dev->name, my_phy_caps);
  1013. DBG(2, "%s: phy advertised caps=%x\n", dev->name, my_ad_caps);
  1014. /* Restart auto-negotiation process in order to advertise my caps */
  1015. smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
  1016. smc_phy_check_media(dev, 1);
  1017. smc_phy_configure_exit:
  1018. spin_unlock_irq(&lp->lock);
  1019. lp->work_pending = 0;
  1020. }
  1021. /*
  1022. * smc_phy_interrupt
  1023. *
  1024. * Purpose: Handle interrupts relating to PHY register 18. This is
  1025. * called from the "hard" interrupt handler under our private spinlock.
  1026. */
  1027. static void smc_phy_interrupt(struct net_device *dev)
  1028. {
  1029. struct smc_local *lp = netdev_priv(dev);
  1030. int phyaddr = lp->mii.phy_id;
  1031. int phy18;
  1032. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  1033. if (lp->phy_type == 0)
  1034. return;
  1035. for(;;) {
  1036. smc_phy_check_media(dev, 0);
  1037. /* Read PHY Register 18, Status Output */
  1038. phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
  1039. if ((phy18 & PHY_INT_INT) == 0)
  1040. break;
  1041. }
  1042. }
  1043. /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
  1044. static void smc_10bt_check_media(struct net_device *dev, int init)
  1045. {
  1046. struct smc_local *lp = netdev_priv(dev);
  1047. void __iomem *ioaddr = lp->base;
  1048. unsigned int old_carrier, new_carrier;
  1049. old_carrier = netif_carrier_ok(dev) ? 1 : 0;
  1050. SMC_SELECT_BANK(0);
  1051. new_carrier = (SMC_GET_EPH_STATUS() & ES_LINK_OK) ? 1 : 0;
  1052. SMC_SELECT_BANK(2);
  1053. if (init || (old_carrier != new_carrier)) {
  1054. if (!new_carrier) {
  1055. netif_carrier_off(dev);
  1056. } else {
  1057. netif_carrier_on(dev);
  1058. }
  1059. if (netif_msg_link(lp))
  1060. printk(KERN_INFO "%s: link %s\n", dev->name,
  1061. new_carrier ? "up" : "down");
  1062. }
  1063. }
  1064. static void smc_eph_interrupt(struct net_device *dev)
  1065. {
  1066. struct smc_local *lp = netdev_priv(dev);
  1067. void __iomem *ioaddr = lp->base;
  1068. unsigned int ctl;
  1069. smc_10bt_check_media(dev, 0);
  1070. SMC_SELECT_BANK(1);
  1071. ctl = SMC_GET_CTL();
  1072. SMC_SET_CTL(ctl & ~CTL_LE_ENABLE);
  1073. SMC_SET_CTL(ctl);
  1074. SMC_SELECT_BANK(2);
  1075. }
  1076. /*
  1077. * This is the main routine of the driver, to handle the device when
  1078. * it needs some attention.
  1079. */
  1080. static irqreturn_t smc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  1081. {
  1082. struct net_device *dev = dev_id;
  1083. struct smc_local *lp = netdev_priv(dev);
  1084. void __iomem *ioaddr = lp->base;
  1085. int status, mask, timeout, card_stats;
  1086. int saved_pointer;
  1087. DBG(3, "%s: %s\n", dev->name, __FUNCTION__);
  1088. spin_lock(&lp->lock);
  1089. /* A preamble may be used when there is a potential race
  1090. * between the interruptible transmit functions and this
  1091. * ISR. */
  1092. SMC_INTERRUPT_PREAMBLE;
  1093. saved_pointer = SMC_GET_PTR();
  1094. mask = SMC_GET_INT_MASK();
  1095. SMC_SET_INT_MASK(0);
  1096. /* set a timeout value, so I don't stay here forever */
  1097. timeout = 8;
  1098. do {
  1099. status = SMC_GET_INT();
  1100. DBG(2, "%s: INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
  1101. dev->name, status, mask,
  1102. ({ int meminfo; SMC_SELECT_BANK(0);
  1103. meminfo = SMC_GET_MIR();
  1104. SMC_SELECT_BANK(2); meminfo; }),
  1105. SMC_GET_FIFO());
  1106. status &= mask;
  1107. if (!status)
  1108. break;
  1109. if (status & IM_TX_INT) {
  1110. /* do this before RX as it will free memory quickly */
  1111. DBG(3, "%s: TX int\n", dev->name);
  1112. smc_tx(dev);
  1113. SMC_ACK_INT(IM_TX_INT);
  1114. if (THROTTLE_TX_PKTS)
  1115. netif_wake_queue(dev);
  1116. } else if (status & IM_RCV_INT) {
  1117. DBG(3, "%s: RX irq\n", dev->name);
  1118. smc_rcv(dev);
  1119. } else if (status & IM_ALLOC_INT) {
  1120. DBG(3, "%s: Allocation irq\n", dev->name);
  1121. tasklet_hi_schedule(&lp->tx_task);
  1122. mask &= ~IM_ALLOC_INT;
  1123. } else if (status & IM_TX_EMPTY_INT) {
  1124. DBG(3, "%s: TX empty\n", dev->name);
  1125. mask &= ~IM_TX_EMPTY_INT;
  1126. /* update stats */
  1127. SMC_SELECT_BANK(0);
  1128. card_stats = SMC_GET_COUNTER();
  1129. SMC_SELECT_BANK(2);
  1130. /* single collisions */
  1131. lp->stats.collisions += card_stats & 0xF;
  1132. card_stats >>= 4;
  1133. /* multiple collisions */
  1134. lp->stats.collisions += card_stats & 0xF;
  1135. } else if (status & IM_RX_OVRN_INT) {
  1136. DBG(1, "%s: RX overrun (EPH_ST 0x%04x)\n", dev->name,
  1137. ({ int eph_st; SMC_SELECT_BANK(0);
  1138. eph_st = SMC_GET_EPH_STATUS();
  1139. SMC_SELECT_BANK(2); eph_st; }) );
  1140. SMC_ACK_INT(IM_RX_OVRN_INT);
  1141. lp->stats.rx_errors++;
  1142. lp->stats.rx_fifo_errors++;
  1143. } else if (status & IM_EPH_INT) {
  1144. smc_eph_interrupt(dev);
  1145. } else if (status & IM_MDINT) {
  1146. SMC_ACK_INT(IM_MDINT);
  1147. smc_phy_interrupt(dev);
  1148. } else if (status & IM_ERCV_INT) {
  1149. SMC_ACK_INT(IM_ERCV_INT);
  1150. PRINTK("%s: UNSUPPORTED: ERCV INTERRUPT \n", dev->name);
  1151. }
  1152. } while (--timeout);
  1153. /* restore register states */
  1154. SMC_SET_PTR(saved_pointer);
  1155. SMC_SET_INT_MASK(mask);
  1156. spin_unlock(&lp->lock);
  1157. DBG(3, "%s: Interrupt done (%d loops)\n", dev->name, 8-timeout);
  1158. /*
  1159. * We return IRQ_HANDLED unconditionally here even if there was
  1160. * nothing to do. There is a possibility that a packet might
  1161. * get enqueued into the chip right after TX_EMPTY_INT is raised
  1162. * but just before the CPU acknowledges the IRQ.
  1163. * Better take an unneeded IRQ in some occasions than complexifying
  1164. * the code for all cases.
  1165. */
  1166. return IRQ_HANDLED;
  1167. }
  1168. #ifdef CONFIG_NET_POLL_CONTROLLER
  1169. /*
  1170. * Polling receive - used by netconsole and other diagnostic tools
  1171. * to allow network i/o with interrupts disabled.
  1172. */
  1173. static void smc_poll_controller(struct net_device *dev)
  1174. {
  1175. disable_irq(dev->irq);
  1176. smc_interrupt(dev->irq, dev, NULL);
  1177. enable_irq(dev->irq);
  1178. }
  1179. #endif
  1180. /* Our watchdog timed out. Called by the networking layer */
  1181. static void smc_timeout(struct net_device *dev)
  1182. {
  1183. struct smc_local *lp = netdev_priv(dev);
  1184. void __iomem *ioaddr = lp->base;
  1185. int status, mask, eph_st, meminfo, fifo;
  1186. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  1187. spin_lock_irq(&lp->lock);
  1188. status = SMC_GET_INT();
  1189. mask = SMC_GET_INT_MASK();
  1190. fifo = SMC_GET_FIFO();
  1191. SMC_SELECT_BANK(0);
  1192. eph_st = SMC_GET_EPH_STATUS();
  1193. meminfo = SMC_GET_MIR();
  1194. SMC_SELECT_BANK(2);
  1195. spin_unlock_irq(&lp->lock);
  1196. PRINTK( "%s: TX timeout (INT 0x%02x INTMASK 0x%02x "
  1197. "MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
  1198. dev->name, status, mask, meminfo, fifo, eph_st );
  1199. smc_reset(dev);
  1200. smc_enable(dev);
  1201. /*
  1202. * Reconfiguring the PHY doesn't seem like a bad idea here, but
  1203. * smc_phy_configure() calls msleep() which calls schedule_timeout()
  1204. * which calls schedule(). Hence we use a work queue.
  1205. */
  1206. if (lp->phy_type != 0) {
  1207. if (schedule_work(&lp->phy_configure)) {
  1208. lp->work_pending = 1;
  1209. }
  1210. }
  1211. /* We can accept TX packets again */
  1212. dev->trans_start = jiffies;
  1213. netif_wake_queue(dev);
  1214. }
  1215. /*
  1216. * This routine will, depending on the values passed to it,
  1217. * either make it accept multicast packets, go into
  1218. * promiscuous mode (for TCPDUMP and cousins) or accept
  1219. * a select set of multicast packets
  1220. */
  1221. static void smc_set_multicast_list(struct net_device *dev)
  1222. {
  1223. struct smc_local *lp = netdev_priv(dev);
  1224. void __iomem *ioaddr = lp->base;
  1225. unsigned char multicast_table[8];
  1226. int update_multicast = 0;
  1227. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  1228. if (dev->flags & IFF_PROMISC) {
  1229. DBG(2, "%s: RCR_PRMS\n", dev->name);
  1230. lp->rcr_cur_mode |= RCR_PRMS;
  1231. }
  1232. /* BUG? I never disable promiscuous mode if multicasting was turned on.
  1233. Now, I turn off promiscuous mode, but I don't do anything to multicasting
  1234. when promiscuous mode is turned on.
  1235. */
  1236. /*
  1237. * Here, I am setting this to accept all multicast packets.
  1238. * I don't need to zero the multicast table, because the flag is
  1239. * checked before the table is
  1240. */
  1241. else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
  1242. DBG(2, "%s: RCR_ALMUL\n", dev->name);
  1243. lp->rcr_cur_mode |= RCR_ALMUL;
  1244. }
  1245. /*
  1246. * This sets the internal hardware table to filter out unwanted
  1247. * multicast packets before they take up memory.
  1248. *
  1249. * The SMC chip uses a hash table where the high 6 bits of the CRC of
  1250. * address are the offset into the table. If that bit is 1, then the
  1251. * multicast packet is accepted. Otherwise, it's dropped silently.
  1252. *
  1253. * To use the 6 bits as an offset into the table, the high 3 bits are
  1254. * the number of the 8 bit register, while the low 3 bits are the bit
  1255. * within that register.
  1256. */
  1257. else if (dev->mc_count) {
  1258. int i;
  1259. struct dev_mc_list *cur_addr;
  1260. /* table for flipping the order of 3 bits */
  1261. static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
  1262. /* start with a table of all zeros: reject all */
  1263. memset(multicast_table, 0, sizeof(multicast_table));
  1264. cur_addr = dev->mc_list;
  1265. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1266. int position;
  1267. /* do we have a pointer here? */
  1268. if (!cur_addr)
  1269. break;
  1270. /* make sure this is a multicast address -
  1271. shouldn't this be a given if we have it here ? */
  1272. if (!(*cur_addr->dmi_addr & 1))
  1273. continue;
  1274. /* only use the low order bits */
  1275. position = crc32_le(~0, cur_addr->dmi_addr, 6) & 0x3f;
  1276. /* do some messy swapping to put the bit in the right spot */
  1277. multicast_table[invert3[position&7]] |=
  1278. (1<<invert3[(position>>3)&7]);
  1279. }
  1280. /* be sure I get rid of flags I might have set */
  1281. lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
  1282. /* now, the table can be loaded into the chipset */
  1283. update_multicast = 1;
  1284. } else {
  1285. DBG(2, "%s: ~(RCR_PRMS|RCR_ALMUL)\n", dev->name);
  1286. lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
  1287. /*
  1288. * since I'm disabling all multicast entirely, I need to
  1289. * clear the multicast list
  1290. */
  1291. memset(multicast_table, 0, sizeof(multicast_table));
  1292. update_multicast = 1;
  1293. }
  1294. spin_lock_irq(&lp->lock);
  1295. SMC_SELECT_BANK(0);
  1296. SMC_SET_RCR(lp->rcr_cur_mode);
  1297. if (update_multicast) {
  1298. SMC_SELECT_BANK(3);
  1299. SMC_SET_MCAST(multicast_table);
  1300. }
  1301. SMC_SELECT_BANK(2);
  1302. spin_unlock_irq(&lp->lock);
  1303. }
  1304. /*
  1305. * Open and Initialize the board
  1306. *
  1307. * Set up everything, reset the card, etc..
  1308. */
  1309. static int
  1310. smc_open(struct net_device *dev)
  1311. {
  1312. struct smc_local *lp = netdev_priv(dev);
  1313. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  1314. /*
  1315. * Check that the address is valid. If its not, refuse
  1316. * to bring the device up. The user must specify an
  1317. * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
  1318. */
  1319. if (!is_valid_ether_addr(dev->dev_addr)) {
  1320. PRINTK("%s: no valid ethernet hw addr\n", __FUNCTION__);
  1321. return -EINVAL;
  1322. }
  1323. /* Setup the default Register Modes */
  1324. lp->tcr_cur_mode = TCR_DEFAULT;
  1325. lp->rcr_cur_mode = RCR_DEFAULT;
  1326. lp->rpc_cur_mode = RPC_DEFAULT;
  1327. /*
  1328. * If we are not using a MII interface, we need to
  1329. * monitor our own carrier signal to detect faults.
  1330. */
  1331. if (lp->phy_type == 0)
  1332. lp->tcr_cur_mode |= TCR_MON_CSN;
  1333. /* reset the hardware */
  1334. smc_reset(dev);
  1335. smc_enable(dev);
  1336. /* Configure the PHY, initialize the link state */
  1337. if (lp->phy_type != 0)
  1338. smc_phy_configure(dev);
  1339. else {
  1340. spin_lock_irq(&lp->lock);
  1341. smc_10bt_check_media(dev, 1);
  1342. spin_unlock_irq(&lp->lock);
  1343. }
  1344. netif_start_queue(dev);
  1345. return 0;
  1346. }
  1347. /*
  1348. * smc_close
  1349. *
  1350. * this makes the board clean up everything that it can
  1351. * and not talk to the outside world. Caused by
  1352. * an 'ifconfig ethX down'
  1353. */
  1354. static int smc_close(struct net_device *dev)
  1355. {
  1356. struct smc_local *lp = netdev_priv(dev);
  1357. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  1358. netif_stop_queue(dev);
  1359. netif_carrier_off(dev);
  1360. /* clear everything */
  1361. smc_shutdown(dev);
  1362. tasklet_kill(&lp->tx_task);
  1363. smc_phy_powerdown(dev);
  1364. return 0;
  1365. }
  1366. /*
  1367. * Get the current statistics.
  1368. * This may be called with the card open or closed.
  1369. */
  1370. static struct net_device_stats *smc_query_statistics(struct net_device *dev)
  1371. {
  1372. struct smc_local *lp = netdev_priv(dev);
  1373. DBG(2, "%s: %s\n", dev->name, __FUNCTION__);
  1374. return &lp->stats;
  1375. }
  1376. /*
  1377. * Ethtool support
  1378. */
  1379. static int
  1380. smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1381. {
  1382. struct smc_local *lp = netdev_priv(dev);
  1383. int ret;
  1384. cmd->maxtxpkt = 1;
  1385. cmd->maxrxpkt = 1;
  1386. if (lp->phy_type != 0) {
  1387. spin_lock_irq(&lp->lock);
  1388. ret = mii_ethtool_gset(&lp->mii, cmd);
  1389. spin_unlock_irq(&lp->lock);
  1390. } else {
  1391. cmd->supported = SUPPORTED_10baseT_Half |
  1392. SUPPORTED_10baseT_Full |
  1393. SUPPORTED_TP | SUPPORTED_AUI;
  1394. if (lp->ctl_rspeed == 10)
  1395. cmd->speed = SPEED_10;
  1396. else if (lp->ctl_rspeed == 100)
  1397. cmd->speed = SPEED_100;
  1398. cmd->autoneg = AUTONEG_DISABLE;
  1399. cmd->transceiver = XCVR_INTERNAL;
  1400. cmd->port = 0;
  1401. cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
  1402. ret = 0;
  1403. }
  1404. return ret;
  1405. }
  1406. static int
  1407. smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1408. {
  1409. struct smc_local *lp = netdev_priv(dev);
  1410. int ret;
  1411. if (lp->phy_type != 0) {
  1412. spin_lock_irq(&lp->lock);
  1413. ret = mii_ethtool_sset(&lp->mii, cmd);
  1414. spin_unlock_irq(&lp->lock);
  1415. } else {
  1416. if (cmd->autoneg != AUTONEG_DISABLE ||
  1417. cmd->speed != SPEED_10 ||
  1418. (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
  1419. (cmd->port != PORT_TP && cmd->port != PORT_AUI))
  1420. return -EINVAL;
  1421. // lp->port = cmd->port;
  1422. lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
  1423. // if (netif_running(dev))
  1424. // smc_set_port(dev);
  1425. ret = 0;
  1426. }
  1427. return ret;
  1428. }
  1429. static void
  1430. smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1431. {
  1432. strncpy(info->driver, CARDNAME, sizeof(info->driver));
  1433. strncpy(info->version, version, sizeof(info->version));
  1434. strncpy(info->bus_info, dev->class_dev.dev->bus_id, sizeof(info->bus_info));
  1435. }
  1436. static int smc_ethtool_nwayreset(struct net_device *dev)
  1437. {
  1438. struct smc_local *lp = netdev_priv(dev);
  1439. int ret = -EINVAL;
  1440. if (lp->phy_type != 0) {
  1441. spin_lock_irq(&lp->lock);
  1442. ret = mii_nway_restart(&lp->mii);
  1443. spin_unlock_irq(&lp->lock);
  1444. }
  1445. return ret;
  1446. }
  1447. static u32 smc_ethtool_getmsglevel(struct net_device *dev)
  1448. {
  1449. struct smc_local *lp = netdev_priv(dev);
  1450. return lp->msg_enable;
  1451. }
  1452. static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1453. {
  1454. struct smc_local *lp = netdev_priv(dev);
  1455. lp->msg_enable = level;
  1456. }
  1457. static struct ethtool_ops smc_ethtool_ops = {
  1458. .get_settings = smc_ethtool_getsettings,
  1459. .set_settings = smc_ethtool_setsettings,
  1460. .get_drvinfo = smc_ethtool_getdrvinfo,
  1461. .get_msglevel = smc_ethtool_getmsglevel,
  1462. .set_msglevel = smc_ethtool_setmsglevel,
  1463. .nway_reset = smc_ethtool_nwayreset,
  1464. .get_link = ethtool_op_get_link,
  1465. // .get_eeprom = smc_ethtool_geteeprom,
  1466. // .set_eeprom = smc_ethtool_seteeprom,
  1467. };
  1468. /*
  1469. * smc_findirq
  1470. *
  1471. * This routine has a simple purpose -- make the SMC chip generate an
  1472. * interrupt, so an auto-detect routine can detect it, and find the IRQ,
  1473. */
  1474. /*
  1475. * does this still work?
  1476. *
  1477. * I just deleted auto_irq.c, since it was never built...
  1478. * --jgarzik
  1479. */
  1480. static int __init smc_findirq(void __iomem *ioaddr)
  1481. {
  1482. int timeout = 20;
  1483. unsigned long cookie;
  1484. DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
  1485. cookie = probe_irq_on();
  1486. /*
  1487. * What I try to do here is trigger an ALLOC_INT. This is done
  1488. * by allocating a small chunk of memory, which will give an interrupt
  1489. * when done.
  1490. */
  1491. /* enable ALLOCation interrupts ONLY */
  1492. SMC_SELECT_BANK(2);
  1493. SMC_SET_INT_MASK(IM_ALLOC_INT);
  1494. /*
  1495. * Allocate 512 bytes of memory. Note that the chip was just
  1496. * reset so all the memory is available
  1497. */
  1498. SMC_SET_MMU_CMD(MC_ALLOC | 1);
  1499. /*
  1500. * Wait until positive that the interrupt has been generated
  1501. */
  1502. do {
  1503. int int_status;
  1504. udelay(10);
  1505. int_status = SMC_GET_INT();
  1506. if (int_status & IM_ALLOC_INT)
  1507. break; /* got the interrupt */
  1508. } while (--timeout);
  1509. /*
  1510. * there is really nothing that I can do here if timeout fails,
  1511. * as autoirq_report will return a 0 anyway, which is what I
  1512. * want in this case. Plus, the clean up is needed in both
  1513. * cases.
  1514. */
  1515. /* and disable all interrupts again */
  1516. SMC_SET_INT_MASK(0);
  1517. /* and return what I found */
  1518. return probe_irq_off(cookie);
  1519. }
  1520. /*
  1521. * Function: smc_probe(unsigned long ioaddr)
  1522. *
  1523. * Purpose:
  1524. * Tests to see if a given ioaddr points to an SMC91x chip.
  1525. * Returns a 0 on success
  1526. *
  1527. * Algorithm:
  1528. * (1) see if the high byte of BANK_SELECT is 0x33
  1529. * (2) compare the ioaddr with the base register's address
  1530. * (3) see if I recognize the chip ID in the appropriate register
  1531. *
  1532. * Here I do typical initialization tasks.
  1533. *
  1534. * o Initialize the structure if needed
  1535. * o print out my vanity message if not done so already
  1536. * o print out what type of hardware is detected
  1537. * o print out the ethernet address
  1538. * o find the IRQ
  1539. * o set up my private data
  1540. * o configure the dev structure with my subroutines
  1541. * o actually GRAB the irq.
  1542. * o GRAB the region
  1543. */
  1544. static int __init smc_probe(struct net_device *dev, void __iomem *ioaddr)
  1545. {
  1546. struct smc_local *lp = netdev_priv(dev);
  1547. static int version_printed = 0;
  1548. int i, retval;
  1549. unsigned int val, revision_register;
  1550. const char *version_string;
  1551. DBG(2, "%s: %s\n", CARDNAME, __FUNCTION__);
  1552. /* First, see if the high byte is 0x33 */
  1553. val = SMC_CURRENT_BANK();
  1554. DBG(2, "%s: bank signature probe returned 0x%04x\n", CARDNAME, val);
  1555. if ((val & 0xFF00) != 0x3300) {
  1556. if ((val & 0xFF) == 0x33) {
  1557. printk(KERN_WARNING
  1558. "%s: Detected possible byte-swapped interface"
  1559. " at IOADDR %p\n", CARDNAME, ioaddr);
  1560. }
  1561. retval = -ENODEV;
  1562. goto err_out;
  1563. }
  1564. /*
  1565. * The above MIGHT indicate a device, but I need to write to
  1566. * further test this.
  1567. */
  1568. SMC_SELECT_BANK(0);
  1569. val = SMC_CURRENT_BANK();
  1570. if ((val & 0xFF00) != 0x3300) {
  1571. retval = -ENODEV;
  1572. goto err_out;
  1573. }
  1574. /*
  1575. * well, we've already written once, so hopefully another
  1576. * time won't hurt. This time, I need to switch the bank
  1577. * register to bank 1, so I can access the base address
  1578. * register
  1579. */
  1580. SMC_SELECT_BANK(1);
  1581. val = SMC_GET_BASE();
  1582. val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
  1583. if (((unsigned int)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
  1584. printk("%s: IOADDR %p doesn't match configuration (%x).\n",
  1585. CARDNAME, ioaddr, val);
  1586. }
  1587. /*
  1588. * check if the revision register is something that I
  1589. * recognize. These might need to be added to later,
  1590. * as future revisions could be added.
  1591. */
  1592. SMC_SELECT_BANK(3);
  1593. revision_register = SMC_GET_REV();
  1594. DBG(2, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
  1595. version_string = chip_ids[ (revision_register >> 4) & 0xF];
  1596. if (!version_string || (revision_register & 0xff00) != 0x3300) {
  1597. /* I don't recognize this chip, so... */
  1598. printk("%s: IO %p: Unrecognized revision register 0x%04x"
  1599. ", Contact author.\n", CARDNAME,
  1600. ioaddr, revision_register);
  1601. retval = -ENODEV;
  1602. goto err_out;
  1603. }
  1604. /* At this point I'll assume that the chip is an SMC91x. */
  1605. if (version_printed++ == 0)
  1606. printk("%s", version);
  1607. /* fill in some of the fields */
  1608. dev->base_addr = (unsigned long)ioaddr;
  1609. lp->base = ioaddr;
  1610. lp->version = revision_register & 0xff;
  1611. spin_lock_init(&lp->lock);
  1612. /* Get the MAC address */
  1613. SMC_SELECT_BANK(1);
  1614. SMC_GET_MAC_ADDR(dev->dev_addr);
  1615. /* now, reset the chip, and put it into a known state */
  1616. smc_reset(dev);
  1617. /*
  1618. * If dev->irq is 0, then the device has to be banged on to see
  1619. * what the IRQ is.
  1620. *
  1621. * This banging doesn't always detect the IRQ, for unknown reasons.
  1622. * a workaround is to reset the chip and try again.
  1623. *
  1624. * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
  1625. * be what is requested on the command line. I don't do that, mostly
  1626. * because the card that I have uses a non-standard method of accessing
  1627. * the IRQs, and because this _should_ work in most configurations.
  1628. *
  1629. * Specifying an IRQ is done with the assumption that the user knows
  1630. * what (s)he is doing. No checking is done!!!!
  1631. */
  1632. if (dev->irq < 1) {
  1633. int trials;
  1634. trials = 3;
  1635. while (trials--) {
  1636. dev->irq = smc_findirq(ioaddr);
  1637. if (dev->irq)
  1638. break;
  1639. /* kick the card and try again */
  1640. smc_reset(dev);
  1641. }
  1642. }
  1643. if (dev->irq == 0) {
  1644. printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
  1645. dev->name);
  1646. retval = -ENODEV;
  1647. goto err_out;
  1648. }
  1649. dev->irq = irq_canonicalize(dev->irq);
  1650. /* Fill in the fields of the device structure with ethernet values. */
  1651. ether_setup(dev);
  1652. dev->open = smc_open;
  1653. dev->stop = smc_close;
  1654. dev->hard_start_xmit = smc_hard_start_xmit;
  1655. dev->tx_timeout = smc_timeout;
  1656. dev->watchdog_timeo = msecs_to_jiffies(watchdog);
  1657. dev->get_stats = smc_query_statistics;
  1658. dev->set_multicast_list = smc_set_multicast_list;
  1659. dev->ethtool_ops = &smc_ethtool_ops;
  1660. #ifdef CONFIG_NET_POLL_CONTROLLER
  1661. dev->poll_controller = smc_poll_controller;
  1662. #endif
  1663. tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
  1664. INIT_WORK(&lp->phy_configure, smc_phy_configure, dev);
  1665. lp->mii.phy_id_mask = 0x1f;
  1666. lp->mii.reg_num_mask = 0x1f;
  1667. lp->mii.force_media = 0;
  1668. lp->mii.full_duplex = 0;
  1669. lp->mii.dev = dev;
  1670. lp->mii.mdio_read = smc_phy_read;
  1671. lp->mii.mdio_write = smc_phy_write;
  1672. /*
  1673. * Locate the phy, if any.
  1674. */
  1675. if (lp->version >= (CHIP_91100 << 4))
  1676. smc_phy_detect(dev);
  1677. /* Set default parameters */
  1678. lp->msg_enable = NETIF_MSG_LINK;
  1679. lp->ctl_rfduplx = 0;
  1680. lp->ctl_rspeed = 10;
  1681. if (lp->version >= (CHIP_91100 << 4)) {
  1682. lp->ctl_rfduplx = 1;
  1683. lp->ctl_rspeed = 100;
  1684. }
  1685. /* Grab the IRQ */
  1686. retval = request_irq(dev->irq, &smc_interrupt, 0, dev->name, dev);
  1687. if (retval)
  1688. goto err_out;
  1689. set_irq_type(dev->irq, SMC_IRQ_TRIGGER_TYPE);
  1690. #ifdef SMC_USE_PXA_DMA
  1691. {
  1692. int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
  1693. smc_pxa_dma_irq, NULL);
  1694. if (dma >= 0)
  1695. dev->dma = dma;
  1696. }
  1697. #endif
  1698. retval = register_netdev(dev);
  1699. if (retval == 0) {
  1700. /* now, print out the card info, in a short format.. */
  1701. printk("%s: %s (rev %d) at %p IRQ %d",
  1702. dev->name, version_string, revision_register & 0x0f,
  1703. lp->base, dev->irq);
  1704. if (dev->dma != (unsigned char)-1)
  1705. printk(" DMA %d", dev->dma);
  1706. printk("%s%s\n", nowait ? " [nowait]" : "",
  1707. THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
  1708. if (!is_valid_ether_addr(dev->dev_addr)) {
  1709. printk("%s: Invalid ethernet MAC address. Please "
  1710. "set using ifconfig\n", dev->name);
  1711. } else {
  1712. /* Print the Ethernet address */
  1713. printk("%s: Ethernet addr: ", dev->name);
  1714. for (i = 0; i < 5; i++)
  1715. printk("%2.2x:", dev->dev_addr[i]);
  1716. printk("%2.2x\n", dev->dev_addr[5]);
  1717. }
  1718. if (lp->phy_type == 0) {
  1719. PRINTK("%s: No PHY found\n", dev->name);
  1720. } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
  1721. PRINTK("%s: PHY LAN83C183 (LAN91C111 Internal)\n", dev->name);
  1722. } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
  1723. PRINTK("%s: PHY LAN83C180\n", dev->name);
  1724. }
  1725. }
  1726. err_out:
  1727. #ifdef SMC_USE_PXA_DMA
  1728. if (retval && dev->dma != (unsigned char)-1)
  1729. pxa_free_dma(dev->dma);
  1730. #endif
  1731. return retval;
  1732. }
  1733. static int smc_enable_device(struct platform_device *pdev)
  1734. {
  1735. unsigned long flags;
  1736. unsigned char ecor, ecsr;
  1737. void __iomem *addr;
  1738. struct resource * res;
  1739. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
  1740. if (!res)
  1741. return 0;
  1742. /*
  1743. * Map the attribute space. This is overkill, but clean.
  1744. */
  1745. addr = ioremap(res->start, ATTRIB_SIZE);
  1746. if (!addr)
  1747. return -ENOMEM;
  1748. /*
  1749. * Reset the device. We must disable IRQs around this
  1750. * since a reset causes the IRQ line become active.
  1751. */
  1752. local_irq_save(flags);
  1753. ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
  1754. writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
  1755. readb(addr + (ECOR << SMC_IO_SHIFT));
  1756. /*
  1757. * Wait 100us for the chip to reset.
  1758. */
  1759. udelay(100);
  1760. /*
  1761. * The device will ignore all writes to the enable bit while
  1762. * reset is asserted, even if the reset bit is cleared in the
  1763. * same write. Must clear reset first, then enable the device.
  1764. */
  1765. writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
  1766. writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
  1767. /*
  1768. * Set the appropriate byte/word mode.
  1769. */
  1770. ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
  1771. #ifndef SMC_CAN_USE_16BIT
  1772. ecsr |= ECSR_IOIS8;
  1773. #endif
  1774. writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
  1775. local_irq_restore(flags);
  1776. iounmap(addr);
  1777. /*
  1778. * Wait for the chip to wake up. We could poll the control
  1779. * register in the main register space, but that isn't mapped
  1780. * yet. We know this is going to take 750us.
  1781. */
  1782. msleep(1);
  1783. return 0;
  1784. }
  1785. static int smc_request_attrib(struct platform_device *pdev)
  1786. {
  1787. struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
  1788. if (!res)
  1789. return 0;
  1790. if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
  1791. return -EBUSY;
  1792. return 0;
  1793. }
  1794. static void smc_release_attrib(struct platform_device *pdev)
  1795. {
  1796. struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
  1797. if (res)
  1798. release_mem_region(res->start, ATTRIB_SIZE);
  1799. }
  1800. #ifdef SMC_CAN_USE_DATACS
  1801. static void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
  1802. {
  1803. struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
  1804. struct smc_local *lp = netdev_priv(ndev);
  1805. if (!res)
  1806. return;
  1807. if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
  1808. printk(KERN_INFO "%s: failed to request datacs memory region.\n", CARDNAME);
  1809. return;
  1810. }
  1811. lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
  1812. }
  1813. static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
  1814. {
  1815. struct smc_local *lp = netdev_priv(ndev);
  1816. struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
  1817. if (lp->datacs)
  1818. iounmap(lp->datacs);
  1819. lp->datacs = NULL;
  1820. if (res)
  1821. release_mem_region(res->start, SMC_DATA_EXTENT);
  1822. }
  1823. #else
  1824. static void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev) {}
  1825. static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev) {}
  1826. #endif
  1827. /*
  1828. * smc_init(void)
  1829. * Input parameters:
  1830. * dev->base_addr == 0, try to find all possible locations
  1831. * dev->base_addr > 0x1ff, this is the address to check
  1832. * dev->base_addr == <anything else>, return failure code
  1833. *
  1834. * Output:
  1835. * 0 --> there is a device
  1836. * anything else, error
  1837. */
  1838. static int smc_drv_probe(struct device *dev)
  1839. {
  1840. struct platform_device *pdev = to_platform_device(dev);
  1841. struct net_device *ndev;
  1842. struct resource *res;
  1843. unsigned int __iomem *addr;
  1844. int ret;
  1845. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
  1846. if (!res)
  1847. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1848. if (!res) {
  1849. ret = -ENODEV;
  1850. goto out;
  1851. }
  1852. if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
  1853. ret = -EBUSY;
  1854. goto out;
  1855. }
  1856. ndev = alloc_etherdev(sizeof(struct smc_local));
  1857. if (!ndev) {
  1858. printk("%s: could not allocate device.\n", CARDNAME);
  1859. ret = -ENOMEM;
  1860. goto out_release_io;
  1861. }
  1862. SET_MODULE_OWNER(ndev);
  1863. SET_NETDEV_DEV(ndev, dev);
  1864. ndev->dma = (unsigned char)-1;
  1865. ndev->irq = platform_get_irq(pdev, 0);
  1866. ret = smc_request_attrib(pdev);
  1867. if (ret)
  1868. goto out_free_netdev;
  1869. #if defined(CONFIG_SA1100_ASSABET)
  1870. NCR_0 |= NCR_ENET_OSC_EN;
  1871. #endif
  1872. ret = smc_enable_device(pdev);
  1873. if (ret)
  1874. goto out_release_attrib;
  1875. addr = ioremap(res->start, SMC_IO_EXTENT);
  1876. if (!addr) {
  1877. ret = -ENOMEM;
  1878. goto out_release_attrib;
  1879. }
  1880. dev_set_drvdata(dev, ndev);
  1881. ret = smc_probe(ndev, addr);
  1882. if (ret != 0)
  1883. goto out_iounmap;
  1884. #ifdef SMC_USE_PXA_DMA
  1885. else {
  1886. struct smc_local *lp = netdev_priv(ndev);
  1887. lp->physaddr = res->start;
  1888. }
  1889. #endif
  1890. smc_request_datacs(pdev, ndev);
  1891. return 0;
  1892. out_iounmap:
  1893. dev_set_drvdata(dev, NULL);
  1894. iounmap(addr);
  1895. out_release_attrib:
  1896. smc_release_attrib(pdev);
  1897. out_free_netdev:
  1898. free_netdev(ndev);
  1899. out_release_io:
  1900. release_mem_region(res->start, SMC_IO_EXTENT);
  1901. out:
  1902. printk("%s: not found (%d).\n", CARDNAME, ret);
  1903. return ret;
  1904. }
  1905. static int smc_drv_remove(struct device *dev)
  1906. {
  1907. struct platform_device *pdev = to_platform_device(dev);
  1908. struct net_device *ndev = dev_get_drvdata(dev);
  1909. struct smc_local *lp = netdev_priv(ndev);
  1910. struct resource *res;
  1911. dev_set_drvdata(dev, NULL);
  1912. unregister_netdev(ndev);
  1913. free_irq(ndev->irq, ndev);
  1914. #ifdef SMC_USE_PXA_DMA
  1915. if (ndev->dma != (unsigned char)-1)
  1916. pxa_free_dma(ndev->dma);
  1917. #endif
  1918. iounmap(lp->base);
  1919. smc_release_datacs(pdev,ndev);
  1920. smc_release_attrib(pdev);
  1921. res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
  1922. if (!res)
  1923. platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1924. release_mem_region(res->start, SMC_IO_EXTENT);
  1925. free_netdev(ndev);
  1926. return 0;
  1927. }
  1928. static int smc_drv_suspend(struct device *dev, pm_message_t state, u32 level)
  1929. {
  1930. struct net_device *ndev = dev_get_drvdata(dev);
  1931. if (ndev && level == SUSPEND_DISABLE) {
  1932. if (netif_running(ndev)) {
  1933. netif_device_detach(ndev);
  1934. smc_shutdown(ndev);
  1935. smc_phy_powerdown(ndev);
  1936. }
  1937. }
  1938. return 0;
  1939. }
  1940. static int smc_drv_resume(struct device *dev, u32 level)
  1941. {
  1942. struct platform_device *pdev = to_platform_device(dev);
  1943. struct net_device *ndev = dev_get_drvdata(dev);
  1944. if (ndev && level == RESUME_ENABLE) {
  1945. struct smc_local *lp = netdev_priv(ndev);
  1946. smc_enable_device(pdev);
  1947. if (netif_running(ndev)) {
  1948. smc_reset(ndev);
  1949. smc_enable(ndev);
  1950. if (lp->phy_type != 0)
  1951. smc_phy_configure(ndev);
  1952. netif_device_attach(ndev);
  1953. }
  1954. }
  1955. return 0;
  1956. }
  1957. static struct device_driver smc_driver = {
  1958. .name = CARDNAME,
  1959. .bus = &platform_bus_type,
  1960. .probe = smc_drv_probe,
  1961. .remove = smc_drv_remove,
  1962. .suspend = smc_drv_suspend,
  1963. .resume = smc_drv_resume,
  1964. };
  1965. static int __init smc_init(void)
  1966. {
  1967. #ifdef MODULE
  1968. #ifdef CONFIG_ISA
  1969. if (io == -1)
  1970. printk(KERN_WARNING
  1971. "%s: You shouldn't use auto-probing with insmod!\n",
  1972. CARDNAME);
  1973. #endif
  1974. #endif
  1975. return driver_register(&smc_driver);
  1976. }
  1977. static void __exit smc_cleanup(void)
  1978. {
  1979. driver_unregister(&smc_driver);
  1980. }
  1981. module_init(smc_init);
  1982. module_exit(smc_cleanup);