rrunner.c 43 KB

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  1. /*
  2. * rrunner.c: Linux driver for the Essential RoadRunner HIPPI board.
  3. *
  4. * Copyright (C) 1998-2002 by Jes Sorensen, <jes@wildopensource.com>.
  5. *
  6. * Thanks to Essential Communication for providing us with hardware
  7. * and very comprehensive documentation without which I would not have
  8. * been able to write this driver. A special thank you to John Gibbon
  9. * for sorting out the legal issues, with the NDA, allowing the code to
  10. * be released under the GPL.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * Thanks to Jayaram Bhat from ODS/Essential for fixing some of the
  18. * stupid bugs in my code.
  19. *
  20. * Softnet support and various other patches from Val Henson of
  21. * ODS/Essential.
  22. *
  23. * PCI DMA mapping code partly based on work by Francois Romieu.
  24. */
  25. #define DEBUG 1
  26. #define RX_DMA_SKBUFF 1
  27. #define PKT_COPY_THRESHOLD 512
  28. #include <linux/config.h>
  29. #include <linux/module.h>
  30. #include <linux/types.h>
  31. #include <linux/errno.h>
  32. #include <linux/ioport.h>
  33. #include <linux/pci.h>
  34. #include <linux/kernel.h>
  35. #include <linux/netdevice.h>
  36. #include <linux/hippidevice.h>
  37. #include <linux/skbuff.h>
  38. #include <linux/init.h>
  39. #include <linux/delay.h>
  40. #include <linux/mm.h>
  41. #include <net/sock.h>
  42. #include <asm/system.h>
  43. #include <asm/cache.h>
  44. #include <asm/byteorder.h>
  45. #include <asm/io.h>
  46. #include <asm/irq.h>
  47. #include <asm/uaccess.h>
  48. #define rr_if_busy(dev) netif_queue_stopped(dev)
  49. #define rr_if_running(dev) netif_running(dev)
  50. #include "rrunner.h"
  51. #define RUN_AT(x) (jiffies + (x))
  52. MODULE_AUTHOR("Jes Sorensen <jes@wildopensource.com>");
  53. MODULE_DESCRIPTION("Essential RoadRunner HIPPI driver");
  54. MODULE_LICENSE("GPL");
  55. static char version[] __devinitdata = "rrunner.c: v0.50 11/11/2002 Jes Sorensen (jes@wildopensource.com)\n";
  56. /*
  57. * Implementation notes:
  58. *
  59. * The DMA engine only allows for DMA within physical 64KB chunks of
  60. * memory. The current approach of the driver (and stack) is to use
  61. * linear blocks of memory for the skbuffs. However, as the data block
  62. * is always the first part of the skb and skbs are 2^n aligned so we
  63. * are guarantted to get the whole block within one 64KB align 64KB
  64. * chunk.
  65. *
  66. * On the long term, relying on being able to allocate 64KB linear
  67. * chunks of memory is not feasible and the skb handling code and the
  68. * stack will need to know about I/O vectors or something similar.
  69. */
  70. /*
  71. * These are checked at init time to see if they are at least 256KB
  72. * and increased to 256KB if they are not. This is done to avoid ending
  73. * up with socket buffers smaller than the MTU size,
  74. */
  75. extern __u32 sysctl_wmem_max;
  76. extern __u32 sysctl_rmem_max;
  77. static int __devinit rr_init_one(struct pci_dev *pdev,
  78. const struct pci_device_id *ent)
  79. {
  80. struct net_device *dev;
  81. static int version_disp;
  82. u8 pci_latency;
  83. struct rr_private *rrpriv;
  84. void *tmpptr;
  85. dma_addr_t ring_dma;
  86. int ret = -ENOMEM;
  87. dev = alloc_hippi_dev(sizeof(struct rr_private));
  88. if (!dev)
  89. goto out3;
  90. ret = pci_enable_device(pdev);
  91. if (ret) {
  92. ret = -ENODEV;
  93. goto out2;
  94. }
  95. rrpriv = netdev_priv(dev);
  96. SET_MODULE_OWNER(dev);
  97. SET_NETDEV_DEV(dev, &pdev->dev);
  98. if (pci_request_regions(pdev, "rrunner")) {
  99. ret = -EIO;
  100. goto out;
  101. }
  102. pci_set_drvdata(pdev, dev);
  103. rrpriv->pci_dev = pdev;
  104. spin_lock_init(&rrpriv->lock);
  105. dev->irq = pdev->irq;
  106. dev->open = &rr_open;
  107. dev->hard_start_xmit = &rr_start_xmit;
  108. dev->stop = &rr_close;
  109. dev->get_stats = &rr_get_stats;
  110. dev->do_ioctl = &rr_ioctl;
  111. dev->base_addr = pci_resource_start(pdev, 0);
  112. /* display version info if adapter is found */
  113. if (!version_disp) {
  114. /* set display flag to TRUE so that */
  115. /* we only display this string ONCE */
  116. version_disp = 1;
  117. printk(version);
  118. }
  119. pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &pci_latency);
  120. if (pci_latency <= 0x58){
  121. pci_latency = 0x58;
  122. pci_write_config_byte(pdev, PCI_LATENCY_TIMER, pci_latency);
  123. }
  124. pci_set_master(pdev);
  125. printk(KERN_INFO "%s: Essential RoadRunner serial HIPPI "
  126. "at 0x%08lx, irq %i, PCI latency %i\n", dev->name,
  127. dev->base_addr, dev->irq, pci_latency);
  128. /*
  129. * Remap the regs into kernel space.
  130. */
  131. rrpriv->regs = ioremap(dev->base_addr, 0x1000);
  132. if (!rrpriv->regs){
  133. printk(KERN_ERR "%s: Unable to map I/O register, "
  134. "RoadRunner will be disabled.\n", dev->name);
  135. ret = -EIO;
  136. goto out;
  137. }
  138. tmpptr = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma);
  139. rrpriv->tx_ring = tmpptr;
  140. rrpriv->tx_ring_dma = ring_dma;
  141. if (!tmpptr) {
  142. ret = -ENOMEM;
  143. goto out;
  144. }
  145. tmpptr = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma);
  146. rrpriv->rx_ring = tmpptr;
  147. rrpriv->rx_ring_dma = ring_dma;
  148. if (!tmpptr) {
  149. ret = -ENOMEM;
  150. goto out;
  151. }
  152. tmpptr = pci_alloc_consistent(pdev, EVT_RING_SIZE, &ring_dma);
  153. rrpriv->evt_ring = tmpptr;
  154. rrpriv->evt_ring_dma = ring_dma;
  155. if (!tmpptr) {
  156. ret = -ENOMEM;
  157. goto out;
  158. }
  159. /*
  160. * Don't access any register before this point!
  161. */
  162. #ifdef __BIG_ENDIAN
  163. writel(readl(&rrpriv->regs->HostCtrl) | NO_SWAP,
  164. &rrpriv->regs->HostCtrl);
  165. #endif
  166. /*
  167. * Need to add a case for little-endian 64-bit hosts here.
  168. */
  169. rr_init(dev);
  170. dev->base_addr = 0;
  171. ret = register_netdev(dev);
  172. if (ret)
  173. goto out;
  174. return 0;
  175. out:
  176. if (rrpriv->rx_ring)
  177. pci_free_consistent(pdev, RX_TOTAL_SIZE, rrpriv->rx_ring,
  178. rrpriv->rx_ring_dma);
  179. if (rrpriv->tx_ring)
  180. pci_free_consistent(pdev, TX_TOTAL_SIZE, rrpriv->tx_ring,
  181. rrpriv->tx_ring_dma);
  182. if (rrpriv->regs)
  183. iounmap(rrpriv->regs);
  184. if (pdev) {
  185. pci_release_regions(pdev);
  186. pci_set_drvdata(pdev, NULL);
  187. }
  188. out2:
  189. free_netdev(dev);
  190. out3:
  191. return ret;
  192. }
  193. static void __devexit rr_remove_one (struct pci_dev *pdev)
  194. {
  195. struct net_device *dev = pci_get_drvdata(pdev);
  196. if (dev) {
  197. struct rr_private *rr = netdev_priv(dev);
  198. if (!(readl(&rr->regs->HostCtrl) & NIC_HALTED)){
  199. printk(KERN_ERR "%s: trying to unload running NIC\n",
  200. dev->name);
  201. writel(HALT_NIC, &rr->regs->HostCtrl);
  202. }
  203. pci_free_consistent(pdev, EVT_RING_SIZE, rr->evt_ring,
  204. rr->evt_ring_dma);
  205. pci_free_consistent(pdev, RX_TOTAL_SIZE, rr->rx_ring,
  206. rr->rx_ring_dma);
  207. pci_free_consistent(pdev, TX_TOTAL_SIZE, rr->tx_ring,
  208. rr->tx_ring_dma);
  209. unregister_netdev(dev);
  210. iounmap(rr->regs);
  211. free_netdev(dev);
  212. pci_release_regions(pdev);
  213. pci_disable_device(pdev);
  214. pci_set_drvdata(pdev, NULL);
  215. }
  216. }
  217. /*
  218. * Commands are considered to be slow, thus there is no reason to
  219. * inline this.
  220. */
  221. static void rr_issue_cmd(struct rr_private *rrpriv, struct cmd *cmd)
  222. {
  223. struct rr_regs __iomem *regs;
  224. u32 idx;
  225. regs = rrpriv->regs;
  226. /*
  227. * This is temporary - it will go away in the final version.
  228. * We probably also want to make this function inline.
  229. */
  230. if (readl(&regs->HostCtrl) & NIC_HALTED){
  231. printk("issuing command for halted NIC, code 0x%x, "
  232. "HostCtrl %08x\n", cmd->code, readl(&regs->HostCtrl));
  233. if (readl(&regs->Mode) & FATAL_ERR)
  234. printk("error codes Fail1 %02x, Fail2 %02x\n",
  235. readl(&regs->Fail1), readl(&regs->Fail2));
  236. }
  237. idx = rrpriv->info->cmd_ctrl.pi;
  238. writel(*(u32*)(cmd), &regs->CmdRing[idx]);
  239. wmb();
  240. idx = (idx - 1) % CMD_RING_ENTRIES;
  241. rrpriv->info->cmd_ctrl.pi = idx;
  242. wmb();
  243. if (readl(&regs->Mode) & FATAL_ERR)
  244. printk("error code %02x\n", readl(&regs->Fail1));
  245. }
  246. /*
  247. * Reset the board in a sensible manner. The NIC is already halted
  248. * when we get here and a spin-lock is held.
  249. */
  250. static int rr_reset(struct net_device *dev)
  251. {
  252. struct rr_private *rrpriv;
  253. struct rr_regs __iomem *regs;
  254. struct eeprom *hw = NULL;
  255. u32 start_pc;
  256. int i;
  257. rrpriv = netdev_priv(dev);
  258. regs = rrpriv->regs;
  259. rr_load_firmware(dev);
  260. writel(0x01000000, &regs->TX_state);
  261. writel(0xff800000, &regs->RX_state);
  262. writel(0, &regs->AssistState);
  263. writel(CLEAR_INTA, &regs->LocalCtrl);
  264. writel(0x01, &regs->BrkPt);
  265. writel(0, &regs->Timer);
  266. writel(0, &regs->TimerRef);
  267. writel(RESET_DMA, &regs->DmaReadState);
  268. writel(RESET_DMA, &regs->DmaWriteState);
  269. writel(0, &regs->DmaWriteHostHi);
  270. writel(0, &regs->DmaWriteHostLo);
  271. writel(0, &regs->DmaReadHostHi);
  272. writel(0, &regs->DmaReadHostLo);
  273. writel(0, &regs->DmaReadLen);
  274. writel(0, &regs->DmaWriteLen);
  275. writel(0, &regs->DmaWriteLcl);
  276. writel(0, &regs->DmaWriteIPchecksum);
  277. writel(0, &regs->DmaReadLcl);
  278. writel(0, &regs->DmaReadIPchecksum);
  279. writel(0, &regs->PciState);
  280. #if (BITS_PER_LONG == 64) && defined __LITTLE_ENDIAN
  281. writel(SWAP_DATA | PTR64BIT | PTR_WD_SWAP, &regs->Mode);
  282. #elif (BITS_PER_LONG == 64)
  283. writel(SWAP_DATA | PTR64BIT | PTR_WD_NOSWAP, &regs->Mode);
  284. #else
  285. writel(SWAP_DATA | PTR32BIT | PTR_WD_NOSWAP, &regs->Mode);
  286. #endif
  287. #if 0
  288. /*
  289. * Don't worry, this is just black magic.
  290. */
  291. writel(0xdf000, &regs->RxBase);
  292. writel(0xdf000, &regs->RxPrd);
  293. writel(0xdf000, &regs->RxCon);
  294. writel(0xce000, &regs->TxBase);
  295. writel(0xce000, &regs->TxPrd);
  296. writel(0xce000, &regs->TxCon);
  297. writel(0, &regs->RxIndPro);
  298. writel(0, &regs->RxIndCon);
  299. writel(0, &regs->RxIndRef);
  300. writel(0, &regs->TxIndPro);
  301. writel(0, &regs->TxIndCon);
  302. writel(0, &regs->TxIndRef);
  303. writel(0xcc000, &regs->pad10[0]);
  304. writel(0, &regs->DrCmndPro);
  305. writel(0, &regs->DrCmndCon);
  306. writel(0, &regs->DwCmndPro);
  307. writel(0, &regs->DwCmndCon);
  308. writel(0, &regs->DwCmndRef);
  309. writel(0, &regs->DrDataPro);
  310. writel(0, &regs->DrDataCon);
  311. writel(0, &regs->DrDataRef);
  312. writel(0, &regs->DwDataPro);
  313. writel(0, &regs->DwDataCon);
  314. writel(0, &regs->DwDataRef);
  315. #endif
  316. writel(0xffffffff, &regs->MbEvent);
  317. writel(0, &regs->Event);
  318. writel(0, &regs->TxPi);
  319. writel(0, &regs->IpRxPi);
  320. writel(0, &regs->EvtCon);
  321. writel(0, &regs->EvtPrd);
  322. rrpriv->info->evt_ctrl.pi = 0;
  323. for (i = 0; i < CMD_RING_ENTRIES; i++)
  324. writel(0, &regs->CmdRing[i]);
  325. /*
  326. * Why 32 ? is this not cache line size dependent?
  327. */
  328. writel(RBURST_64|WBURST_64, &regs->PciState);
  329. wmb();
  330. start_pc = rr_read_eeprom_word(rrpriv, &hw->rncd_info.FwStart);
  331. #if (DEBUG > 1)
  332. printk("%s: Executing firmware at address 0x%06x\n",
  333. dev->name, start_pc);
  334. #endif
  335. writel(start_pc + 0x800, &regs->Pc);
  336. wmb();
  337. udelay(5);
  338. writel(start_pc, &regs->Pc);
  339. wmb();
  340. return 0;
  341. }
  342. /*
  343. * Read a string from the EEPROM.
  344. */
  345. static unsigned int rr_read_eeprom(struct rr_private *rrpriv,
  346. unsigned long offset,
  347. unsigned char *buf,
  348. unsigned long length)
  349. {
  350. struct rr_regs __iomem *regs = rrpriv->regs;
  351. u32 misc, io, host, i;
  352. io = readl(&regs->ExtIo);
  353. writel(0, &regs->ExtIo);
  354. misc = readl(&regs->LocalCtrl);
  355. writel(0, &regs->LocalCtrl);
  356. host = readl(&regs->HostCtrl);
  357. writel(host | HALT_NIC, &regs->HostCtrl);
  358. mb();
  359. for (i = 0; i < length; i++){
  360. writel((EEPROM_BASE + ((offset+i) << 3)), &regs->WinBase);
  361. mb();
  362. buf[i] = (readl(&regs->WinData) >> 24) & 0xff;
  363. mb();
  364. }
  365. writel(host, &regs->HostCtrl);
  366. writel(misc, &regs->LocalCtrl);
  367. writel(io, &regs->ExtIo);
  368. mb();
  369. return i;
  370. }
  371. /*
  372. * Shortcut to read one word (4 bytes) out of the EEPROM and convert
  373. * it to our CPU byte-order.
  374. */
  375. static u32 rr_read_eeprom_word(struct rr_private *rrpriv,
  376. void * offset)
  377. {
  378. u32 word;
  379. if ((rr_read_eeprom(rrpriv, (unsigned long)offset,
  380. (char *)&word, 4) == 4))
  381. return be32_to_cpu(word);
  382. return 0;
  383. }
  384. /*
  385. * Write a string to the EEPROM.
  386. *
  387. * This is only called when the firmware is not running.
  388. */
  389. static unsigned int write_eeprom(struct rr_private *rrpriv,
  390. unsigned long offset,
  391. unsigned char *buf,
  392. unsigned long length)
  393. {
  394. struct rr_regs __iomem *regs = rrpriv->regs;
  395. u32 misc, io, data, i, j, ready, error = 0;
  396. io = readl(&regs->ExtIo);
  397. writel(0, &regs->ExtIo);
  398. misc = readl(&regs->LocalCtrl);
  399. writel(ENABLE_EEPROM_WRITE, &regs->LocalCtrl);
  400. mb();
  401. for (i = 0; i < length; i++){
  402. writel((EEPROM_BASE + ((offset+i) << 3)), &regs->WinBase);
  403. mb();
  404. data = buf[i] << 24;
  405. /*
  406. * Only try to write the data if it is not the same
  407. * value already.
  408. */
  409. if ((readl(&regs->WinData) & 0xff000000) != data){
  410. writel(data, &regs->WinData);
  411. ready = 0;
  412. j = 0;
  413. mb();
  414. while(!ready){
  415. udelay(20);
  416. if ((readl(&regs->WinData) & 0xff000000) ==
  417. data)
  418. ready = 1;
  419. mb();
  420. if (j++ > 5000){
  421. printk("data mismatch: %08x, "
  422. "WinData %08x\n", data,
  423. readl(&regs->WinData));
  424. ready = 1;
  425. error = 1;
  426. }
  427. }
  428. }
  429. }
  430. writel(misc, &regs->LocalCtrl);
  431. writel(io, &regs->ExtIo);
  432. mb();
  433. return error;
  434. }
  435. static int __init rr_init(struct net_device *dev)
  436. {
  437. struct rr_private *rrpriv;
  438. struct rr_regs __iomem *regs;
  439. struct eeprom *hw = NULL;
  440. u32 sram_size, rev;
  441. int i;
  442. rrpriv = netdev_priv(dev);
  443. regs = rrpriv->regs;
  444. rev = readl(&regs->FwRev);
  445. rrpriv->fw_rev = rev;
  446. if (rev > 0x00020024)
  447. printk(" Firmware revision: %i.%i.%i\n", (rev >> 16),
  448. ((rev >> 8) & 0xff), (rev & 0xff));
  449. else if (rev >= 0x00020000) {
  450. printk(" Firmware revision: %i.%i.%i (2.0.37 or "
  451. "later is recommended)\n", (rev >> 16),
  452. ((rev >> 8) & 0xff), (rev & 0xff));
  453. }else{
  454. printk(" Firmware revision too old: %i.%i.%i, please "
  455. "upgrade to 2.0.37 or later.\n",
  456. (rev >> 16), ((rev >> 8) & 0xff), (rev & 0xff));
  457. }
  458. #if (DEBUG > 2)
  459. printk(" Maximum receive rings %i\n", readl(&regs->MaxRxRng));
  460. #endif
  461. /*
  462. * Read the hardware address from the eeprom. The HW address
  463. * is not really necessary for HIPPI but awfully convenient.
  464. * The pointer arithmetic to put it in dev_addr is ugly, but
  465. * Donald Becker does it this way for the GigE version of this
  466. * card and it's shorter and more portable than any
  467. * other method I've seen. -VAL
  468. */
  469. *(u16 *)(dev->dev_addr) =
  470. htons(rr_read_eeprom_word(rrpriv, &hw->manf.BoardULA));
  471. *(u32 *)(dev->dev_addr+2) =
  472. htonl(rr_read_eeprom_word(rrpriv, &hw->manf.BoardULA[4]));
  473. printk(" MAC: ");
  474. for (i = 0; i < 5; i++)
  475. printk("%2.2x:", dev->dev_addr[i]);
  476. printk("%2.2x\n", dev->dev_addr[i]);
  477. sram_size = rr_read_eeprom_word(rrpriv, (void *)8);
  478. printk(" SRAM size 0x%06x\n", sram_size);
  479. if (sysctl_rmem_max < 262144){
  480. printk(" Receive socket buffer limit too low (%i), "
  481. "setting to 262144\n", sysctl_rmem_max);
  482. sysctl_rmem_max = 262144;
  483. }
  484. if (sysctl_wmem_max < 262144){
  485. printk(" Transmit socket buffer limit too low (%i), "
  486. "setting to 262144\n", sysctl_wmem_max);
  487. sysctl_wmem_max = 262144;
  488. }
  489. return 0;
  490. }
  491. static int rr_init1(struct net_device *dev)
  492. {
  493. struct rr_private *rrpriv;
  494. struct rr_regs __iomem *regs;
  495. unsigned long myjif, flags;
  496. struct cmd cmd;
  497. u32 hostctrl;
  498. int ecode = 0;
  499. short i;
  500. rrpriv = netdev_priv(dev);
  501. regs = rrpriv->regs;
  502. spin_lock_irqsave(&rrpriv->lock, flags);
  503. hostctrl = readl(&regs->HostCtrl);
  504. writel(hostctrl | HALT_NIC | RR_CLEAR_INT, &regs->HostCtrl);
  505. wmb();
  506. if (hostctrl & PARITY_ERR){
  507. printk("%s: Parity error halting NIC - this is serious!\n",
  508. dev->name);
  509. spin_unlock_irqrestore(&rrpriv->lock, flags);
  510. ecode = -EFAULT;
  511. goto error;
  512. }
  513. set_rxaddr(regs, rrpriv->rx_ctrl_dma);
  514. set_infoaddr(regs, rrpriv->info_dma);
  515. rrpriv->info->evt_ctrl.entry_size = sizeof(struct event);
  516. rrpriv->info->evt_ctrl.entries = EVT_RING_ENTRIES;
  517. rrpriv->info->evt_ctrl.mode = 0;
  518. rrpriv->info->evt_ctrl.pi = 0;
  519. set_rraddr(&rrpriv->info->evt_ctrl.rngptr, rrpriv->evt_ring_dma);
  520. rrpriv->info->cmd_ctrl.entry_size = sizeof(struct cmd);
  521. rrpriv->info->cmd_ctrl.entries = CMD_RING_ENTRIES;
  522. rrpriv->info->cmd_ctrl.mode = 0;
  523. rrpriv->info->cmd_ctrl.pi = 15;
  524. for (i = 0; i < CMD_RING_ENTRIES; i++) {
  525. writel(0, &regs->CmdRing[i]);
  526. }
  527. for (i = 0; i < TX_RING_ENTRIES; i++) {
  528. rrpriv->tx_ring[i].size = 0;
  529. set_rraddr(&rrpriv->tx_ring[i].addr, 0);
  530. rrpriv->tx_skbuff[i] = NULL;
  531. }
  532. rrpriv->info->tx_ctrl.entry_size = sizeof(struct tx_desc);
  533. rrpriv->info->tx_ctrl.entries = TX_RING_ENTRIES;
  534. rrpriv->info->tx_ctrl.mode = 0;
  535. rrpriv->info->tx_ctrl.pi = 0;
  536. set_rraddr(&rrpriv->info->tx_ctrl.rngptr, rrpriv->tx_ring_dma);
  537. /*
  538. * Set dirty_tx before we start receiving interrupts, otherwise
  539. * the interrupt handler might think it is supposed to process
  540. * tx ints before we are up and running, which may cause a null
  541. * pointer access in the int handler.
  542. */
  543. rrpriv->tx_full = 0;
  544. rrpriv->cur_rx = 0;
  545. rrpriv->dirty_rx = rrpriv->dirty_tx = 0;
  546. rr_reset(dev);
  547. /* Tuning values */
  548. writel(0x5000, &regs->ConRetry);
  549. writel(0x100, &regs->ConRetryTmr);
  550. writel(0x500000, &regs->ConTmout);
  551. writel(0x60, &regs->IntrTmr);
  552. writel(0x500000, &regs->TxDataMvTimeout);
  553. writel(0x200000, &regs->RxDataMvTimeout);
  554. writel(0x80, &regs->WriteDmaThresh);
  555. writel(0x80, &regs->ReadDmaThresh);
  556. rrpriv->fw_running = 0;
  557. wmb();
  558. hostctrl &= ~(HALT_NIC | INVALID_INST_B | PARITY_ERR);
  559. writel(hostctrl, &regs->HostCtrl);
  560. wmb();
  561. spin_unlock_irqrestore(&rrpriv->lock, flags);
  562. for (i = 0; i < RX_RING_ENTRIES; i++) {
  563. struct sk_buff *skb;
  564. dma_addr_t addr;
  565. rrpriv->rx_ring[i].mode = 0;
  566. skb = alloc_skb(dev->mtu + HIPPI_HLEN, GFP_ATOMIC);
  567. if (!skb) {
  568. printk(KERN_WARNING "%s: Unable to allocate memory "
  569. "for receive ring - halting NIC\n", dev->name);
  570. ecode = -ENOMEM;
  571. goto error;
  572. }
  573. rrpriv->rx_skbuff[i] = skb;
  574. addr = pci_map_single(rrpriv->pci_dev, skb->data,
  575. dev->mtu + HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  576. /*
  577. * Sanity test to see if we conflict with the DMA
  578. * limitations of the Roadrunner.
  579. */
  580. if ((((unsigned long)skb->data) & 0xfff) > ~65320)
  581. printk("skb alloc error\n");
  582. set_rraddr(&rrpriv->rx_ring[i].addr, addr);
  583. rrpriv->rx_ring[i].size = dev->mtu + HIPPI_HLEN;
  584. }
  585. rrpriv->rx_ctrl[4].entry_size = sizeof(struct rx_desc);
  586. rrpriv->rx_ctrl[4].entries = RX_RING_ENTRIES;
  587. rrpriv->rx_ctrl[4].mode = 8;
  588. rrpriv->rx_ctrl[4].pi = 0;
  589. wmb();
  590. set_rraddr(&rrpriv->rx_ctrl[4].rngptr, rrpriv->rx_ring_dma);
  591. udelay(1000);
  592. /*
  593. * Now start the FirmWare.
  594. */
  595. cmd.code = C_START_FW;
  596. cmd.ring = 0;
  597. cmd.index = 0;
  598. rr_issue_cmd(rrpriv, &cmd);
  599. /*
  600. * Give the FirmWare time to chew on the `get running' command.
  601. */
  602. myjif = jiffies + 5 * HZ;
  603. while (time_before(jiffies, myjif) && !rrpriv->fw_running)
  604. cpu_relax();
  605. netif_start_queue(dev);
  606. return ecode;
  607. error:
  608. /*
  609. * We might have gotten here because we are out of memory,
  610. * make sure we release everything we allocated before failing
  611. */
  612. for (i = 0; i < RX_RING_ENTRIES; i++) {
  613. struct sk_buff *skb = rrpriv->rx_skbuff[i];
  614. if (skb) {
  615. pci_unmap_single(rrpriv->pci_dev,
  616. rrpriv->rx_ring[i].addr.addrlo,
  617. dev->mtu + HIPPI_HLEN,
  618. PCI_DMA_FROMDEVICE);
  619. rrpriv->rx_ring[i].size = 0;
  620. set_rraddr(&rrpriv->rx_ring[i].addr, 0);
  621. dev_kfree_skb(skb);
  622. rrpriv->rx_skbuff[i] = NULL;
  623. }
  624. }
  625. return ecode;
  626. }
  627. /*
  628. * All events are considered to be slow (RX/TX ints do not generate
  629. * events) and are handled here, outside the main interrupt handler,
  630. * to reduce the size of the handler.
  631. */
  632. static u32 rr_handle_event(struct net_device *dev, u32 prodidx, u32 eidx)
  633. {
  634. struct rr_private *rrpriv;
  635. struct rr_regs __iomem *regs;
  636. u32 tmp;
  637. rrpriv = netdev_priv(dev);
  638. regs = rrpriv->regs;
  639. while (prodidx != eidx){
  640. switch (rrpriv->evt_ring[eidx].code){
  641. case E_NIC_UP:
  642. tmp = readl(&regs->FwRev);
  643. printk(KERN_INFO "%s: Firmware revision %i.%i.%i "
  644. "up and running\n", dev->name,
  645. (tmp >> 16), ((tmp >> 8) & 0xff), (tmp & 0xff));
  646. rrpriv->fw_running = 1;
  647. writel(RX_RING_ENTRIES - 1, &regs->IpRxPi);
  648. wmb();
  649. break;
  650. case E_LINK_ON:
  651. printk(KERN_INFO "%s: Optical link ON\n", dev->name);
  652. break;
  653. case E_LINK_OFF:
  654. printk(KERN_INFO "%s: Optical link OFF\n", dev->name);
  655. break;
  656. case E_RX_IDLE:
  657. printk(KERN_WARNING "%s: RX data not moving\n",
  658. dev->name);
  659. goto drop;
  660. case E_WATCHDOG:
  661. printk(KERN_INFO "%s: The watchdog is here to see "
  662. "us\n", dev->name);
  663. break;
  664. case E_INTERN_ERR:
  665. printk(KERN_ERR "%s: HIPPI Internal NIC error\n",
  666. dev->name);
  667. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  668. &regs->HostCtrl);
  669. wmb();
  670. break;
  671. case E_HOST_ERR:
  672. printk(KERN_ERR "%s: Host software error\n",
  673. dev->name);
  674. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  675. &regs->HostCtrl);
  676. wmb();
  677. break;
  678. /*
  679. * TX events.
  680. */
  681. case E_CON_REJ:
  682. printk(KERN_WARNING "%s: Connection rejected\n",
  683. dev->name);
  684. rrpriv->stats.tx_aborted_errors++;
  685. break;
  686. case E_CON_TMOUT:
  687. printk(KERN_WARNING "%s: Connection timeout\n",
  688. dev->name);
  689. break;
  690. case E_DISC_ERR:
  691. printk(KERN_WARNING "%s: HIPPI disconnect error\n",
  692. dev->name);
  693. rrpriv->stats.tx_aborted_errors++;
  694. break;
  695. case E_INT_PRTY:
  696. printk(KERN_ERR "%s: HIPPI Internal Parity error\n",
  697. dev->name);
  698. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  699. &regs->HostCtrl);
  700. wmb();
  701. break;
  702. case E_TX_IDLE:
  703. printk(KERN_WARNING "%s: Transmitter idle\n",
  704. dev->name);
  705. break;
  706. case E_TX_LINK_DROP:
  707. printk(KERN_WARNING "%s: Link lost during transmit\n",
  708. dev->name);
  709. rrpriv->stats.tx_aborted_errors++;
  710. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  711. &regs->HostCtrl);
  712. wmb();
  713. break;
  714. case E_TX_INV_RNG:
  715. printk(KERN_ERR "%s: Invalid send ring block\n",
  716. dev->name);
  717. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  718. &regs->HostCtrl);
  719. wmb();
  720. break;
  721. case E_TX_INV_BUF:
  722. printk(KERN_ERR "%s: Invalid send buffer address\n",
  723. dev->name);
  724. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  725. &regs->HostCtrl);
  726. wmb();
  727. break;
  728. case E_TX_INV_DSC:
  729. printk(KERN_ERR "%s: Invalid descriptor address\n",
  730. dev->name);
  731. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  732. &regs->HostCtrl);
  733. wmb();
  734. break;
  735. /*
  736. * RX events.
  737. */
  738. case E_RX_RNG_OUT:
  739. printk(KERN_INFO "%s: Receive ring full\n", dev->name);
  740. break;
  741. case E_RX_PAR_ERR:
  742. printk(KERN_WARNING "%s: Receive parity error\n",
  743. dev->name);
  744. goto drop;
  745. case E_RX_LLRC_ERR:
  746. printk(KERN_WARNING "%s: Receive LLRC error\n",
  747. dev->name);
  748. goto drop;
  749. case E_PKT_LN_ERR:
  750. printk(KERN_WARNING "%s: Receive packet length "
  751. "error\n", dev->name);
  752. goto drop;
  753. case E_DTA_CKSM_ERR:
  754. printk(KERN_WARNING "%s: Data checksum error\n",
  755. dev->name);
  756. goto drop;
  757. case E_SHT_BST:
  758. printk(KERN_WARNING "%s: Unexpected short burst "
  759. "error\n", dev->name);
  760. goto drop;
  761. case E_STATE_ERR:
  762. printk(KERN_WARNING "%s: Recv. state transition"
  763. " error\n", dev->name);
  764. goto drop;
  765. case E_UNEXP_DATA:
  766. printk(KERN_WARNING "%s: Unexpected data error\n",
  767. dev->name);
  768. goto drop;
  769. case E_LST_LNK_ERR:
  770. printk(KERN_WARNING "%s: Link lost error\n",
  771. dev->name);
  772. goto drop;
  773. case E_FRM_ERR:
  774. printk(KERN_WARNING "%s: Framming Error\n",
  775. dev->name);
  776. goto drop;
  777. case E_FLG_SYN_ERR:
  778. printk(KERN_WARNING "%s: Flag sync. lost during"
  779. "packet\n", dev->name);
  780. goto drop;
  781. case E_RX_INV_BUF:
  782. printk(KERN_ERR "%s: Invalid receive buffer "
  783. "address\n", dev->name);
  784. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  785. &regs->HostCtrl);
  786. wmb();
  787. break;
  788. case E_RX_INV_DSC:
  789. printk(KERN_ERR "%s: Invalid receive descriptor "
  790. "address\n", dev->name);
  791. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  792. &regs->HostCtrl);
  793. wmb();
  794. break;
  795. case E_RNG_BLK:
  796. printk(KERN_ERR "%s: Invalid ring block\n",
  797. dev->name);
  798. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  799. &regs->HostCtrl);
  800. wmb();
  801. break;
  802. drop:
  803. /* Label packet to be dropped.
  804. * Actual dropping occurs in rx
  805. * handling.
  806. *
  807. * The index of packet we get to drop is
  808. * the index of the packet following
  809. * the bad packet. -kbf
  810. */
  811. {
  812. u16 index = rrpriv->evt_ring[eidx].index;
  813. index = (index + (RX_RING_ENTRIES - 1)) %
  814. RX_RING_ENTRIES;
  815. rrpriv->rx_ring[index].mode |=
  816. (PACKET_BAD | PACKET_END);
  817. }
  818. break;
  819. default:
  820. printk(KERN_WARNING "%s: Unhandled event 0x%02x\n",
  821. dev->name, rrpriv->evt_ring[eidx].code);
  822. }
  823. eidx = (eidx + 1) % EVT_RING_ENTRIES;
  824. }
  825. rrpriv->info->evt_ctrl.pi = eidx;
  826. wmb();
  827. return eidx;
  828. }
  829. static void rx_int(struct net_device *dev, u32 rxlimit, u32 index)
  830. {
  831. struct rr_private *rrpriv = netdev_priv(dev);
  832. struct rr_regs __iomem *regs = rrpriv->regs;
  833. do {
  834. struct rx_desc *desc;
  835. u32 pkt_len;
  836. desc = &(rrpriv->rx_ring[index]);
  837. pkt_len = desc->size;
  838. #if (DEBUG > 2)
  839. printk("index %i, rxlimit %i\n", index, rxlimit);
  840. printk("len %x, mode %x\n", pkt_len, desc->mode);
  841. #endif
  842. if ( (rrpriv->rx_ring[index].mode & PACKET_BAD) == PACKET_BAD){
  843. rrpriv->stats.rx_dropped++;
  844. goto defer;
  845. }
  846. if (pkt_len > 0){
  847. struct sk_buff *skb, *rx_skb;
  848. rx_skb = rrpriv->rx_skbuff[index];
  849. if (pkt_len < PKT_COPY_THRESHOLD) {
  850. skb = alloc_skb(pkt_len, GFP_ATOMIC);
  851. if (skb == NULL){
  852. printk(KERN_WARNING "%s: Unable to allocate skb (%i bytes), deferring packet\n", dev->name, pkt_len);
  853. rrpriv->stats.rx_dropped++;
  854. goto defer;
  855. } else {
  856. pci_dma_sync_single_for_cpu(rrpriv->pci_dev,
  857. desc->addr.addrlo,
  858. pkt_len,
  859. PCI_DMA_FROMDEVICE);
  860. memcpy(skb_put(skb, pkt_len),
  861. rx_skb->data, pkt_len);
  862. pci_dma_sync_single_for_device(rrpriv->pci_dev,
  863. desc->addr.addrlo,
  864. pkt_len,
  865. PCI_DMA_FROMDEVICE);
  866. }
  867. }else{
  868. struct sk_buff *newskb;
  869. newskb = alloc_skb(dev->mtu + HIPPI_HLEN,
  870. GFP_ATOMIC);
  871. if (newskb){
  872. dma_addr_t addr;
  873. pci_unmap_single(rrpriv->pci_dev,
  874. desc->addr.addrlo, dev->mtu +
  875. HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  876. skb = rx_skb;
  877. skb_put(skb, pkt_len);
  878. rrpriv->rx_skbuff[index] = newskb;
  879. addr = pci_map_single(rrpriv->pci_dev,
  880. newskb->data,
  881. dev->mtu + HIPPI_HLEN,
  882. PCI_DMA_FROMDEVICE);
  883. set_rraddr(&desc->addr, addr);
  884. } else {
  885. printk("%s: Out of memory, deferring "
  886. "packet\n", dev->name);
  887. rrpriv->stats.rx_dropped++;
  888. goto defer;
  889. }
  890. }
  891. skb->dev = dev;
  892. skb->protocol = hippi_type_trans(skb, dev);
  893. netif_rx(skb); /* send it up */
  894. dev->last_rx = jiffies;
  895. rrpriv->stats.rx_packets++;
  896. rrpriv->stats.rx_bytes += pkt_len;
  897. }
  898. defer:
  899. desc->mode = 0;
  900. desc->size = dev->mtu + HIPPI_HLEN;
  901. if ((index & 7) == 7)
  902. writel(index, &regs->IpRxPi);
  903. index = (index + 1) % RX_RING_ENTRIES;
  904. } while(index != rxlimit);
  905. rrpriv->cur_rx = index;
  906. wmb();
  907. }
  908. static irqreturn_t rr_interrupt(int irq, void *dev_id, struct pt_regs *ptregs)
  909. {
  910. struct rr_private *rrpriv;
  911. struct rr_regs __iomem *regs;
  912. struct net_device *dev = (struct net_device *)dev_id;
  913. u32 prodidx, rxindex, eidx, txcsmr, rxlimit, txcon;
  914. rrpriv = netdev_priv(dev);
  915. regs = rrpriv->regs;
  916. if (!(readl(&regs->HostCtrl) & RR_INT))
  917. return IRQ_NONE;
  918. spin_lock(&rrpriv->lock);
  919. prodidx = readl(&regs->EvtPrd);
  920. txcsmr = (prodidx >> 8) & 0xff;
  921. rxlimit = (prodidx >> 16) & 0xff;
  922. prodidx &= 0xff;
  923. #if (DEBUG > 2)
  924. printk("%s: interrupt, prodidx = %i, eidx = %i\n", dev->name,
  925. prodidx, rrpriv->info->evt_ctrl.pi);
  926. #endif
  927. /*
  928. * Order here is important. We must handle events
  929. * before doing anything else in order to catch
  930. * such things as LLRC errors, etc -kbf
  931. */
  932. eidx = rrpriv->info->evt_ctrl.pi;
  933. if (prodidx != eidx)
  934. eidx = rr_handle_event(dev, prodidx, eidx);
  935. rxindex = rrpriv->cur_rx;
  936. if (rxindex != rxlimit)
  937. rx_int(dev, rxlimit, rxindex);
  938. txcon = rrpriv->dirty_tx;
  939. if (txcsmr != txcon) {
  940. do {
  941. /* Due to occational firmware TX producer/consumer out
  942. * of sync. error need to check entry in ring -kbf
  943. */
  944. if(rrpriv->tx_skbuff[txcon]){
  945. struct tx_desc *desc;
  946. struct sk_buff *skb;
  947. desc = &(rrpriv->tx_ring[txcon]);
  948. skb = rrpriv->tx_skbuff[txcon];
  949. rrpriv->stats.tx_packets++;
  950. rrpriv->stats.tx_bytes += skb->len;
  951. pci_unmap_single(rrpriv->pci_dev,
  952. desc->addr.addrlo, skb->len,
  953. PCI_DMA_TODEVICE);
  954. dev_kfree_skb_irq(skb);
  955. rrpriv->tx_skbuff[txcon] = NULL;
  956. desc->size = 0;
  957. set_rraddr(&rrpriv->tx_ring[txcon].addr, 0);
  958. desc->mode = 0;
  959. }
  960. txcon = (txcon + 1) % TX_RING_ENTRIES;
  961. } while (txcsmr != txcon);
  962. wmb();
  963. rrpriv->dirty_tx = txcon;
  964. if (rrpriv->tx_full && rr_if_busy(dev) &&
  965. (((rrpriv->info->tx_ctrl.pi + 1) % TX_RING_ENTRIES)
  966. != rrpriv->dirty_tx)){
  967. rrpriv->tx_full = 0;
  968. netif_wake_queue(dev);
  969. }
  970. }
  971. eidx |= ((txcsmr << 8) | (rxlimit << 16));
  972. writel(eidx, &regs->EvtCon);
  973. wmb();
  974. spin_unlock(&rrpriv->lock);
  975. return IRQ_HANDLED;
  976. }
  977. static inline void rr_raz_tx(struct rr_private *rrpriv,
  978. struct net_device *dev)
  979. {
  980. int i;
  981. for (i = 0; i < TX_RING_ENTRIES; i++) {
  982. struct sk_buff *skb = rrpriv->tx_skbuff[i];
  983. if (skb) {
  984. struct tx_desc *desc = &(rrpriv->tx_ring[i]);
  985. pci_unmap_single(rrpriv->pci_dev, desc->addr.addrlo,
  986. skb->len, PCI_DMA_TODEVICE);
  987. desc->size = 0;
  988. set_rraddr(&desc->addr, 0);
  989. dev_kfree_skb(skb);
  990. rrpriv->tx_skbuff[i] = NULL;
  991. }
  992. }
  993. }
  994. static inline void rr_raz_rx(struct rr_private *rrpriv,
  995. struct net_device *dev)
  996. {
  997. int i;
  998. for (i = 0; i < RX_RING_ENTRIES; i++) {
  999. struct sk_buff *skb = rrpriv->rx_skbuff[i];
  1000. if (skb) {
  1001. struct rx_desc *desc = &(rrpriv->rx_ring[i]);
  1002. pci_unmap_single(rrpriv->pci_dev, desc->addr.addrlo,
  1003. dev->mtu + HIPPI_HLEN, PCI_DMA_FROMDEVICE);
  1004. desc->size = 0;
  1005. set_rraddr(&desc->addr, 0);
  1006. dev_kfree_skb(skb);
  1007. rrpriv->rx_skbuff[i] = NULL;
  1008. }
  1009. }
  1010. }
  1011. static void rr_timer(unsigned long data)
  1012. {
  1013. struct net_device *dev = (struct net_device *)data;
  1014. struct rr_private *rrpriv = netdev_priv(dev);
  1015. struct rr_regs __iomem *regs = rrpriv->regs;
  1016. unsigned long flags;
  1017. if (readl(&regs->HostCtrl) & NIC_HALTED){
  1018. printk("%s: Restarting nic\n", dev->name);
  1019. memset(rrpriv->rx_ctrl, 0, 256 * sizeof(struct ring_ctrl));
  1020. memset(rrpriv->info, 0, sizeof(struct rr_info));
  1021. wmb();
  1022. rr_raz_tx(rrpriv, dev);
  1023. rr_raz_rx(rrpriv, dev);
  1024. if (rr_init1(dev)) {
  1025. spin_lock_irqsave(&rrpriv->lock, flags);
  1026. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT,
  1027. &regs->HostCtrl);
  1028. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1029. }
  1030. }
  1031. rrpriv->timer.expires = RUN_AT(5*HZ);
  1032. add_timer(&rrpriv->timer);
  1033. }
  1034. static int rr_open(struct net_device *dev)
  1035. {
  1036. struct rr_private *rrpriv = netdev_priv(dev);
  1037. struct pci_dev *pdev = rrpriv->pci_dev;
  1038. struct rr_regs __iomem *regs;
  1039. int ecode = 0;
  1040. unsigned long flags;
  1041. dma_addr_t dma_addr;
  1042. regs = rrpriv->regs;
  1043. if (rrpriv->fw_rev < 0x00020000) {
  1044. printk(KERN_WARNING "%s: trying to configure device with "
  1045. "obsolete firmware\n", dev->name);
  1046. ecode = -EBUSY;
  1047. goto error;
  1048. }
  1049. rrpriv->rx_ctrl = pci_alloc_consistent(pdev,
  1050. 256 * sizeof(struct ring_ctrl),
  1051. &dma_addr);
  1052. if (!rrpriv->rx_ctrl) {
  1053. ecode = -ENOMEM;
  1054. goto error;
  1055. }
  1056. rrpriv->rx_ctrl_dma = dma_addr;
  1057. memset(rrpriv->rx_ctrl, 0, 256*sizeof(struct ring_ctrl));
  1058. rrpriv->info = pci_alloc_consistent(pdev, sizeof(struct rr_info),
  1059. &dma_addr);
  1060. if (!rrpriv->info) {
  1061. ecode = -ENOMEM;
  1062. goto error;
  1063. }
  1064. rrpriv->info_dma = dma_addr;
  1065. memset(rrpriv->info, 0, sizeof(struct rr_info));
  1066. wmb();
  1067. spin_lock_irqsave(&rrpriv->lock, flags);
  1068. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT, &regs->HostCtrl);
  1069. readl(&regs->HostCtrl);
  1070. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1071. if (request_irq(dev->irq, rr_interrupt, SA_SHIRQ, dev->name, dev)) {
  1072. printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
  1073. dev->name, dev->irq);
  1074. ecode = -EAGAIN;
  1075. goto error;
  1076. }
  1077. if ((ecode = rr_init1(dev)))
  1078. goto error;
  1079. /* Set the timer to switch to check for link beat and perhaps switch
  1080. to an alternate media type. */
  1081. init_timer(&rrpriv->timer);
  1082. rrpriv->timer.expires = RUN_AT(5*HZ); /* 5 sec. watchdog */
  1083. rrpriv->timer.data = (unsigned long)dev;
  1084. rrpriv->timer.function = &rr_timer; /* timer handler */
  1085. add_timer(&rrpriv->timer);
  1086. netif_start_queue(dev);
  1087. return ecode;
  1088. error:
  1089. spin_lock_irqsave(&rrpriv->lock, flags);
  1090. writel(readl(&regs->HostCtrl)|HALT_NIC|RR_CLEAR_INT, &regs->HostCtrl);
  1091. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1092. if (rrpriv->info) {
  1093. pci_free_consistent(pdev, sizeof(struct rr_info), rrpriv->info,
  1094. rrpriv->info_dma);
  1095. rrpriv->info = NULL;
  1096. }
  1097. if (rrpriv->rx_ctrl) {
  1098. pci_free_consistent(pdev, sizeof(struct ring_ctrl),
  1099. rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
  1100. rrpriv->rx_ctrl = NULL;
  1101. }
  1102. netif_stop_queue(dev);
  1103. return ecode;
  1104. }
  1105. static void rr_dump(struct net_device *dev)
  1106. {
  1107. struct rr_private *rrpriv;
  1108. struct rr_regs __iomem *regs;
  1109. u32 index, cons;
  1110. short i;
  1111. int len;
  1112. rrpriv = netdev_priv(dev);
  1113. regs = rrpriv->regs;
  1114. printk("%s: dumping NIC TX rings\n", dev->name);
  1115. printk("RxPrd %08x, TxPrd %02x, EvtPrd %08x, TxPi %02x, TxCtrlPi %02x\n",
  1116. readl(&regs->RxPrd), readl(&regs->TxPrd),
  1117. readl(&regs->EvtPrd), readl(&regs->TxPi),
  1118. rrpriv->info->tx_ctrl.pi);
  1119. printk("Error code 0x%x\n", readl(&regs->Fail1));
  1120. index = (((readl(&regs->EvtPrd) >> 8) & 0xff ) - 1) % EVT_RING_ENTRIES;
  1121. cons = rrpriv->dirty_tx;
  1122. printk("TX ring index %i, TX consumer %i\n",
  1123. index, cons);
  1124. if (rrpriv->tx_skbuff[index]){
  1125. len = min_t(int, 0x80, rrpriv->tx_skbuff[index]->len);
  1126. printk("skbuff for index %i is valid - dumping data (0x%x bytes - DMA len 0x%x)\n", index, len, rrpriv->tx_ring[index].size);
  1127. for (i = 0; i < len; i++){
  1128. if (!(i & 7))
  1129. printk("\n");
  1130. printk("%02x ", (unsigned char) rrpriv->tx_skbuff[index]->data[i]);
  1131. }
  1132. printk("\n");
  1133. }
  1134. if (rrpriv->tx_skbuff[cons]){
  1135. len = min_t(int, 0x80, rrpriv->tx_skbuff[cons]->len);
  1136. printk("skbuff for cons %i is valid - dumping data (0x%x bytes - skbuff len 0x%x)\n", cons, len, rrpriv->tx_skbuff[cons]->len);
  1137. printk("mode 0x%x, size 0x%x,\n phys %08Lx, skbuff-addr %08lx, truesize 0x%x\n",
  1138. rrpriv->tx_ring[cons].mode,
  1139. rrpriv->tx_ring[cons].size,
  1140. (unsigned long long) rrpriv->tx_ring[cons].addr.addrlo,
  1141. (unsigned long)rrpriv->tx_skbuff[cons]->data,
  1142. (unsigned int)rrpriv->tx_skbuff[cons]->truesize);
  1143. for (i = 0; i < len; i++){
  1144. if (!(i & 7))
  1145. printk("\n");
  1146. printk("%02x ", (unsigned char)rrpriv->tx_ring[cons].size);
  1147. }
  1148. printk("\n");
  1149. }
  1150. printk("dumping TX ring info:\n");
  1151. for (i = 0; i < TX_RING_ENTRIES; i++)
  1152. printk("mode 0x%x, size 0x%x, phys-addr %08Lx\n",
  1153. rrpriv->tx_ring[i].mode,
  1154. rrpriv->tx_ring[i].size,
  1155. (unsigned long long) rrpriv->tx_ring[i].addr.addrlo);
  1156. }
  1157. static int rr_close(struct net_device *dev)
  1158. {
  1159. struct rr_private *rrpriv;
  1160. struct rr_regs __iomem *regs;
  1161. unsigned long flags;
  1162. u32 tmp;
  1163. short i;
  1164. netif_stop_queue(dev);
  1165. rrpriv = netdev_priv(dev);
  1166. regs = rrpriv->regs;
  1167. /*
  1168. * Lock to make sure we are not cleaning up while another CPU
  1169. * is handling interrupts.
  1170. */
  1171. spin_lock_irqsave(&rrpriv->lock, flags);
  1172. tmp = readl(&regs->HostCtrl);
  1173. if (tmp & NIC_HALTED){
  1174. printk("%s: NIC already halted\n", dev->name);
  1175. rr_dump(dev);
  1176. }else{
  1177. tmp |= HALT_NIC | RR_CLEAR_INT;
  1178. writel(tmp, &regs->HostCtrl);
  1179. readl(&regs->HostCtrl);
  1180. }
  1181. rrpriv->fw_running = 0;
  1182. del_timer_sync(&rrpriv->timer);
  1183. writel(0, &regs->TxPi);
  1184. writel(0, &regs->IpRxPi);
  1185. writel(0, &regs->EvtCon);
  1186. writel(0, &regs->EvtPrd);
  1187. for (i = 0; i < CMD_RING_ENTRIES; i++)
  1188. writel(0, &regs->CmdRing[i]);
  1189. rrpriv->info->tx_ctrl.entries = 0;
  1190. rrpriv->info->cmd_ctrl.pi = 0;
  1191. rrpriv->info->evt_ctrl.pi = 0;
  1192. rrpriv->rx_ctrl[4].entries = 0;
  1193. rr_raz_tx(rrpriv, dev);
  1194. rr_raz_rx(rrpriv, dev);
  1195. pci_free_consistent(rrpriv->pci_dev, 256 * sizeof(struct ring_ctrl),
  1196. rrpriv->rx_ctrl, rrpriv->rx_ctrl_dma);
  1197. rrpriv->rx_ctrl = NULL;
  1198. pci_free_consistent(rrpriv->pci_dev, sizeof(struct rr_info),
  1199. rrpriv->info, rrpriv->info_dma);
  1200. rrpriv->info = NULL;
  1201. free_irq(dev->irq, dev);
  1202. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1203. return 0;
  1204. }
  1205. static int rr_start_xmit(struct sk_buff *skb, struct net_device *dev)
  1206. {
  1207. struct rr_private *rrpriv = netdev_priv(dev);
  1208. struct rr_regs __iomem *regs = rrpriv->regs;
  1209. struct hippi_cb *hcb = (struct hippi_cb *) skb->cb;
  1210. struct ring_ctrl *txctrl;
  1211. unsigned long flags;
  1212. u32 index, len = skb->len;
  1213. u32 *ifield;
  1214. struct sk_buff *new_skb;
  1215. if (readl(&regs->Mode) & FATAL_ERR)
  1216. printk("error codes Fail1 %02x, Fail2 %02x\n",
  1217. readl(&regs->Fail1), readl(&regs->Fail2));
  1218. /*
  1219. * We probably need to deal with tbusy here to prevent overruns.
  1220. */
  1221. if (skb_headroom(skb) < 8){
  1222. printk("incoming skb too small - reallocating\n");
  1223. if (!(new_skb = dev_alloc_skb(len + 8))) {
  1224. dev_kfree_skb(skb);
  1225. netif_wake_queue(dev);
  1226. return -EBUSY;
  1227. }
  1228. skb_reserve(new_skb, 8);
  1229. skb_put(new_skb, len);
  1230. memcpy(new_skb->data, skb->data, len);
  1231. dev_kfree_skb(skb);
  1232. skb = new_skb;
  1233. }
  1234. ifield = (u32 *)skb_push(skb, 8);
  1235. ifield[0] = 0;
  1236. ifield[1] = hcb->ifield;
  1237. /*
  1238. * We don't need the lock before we are actually going to start
  1239. * fiddling with the control blocks.
  1240. */
  1241. spin_lock_irqsave(&rrpriv->lock, flags);
  1242. txctrl = &rrpriv->info->tx_ctrl;
  1243. index = txctrl->pi;
  1244. rrpriv->tx_skbuff[index] = skb;
  1245. set_rraddr(&rrpriv->tx_ring[index].addr, pci_map_single(
  1246. rrpriv->pci_dev, skb->data, len + 8, PCI_DMA_TODEVICE));
  1247. rrpriv->tx_ring[index].size = len + 8; /* include IFIELD */
  1248. rrpriv->tx_ring[index].mode = PACKET_START | PACKET_END;
  1249. txctrl->pi = (index + 1) % TX_RING_ENTRIES;
  1250. wmb();
  1251. writel(txctrl->pi, &regs->TxPi);
  1252. if (txctrl->pi == rrpriv->dirty_tx){
  1253. rrpriv->tx_full = 1;
  1254. netif_stop_queue(dev);
  1255. }
  1256. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1257. dev->trans_start = jiffies;
  1258. return 0;
  1259. }
  1260. static struct net_device_stats *rr_get_stats(struct net_device *dev)
  1261. {
  1262. struct rr_private *rrpriv;
  1263. rrpriv = netdev_priv(dev);
  1264. return(&rrpriv->stats);
  1265. }
  1266. /*
  1267. * Read the firmware out of the EEPROM and put it into the SRAM
  1268. * (or from user space - later)
  1269. *
  1270. * This operation requires the NIC to be halted and is performed with
  1271. * interrupts disabled and with the spinlock hold.
  1272. */
  1273. static int rr_load_firmware(struct net_device *dev)
  1274. {
  1275. struct rr_private *rrpriv;
  1276. struct rr_regs __iomem *regs;
  1277. unsigned long eptr, segptr;
  1278. int i, j;
  1279. u32 localctrl, sptr, len, tmp;
  1280. u32 p2len, p2size, nr_seg, revision, io, sram_size;
  1281. struct eeprom *hw = NULL;
  1282. rrpriv = netdev_priv(dev);
  1283. regs = rrpriv->regs;
  1284. if (dev->flags & IFF_UP)
  1285. return -EBUSY;
  1286. if (!(readl(&regs->HostCtrl) & NIC_HALTED)){
  1287. printk("%s: Trying to load firmware to a running NIC.\n",
  1288. dev->name);
  1289. return -EBUSY;
  1290. }
  1291. localctrl = readl(&regs->LocalCtrl);
  1292. writel(0, &regs->LocalCtrl);
  1293. writel(0, &regs->EvtPrd);
  1294. writel(0, &regs->RxPrd);
  1295. writel(0, &regs->TxPrd);
  1296. /*
  1297. * First wipe the entire SRAM, otherwise we might run into all
  1298. * kinds of trouble ... sigh, this took almost all afternoon
  1299. * to track down ;-(
  1300. */
  1301. io = readl(&regs->ExtIo);
  1302. writel(0, &regs->ExtIo);
  1303. sram_size = rr_read_eeprom_word(rrpriv, (void *)8);
  1304. for (i = 200; i < sram_size / 4; i++){
  1305. writel(i * 4, &regs->WinBase);
  1306. mb();
  1307. writel(0, &regs->WinData);
  1308. mb();
  1309. }
  1310. writel(io, &regs->ExtIo);
  1311. mb();
  1312. eptr = (unsigned long)rr_read_eeprom_word(rrpriv,
  1313. &hw->rncd_info.AddrRunCodeSegs);
  1314. eptr = ((eptr & 0x1fffff) >> 3);
  1315. p2len = rr_read_eeprom_word(rrpriv, (void *)(0x83*4));
  1316. p2len = (p2len << 2);
  1317. p2size = rr_read_eeprom_word(rrpriv, (void *)(0x84*4));
  1318. p2size = ((p2size & 0x1fffff) >> 3);
  1319. if ((eptr < p2size) || (eptr > (p2size + p2len))){
  1320. printk("%s: eptr is invalid\n", dev->name);
  1321. goto out;
  1322. }
  1323. revision = rr_read_eeprom_word(rrpriv, &hw->manf.HeaderFmt);
  1324. if (revision != 1){
  1325. printk("%s: invalid firmware format (%i)\n",
  1326. dev->name, revision);
  1327. goto out;
  1328. }
  1329. nr_seg = rr_read_eeprom_word(rrpriv, (void *)eptr);
  1330. eptr +=4;
  1331. #if (DEBUG > 1)
  1332. printk("%s: nr_seg %i\n", dev->name, nr_seg);
  1333. #endif
  1334. for (i = 0; i < nr_seg; i++){
  1335. sptr = rr_read_eeprom_word(rrpriv, (void *)eptr);
  1336. eptr += 4;
  1337. len = rr_read_eeprom_word(rrpriv, (void *)eptr);
  1338. eptr += 4;
  1339. segptr = (unsigned long)rr_read_eeprom_word(rrpriv, (void *)eptr);
  1340. segptr = ((segptr & 0x1fffff) >> 3);
  1341. eptr += 4;
  1342. #if (DEBUG > 1)
  1343. printk("%s: segment %i, sram address %06x, length %04x, segptr %06x\n",
  1344. dev->name, i, sptr, len, segptr);
  1345. #endif
  1346. for (j = 0; j < len; j++){
  1347. tmp = rr_read_eeprom_word(rrpriv, (void *)segptr);
  1348. writel(sptr, &regs->WinBase);
  1349. mb();
  1350. writel(tmp, &regs->WinData);
  1351. mb();
  1352. segptr += 4;
  1353. sptr += 4;
  1354. }
  1355. }
  1356. out:
  1357. writel(localctrl, &regs->LocalCtrl);
  1358. mb();
  1359. return 0;
  1360. }
  1361. static int rr_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  1362. {
  1363. struct rr_private *rrpriv;
  1364. unsigned char *image, *oldimage;
  1365. unsigned long flags;
  1366. unsigned int i;
  1367. int error = -EOPNOTSUPP;
  1368. rrpriv = netdev_priv(dev);
  1369. switch(cmd){
  1370. case SIOCRRGFW:
  1371. if (!capable(CAP_SYS_RAWIO)){
  1372. return -EPERM;
  1373. }
  1374. image = kmalloc(EEPROM_WORDS * sizeof(u32), GFP_KERNEL);
  1375. if (!image){
  1376. printk(KERN_ERR "%s: Unable to allocate memory "
  1377. "for EEPROM image\n", dev->name);
  1378. return -ENOMEM;
  1379. }
  1380. if (rrpriv->fw_running){
  1381. printk("%s: Firmware already running\n", dev->name);
  1382. error = -EPERM;
  1383. goto gf_out;
  1384. }
  1385. spin_lock_irqsave(&rrpriv->lock, flags);
  1386. i = rr_read_eeprom(rrpriv, 0, image, EEPROM_BYTES);
  1387. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1388. if (i != EEPROM_BYTES){
  1389. printk(KERN_ERR "%s: Error reading EEPROM\n",
  1390. dev->name);
  1391. error = -EFAULT;
  1392. goto gf_out;
  1393. }
  1394. error = copy_to_user(rq->ifr_data, image, EEPROM_BYTES);
  1395. if (error)
  1396. error = -EFAULT;
  1397. gf_out:
  1398. kfree(image);
  1399. return error;
  1400. case SIOCRRPFW:
  1401. if (!capable(CAP_SYS_RAWIO)){
  1402. return -EPERM;
  1403. }
  1404. image = kmalloc(EEPROM_WORDS * sizeof(u32), GFP_KERNEL);
  1405. oldimage = kmalloc(EEPROM_WORDS * sizeof(u32), GFP_KERNEL);
  1406. if (!image || !oldimage) {
  1407. printk(KERN_ERR "%s: Unable to allocate memory "
  1408. "for EEPROM image\n", dev->name);
  1409. error = -ENOMEM;
  1410. goto wf_out;
  1411. }
  1412. error = copy_from_user(image, rq->ifr_data, EEPROM_BYTES);
  1413. if (error) {
  1414. error = -EFAULT;
  1415. goto wf_out;
  1416. }
  1417. if (rrpriv->fw_running){
  1418. printk("%s: Firmware already running\n", dev->name);
  1419. error = -EPERM;
  1420. goto wf_out;
  1421. }
  1422. printk("%s: Updating EEPROM firmware\n", dev->name);
  1423. spin_lock_irqsave(&rrpriv->lock, flags);
  1424. error = write_eeprom(rrpriv, 0, image, EEPROM_BYTES);
  1425. if (error)
  1426. printk(KERN_ERR "%s: Error writing EEPROM\n",
  1427. dev->name);
  1428. i = rr_read_eeprom(rrpriv, 0, oldimage, EEPROM_BYTES);
  1429. spin_unlock_irqrestore(&rrpriv->lock, flags);
  1430. if (i != EEPROM_BYTES)
  1431. printk(KERN_ERR "%s: Error reading back EEPROM "
  1432. "image\n", dev->name);
  1433. error = memcmp(image, oldimage, EEPROM_BYTES);
  1434. if (error){
  1435. printk(KERN_ERR "%s: Error verifying EEPROM image\n",
  1436. dev->name);
  1437. error = -EFAULT;
  1438. }
  1439. wf_out:
  1440. if (oldimage)
  1441. kfree(oldimage);
  1442. if (image)
  1443. kfree(image);
  1444. return error;
  1445. case SIOCRRID:
  1446. return put_user(0x52523032, (int __user *)rq->ifr_data);
  1447. default:
  1448. return error;
  1449. }
  1450. }
  1451. static struct pci_device_id rr_pci_tbl[] = {
  1452. { PCI_VENDOR_ID_ESSENTIAL, PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER,
  1453. PCI_ANY_ID, PCI_ANY_ID, },
  1454. { 0,}
  1455. };
  1456. MODULE_DEVICE_TABLE(pci, rr_pci_tbl);
  1457. static struct pci_driver rr_driver = {
  1458. .name = "rrunner",
  1459. .id_table = rr_pci_tbl,
  1460. .probe = rr_init_one,
  1461. .remove = __devexit_p(rr_remove_one),
  1462. };
  1463. static int __init rr_init_module(void)
  1464. {
  1465. return pci_module_init(&rr_driver);
  1466. }
  1467. static void __exit rr_cleanup_module(void)
  1468. {
  1469. pci_unregister_driver(&rr_driver);
  1470. }
  1471. module_init(rr_init_module);
  1472. module_exit(rr_cleanup_module);
  1473. /*
  1474. * Local variables:
  1475. * compile-command: "gcc -D__KERNEL__ -I../../include -Wall -Wstrict-prototypes -O2 -pipe -fomit-frame-pointer -fno-strength-reduce -m486 -malign-loops=2 -malign-jumps=2 -malign-functions=2 -DMODULE -DMODVERSIONS -include ../../include/linux/modversions.h -c rrunner.c"
  1476. * End:
  1477. */