marvell.c 3.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140
  1. /*
  2. * drivers/net/phy/marvell.c
  3. *
  4. * Driver for Marvell PHYs
  5. *
  6. * Author: Andy Fleming
  7. *
  8. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify it
  11. * under the terms of the GNU General Public License as published by the
  12. * Free Software Foundation; either version 2 of the License, or (at your
  13. * option) any later version.
  14. *
  15. */
  16. #include <linux/config.h>
  17. #include <linux/kernel.h>
  18. #include <linux/sched.h>
  19. #include <linux/string.h>
  20. #include <linux/errno.h>
  21. #include <linux/unistd.h>
  22. #include <linux/slab.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/init.h>
  25. #include <linux/delay.h>
  26. #include <linux/netdevice.h>
  27. #include <linux/etherdevice.h>
  28. #include <linux/skbuff.h>
  29. #include <linux/spinlock.h>
  30. #include <linux/mm.h>
  31. #include <linux/module.h>
  32. #include <linux/version.h>
  33. #include <linux/mii.h>
  34. #include <linux/ethtool.h>
  35. #include <linux/phy.h>
  36. #include <asm/io.h>
  37. #include <asm/irq.h>
  38. #include <asm/uaccess.h>
  39. #define MII_M1011_IEVENT 0x13
  40. #define MII_M1011_IEVENT_CLEAR 0x0000
  41. #define MII_M1011_IMASK 0x12
  42. #define MII_M1011_IMASK_INIT 0x6400
  43. #define MII_M1011_IMASK_CLEAR 0x0000
  44. MODULE_DESCRIPTION("Marvell PHY driver");
  45. MODULE_AUTHOR("Andy Fleming");
  46. MODULE_LICENSE("GPL");
  47. static int marvell_ack_interrupt(struct phy_device *phydev)
  48. {
  49. int err;
  50. /* Clear the interrupts by reading the reg */
  51. err = phy_read(phydev, MII_M1011_IEVENT);
  52. if (err < 0)
  53. return err;
  54. return 0;
  55. }
  56. static int marvell_config_intr(struct phy_device *phydev)
  57. {
  58. int err;
  59. if(phydev->interrupts == PHY_INTERRUPT_ENABLED)
  60. err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_INIT);
  61. else
  62. err = phy_write(phydev, MII_M1011_IMASK, MII_M1011_IMASK_CLEAR);
  63. return err;
  64. }
  65. static int marvell_config_aneg(struct phy_device *phydev)
  66. {
  67. int err;
  68. /* The Marvell PHY has an errata which requires
  69. * that certain registers get written in order
  70. * to restart autonegotiation */
  71. err = phy_write(phydev, MII_BMCR, BMCR_RESET);
  72. if (err < 0)
  73. return err;
  74. err = phy_write(phydev, 0x1d, 0x1f);
  75. if (err < 0)
  76. return err;
  77. err = phy_write(phydev, 0x1e, 0x200c);
  78. if (err < 0)
  79. return err;
  80. err = phy_write(phydev, 0x1d, 0x5);
  81. if (err < 0)
  82. return err;
  83. err = phy_write(phydev, 0x1e, 0);
  84. if (err < 0)
  85. return err;
  86. err = phy_write(phydev, 0x1e, 0x100);
  87. if (err < 0)
  88. return err;
  89. err = genphy_config_aneg(phydev);
  90. return err;
  91. }
  92. static struct phy_driver m88e1101_driver = {
  93. .phy_id = 0x01410c00,
  94. .phy_id_mask = 0xffffff00,
  95. .name = "Marvell 88E1101",
  96. .features = PHY_GBIT_FEATURES,
  97. .flags = PHY_HAS_INTERRUPT,
  98. .config_aneg = &marvell_config_aneg,
  99. .read_status = &genphy_read_status,
  100. .ack_interrupt = &marvell_ack_interrupt,
  101. .config_intr = &marvell_config_intr,
  102. .driver = { .owner = THIS_MODULE,},
  103. };
  104. static int __init marvell_init(void)
  105. {
  106. return phy_driver_register(&m88e1101_driver);
  107. }
  108. static void __exit marvell_exit(void)
  109. {
  110. phy_driver_unregister(&m88e1101_driver);
  111. }
  112. module_init(marvell_init);
  113. module_exit(marvell_exit);