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ibm_emac
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ibm_emac_rgmii.h

ibm_emac_rgmii.h 1.7 KB
Istoric Crud

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  1. /*
    2. 

  2.  * Defines for the IBM RGMII bridge
    3. 

  3.  *
    4. 

  4.  * Based on ocp_zmii.h/ibm_emac_zmii.h
    5. 

  5.  * Armin Kuster akuster@mvista.com
    6. 

  6.  *
    7. 

  7.  * Copyright 2004 MontaVista Software, Inc.
    8. 

  8.  * Matt Porter <mporter@kernel.crashing.org>
    9. 

  9.  *
    10. 

  10.  * This program is free software; you can redistribute  it and/or modify it
    11. 

  11.  * under  the terms of  the GNU General  Public License as published by the
    12. 

  12.  * Free Software Foundation;  either version 2 of the  License, or (at your
    13. 

  13.  * option) any later version.
    14. 

  14.  */
    15. 

  15. 

  16. #ifndef _IBM_EMAC_RGMII_H_
    17. 

  17. #define _IBM_EMAC_RGMII_H_
    18. 

  18. 

  19. #include <linux/config.h>
    20. 

  20. 

  21. /* RGMII bridge */
    22. 

  22. typedef struct rgmii_regs {
    23. 

  23. 	u32 fer;		/* Function enable register */
    24. 

  24. 	u32 ssr;		/* Speed select register */
    25. 

  25. } rgmii_t;
    26. 

  26. 

  27. #define RGMII_INPUTS			4
    28. 

  28. 

  29. /* RGMII device */
    30. 

  30. struct ibm_ocp_rgmii {
    31. 

  31. 	struct rgmii_regs *base;
    32. 

  32. 	int mode[RGMII_INPUTS];
    33. 

  33. 	int users;		/* number of EMACs using this RGMII bridge */
    34. 

  34. };
    35. 

  35. 

  36. /* Fuctional Enable Reg */
    37. 

  37. #define RGMII_FER_MASK(x)		(0x00000007 << (4*x))
    38. 

  38. #define RGMII_RTBI			0x00000004
    39. 

  39. #define RGMII_RGMII			0x00000005
    40. 

  40. #define RGMII_TBI  			0x00000006
    41. 

  41. #define RGMII_GMII 			0x00000007
    42. 

  42. 

  43. /* Speed Selection reg */
    44. 

  44. 

  45. #define RGMII_SP2_100	0x00000002
    46. 

  46. #define RGMII_SP2_1000	0x00000004
    47. 

  47. #define RGMII_SP3_100	0x00000200
    48. 

  48. #define RGMII_SP3_1000	0x00000400
    49. 

  49. 

  50. #define RGMII_MII2_SPDMASK	 0x00000007
    51. 

  51. #define RGMII_MII3_SPDMASK	 0x00000700
    52. 

  52. 

  53. #define RGMII_MII2_100MB	 RGMII_SP2_100 & ~RGMII_SP2_1000
    54. 

  54. #define RGMII_MII2_1000MB 	 RGMII_SP2_1000 & ~RGMII_SP2_100
    55. 

  55. #define RGMII_MII2_10MB		 ~(RGMII_SP2_100 | RGMII_SP2_1000)
    56. 

  56. #define RGMII_MII3_100MB	 RGMII_SP3_100 & ~RGMII_SP3_1000
    57. 

  57. #define RGMII_MII3_1000MB 	 RGMII_SP3_1000 & ~RGMII_SP3_100
    58. 

  58. #define RGMII_MII3_10MB		 ~(RGMII_SP3_100 | RGMII_SP3_1000)
    59. 

  59. 

  60. #define RTBI		0
    61. 

  61. #define RGMII		1
    62. 

  62. #define TBI		2
    63. 

  63. #define GMII		3
    64. 

  64. 

  65. #endif				/* _IBM_EMAC_RGMII_H_ */
    66.