baycom_epp.c 35 KB

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  1. /*****************************************************************************/
  2. /*
  3. * baycom_epp.c -- baycom epp radio modem driver.
  4. *
  5. * Copyright (C) 1998-2000
  6. * Thomas Sailer (sailer@ife.ee.ethz.ch)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. * Please note that the GPL allows you to use the driver, NOT the radio.
  23. * In order to use the radio, you need a license from the communications
  24. * authority of your country.
  25. *
  26. *
  27. * History:
  28. * 0.1 xx.xx.1998 Initial version by Matthias Welwarsky (dg2fef)
  29. * 0.2 21.04.1998 Massive rework by Thomas Sailer
  30. * Integrated FPGA EPP modem configuration routines
  31. * 0.3 11.05.1998 Took FPGA config out and moved it into a separate program
  32. * 0.4 26.07.1999 Adapted to new lowlevel parport driver interface
  33. * 0.5 03.08.1999 adapt to Linus' new __setup/__initcall
  34. * removed some pre-2.2 kernel compatibility cruft
  35. * 0.6 10.08.1999 Check if parport can do SPP and is safe to access during interrupt contexts
  36. * 0.7 12.02.2000 adapted to softnet driver interface
  37. *
  38. */
  39. /*****************************************************************************/
  40. #include <linux/crc-ccitt.h>
  41. #include <linux/module.h>
  42. #include <linux/kernel.h>
  43. #include <linux/init.h>
  44. #include <linux/string.h>
  45. #include <linux/workqueue.h>
  46. #include <linux/fs.h>
  47. #include <linux/parport.h>
  48. #include <linux/if_arp.h>
  49. #include <linux/hdlcdrv.h>
  50. #include <linux/baycom.h>
  51. #include <linux/jiffies.h>
  52. #include <net/ax25.h>
  53. #include <asm/uaccess.h>
  54. /* --------------------------------------------------------------------- */
  55. #define BAYCOM_DEBUG
  56. #define BAYCOM_MAGIC 19730510
  57. /* --------------------------------------------------------------------- */
  58. static const char paranoia_str[] = KERN_ERR
  59. "baycom_epp: bad magic number for hdlcdrv_state struct in routine %s\n";
  60. static const char bc_drvname[] = "baycom_epp";
  61. static const char bc_drvinfo[] = KERN_INFO "baycom_epp: (C) 1998-2000 Thomas Sailer, HB9JNX/AE4WA\n"
  62. KERN_INFO "baycom_epp: version 0.7 compiled " __TIME__ " " __DATE__ "\n";
  63. /* --------------------------------------------------------------------- */
  64. #define NR_PORTS 4
  65. static struct net_device *baycom_device[NR_PORTS];
  66. /* --------------------------------------------------------------------- */
  67. /* EPP status register */
  68. #define EPP_DCDBIT 0x80
  69. #define EPP_PTTBIT 0x08
  70. #define EPP_NREF 0x01
  71. #define EPP_NRAEF 0x02
  72. #define EPP_NRHF 0x04
  73. #define EPP_NTHF 0x20
  74. #define EPP_NTAEF 0x10
  75. #define EPP_NTEF EPP_PTTBIT
  76. /* EPP control register */
  77. #define EPP_TX_FIFO_ENABLE 0x10
  78. #define EPP_RX_FIFO_ENABLE 0x08
  79. #define EPP_MODEM_ENABLE 0x20
  80. #define EPP_LEDS 0xC0
  81. #define EPP_IRQ_ENABLE 0x10
  82. /* LPT registers */
  83. #define LPTREG_ECONTROL 0x402
  84. #define LPTREG_CONFIGB 0x401
  85. #define LPTREG_CONFIGA 0x400
  86. #define LPTREG_EPPDATA 0x004
  87. #define LPTREG_EPPADDR 0x003
  88. #define LPTREG_CONTROL 0x002
  89. #define LPTREG_STATUS 0x001
  90. #define LPTREG_DATA 0x000
  91. /* LPT control register */
  92. #define LPTCTRL_PROGRAM 0x04 /* 0 to reprogram */
  93. #define LPTCTRL_WRITE 0x01
  94. #define LPTCTRL_ADDRSTB 0x08
  95. #define LPTCTRL_DATASTB 0x02
  96. #define LPTCTRL_INTEN 0x10
  97. /* LPT status register */
  98. #define LPTSTAT_SHIFT_NINTR 6
  99. #define LPTSTAT_WAIT 0x80
  100. #define LPTSTAT_NINTR (1<<LPTSTAT_SHIFT_NINTR)
  101. #define LPTSTAT_PE 0x20
  102. #define LPTSTAT_DONE 0x10
  103. #define LPTSTAT_NERROR 0x08
  104. #define LPTSTAT_EPPTIMEOUT 0x01
  105. /* LPT data register */
  106. #define LPTDATA_SHIFT_TDI 0
  107. #define LPTDATA_SHIFT_TMS 2
  108. #define LPTDATA_TDI (1<<LPTDATA_SHIFT_TDI)
  109. #define LPTDATA_TCK 0x02
  110. #define LPTDATA_TMS (1<<LPTDATA_SHIFT_TMS)
  111. #define LPTDATA_INITBIAS 0x80
  112. /* EPP modem config/status bits */
  113. #define EPP_DCDBIT 0x80
  114. #define EPP_PTTBIT 0x08
  115. #define EPP_RXEBIT 0x01
  116. #define EPP_RXAEBIT 0x02
  117. #define EPP_RXHFULL 0x04
  118. #define EPP_NTHF 0x20
  119. #define EPP_NTAEF 0x10
  120. #define EPP_NTEF EPP_PTTBIT
  121. #define EPP_TX_FIFO_ENABLE 0x10
  122. #define EPP_RX_FIFO_ENABLE 0x08
  123. #define EPP_MODEM_ENABLE 0x20
  124. #define EPP_LEDS 0xC0
  125. #define EPP_IRQ_ENABLE 0x10
  126. /* Xilinx 4k JTAG instructions */
  127. #define XC4K_IRLENGTH 3
  128. #define XC4K_EXTEST 0
  129. #define XC4K_PRELOAD 1
  130. #define XC4K_CONFIGURE 5
  131. #define XC4K_BYPASS 7
  132. #define EPP_CONVENTIONAL 0
  133. #define EPP_FPGA 1
  134. #define EPP_FPGAEXTSTATUS 2
  135. #define TXBUFFER_SIZE ((HDLCDRV_MAXFLEN*6/5)+8)
  136. /* ---------------------------------------------------------------------- */
  137. /*
  138. * Information that need to be kept for each board.
  139. */
  140. struct baycom_state {
  141. int magic;
  142. struct pardevice *pdev;
  143. unsigned int work_running;
  144. struct work_struct run_work;
  145. unsigned int modem;
  146. unsigned int bitrate;
  147. unsigned char stat;
  148. struct {
  149. unsigned int intclk;
  150. unsigned int fclk;
  151. unsigned int bps;
  152. unsigned int extmodem;
  153. unsigned int loopback;
  154. } cfg;
  155. struct hdlcdrv_channel_params ch_params;
  156. struct {
  157. unsigned int bitbuf, bitstream, numbits, state;
  158. unsigned char *bufptr;
  159. int bufcnt;
  160. unsigned char buf[TXBUFFER_SIZE];
  161. } hdlcrx;
  162. struct {
  163. int calibrate;
  164. int slotcnt;
  165. int flags;
  166. enum { tx_idle = 0, tx_keyup, tx_data, tx_tail } state;
  167. unsigned char *bufptr;
  168. int bufcnt;
  169. unsigned char buf[TXBUFFER_SIZE];
  170. } hdlctx;
  171. struct net_device_stats stats;
  172. unsigned int ptt_keyed;
  173. struct sk_buff *skb; /* next transmit packet */
  174. #ifdef BAYCOM_DEBUG
  175. struct debug_vals {
  176. unsigned long last_jiffies;
  177. unsigned cur_intcnt;
  178. unsigned last_intcnt;
  179. int cur_pllcorr;
  180. int last_pllcorr;
  181. unsigned int mod_cycles;
  182. unsigned int demod_cycles;
  183. } debug_vals;
  184. #endif /* BAYCOM_DEBUG */
  185. };
  186. /* --------------------------------------------------------------------- */
  187. #define KISS_VERBOSE
  188. /* --------------------------------------------------------------------- */
  189. #define PARAM_TXDELAY 1
  190. #define PARAM_PERSIST 2
  191. #define PARAM_SLOTTIME 3
  192. #define PARAM_TXTAIL 4
  193. #define PARAM_FULLDUP 5
  194. #define PARAM_HARDWARE 6
  195. #define PARAM_RETURN 255
  196. /* --------------------------------------------------------------------- */
  197. /*
  198. * the CRC routines are stolen from WAMPES
  199. * by Dieter Deyke
  200. */
  201. /*---------------------------------------------------------------------------*/
  202. #if 0
  203. static inline void append_crc_ccitt(unsigned char *buffer, int len)
  204. {
  205. unsigned int crc = 0xffff;
  206. for (;len>0;len--)
  207. crc = (crc >> 8) ^ crc_ccitt_table[(crc ^ *buffer++) & 0xff];
  208. crc ^= 0xffff;
  209. *buffer++ = crc;
  210. *buffer++ = crc >> 8;
  211. }
  212. #endif
  213. /*---------------------------------------------------------------------------*/
  214. static inline int check_crc_ccitt(const unsigned char *buf, int cnt)
  215. {
  216. return (crc_ccitt(0xffff, buf, cnt) & 0xffff) == 0xf0b8;
  217. }
  218. /*---------------------------------------------------------------------------*/
  219. static inline int calc_crc_ccitt(const unsigned char *buf, int cnt)
  220. {
  221. return (crc_ccitt(0xffff, buf, cnt) ^ 0xffff) & 0xffff;
  222. }
  223. /* ---------------------------------------------------------------------- */
  224. #define tenms_to_flags(bc,tenms) ((tenms * bc->bitrate) / 800)
  225. /* --------------------------------------------------------------------- */
  226. static inline void baycom_int_freq(struct baycom_state *bc)
  227. {
  228. #ifdef BAYCOM_DEBUG
  229. unsigned long cur_jiffies = jiffies;
  230. /*
  231. * measure the interrupt frequency
  232. */
  233. bc->debug_vals.cur_intcnt++;
  234. if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
  235. bc->debug_vals.last_jiffies = cur_jiffies;
  236. bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
  237. bc->debug_vals.cur_intcnt = 0;
  238. bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
  239. bc->debug_vals.cur_pllcorr = 0;
  240. }
  241. #endif /* BAYCOM_DEBUG */
  242. }
  243. /* ---------------------------------------------------------------------- */
  244. /*
  245. * eppconfig_path should be setable via /proc/sys.
  246. */
  247. static char eppconfig_path[256] = "/usr/sbin/eppfpga";
  248. static char *envp[] = { "HOME=/", "TERM=linux", "PATH=/usr/bin:/bin", NULL };
  249. /* eppconfig: called during ifconfig up to configure the modem */
  250. static int eppconfig(struct baycom_state *bc)
  251. {
  252. char modearg[256];
  253. char portarg[16];
  254. char *argv[] = { eppconfig_path, "-s", "-p", portarg, "-m", modearg,
  255. NULL };
  256. /* set up arguments */
  257. sprintf(modearg, "%sclk,%smodem,fclk=%d,bps=%d,divider=%d%s,extstat",
  258. bc->cfg.intclk ? "int" : "ext",
  259. bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
  260. (bc->cfg.fclk + 8 * bc->cfg.bps) / (16 * bc->cfg.bps),
  261. bc->cfg.loopback ? ",loopback" : "");
  262. sprintf(portarg, "%ld", bc->pdev->port->base);
  263. printk(KERN_DEBUG "%s: %s -s -p %s -m %s\n", bc_drvname, eppconfig_path, portarg, modearg);
  264. return call_usermodehelper(eppconfig_path, argv, envp, 1);
  265. }
  266. /* ---------------------------------------------------------------------- */
  267. static void epp_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  268. {
  269. }
  270. /* ---------------------------------------------------------------------- */
  271. static inline void do_kiss_params(struct baycom_state *bc,
  272. unsigned char *data, unsigned long len)
  273. {
  274. #ifdef KISS_VERBOSE
  275. #define PKP(a,b) printk(KERN_INFO "baycomm_epp: channel params: " a "\n", b)
  276. #else /* KISS_VERBOSE */
  277. #define PKP(a,b)
  278. #endif /* KISS_VERBOSE */
  279. if (len < 2)
  280. return;
  281. switch(data[0]) {
  282. case PARAM_TXDELAY:
  283. bc->ch_params.tx_delay = data[1];
  284. PKP("TX delay = %ums", 10 * bc->ch_params.tx_delay);
  285. break;
  286. case PARAM_PERSIST:
  287. bc->ch_params.ppersist = data[1];
  288. PKP("p persistence = %u", bc->ch_params.ppersist);
  289. break;
  290. case PARAM_SLOTTIME:
  291. bc->ch_params.slottime = data[1];
  292. PKP("slot time = %ums", bc->ch_params.slottime);
  293. break;
  294. case PARAM_TXTAIL:
  295. bc->ch_params.tx_tail = data[1];
  296. PKP("TX tail = %ums", bc->ch_params.tx_tail);
  297. break;
  298. case PARAM_FULLDUP:
  299. bc->ch_params.fulldup = !!data[1];
  300. PKP("%s duplex", bc->ch_params.fulldup ? "full" : "half");
  301. break;
  302. default:
  303. break;
  304. }
  305. #undef PKP
  306. }
  307. /* --------------------------------------------------------------------- */
  308. static void encode_hdlc(struct baycom_state *bc)
  309. {
  310. struct sk_buff *skb;
  311. unsigned char *wp, *bp;
  312. int pkt_len;
  313. unsigned bitstream, notbitstream, bitbuf, numbit, crc;
  314. unsigned char crcarr[2];
  315. int j;
  316. if (bc->hdlctx.bufcnt > 0)
  317. return;
  318. skb = bc->skb;
  319. if (!skb)
  320. return;
  321. bc->skb = NULL;
  322. pkt_len = skb->len-1; /* strip KISS byte */
  323. wp = bc->hdlctx.buf;
  324. bp = skb->data+1;
  325. crc = calc_crc_ccitt(bp, pkt_len);
  326. crcarr[0] = crc;
  327. crcarr[1] = crc >> 8;
  328. *wp++ = 0x7e;
  329. bitstream = bitbuf = numbit = 0;
  330. while (pkt_len > -2) {
  331. bitstream >>= 8;
  332. bitstream |= ((unsigned int)*bp) << 8;
  333. bitbuf |= ((unsigned int)*bp) << numbit;
  334. notbitstream = ~bitstream;
  335. bp++;
  336. pkt_len--;
  337. if (!pkt_len)
  338. bp = crcarr;
  339. for (j = 0; j < 8; j++)
  340. if (unlikely(!(notbitstream & (0x1f0 << j)))) {
  341. bitstream &= ~(0x100 << j);
  342. bitbuf = (bitbuf & (((2 << j) << numbit) - 1)) |
  343. ((bitbuf & ~(((2 << j) << numbit) - 1)) << 1);
  344. numbit++;
  345. notbitstream = ~bitstream;
  346. }
  347. numbit += 8;
  348. while (numbit >= 8) {
  349. *wp++ = bitbuf;
  350. bitbuf >>= 8;
  351. numbit -= 8;
  352. }
  353. }
  354. bitbuf |= 0x7e7e << numbit;
  355. numbit += 16;
  356. while (numbit >= 8) {
  357. *wp++ = bitbuf;
  358. bitbuf >>= 8;
  359. numbit -= 8;
  360. }
  361. bc->hdlctx.bufptr = bc->hdlctx.buf;
  362. bc->hdlctx.bufcnt = wp - bc->hdlctx.buf;
  363. dev_kfree_skb(skb);
  364. bc->stats.tx_packets++;
  365. }
  366. /* ---------------------------------------------------------------------- */
  367. static unsigned short random_seed;
  368. static inline unsigned short random_num(void)
  369. {
  370. random_seed = 28629 * random_seed + 157;
  371. return random_seed;
  372. }
  373. /* ---------------------------------------------------------------------- */
  374. static int transmit(struct baycom_state *bc, int cnt, unsigned char stat)
  375. {
  376. struct parport *pp = bc->pdev->port;
  377. unsigned char tmp[128];
  378. int i, j;
  379. if (bc->hdlctx.state == tx_tail && !(stat & EPP_PTTBIT))
  380. bc->hdlctx.state = tx_idle;
  381. if (bc->hdlctx.state == tx_idle && bc->hdlctx.calibrate <= 0) {
  382. if (bc->hdlctx.bufcnt <= 0)
  383. encode_hdlc(bc);
  384. if (bc->hdlctx.bufcnt <= 0)
  385. return 0;
  386. if (!bc->ch_params.fulldup) {
  387. if (!(stat & EPP_DCDBIT)) {
  388. bc->hdlctx.slotcnt = bc->ch_params.slottime;
  389. return 0;
  390. }
  391. if ((--bc->hdlctx.slotcnt) > 0)
  392. return 0;
  393. bc->hdlctx.slotcnt = bc->ch_params.slottime;
  394. if ((random_num() % 256) > bc->ch_params.ppersist)
  395. return 0;
  396. }
  397. }
  398. if (bc->hdlctx.state == tx_idle && bc->hdlctx.bufcnt > 0) {
  399. bc->hdlctx.state = tx_keyup;
  400. bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_delay);
  401. bc->ptt_keyed++;
  402. }
  403. while (cnt > 0) {
  404. switch (bc->hdlctx.state) {
  405. case tx_keyup:
  406. i = min_t(int, cnt, bc->hdlctx.flags);
  407. cnt -= i;
  408. bc->hdlctx.flags -= i;
  409. if (bc->hdlctx.flags <= 0)
  410. bc->hdlctx.state = tx_data;
  411. memset(tmp, 0x7e, sizeof(tmp));
  412. while (i > 0) {
  413. j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
  414. if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
  415. return -1;
  416. i -= j;
  417. }
  418. break;
  419. case tx_data:
  420. if (bc->hdlctx.bufcnt <= 0) {
  421. encode_hdlc(bc);
  422. if (bc->hdlctx.bufcnt <= 0) {
  423. bc->hdlctx.state = tx_tail;
  424. bc->hdlctx.flags = tenms_to_flags(bc, bc->ch_params.tx_tail);
  425. break;
  426. }
  427. }
  428. i = min_t(int, cnt, bc->hdlctx.bufcnt);
  429. bc->hdlctx.bufcnt -= i;
  430. cnt -= i;
  431. if (i != pp->ops->epp_write_data(pp, bc->hdlctx.bufptr, i, 0))
  432. return -1;
  433. bc->hdlctx.bufptr += i;
  434. break;
  435. case tx_tail:
  436. encode_hdlc(bc);
  437. if (bc->hdlctx.bufcnt > 0) {
  438. bc->hdlctx.state = tx_data;
  439. break;
  440. }
  441. i = min_t(int, cnt, bc->hdlctx.flags);
  442. if (i) {
  443. cnt -= i;
  444. bc->hdlctx.flags -= i;
  445. memset(tmp, 0x7e, sizeof(tmp));
  446. while (i > 0) {
  447. j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
  448. if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
  449. return -1;
  450. i -= j;
  451. }
  452. break;
  453. }
  454. default: /* fall through */
  455. if (bc->hdlctx.calibrate <= 0)
  456. return 0;
  457. i = min_t(int, cnt, bc->hdlctx.calibrate);
  458. cnt -= i;
  459. bc->hdlctx.calibrate -= i;
  460. memset(tmp, 0, sizeof(tmp));
  461. while (i > 0) {
  462. j = (i > sizeof(tmp)) ? sizeof(tmp) : i;
  463. if (j != pp->ops->epp_write_data(pp, tmp, j, 0))
  464. return -1;
  465. i -= j;
  466. }
  467. break;
  468. }
  469. }
  470. return 0;
  471. }
  472. /* ---------------------------------------------------------------------- */
  473. static void do_rxpacket(struct net_device *dev)
  474. {
  475. struct baycom_state *bc = netdev_priv(dev);
  476. struct sk_buff *skb;
  477. unsigned char *cp;
  478. unsigned pktlen;
  479. if (bc->hdlcrx.bufcnt < 4)
  480. return;
  481. if (!check_crc_ccitt(bc->hdlcrx.buf, bc->hdlcrx.bufcnt))
  482. return;
  483. pktlen = bc->hdlcrx.bufcnt-2+1; /* KISS kludge */
  484. if (!(skb = dev_alloc_skb(pktlen))) {
  485. printk("%s: memory squeeze, dropping packet\n", dev->name);
  486. bc->stats.rx_dropped++;
  487. return;
  488. }
  489. cp = skb_put(skb, pktlen);
  490. *cp++ = 0; /* KISS kludge */
  491. memcpy(cp, bc->hdlcrx.buf, pktlen - 1);
  492. skb->protocol = ax25_type_trans(skb, dev);
  493. netif_rx(skb);
  494. dev->last_rx = jiffies;
  495. bc->stats.rx_packets++;
  496. }
  497. static int receive(struct net_device *dev, int cnt)
  498. {
  499. struct baycom_state *bc = netdev_priv(dev);
  500. struct parport *pp = bc->pdev->port;
  501. unsigned int bitbuf, notbitstream, bitstream, numbits, state;
  502. unsigned char tmp[128];
  503. unsigned char *cp;
  504. int cnt2, ret = 0;
  505. int j;
  506. numbits = bc->hdlcrx.numbits;
  507. state = bc->hdlcrx.state;
  508. bitstream = bc->hdlcrx.bitstream;
  509. bitbuf = bc->hdlcrx.bitbuf;
  510. while (cnt > 0) {
  511. cnt2 = (cnt > sizeof(tmp)) ? sizeof(tmp) : cnt;
  512. cnt -= cnt2;
  513. if (cnt2 != pp->ops->epp_read_data(pp, tmp, cnt2, 0)) {
  514. ret = -1;
  515. break;
  516. }
  517. cp = tmp;
  518. for (; cnt2 > 0; cnt2--, cp++) {
  519. bitstream >>= 8;
  520. bitstream |= (*cp) << 8;
  521. bitbuf >>= 8;
  522. bitbuf |= (*cp) << 8;
  523. numbits += 8;
  524. notbitstream = ~bitstream;
  525. for (j = 0; j < 8; j++) {
  526. /* flag or abort */
  527. if (unlikely(!(notbitstream & (0x0fc << j)))) {
  528. /* abort received */
  529. if (!(notbitstream & (0x1fc << j)))
  530. state = 0;
  531. /* not flag received */
  532. else if (!(bitstream & (0x1fe << j)) != (0x0fc << j)) {
  533. if (state)
  534. do_rxpacket(dev);
  535. bc->hdlcrx.bufcnt = 0;
  536. bc->hdlcrx.bufptr = bc->hdlcrx.buf;
  537. state = 1;
  538. numbits = 7-j;
  539. }
  540. }
  541. /* stuffed bit */
  542. else if (unlikely((bitstream & (0x1f8 << j)) == (0xf8 << j))) {
  543. numbits--;
  544. bitbuf = (bitbuf & ((~0xff) << j)) | ((bitbuf & ~((~0xff) << j)) << 1);
  545. }
  546. }
  547. while (state && numbits >= 8) {
  548. if (bc->hdlcrx.bufcnt >= TXBUFFER_SIZE) {
  549. state = 0;
  550. } else {
  551. *(bc->hdlcrx.bufptr)++ = bitbuf >> (16-numbits);
  552. bc->hdlcrx.bufcnt++;
  553. numbits -= 8;
  554. }
  555. }
  556. }
  557. }
  558. bc->hdlcrx.numbits = numbits;
  559. bc->hdlcrx.state = state;
  560. bc->hdlcrx.bitstream = bitstream;
  561. bc->hdlcrx.bitbuf = bitbuf;
  562. return ret;
  563. }
  564. /* --------------------------------------------------------------------- */
  565. #ifdef __i386__
  566. #include <asm/msr.h>
  567. #define GETTICK(x) \
  568. ({ \
  569. if (cpu_has_tsc) \
  570. rdtscl(x); \
  571. })
  572. #else /* __i386__ */
  573. #define GETTICK(x)
  574. #endif /* __i386__ */
  575. static void epp_bh(struct net_device *dev)
  576. {
  577. struct baycom_state *bc;
  578. struct parport *pp;
  579. unsigned char stat;
  580. unsigned char tmp[2];
  581. unsigned int time1 = 0, time2 = 0, time3 = 0;
  582. int cnt, cnt2;
  583. bc = netdev_priv(dev);
  584. if (!bc->work_running)
  585. return;
  586. baycom_int_freq(bc);
  587. pp = bc->pdev->port;
  588. /* update status */
  589. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  590. goto epptimeout;
  591. bc->stat = stat;
  592. bc->debug_vals.last_pllcorr = stat;
  593. GETTICK(time1);
  594. if (bc->modem == EPP_FPGAEXTSTATUS) {
  595. /* get input count */
  596. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|1;
  597. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  598. goto epptimeout;
  599. if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
  600. goto epptimeout;
  601. cnt = tmp[0] | (tmp[1] << 8);
  602. cnt &= 0x7fff;
  603. /* get output count */
  604. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE|2;
  605. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  606. goto epptimeout;
  607. if (pp->ops->epp_read_addr(pp, tmp, 2, 0) != 2)
  608. goto epptimeout;
  609. cnt2 = tmp[0] | (tmp[1] << 8);
  610. cnt2 = 16384 - (cnt2 & 0x7fff);
  611. /* return to normal */
  612. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
  613. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  614. goto epptimeout;
  615. if (transmit(bc, cnt2, stat))
  616. goto epptimeout;
  617. GETTICK(time2);
  618. if (receive(dev, cnt))
  619. goto epptimeout;
  620. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  621. goto epptimeout;
  622. bc->stat = stat;
  623. } else {
  624. /* try to tx */
  625. switch (stat & (EPP_NTAEF|EPP_NTHF)) {
  626. case EPP_NTHF:
  627. cnt = 2048 - 256;
  628. break;
  629. case EPP_NTAEF:
  630. cnt = 2048 - 1793;
  631. break;
  632. case 0:
  633. cnt = 0;
  634. break;
  635. default:
  636. cnt = 2048 - 1025;
  637. break;
  638. }
  639. if (transmit(bc, cnt, stat))
  640. goto epptimeout;
  641. GETTICK(time2);
  642. /* do receiver */
  643. while ((stat & (EPP_NRAEF|EPP_NRHF)) != EPP_NRHF) {
  644. switch (stat & (EPP_NRAEF|EPP_NRHF)) {
  645. case EPP_NRAEF:
  646. cnt = 1025;
  647. break;
  648. case 0:
  649. cnt = 1793;
  650. break;
  651. default:
  652. cnt = 256;
  653. break;
  654. }
  655. if (receive(dev, cnt))
  656. goto epptimeout;
  657. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  658. goto epptimeout;
  659. }
  660. cnt = 0;
  661. if (bc->bitrate < 50000)
  662. cnt = 256;
  663. else if (bc->bitrate < 100000)
  664. cnt = 128;
  665. while (cnt > 0 && stat & EPP_NREF) {
  666. if (receive(dev, 1))
  667. goto epptimeout;
  668. cnt--;
  669. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  670. goto epptimeout;
  671. }
  672. }
  673. GETTICK(time3);
  674. #ifdef BAYCOM_DEBUG
  675. bc->debug_vals.mod_cycles = time2 - time1;
  676. bc->debug_vals.demod_cycles = time3 - time2;
  677. #endif /* BAYCOM_DEBUG */
  678. schedule_delayed_work(&bc->run_work, 1);
  679. if (!bc->skb)
  680. netif_wake_queue(dev);
  681. return;
  682. epptimeout:
  683. printk(KERN_ERR "%s: EPP timeout!\n", bc_drvname);
  684. }
  685. /* ---------------------------------------------------------------------- */
  686. /*
  687. * ===================== network driver interface =========================
  688. */
  689. static int baycom_send_packet(struct sk_buff *skb, struct net_device *dev)
  690. {
  691. struct baycom_state *bc = netdev_priv(dev);
  692. if (skb->data[0] != 0) {
  693. do_kiss_params(bc, skb->data, skb->len);
  694. dev_kfree_skb(skb);
  695. return 0;
  696. }
  697. if (bc->skb)
  698. return -1;
  699. /* strip KISS byte */
  700. if (skb->len >= HDLCDRV_MAXFLEN+1 || skb->len < 3) {
  701. dev_kfree_skb(skb);
  702. return 0;
  703. }
  704. netif_stop_queue(dev);
  705. bc->skb = skb;
  706. return 0;
  707. }
  708. /* --------------------------------------------------------------------- */
  709. static int baycom_set_mac_address(struct net_device *dev, void *addr)
  710. {
  711. struct sockaddr *sa = (struct sockaddr *)addr;
  712. /* addr is an AX.25 shifted ASCII mac address */
  713. memcpy(dev->dev_addr, sa->sa_data, dev->addr_len);
  714. return 0;
  715. }
  716. /* --------------------------------------------------------------------- */
  717. static struct net_device_stats *baycom_get_stats(struct net_device *dev)
  718. {
  719. struct baycom_state *bc = netdev_priv(dev);
  720. /*
  721. * Get the current statistics. This may be called with the
  722. * card open or closed.
  723. */
  724. return &bc->stats;
  725. }
  726. /* --------------------------------------------------------------------- */
  727. static void epp_wakeup(void *handle)
  728. {
  729. struct net_device *dev = (struct net_device *)handle;
  730. struct baycom_state *bc = netdev_priv(dev);
  731. printk(KERN_DEBUG "baycom_epp: %s: why am I being woken up?\n", dev->name);
  732. if (!parport_claim(bc->pdev))
  733. printk(KERN_DEBUG "baycom_epp: %s: I'm broken.\n", dev->name);
  734. }
  735. /* --------------------------------------------------------------------- */
  736. /*
  737. * Open/initialize the board. This is called (in the current kernel)
  738. * sometime after booting when the 'ifconfig' program is run.
  739. *
  740. * This routine should set everything up anew at each open, even
  741. * registers that "should" only need to be set once at boot, so that
  742. * there is non-reboot way to recover if something goes wrong.
  743. */
  744. static int epp_open(struct net_device *dev)
  745. {
  746. struct baycom_state *bc = netdev_priv(dev);
  747. struct parport *pp = parport_find_base(dev->base_addr);
  748. unsigned int i, j;
  749. unsigned char tmp[128];
  750. unsigned char stat;
  751. unsigned long tstart;
  752. if (!pp) {
  753. printk(KERN_ERR "%s: parport at 0x%lx unknown\n", bc_drvname, dev->base_addr);
  754. return -ENXIO;
  755. }
  756. #if 0
  757. if (pp->irq < 0) {
  758. printk(KERN_ERR "%s: parport at 0x%lx has no irq\n", bc_drvname, pp->base);
  759. parport_put_port(pp);
  760. return -ENXIO;
  761. }
  762. #endif
  763. if ((~pp->modes) & (PARPORT_MODE_TRISTATE | PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT)) {
  764. printk(KERN_ERR "%s: parport at 0x%lx cannot be used\n",
  765. bc_drvname, pp->base);
  766. parport_put_port(pp);
  767. return -EIO;
  768. }
  769. memset(&bc->modem, 0, sizeof(bc->modem));
  770. bc->pdev = parport_register_device(pp, dev->name, NULL, epp_wakeup,
  771. epp_interrupt, PARPORT_DEV_EXCL, dev);
  772. parport_put_port(pp);
  773. if (!bc->pdev) {
  774. printk(KERN_ERR "%s: cannot register parport at 0x%lx\n", bc_drvname, pp->base);
  775. return -ENXIO;
  776. }
  777. if (parport_claim(bc->pdev)) {
  778. printk(KERN_ERR "%s: parport at 0x%lx busy\n", bc_drvname, pp->base);
  779. parport_unregister_device(bc->pdev);
  780. return -EBUSY;
  781. }
  782. dev->irq = /*pp->irq*/ 0;
  783. INIT_WORK(&bc->run_work, (void *)(void *)epp_bh, dev);
  784. bc->work_running = 1;
  785. bc->modem = EPP_CONVENTIONAL;
  786. if (eppconfig(bc))
  787. printk(KERN_INFO "%s: no FPGA detected, assuming conventional EPP modem\n", bc_drvname);
  788. else
  789. bc->modem = /*EPP_FPGA*/ EPP_FPGAEXTSTATUS;
  790. parport_write_control(pp, LPTCTRL_PROGRAM); /* prepare EPP mode; we aren't using interrupts */
  791. /* reset the modem */
  792. tmp[0] = 0;
  793. tmp[1] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE;
  794. if (pp->ops->epp_write_addr(pp, tmp, 2, 0) != 2)
  795. goto epptimeout;
  796. /* autoprobe baud rate */
  797. tstart = jiffies;
  798. i = 0;
  799. while ((signed)(jiffies-tstart-HZ/3) < 0) {
  800. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  801. goto epptimeout;
  802. if ((stat & (EPP_NRAEF|EPP_NRHF)) == EPP_NRHF) {
  803. schedule();
  804. continue;
  805. }
  806. if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
  807. goto epptimeout;
  808. if (pp->ops->epp_read_data(pp, tmp, 128, 0) != 128)
  809. goto epptimeout;
  810. i += 256;
  811. }
  812. for (j = 0; j < 256; j++) {
  813. if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
  814. goto epptimeout;
  815. if (!(stat & EPP_NREF))
  816. break;
  817. if (pp->ops->epp_read_data(pp, tmp, 1, 0) != 1)
  818. goto epptimeout;
  819. i++;
  820. }
  821. tstart = jiffies - tstart;
  822. bc->bitrate = i * (8 * HZ) / tstart;
  823. j = 1;
  824. i = bc->bitrate >> 3;
  825. while (j < 7 && i > 150) {
  826. j++;
  827. i >>= 1;
  828. }
  829. printk(KERN_INFO "%s: autoprobed bitrate: %d int divider: %d int rate: %d\n",
  830. bc_drvname, bc->bitrate, j, bc->bitrate >> (j+2));
  831. tmp[0] = EPP_TX_FIFO_ENABLE|EPP_RX_FIFO_ENABLE|EPP_MODEM_ENABLE/*|j*/;
  832. if (pp->ops->epp_write_addr(pp, tmp, 1, 0) != 1)
  833. goto epptimeout;
  834. /*
  835. * initialise hdlc variables
  836. */
  837. bc->hdlcrx.state = 0;
  838. bc->hdlcrx.numbits = 0;
  839. bc->hdlctx.state = tx_idle;
  840. bc->hdlctx.bufcnt = 0;
  841. bc->hdlctx.slotcnt = bc->ch_params.slottime;
  842. bc->hdlctx.calibrate = 0;
  843. /* start the bottom half stuff */
  844. schedule_delayed_work(&bc->run_work, 1);
  845. netif_start_queue(dev);
  846. return 0;
  847. epptimeout:
  848. printk(KERN_ERR "%s: epp timeout during bitrate probe\n", bc_drvname);
  849. parport_write_control(pp, 0); /* reset the adapter */
  850. parport_release(bc->pdev);
  851. parport_unregister_device(bc->pdev);
  852. return -EIO;
  853. }
  854. /* --------------------------------------------------------------------- */
  855. static int epp_close(struct net_device *dev)
  856. {
  857. struct baycom_state *bc = netdev_priv(dev);
  858. struct parport *pp = bc->pdev->port;
  859. unsigned char tmp[1];
  860. bc->work_running = 0;
  861. flush_scheduled_work();
  862. bc->stat = EPP_DCDBIT;
  863. tmp[0] = 0;
  864. pp->ops->epp_write_addr(pp, tmp, 1, 0);
  865. parport_write_control(pp, 0); /* reset the adapter */
  866. parport_release(bc->pdev);
  867. parport_unregister_device(bc->pdev);
  868. if (bc->skb)
  869. dev_kfree_skb(bc->skb);
  870. bc->skb = NULL;
  871. printk(KERN_INFO "%s: close epp at iobase 0x%lx irq %u\n",
  872. bc_drvname, dev->base_addr, dev->irq);
  873. return 0;
  874. }
  875. /* --------------------------------------------------------------------- */
  876. static int baycom_setmode(struct baycom_state *bc, const char *modestr)
  877. {
  878. const char *cp;
  879. if (strstr(modestr,"intclk"))
  880. bc->cfg.intclk = 1;
  881. if (strstr(modestr,"extclk"))
  882. bc->cfg.intclk = 0;
  883. if (strstr(modestr,"intmodem"))
  884. bc->cfg.extmodem = 0;
  885. if (strstr(modestr,"extmodem"))
  886. bc->cfg.extmodem = 1;
  887. if (strstr(modestr,"noloopback"))
  888. bc->cfg.loopback = 0;
  889. if (strstr(modestr,"loopback"))
  890. bc->cfg.loopback = 1;
  891. if ((cp = strstr(modestr,"fclk="))) {
  892. bc->cfg.fclk = simple_strtoul(cp+5, NULL, 0);
  893. if (bc->cfg.fclk < 1000000)
  894. bc->cfg.fclk = 1000000;
  895. if (bc->cfg.fclk > 25000000)
  896. bc->cfg.fclk = 25000000;
  897. }
  898. if ((cp = strstr(modestr,"bps="))) {
  899. bc->cfg.bps = simple_strtoul(cp+4, NULL, 0);
  900. if (bc->cfg.bps < 1000)
  901. bc->cfg.bps = 1000;
  902. if (bc->cfg.bps > 1500000)
  903. bc->cfg.bps = 1500000;
  904. }
  905. return 0;
  906. }
  907. /* --------------------------------------------------------------------- */
  908. static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  909. {
  910. struct baycom_state *bc = netdev_priv(dev);
  911. struct hdlcdrv_ioctl hi;
  912. if (cmd != SIOCDEVPRIVATE)
  913. return -ENOIOCTLCMD;
  914. if (copy_from_user(&hi, ifr->ifr_data, sizeof(hi)))
  915. return -EFAULT;
  916. switch (hi.cmd) {
  917. default:
  918. return -ENOIOCTLCMD;
  919. case HDLCDRVCTL_GETCHANNELPAR:
  920. hi.data.cp.tx_delay = bc->ch_params.tx_delay;
  921. hi.data.cp.tx_tail = bc->ch_params.tx_tail;
  922. hi.data.cp.slottime = bc->ch_params.slottime;
  923. hi.data.cp.ppersist = bc->ch_params.ppersist;
  924. hi.data.cp.fulldup = bc->ch_params.fulldup;
  925. break;
  926. case HDLCDRVCTL_SETCHANNELPAR:
  927. if (!capable(CAP_NET_ADMIN))
  928. return -EACCES;
  929. bc->ch_params.tx_delay = hi.data.cp.tx_delay;
  930. bc->ch_params.tx_tail = hi.data.cp.tx_tail;
  931. bc->ch_params.slottime = hi.data.cp.slottime;
  932. bc->ch_params.ppersist = hi.data.cp.ppersist;
  933. bc->ch_params.fulldup = hi.data.cp.fulldup;
  934. bc->hdlctx.slotcnt = 1;
  935. return 0;
  936. case HDLCDRVCTL_GETMODEMPAR:
  937. hi.data.mp.iobase = dev->base_addr;
  938. hi.data.mp.irq = dev->irq;
  939. hi.data.mp.dma = dev->dma;
  940. hi.data.mp.dma2 = 0;
  941. hi.data.mp.seriobase = 0;
  942. hi.data.mp.pariobase = 0;
  943. hi.data.mp.midiiobase = 0;
  944. break;
  945. case HDLCDRVCTL_SETMODEMPAR:
  946. if ((!capable(CAP_SYS_RAWIO)) || netif_running(dev))
  947. return -EACCES;
  948. dev->base_addr = hi.data.mp.iobase;
  949. dev->irq = /*hi.data.mp.irq*/0;
  950. dev->dma = /*hi.data.mp.dma*/0;
  951. return 0;
  952. case HDLCDRVCTL_GETSTAT:
  953. hi.data.cs.ptt = !!(bc->stat & EPP_PTTBIT);
  954. hi.data.cs.dcd = !(bc->stat & EPP_DCDBIT);
  955. hi.data.cs.ptt_keyed = bc->ptt_keyed;
  956. hi.data.cs.tx_packets = bc->stats.tx_packets;
  957. hi.data.cs.tx_errors = bc->stats.tx_errors;
  958. hi.data.cs.rx_packets = bc->stats.rx_packets;
  959. hi.data.cs.rx_errors = bc->stats.rx_errors;
  960. break;
  961. case HDLCDRVCTL_OLDGETSTAT:
  962. hi.data.ocs.ptt = !!(bc->stat & EPP_PTTBIT);
  963. hi.data.ocs.dcd = !(bc->stat & EPP_DCDBIT);
  964. hi.data.ocs.ptt_keyed = bc->ptt_keyed;
  965. break;
  966. case HDLCDRVCTL_CALIBRATE:
  967. if (!capable(CAP_SYS_RAWIO))
  968. return -EACCES;
  969. bc->hdlctx.calibrate = hi.data.calibrate * bc->bitrate / 8;
  970. return 0;
  971. case HDLCDRVCTL_DRIVERNAME:
  972. strncpy(hi.data.drivername, "baycom_epp", sizeof(hi.data.drivername));
  973. break;
  974. case HDLCDRVCTL_GETMODE:
  975. sprintf(hi.data.modename, "%sclk,%smodem,fclk=%d,bps=%d%s",
  976. bc->cfg.intclk ? "int" : "ext",
  977. bc->cfg.extmodem ? "ext" : "int", bc->cfg.fclk, bc->cfg.bps,
  978. bc->cfg.loopback ? ",loopback" : "");
  979. break;
  980. case HDLCDRVCTL_SETMODE:
  981. if (!capable(CAP_NET_ADMIN) || netif_running(dev))
  982. return -EACCES;
  983. hi.data.modename[sizeof(hi.data.modename)-1] = '\0';
  984. return baycom_setmode(bc, hi.data.modename);
  985. case HDLCDRVCTL_MODELIST:
  986. strncpy(hi.data.modename, "intclk,extclk,intmodem,extmodem,divider=x",
  987. sizeof(hi.data.modename));
  988. break;
  989. case HDLCDRVCTL_MODEMPARMASK:
  990. return HDLCDRV_PARMASK_IOBASE;
  991. }
  992. if (copy_to_user(ifr->ifr_data, &hi, sizeof(hi)))
  993. return -EFAULT;
  994. return 0;
  995. }
  996. /* --------------------------------------------------------------------- */
  997. /*
  998. * Check for a network adaptor of this type, and return '0' if one exists.
  999. * If dev->base_addr == 0, probe all likely locations.
  1000. * If dev->base_addr == 1, always return failure.
  1001. * If dev->base_addr == 2, allocate space for the device and return success
  1002. * (detachable devices only).
  1003. */
  1004. static void baycom_probe(struct net_device *dev)
  1005. {
  1006. static char ax25_bcast[AX25_ADDR_LEN] = {
  1007. 'Q' << 1, 'S' << 1, 'T' << 1, ' ' << 1, ' ' << 1, ' ' << 1, '0' << 1
  1008. };
  1009. static char ax25_nocall[AX25_ADDR_LEN] = {
  1010. 'L' << 1, 'I' << 1, 'N' << 1, 'U' << 1, 'X' << 1, ' ' << 1, '1' << 1
  1011. };
  1012. const struct hdlcdrv_channel_params dflt_ch_params = {
  1013. 20, 2, 10, 40, 0
  1014. };
  1015. struct baycom_state *bc;
  1016. /*
  1017. * not a real probe! only initialize data structures
  1018. */
  1019. bc = netdev_priv(dev);
  1020. /*
  1021. * initialize the baycom_state struct
  1022. */
  1023. bc->ch_params = dflt_ch_params;
  1024. bc->ptt_keyed = 0;
  1025. /*
  1026. * initialize the device struct
  1027. */
  1028. dev->open = epp_open;
  1029. dev->stop = epp_close;
  1030. dev->do_ioctl = baycom_ioctl;
  1031. dev->hard_start_xmit = baycom_send_packet;
  1032. dev->get_stats = baycom_get_stats;
  1033. /* Fill in the fields of the device structure */
  1034. bc->skb = NULL;
  1035. dev->hard_header = ax25_hard_header;
  1036. dev->rebuild_header = ax25_rebuild_header;
  1037. dev->set_mac_address = baycom_set_mac_address;
  1038. dev->type = ARPHRD_AX25; /* AF_AX25 device */
  1039. dev->hard_header_len = AX25_MAX_HEADER_LEN + AX25_BPQ_HEADER_LEN;
  1040. dev->mtu = AX25_DEF_PACLEN; /* eth_mtu is the default */
  1041. dev->addr_len = AX25_ADDR_LEN; /* sizeof an ax.25 address */
  1042. memcpy(dev->broadcast, ax25_bcast, AX25_ADDR_LEN);
  1043. memcpy(dev->dev_addr, ax25_nocall, AX25_ADDR_LEN);
  1044. dev->tx_queue_len = 16;
  1045. /* New style flags */
  1046. dev->flags = 0;
  1047. }
  1048. /* --------------------------------------------------------------------- */
  1049. /*
  1050. * command line settable parameters
  1051. */
  1052. static const char *mode[NR_PORTS] = { "", };
  1053. static int iobase[NR_PORTS] = { 0x378, };
  1054. module_param_array(mode, charp, NULL, 0);
  1055. MODULE_PARM_DESC(mode, "baycom operating mode");
  1056. module_param_array(iobase, int, NULL, 0);
  1057. MODULE_PARM_DESC(iobase, "baycom io base address");
  1058. MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
  1059. MODULE_DESCRIPTION("Baycom epp amateur radio modem driver");
  1060. MODULE_LICENSE("GPL");
  1061. /* --------------------------------------------------------------------- */
  1062. static void __init baycom_epp_dev_setup(struct net_device *dev)
  1063. {
  1064. struct baycom_state *bc = netdev_priv(dev);
  1065. /*
  1066. * initialize part of the baycom_state struct
  1067. */
  1068. bc->magic = BAYCOM_MAGIC;
  1069. bc->cfg.fclk = 19666600;
  1070. bc->cfg.bps = 9600;
  1071. /*
  1072. * initialize part of the device struct
  1073. */
  1074. baycom_probe(dev);
  1075. }
  1076. static int __init init_baycomepp(void)
  1077. {
  1078. int i, found = 0;
  1079. char set_hw = 1;
  1080. printk(bc_drvinfo);
  1081. /*
  1082. * register net devices
  1083. */
  1084. for (i = 0; i < NR_PORTS; i++) {
  1085. struct net_device *dev;
  1086. dev = alloc_netdev(sizeof(struct baycom_state), "bce%d",
  1087. baycom_epp_dev_setup);
  1088. if (!dev) {
  1089. printk(KERN_WARNING "bce%d : out of memory\n", i);
  1090. return found ? 0 : -ENOMEM;
  1091. }
  1092. sprintf(dev->name, "bce%d", i);
  1093. dev->base_addr = iobase[i];
  1094. if (!mode[i])
  1095. set_hw = 0;
  1096. if (!set_hw)
  1097. iobase[i] = 0;
  1098. if (register_netdev(dev)) {
  1099. printk(KERN_WARNING "%s: cannot register net device %s\n", bc_drvname, dev->name);
  1100. free_netdev(dev);
  1101. break;
  1102. }
  1103. if (set_hw && baycom_setmode(netdev_priv(dev), mode[i]))
  1104. set_hw = 0;
  1105. baycom_device[i] = dev;
  1106. found++;
  1107. }
  1108. return found ? 0 : -ENXIO;
  1109. }
  1110. static void __exit cleanup_baycomepp(void)
  1111. {
  1112. int i;
  1113. for(i = 0; i < NR_PORTS; i++) {
  1114. struct net_device *dev = baycom_device[i];
  1115. if (dev) {
  1116. struct baycom_state *bc = netdev_priv(dev);
  1117. if (bc->magic == BAYCOM_MAGIC) {
  1118. unregister_netdev(dev);
  1119. free_netdev(dev);
  1120. } else
  1121. printk(paranoia_str, "cleanup_module");
  1122. }
  1123. }
  1124. }
  1125. module_init(init_baycomepp);
  1126. module_exit(cleanup_baycomepp);
  1127. /* --------------------------------------------------------------------- */
  1128. #ifndef MODULE
  1129. /*
  1130. * format: baycom_epp=io,mode
  1131. * mode: fpga config options
  1132. */
  1133. static int __init baycom_epp_setup(char *str)
  1134. {
  1135. static unsigned __initdata nr_dev = 0;
  1136. int ints[2];
  1137. if (nr_dev >= NR_PORTS)
  1138. return 0;
  1139. str = get_options(str, 2, ints);
  1140. if (ints[0] < 1)
  1141. return 0;
  1142. mode[nr_dev] = str;
  1143. iobase[nr_dev] = ints[1];
  1144. nr_dev++;
  1145. return 1;
  1146. }
  1147. __setup("baycom_epp=", baycom_epp_setup);
  1148. #endif /* MODULE */
  1149. /* --------------------------------------------------------------------- */