fec_main.c 29 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275
  1. /*
  2. * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
  3. *
  4. * Copyright (c) 2003 Intracom S.A.
  5. * by Pantelis Antoniou <panto@intracom.gr>
  6. *
  7. * Heavily based on original FEC driver by Dan Malek <dan@embeddededge.com>
  8. * and modifications by Joakim Tjernlund <joakim.tjernlund@lumentis.se>
  9. *
  10. * Released under the GPL
  11. */
  12. #include <linux/config.h>
  13. #include <linux/module.h>
  14. #include <linux/kernel.h>
  15. #include <linux/types.h>
  16. #include <linux/sched.h>
  17. #include <linux/string.h>
  18. #include <linux/ptrace.h>
  19. #include <linux/errno.h>
  20. #include <linux/ioport.h>
  21. #include <linux/slab.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/pci.h>
  24. #include <linux/init.h>
  25. #include <linux/delay.h>
  26. #include <linux/netdevice.h>
  27. #include <linux/etherdevice.h>
  28. #include <linux/skbuff.h>
  29. #include <linux/spinlock.h>
  30. #include <linux/mii.h>
  31. #include <linux/ethtool.h>
  32. #include <linux/bitops.h>
  33. #include <asm/8xx_immap.h>
  34. #include <asm/pgtable.h>
  35. #include <asm/mpc8xx.h>
  36. #include <asm/irq.h>
  37. #include <asm/uaccess.h>
  38. #include <asm/commproc.h>
  39. #include <asm/dma-mapping.h>
  40. #include "fec_8xx.h"
  41. /*************************************************/
  42. #define FEC_MAX_MULTICAST_ADDRS 64
  43. /*************************************************/
  44. static char version[] __devinitdata =
  45. DRV_MODULE_NAME ".c:v" DRV_MODULE_VERSION " (" DRV_MODULE_RELDATE ")" "\n";
  46. MODULE_AUTHOR("Pantelis Antoniou <panto@intracom.gr>");
  47. MODULE_DESCRIPTION("Motorola 8xx FEC ethernet driver");
  48. MODULE_LICENSE("GPL");
  49. MODULE_PARM(fec_8xx_debug, "i");
  50. MODULE_PARM_DESC(fec_8xx_debug,
  51. "FEC 8xx bitmapped debugging message enable value");
  52. int fec_8xx_debug = -1; /* -1 == use FEC_8XX_DEF_MSG_ENABLE as value */
  53. /*************************************************/
  54. /*
  55. * Delay to wait for FEC reset command to complete (in us)
  56. */
  57. #define FEC_RESET_DELAY 50
  58. /*****************************************************************************************/
  59. static void fec_whack_reset(fec_t * fecp)
  60. {
  61. int i;
  62. /*
  63. * Whack a reset. We should wait for this.
  64. */
  65. FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_RESET);
  66. for (i = 0;
  67. (FR(fecp, ecntrl) & FEC_ECNTRL_RESET) != 0 && i < FEC_RESET_DELAY;
  68. i++)
  69. udelay(1);
  70. if (i == FEC_RESET_DELAY)
  71. printk(KERN_WARNING "FEC Reset timeout!\n");
  72. }
  73. /****************************************************************************/
  74. /*
  75. * Transmitter timeout.
  76. */
  77. #define TX_TIMEOUT (2*HZ)
  78. /****************************************************************************/
  79. /*
  80. * Returns the CRC needed when filling in the hash table for
  81. * multicast group filtering
  82. * pAddr must point to a MAC address (6 bytes)
  83. */
  84. static __u32 fec_mulicast_calc_crc(char *pAddr)
  85. {
  86. u8 byte;
  87. int byte_count;
  88. int bit_count;
  89. __u32 crc = 0xffffffff;
  90. u8 msb;
  91. for (byte_count = 0; byte_count < 6; byte_count++) {
  92. byte = pAddr[byte_count];
  93. for (bit_count = 0; bit_count < 8; bit_count++) {
  94. msb = crc >> 31;
  95. crc <<= 1;
  96. if (msb ^ (byte & 0x1)) {
  97. crc ^= FEC_CRC_POLY;
  98. }
  99. byte >>= 1;
  100. }
  101. }
  102. return (crc);
  103. }
  104. /*
  105. * Set or clear the multicast filter for this adaptor.
  106. * Skeleton taken from sunlance driver.
  107. * The CPM Ethernet implementation allows Multicast as well as individual
  108. * MAC address filtering. Some of the drivers check to make sure it is
  109. * a group multicast address, and discard those that are not. I guess I
  110. * will do the same for now, but just remove the test if you want
  111. * individual filtering as well (do the upper net layers want or support
  112. * this kind of feature?).
  113. */
  114. static void fec_set_multicast_list(struct net_device *dev)
  115. {
  116. struct fec_enet_private *fep = netdev_priv(dev);
  117. fec_t *fecp = fep->fecp;
  118. struct dev_mc_list *pmc;
  119. __u32 crc;
  120. int temp;
  121. __u32 csrVal;
  122. int hash_index;
  123. __u32 hthi, htlo;
  124. unsigned long flags;
  125. if ((dev->flags & IFF_PROMISC) != 0) {
  126. spin_lock_irqsave(&fep->lock, flags);
  127. FS(fecp, r_cntrl, FEC_RCNTRL_PROM);
  128. spin_unlock_irqrestore(&fep->lock, flags);
  129. /*
  130. * Log any net taps.
  131. */
  132. printk(KERN_WARNING DRV_MODULE_NAME
  133. ": %s: Promiscuous mode enabled.\n", dev->name);
  134. return;
  135. }
  136. if ((dev->flags & IFF_ALLMULTI) != 0 ||
  137. dev->mc_count > FEC_MAX_MULTICAST_ADDRS) {
  138. /*
  139. * Catch all multicast addresses, set the filter to all 1's.
  140. */
  141. hthi = 0xffffffffU;
  142. htlo = 0xffffffffU;
  143. } else {
  144. hthi = 0;
  145. htlo = 0;
  146. /*
  147. * Now populate the hash table
  148. */
  149. for (pmc = dev->mc_list; pmc != NULL; pmc = pmc->next) {
  150. crc = fec_mulicast_calc_crc(pmc->dmi_addr);
  151. temp = (crc & 0x3f) >> 1;
  152. hash_index = ((temp & 0x01) << 4) |
  153. ((temp & 0x02) << 2) |
  154. ((temp & 0x04)) |
  155. ((temp & 0x08) >> 2) |
  156. ((temp & 0x10) >> 4);
  157. csrVal = (1 << hash_index);
  158. if (crc & 1)
  159. hthi |= csrVal;
  160. else
  161. htlo |= csrVal;
  162. }
  163. }
  164. spin_lock_irqsave(&fep->lock, flags);
  165. FC(fecp, r_cntrl, FEC_RCNTRL_PROM);
  166. FW(fecp, hash_table_high, hthi);
  167. FW(fecp, hash_table_low, htlo);
  168. spin_unlock_irqrestore(&fep->lock, flags);
  169. }
  170. static int fec_set_mac_address(struct net_device *dev, void *addr)
  171. {
  172. struct sockaddr *mac = addr;
  173. struct fec_enet_private *fep = netdev_priv(dev);
  174. struct fec *fecp = fep->fecp;
  175. int i;
  176. __u32 addrhi, addrlo;
  177. unsigned long flags;
  178. /* Get pointer to SCC area in parameter RAM. */
  179. for (i = 0; i < 6; i++)
  180. dev->dev_addr[i] = mac->sa_data[i];
  181. /*
  182. * Set station address.
  183. */
  184. addrhi = ((__u32) dev->dev_addr[0] << 24) |
  185. ((__u32) dev->dev_addr[1] << 16) |
  186. ((__u32) dev->dev_addr[2] << 8) |
  187. (__u32) dev->dev_addr[3];
  188. addrlo = ((__u32) dev->dev_addr[4] << 24) |
  189. ((__u32) dev->dev_addr[5] << 16);
  190. spin_lock_irqsave(&fep->lock, flags);
  191. FW(fecp, addr_low, addrhi);
  192. FW(fecp, addr_high, addrlo);
  193. spin_unlock_irqrestore(&fep->lock, flags);
  194. return 0;
  195. }
  196. /*
  197. * This function is called to start or restart the FEC during a link
  198. * change. This only happens when switching between half and full
  199. * duplex.
  200. */
  201. void fec_restart(struct net_device *dev, int duplex, int speed)
  202. {
  203. #ifdef CONFIG_DUET
  204. immap_t *immap = (immap_t *) IMAP_ADDR;
  205. __u32 cptr;
  206. #endif
  207. struct fec_enet_private *fep = netdev_priv(dev);
  208. struct fec *fecp = fep->fecp;
  209. const struct fec_platform_info *fpi = fep->fpi;
  210. cbd_t *bdp;
  211. struct sk_buff *skb;
  212. int i;
  213. __u32 addrhi, addrlo;
  214. fec_whack_reset(fep->fecp);
  215. /*
  216. * Set station address.
  217. */
  218. addrhi = ((__u32) dev->dev_addr[0] << 24) |
  219. ((__u32) dev->dev_addr[1] << 16) |
  220. ((__u32) dev->dev_addr[2] << 8) |
  221. (__u32) dev->dev_addr[3];
  222. addrlo = ((__u32) dev->dev_addr[4] << 24) |
  223. ((__u32) dev->dev_addr[5] << 16);
  224. FW(fecp, addr_low, addrhi);
  225. FW(fecp, addr_high, addrlo);
  226. /*
  227. * Reset all multicast.
  228. */
  229. FW(fecp, hash_table_high, 0);
  230. FW(fecp, hash_table_low, 0);
  231. /*
  232. * Set maximum receive buffer size.
  233. */
  234. FW(fecp, r_buff_size, PKT_MAXBLR_SIZE);
  235. FW(fecp, r_hash, PKT_MAXBUF_SIZE);
  236. /*
  237. * Set receive and transmit descriptor base.
  238. */
  239. FW(fecp, r_des_start, iopa((__u32) (fep->rx_bd_base)));
  240. FW(fecp, x_des_start, iopa((__u32) (fep->tx_bd_base)));
  241. fep->dirty_tx = fep->cur_tx = fep->tx_bd_base;
  242. fep->tx_free = fep->tx_ring;
  243. fep->cur_rx = fep->rx_bd_base;
  244. /*
  245. * Reset SKB receive buffers
  246. */
  247. for (i = 0; i < fep->rx_ring; i++) {
  248. if ((skb = fep->rx_skbuff[i]) == NULL)
  249. continue;
  250. fep->rx_skbuff[i] = NULL;
  251. dev_kfree_skb(skb);
  252. }
  253. /*
  254. * Initialize the receive buffer descriptors.
  255. */
  256. for (i = 0, bdp = fep->rx_bd_base; i < fep->rx_ring; i++, bdp++) {
  257. skb = dev_alloc_skb(ENET_RX_FRSIZE);
  258. if (skb == NULL) {
  259. printk(KERN_WARNING DRV_MODULE_NAME
  260. ": %s Memory squeeze, unable to allocate skb\n",
  261. dev->name);
  262. fep->stats.rx_dropped++;
  263. break;
  264. }
  265. fep->rx_skbuff[i] = skb;
  266. skb->dev = dev;
  267. CBDW_BUFADDR(bdp, dma_map_single(NULL, skb->data,
  268. L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
  269. DMA_FROM_DEVICE));
  270. CBDW_DATLEN(bdp, 0); /* zero */
  271. CBDW_SC(bdp, BD_ENET_RX_EMPTY |
  272. ((i < fep->rx_ring - 1) ? 0 : BD_SC_WRAP));
  273. }
  274. /*
  275. * if we failed, fillup remainder
  276. */
  277. for (; i < fep->rx_ring; i++, bdp++) {
  278. fep->rx_skbuff[i] = NULL;
  279. CBDW_SC(bdp, (i < fep->rx_ring - 1) ? 0 : BD_SC_WRAP);
  280. }
  281. /*
  282. * Reset SKB transmit buffers.
  283. */
  284. for (i = 0; i < fep->tx_ring; i++) {
  285. if ((skb = fep->tx_skbuff[i]) == NULL)
  286. continue;
  287. fep->tx_skbuff[i] = NULL;
  288. dev_kfree_skb(skb);
  289. }
  290. /*
  291. * ...and the same for transmit.
  292. */
  293. for (i = 0, bdp = fep->tx_bd_base; i < fep->tx_ring; i++, bdp++) {
  294. fep->tx_skbuff[i] = NULL;
  295. CBDW_BUFADDR(bdp, virt_to_bus(NULL));
  296. CBDW_DATLEN(bdp, 0);
  297. CBDW_SC(bdp, (i < fep->tx_ring - 1) ? 0 : BD_SC_WRAP);
  298. }
  299. /*
  300. * Enable big endian and don't care about SDMA FC.
  301. */
  302. FW(fecp, fun_code, 0x78000000);
  303. /*
  304. * Set MII speed.
  305. */
  306. FW(fecp, mii_speed, fep->fec_phy_speed);
  307. /*
  308. * Clear any outstanding interrupt.
  309. */
  310. FW(fecp, ievent, 0xffc0);
  311. FW(fecp, ivec, (fpi->fec_irq / 2) << 29);
  312. /*
  313. * adjust to speed (only for DUET & RMII)
  314. */
  315. #ifdef CONFIG_DUET
  316. cptr = in_be32(&immap->im_cpm.cp_cptr);
  317. switch (fpi->fec_no) {
  318. case 0:
  319. /*
  320. * check if in RMII mode
  321. */
  322. if ((cptr & 0x100) == 0)
  323. break;
  324. if (speed == 10)
  325. cptr |= 0x0000010;
  326. else if (speed == 100)
  327. cptr &= ~0x0000010;
  328. break;
  329. case 1:
  330. /*
  331. * check if in RMII mode
  332. */
  333. if ((cptr & 0x80) == 0)
  334. break;
  335. if (speed == 10)
  336. cptr |= 0x0000008;
  337. else if (speed == 100)
  338. cptr &= ~0x0000008;
  339. break;
  340. default:
  341. break;
  342. }
  343. out_be32(&immap->im_cpm.cp_cptr, cptr);
  344. #endif
  345. FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
  346. /*
  347. * adjust to duplex mode
  348. */
  349. if (duplex) {
  350. FC(fecp, r_cntrl, FEC_RCNTRL_DRT);
  351. FS(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD enable */
  352. } else {
  353. FS(fecp, r_cntrl, FEC_RCNTRL_DRT);
  354. FC(fecp, x_cntrl, FEC_TCNTRL_FDEN); /* FD disable */
  355. }
  356. /*
  357. * Enable interrupts we wish to service.
  358. */
  359. FW(fecp, imask, FEC_ENET_TXF | FEC_ENET_TXB |
  360. FEC_ENET_RXF | FEC_ENET_RXB);
  361. /*
  362. * And last, enable the transmit and receive processing.
  363. */
  364. FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
  365. FW(fecp, r_des_active, 0x01000000);
  366. }
  367. void fec_stop(struct net_device *dev)
  368. {
  369. struct fec_enet_private *fep = netdev_priv(dev);
  370. fec_t *fecp = fep->fecp;
  371. struct sk_buff *skb;
  372. int i;
  373. if ((FR(fecp, ecntrl) & FEC_ECNTRL_ETHER_EN) == 0)
  374. return; /* already down */
  375. FW(fecp, x_cntrl, 0x01); /* Graceful transmit stop */
  376. for (i = 0; ((FR(fecp, ievent) & 0x10000000) == 0) &&
  377. i < FEC_RESET_DELAY; i++)
  378. udelay(1);
  379. if (i == FEC_RESET_DELAY)
  380. printk(KERN_WARNING DRV_MODULE_NAME
  381. ": %s FEC timeout on graceful transmit stop\n",
  382. dev->name);
  383. /*
  384. * Disable FEC. Let only MII interrupts.
  385. */
  386. FW(fecp, imask, 0);
  387. FW(fecp, ecntrl, ~FEC_ECNTRL_ETHER_EN);
  388. /*
  389. * Reset SKB transmit buffers.
  390. */
  391. for (i = 0; i < fep->tx_ring; i++) {
  392. if ((skb = fep->tx_skbuff[i]) == NULL)
  393. continue;
  394. fep->tx_skbuff[i] = NULL;
  395. dev_kfree_skb(skb);
  396. }
  397. /*
  398. * Reset SKB receive buffers
  399. */
  400. for (i = 0; i < fep->rx_ring; i++) {
  401. if ((skb = fep->rx_skbuff[i]) == NULL)
  402. continue;
  403. fep->rx_skbuff[i] = NULL;
  404. dev_kfree_skb(skb);
  405. }
  406. }
  407. /* common receive function */
  408. static int fec_enet_rx_common(struct net_device *dev, int *budget)
  409. {
  410. struct fec_enet_private *fep = netdev_priv(dev);
  411. fec_t *fecp = fep->fecp;
  412. const struct fec_platform_info *fpi = fep->fpi;
  413. cbd_t *bdp;
  414. struct sk_buff *skb, *skbn, *skbt;
  415. int received = 0;
  416. __u16 pkt_len, sc;
  417. int curidx;
  418. int rx_work_limit;
  419. if (fpi->use_napi) {
  420. rx_work_limit = min(dev->quota, *budget);
  421. if (!netif_running(dev))
  422. return 0;
  423. }
  424. /*
  425. * First, grab all of the stats for the incoming packet.
  426. * These get messed up if we get called due to a busy condition.
  427. */
  428. bdp = fep->cur_rx;
  429. /* clear RX status bits for napi*/
  430. if (fpi->use_napi)
  431. FW(fecp, ievent, FEC_ENET_RXF | FEC_ENET_RXB);
  432. while (((sc = CBDR_SC(bdp)) & BD_ENET_RX_EMPTY) == 0) {
  433. curidx = bdp - fep->rx_bd_base;
  434. /*
  435. * Since we have allocated space to hold a complete frame,
  436. * the last indicator should be set.
  437. */
  438. if ((sc & BD_ENET_RX_LAST) == 0)
  439. printk(KERN_WARNING DRV_MODULE_NAME
  440. ": %s rcv is not +last\n",
  441. dev->name);
  442. /*
  443. * Check for errors.
  444. */
  445. if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_CL |
  446. BD_ENET_RX_NO | BD_ENET_RX_CR | BD_ENET_RX_OV)) {
  447. fep->stats.rx_errors++;
  448. /* Frame too long or too short. */
  449. if (sc & (BD_ENET_RX_LG | BD_ENET_RX_SH))
  450. fep->stats.rx_length_errors++;
  451. /* Frame alignment */
  452. if (sc & (BD_ENET_RX_NO | BD_ENET_RX_CL))
  453. fep->stats.rx_frame_errors++;
  454. /* CRC Error */
  455. if (sc & BD_ENET_RX_CR)
  456. fep->stats.rx_crc_errors++;
  457. /* FIFO overrun */
  458. if (sc & BD_ENET_RX_OV)
  459. fep->stats.rx_crc_errors++;
  460. skbn = fep->rx_skbuff[curidx];
  461. BUG_ON(skbn == NULL);
  462. } else {
  463. /* napi, got packet but no quota */
  464. if (fpi->use_napi && --rx_work_limit < 0)
  465. break;
  466. skb = fep->rx_skbuff[curidx];
  467. BUG_ON(skb == NULL);
  468. /*
  469. * Process the incoming frame.
  470. */
  471. fep->stats.rx_packets++;
  472. pkt_len = CBDR_DATLEN(bdp) - 4; /* remove CRC */
  473. fep->stats.rx_bytes += pkt_len + 4;
  474. if (pkt_len <= fpi->rx_copybreak) {
  475. /* +2 to make IP header L1 cache aligned */
  476. skbn = dev_alloc_skb(pkt_len + 2);
  477. if (skbn != NULL) {
  478. skb_reserve(skbn, 2); /* align IP header */
  479. memcpy(skbn->data, skb->data, pkt_len);
  480. /* swap */
  481. skbt = skb;
  482. skb = skbn;
  483. skbn = skbt;
  484. }
  485. } else
  486. skbn = dev_alloc_skb(ENET_RX_FRSIZE);
  487. if (skbn != NULL) {
  488. skb->dev = dev;
  489. skb_put(skb, pkt_len); /* Make room */
  490. skb->protocol = eth_type_trans(skb, dev);
  491. received++;
  492. if (!fpi->use_napi)
  493. netif_rx(skb);
  494. else
  495. netif_receive_skb(skb);
  496. } else {
  497. printk(KERN_WARNING DRV_MODULE_NAME
  498. ": %s Memory squeeze, dropping packet.\n",
  499. dev->name);
  500. fep->stats.rx_dropped++;
  501. skbn = skb;
  502. }
  503. }
  504. fep->rx_skbuff[curidx] = skbn;
  505. CBDW_BUFADDR(bdp, dma_map_single(NULL, skbn->data,
  506. L1_CACHE_ALIGN(PKT_MAXBUF_SIZE),
  507. DMA_FROM_DEVICE));
  508. CBDW_DATLEN(bdp, 0);
  509. CBDW_SC(bdp, (sc & ~BD_ENET_RX_STATS) | BD_ENET_RX_EMPTY);
  510. /*
  511. * Update BD pointer to next entry.
  512. */
  513. if ((sc & BD_ENET_RX_WRAP) == 0)
  514. bdp++;
  515. else
  516. bdp = fep->rx_bd_base;
  517. /*
  518. * Doing this here will keep the FEC running while we process
  519. * incoming frames. On a heavily loaded network, we should be
  520. * able to keep up at the expense of system resources.
  521. */
  522. FW(fecp, r_des_active, 0x01000000);
  523. }
  524. fep->cur_rx = bdp;
  525. if (fpi->use_napi) {
  526. dev->quota -= received;
  527. *budget -= received;
  528. if (rx_work_limit < 0)
  529. return 1; /* not done */
  530. /* done */
  531. netif_rx_complete(dev);
  532. /* enable RX interrupt bits */
  533. FS(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
  534. }
  535. return 0;
  536. }
  537. static void fec_enet_tx(struct net_device *dev)
  538. {
  539. struct fec_enet_private *fep = netdev_priv(dev);
  540. cbd_t *bdp;
  541. struct sk_buff *skb;
  542. int dirtyidx, do_wake;
  543. __u16 sc;
  544. spin_lock(&fep->lock);
  545. bdp = fep->dirty_tx;
  546. do_wake = 0;
  547. while (((sc = CBDR_SC(bdp)) & BD_ENET_TX_READY) == 0) {
  548. dirtyidx = bdp - fep->tx_bd_base;
  549. if (fep->tx_free == fep->tx_ring)
  550. break;
  551. skb = fep->tx_skbuff[dirtyidx];
  552. /*
  553. * Check for errors.
  554. */
  555. if (sc & (BD_ENET_TX_HB | BD_ENET_TX_LC |
  556. BD_ENET_TX_RL | BD_ENET_TX_UN | BD_ENET_TX_CSL)) {
  557. fep->stats.tx_errors++;
  558. if (sc & BD_ENET_TX_HB) /* No heartbeat */
  559. fep->stats.tx_heartbeat_errors++;
  560. if (sc & BD_ENET_TX_LC) /* Late collision */
  561. fep->stats.tx_window_errors++;
  562. if (sc & BD_ENET_TX_RL) /* Retrans limit */
  563. fep->stats.tx_aborted_errors++;
  564. if (sc & BD_ENET_TX_UN) /* Underrun */
  565. fep->stats.tx_fifo_errors++;
  566. if (sc & BD_ENET_TX_CSL) /* Carrier lost */
  567. fep->stats.tx_carrier_errors++;
  568. } else
  569. fep->stats.tx_packets++;
  570. if (sc & BD_ENET_TX_READY)
  571. printk(KERN_WARNING DRV_MODULE_NAME
  572. ": %s HEY! Enet xmit interrupt and TX_READY.\n",
  573. dev->name);
  574. /*
  575. * Deferred means some collisions occurred during transmit,
  576. * but we eventually sent the packet OK.
  577. */
  578. if (sc & BD_ENET_TX_DEF)
  579. fep->stats.collisions++;
  580. /*
  581. * Free the sk buffer associated with this last transmit.
  582. */
  583. dev_kfree_skb_irq(skb);
  584. fep->tx_skbuff[dirtyidx] = NULL;
  585. /*
  586. * Update pointer to next buffer descriptor to be transmitted.
  587. */
  588. if ((sc & BD_ENET_TX_WRAP) == 0)
  589. bdp++;
  590. else
  591. bdp = fep->tx_bd_base;
  592. /*
  593. * Since we have freed up a buffer, the ring is no longer
  594. * full.
  595. */
  596. if (!fep->tx_free++)
  597. do_wake = 1;
  598. }
  599. fep->dirty_tx = bdp;
  600. spin_unlock(&fep->lock);
  601. if (do_wake && netif_queue_stopped(dev))
  602. netif_wake_queue(dev);
  603. }
  604. /*
  605. * The interrupt handler.
  606. * This is called from the MPC core interrupt.
  607. */
  608. static irqreturn_t
  609. fec_enet_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  610. {
  611. struct net_device *dev = dev_id;
  612. struct fec_enet_private *fep;
  613. const struct fec_platform_info *fpi;
  614. fec_t *fecp;
  615. __u32 int_events;
  616. __u32 int_events_napi;
  617. if (unlikely(dev == NULL))
  618. return IRQ_NONE;
  619. fep = netdev_priv(dev);
  620. fecp = fep->fecp;
  621. fpi = fep->fpi;
  622. /*
  623. * Get the interrupt events that caused us to be here.
  624. */
  625. while ((int_events = FR(fecp, ievent) & FR(fecp, imask)) != 0) {
  626. if (!fpi->use_napi)
  627. FW(fecp, ievent, int_events);
  628. else {
  629. int_events_napi = int_events & ~(FEC_ENET_RXF | FEC_ENET_RXB);
  630. FW(fecp, ievent, int_events_napi);
  631. }
  632. if ((int_events & (FEC_ENET_HBERR | FEC_ENET_BABR |
  633. FEC_ENET_BABT | FEC_ENET_EBERR)) != 0)
  634. printk(KERN_WARNING DRV_MODULE_NAME
  635. ": %s FEC ERROR(s) 0x%x\n",
  636. dev->name, int_events);
  637. if ((int_events & FEC_ENET_RXF) != 0) {
  638. if (!fpi->use_napi)
  639. fec_enet_rx_common(dev, NULL);
  640. else {
  641. if (netif_rx_schedule_prep(dev)) {
  642. /* disable rx interrupts */
  643. FC(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
  644. __netif_rx_schedule(dev);
  645. } else {
  646. printk(KERN_ERR DRV_MODULE_NAME
  647. ": %s driver bug! interrupt while in poll!\n",
  648. dev->name);
  649. FC(fecp, imask, FEC_ENET_RXF | FEC_ENET_RXB);
  650. }
  651. }
  652. }
  653. if ((int_events & FEC_ENET_TXF) != 0)
  654. fec_enet_tx(dev);
  655. }
  656. return IRQ_HANDLED;
  657. }
  658. /* This interrupt occurs when the PHY detects a link change. */
  659. static irqreturn_t
  660. fec_mii_link_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  661. {
  662. struct net_device *dev = dev_id;
  663. struct fec_enet_private *fep;
  664. const struct fec_platform_info *fpi;
  665. if (unlikely(dev == NULL))
  666. return IRQ_NONE;
  667. fep = netdev_priv(dev);
  668. fpi = fep->fpi;
  669. if (!fpi->use_mdio)
  670. return IRQ_NONE;
  671. /*
  672. * Acknowledge the interrupt if possible. If we have not
  673. * found the PHY yet we can't process or acknowledge the
  674. * interrupt now. Instead we ignore this interrupt for now,
  675. * which we can do since it is edge triggered. It will be
  676. * acknowledged later by fec_enet_open().
  677. */
  678. if (!fep->phy)
  679. return IRQ_NONE;
  680. fec_mii_ack_int(dev);
  681. fec_mii_link_status_change_check(dev, 0);
  682. return IRQ_HANDLED;
  683. }
  684. /**********************************************************************************/
  685. static int fec_enet_start_xmit(struct sk_buff *skb, struct net_device *dev)
  686. {
  687. struct fec_enet_private *fep = netdev_priv(dev);
  688. fec_t *fecp = fep->fecp;
  689. cbd_t *bdp;
  690. int curidx;
  691. unsigned long flags;
  692. spin_lock_irqsave(&fep->tx_lock, flags);
  693. /*
  694. * Fill in a Tx ring entry
  695. */
  696. bdp = fep->cur_tx;
  697. if (!fep->tx_free || (CBDR_SC(bdp) & BD_ENET_TX_READY)) {
  698. netif_stop_queue(dev);
  699. spin_unlock_irqrestore(&fep->tx_lock, flags);
  700. /*
  701. * Ooops. All transmit buffers are full. Bail out.
  702. * This should not happen, since the tx queue should be stopped.
  703. */
  704. printk(KERN_WARNING DRV_MODULE_NAME
  705. ": %s tx queue full!.\n", dev->name);
  706. return 1;
  707. }
  708. curidx = bdp - fep->tx_bd_base;
  709. /*
  710. * Clear all of the status flags.
  711. */
  712. CBDC_SC(bdp, BD_ENET_TX_STATS);
  713. /*
  714. * Save skb pointer.
  715. */
  716. fep->tx_skbuff[curidx] = skb;
  717. fep->stats.tx_bytes += skb->len;
  718. /*
  719. * Push the data cache so the CPM does not get stale memory data.
  720. */
  721. CBDW_BUFADDR(bdp, dma_map_single(NULL, skb->data,
  722. skb->len, DMA_TO_DEVICE));
  723. CBDW_DATLEN(bdp, skb->len);
  724. dev->trans_start = jiffies;
  725. /*
  726. * If this was the last BD in the ring, start at the beginning again.
  727. */
  728. if ((CBDR_SC(bdp) & BD_ENET_TX_WRAP) == 0)
  729. fep->cur_tx++;
  730. else
  731. fep->cur_tx = fep->tx_bd_base;
  732. if (!--fep->tx_free)
  733. netif_stop_queue(dev);
  734. /*
  735. * Trigger transmission start
  736. */
  737. CBDS_SC(bdp, BD_ENET_TX_READY | BD_ENET_TX_INTR |
  738. BD_ENET_TX_LAST | BD_ENET_TX_TC);
  739. FW(fecp, x_des_active, 0x01000000);
  740. spin_unlock_irqrestore(&fep->tx_lock, flags);
  741. return 0;
  742. }
  743. static void fec_timeout(struct net_device *dev)
  744. {
  745. struct fec_enet_private *fep = netdev_priv(dev);
  746. fep->stats.tx_errors++;
  747. if (fep->tx_free)
  748. netif_wake_queue(dev);
  749. /* check link status again */
  750. fec_mii_link_status_change_check(dev, 0);
  751. }
  752. static int fec_enet_open(struct net_device *dev)
  753. {
  754. struct fec_enet_private *fep = netdev_priv(dev);
  755. const struct fec_platform_info *fpi = fep->fpi;
  756. unsigned long flags;
  757. /* Install our interrupt handler. */
  758. if (request_irq(fpi->fec_irq, fec_enet_interrupt, 0, "fec", dev) != 0) {
  759. printk(KERN_ERR DRV_MODULE_NAME
  760. ": %s Could not allocate FEC IRQ!", dev->name);
  761. return -EINVAL;
  762. }
  763. /* Install our phy interrupt handler */
  764. if (fpi->phy_irq != -1 &&
  765. request_irq(fpi->phy_irq, fec_mii_link_interrupt, 0, "fec-phy",
  766. dev) != 0) {
  767. printk(KERN_ERR DRV_MODULE_NAME
  768. ": %s Could not allocate PHY IRQ!", dev->name);
  769. free_irq(fpi->fec_irq, dev);
  770. return -EINVAL;
  771. }
  772. if (fpi->use_mdio) {
  773. fec_mii_startup(dev);
  774. netif_carrier_off(dev);
  775. fec_mii_link_status_change_check(dev, 1);
  776. } else {
  777. spin_lock_irqsave(&fep->lock, flags);
  778. fec_restart(dev, 1, 100); /* XXX this sucks */
  779. spin_unlock_irqrestore(&fep->lock, flags);
  780. netif_carrier_on(dev);
  781. netif_start_queue(dev);
  782. }
  783. return 0;
  784. }
  785. static int fec_enet_close(struct net_device *dev)
  786. {
  787. struct fec_enet_private *fep = netdev_priv(dev);
  788. const struct fec_platform_info *fpi = fep->fpi;
  789. unsigned long flags;
  790. netif_stop_queue(dev);
  791. netif_carrier_off(dev);
  792. if (fpi->use_mdio)
  793. fec_mii_shutdown(dev);
  794. spin_lock_irqsave(&fep->lock, flags);
  795. fec_stop(dev);
  796. spin_unlock_irqrestore(&fep->lock, flags);
  797. /* release any irqs */
  798. if (fpi->phy_irq != -1)
  799. free_irq(fpi->phy_irq, dev);
  800. free_irq(fpi->fec_irq, dev);
  801. return 0;
  802. }
  803. static struct net_device_stats *fec_enet_get_stats(struct net_device *dev)
  804. {
  805. struct fec_enet_private *fep = netdev_priv(dev);
  806. return &fep->stats;
  807. }
  808. static int fec_enet_poll(struct net_device *dev, int *budget)
  809. {
  810. return fec_enet_rx_common(dev, budget);
  811. }
  812. /*************************************************************************/
  813. static void fec_get_drvinfo(struct net_device *dev,
  814. struct ethtool_drvinfo *info)
  815. {
  816. strcpy(info->driver, DRV_MODULE_NAME);
  817. strcpy(info->version, DRV_MODULE_VERSION);
  818. }
  819. static int fec_get_regs_len(struct net_device *dev)
  820. {
  821. return sizeof(fec_t);
  822. }
  823. static void fec_get_regs(struct net_device *dev, struct ethtool_regs *regs,
  824. void *p)
  825. {
  826. struct fec_enet_private *fep = netdev_priv(dev);
  827. unsigned long flags;
  828. if (regs->len < sizeof(fec_t))
  829. return;
  830. regs->version = 0;
  831. spin_lock_irqsave(&fep->lock, flags);
  832. memcpy_fromio(p, fep->fecp, sizeof(fec_t));
  833. spin_unlock_irqrestore(&fep->lock, flags);
  834. }
  835. static int fec_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  836. {
  837. struct fec_enet_private *fep = netdev_priv(dev);
  838. unsigned long flags;
  839. int rc;
  840. spin_lock_irqsave(&fep->lock, flags);
  841. rc = mii_ethtool_gset(&fep->mii_if, cmd);
  842. spin_unlock_irqrestore(&fep->lock, flags);
  843. return rc;
  844. }
  845. static int fec_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  846. {
  847. struct fec_enet_private *fep = netdev_priv(dev);
  848. unsigned long flags;
  849. int rc;
  850. spin_lock_irqsave(&fep->lock, flags);
  851. rc = mii_ethtool_sset(&fep->mii_if, cmd);
  852. spin_unlock_irqrestore(&fep->lock, flags);
  853. return rc;
  854. }
  855. static int fec_nway_reset(struct net_device *dev)
  856. {
  857. struct fec_enet_private *fep = netdev_priv(dev);
  858. return mii_nway_restart(&fep->mii_if);
  859. }
  860. static __u32 fec_get_msglevel(struct net_device *dev)
  861. {
  862. struct fec_enet_private *fep = netdev_priv(dev);
  863. return fep->msg_enable;
  864. }
  865. static void fec_set_msglevel(struct net_device *dev, __u32 value)
  866. {
  867. struct fec_enet_private *fep = netdev_priv(dev);
  868. fep->msg_enable = value;
  869. }
  870. static struct ethtool_ops fec_ethtool_ops = {
  871. .get_drvinfo = fec_get_drvinfo,
  872. .get_regs_len = fec_get_regs_len,
  873. .get_settings = fec_get_settings,
  874. .set_settings = fec_set_settings,
  875. .nway_reset = fec_nway_reset,
  876. .get_link = ethtool_op_get_link,
  877. .get_msglevel = fec_get_msglevel,
  878. .set_msglevel = fec_set_msglevel,
  879. .get_tx_csum = ethtool_op_get_tx_csum,
  880. .set_tx_csum = ethtool_op_set_tx_csum, /* local! */
  881. .get_sg = ethtool_op_get_sg,
  882. .set_sg = ethtool_op_set_sg,
  883. .get_regs = fec_get_regs,
  884. };
  885. static int fec_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  886. {
  887. struct fec_enet_private *fep = netdev_priv(dev);
  888. struct mii_ioctl_data *mii = (struct mii_ioctl_data *)&rq->ifr_data;
  889. unsigned long flags;
  890. int rc;
  891. if (!netif_running(dev))
  892. return -EINVAL;
  893. spin_lock_irqsave(&fep->lock, flags);
  894. rc = generic_mii_ioctl(&fep->mii_if, mii, cmd, NULL);
  895. spin_unlock_irqrestore(&fep->lock, flags);
  896. return rc;
  897. }
  898. int fec_8xx_init_one(const struct fec_platform_info *fpi,
  899. struct net_device **devp)
  900. {
  901. immap_t *immap = (immap_t *) IMAP_ADDR;
  902. static int fec_8xx_version_printed = 0;
  903. struct net_device *dev = NULL;
  904. struct fec_enet_private *fep = NULL;
  905. fec_t *fecp = NULL;
  906. int i;
  907. int err = 0;
  908. int registered = 0;
  909. __u32 siel;
  910. *devp = NULL;
  911. switch (fpi->fec_no) {
  912. case 0:
  913. fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec;
  914. break;
  915. #ifdef CONFIG_DUET
  916. case 1:
  917. fecp = &((immap_t *) IMAP_ADDR)->im_cpm.cp_fec2;
  918. break;
  919. #endif
  920. default:
  921. return -EINVAL;
  922. }
  923. if (fec_8xx_version_printed++ == 0)
  924. printk(KERN_INFO "%s", version);
  925. i = sizeof(*fep) + (sizeof(struct sk_buff **) *
  926. (fpi->rx_ring + fpi->tx_ring));
  927. dev = alloc_etherdev(i);
  928. if (!dev) {
  929. err = -ENOMEM;
  930. goto err;
  931. }
  932. SET_MODULE_OWNER(dev);
  933. fep = netdev_priv(dev);
  934. /* partial reset of FEC */
  935. fec_whack_reset(fecp);
  936. /* point rx_skbuff, tx_skbuff */
  937. fep->rx_skbuff = (struct sk_buff **)&fep[1];
  938. fep->tx_skbuff = fep->rx_skbuff + fpi->rx_ring;
  939. fep->fecp = fecp;
  940. fep->fpi = fpi;
  941. /* init locks */
  942. spin_lock_init(&fep->lock);
  943. spin_lock_init(&fep->tx_lock);
  944. /*
  945. * Set the Ethernet address.
  946. */
  947. for (i = 0; i < 6; i++)
  948. dev->dev_addr[i] = fpi->macaddr[i];
  949. fep->ring_base = dma_alloc_coherent(NULL,
  950. (fpi->tx_ring + fpi->rx_ring) *
  951. sizeof(cbd_t), &fep->ring_mem_addr,
  952. GFP_KERNEL);
  953. if (fep->ring_base == NULL) {
  954. printk(KERN_ERR DRV_MODULE_NAME
  955. ": %s dma alloc failed.\n", dev->name);
  956. err = -ENOMEM;
  957. goto err;
  958. }
  959. /*
  960. * Set receive and transmit descriptor base.
  961. */
  962. fep->rx_bd_base = fep->ring_base;
  963. fep->tx_bd_base = fep->rx_bd_base + fpi->rx_ring;
  964. /* initialize ring size variables */
  965. fep->tx_ring = fpi->tx_ring;
  966. fep->rx_ring = fpi->rx_ring;
  967. /* SIU interrupt */
  968. if (fpi->phy_irq != -1 &&
  969. (fpi->phy_irq >= SIU_IRQ0 && fpi->phy_irq < SIU_LEVEL7)) {
  970. siel = in_be32(&immap->im_siu_conf.sc_siel);
  971. if ((fpi->phy_irq & 1) == 0)
  972. siel |= (0x80000000 >> fpi->phy_irq);
  973. else
  974. siel &= ~(0x80000000 >> (fpi->phy_irq & ~1));
  975. out_be32(&immap->im_siu_conf.sc_siel, siel);
  976. }
  977. /*
  978. * The FEC Ethernet specific entries in the device structure.
  979. */
  980. dev->open = fec_enet_open;
  981. dev->hard_start_xmit = fec_enet_start_xmit;
  982. dev->tx_timeout = fec_timeout;
  983. dev->watchdog_timeo = TX_TIMEOUT;
  984. dev->stop = fec_enet_close;
  985. dev->get_stats = fec_enet_get_stats;
  986. dev->set_multicast_list = fec_set_multicast_list;
  987. dev->set_mac_address = fec_set_mac_address;
  988. if (fpi->use_napi) {
  989. dev->poll = fec_enet_poll;
  990. dev->weight = fpi->napi_weight;
  991. }
  992. dev->ethtool_ops = &fec_ethtool_ops;
  993. dev->do_ioctl = fec_ioctl;
  994. fep->fec_phy_speed =
  995. ((((fpi->sys_clk + 4999999) / 2500000) / 2) & 0x3F) << 1;
  996. init_timer(&fep->phy_timer_list);
  997. /* partial reset of FEC so that only MII works */
  998. FW(fecp, mii_speed, fep->fec_phy_speed);
  999. FW(fecp, ievent, 0xffc0);
  1000. FW(fecp, ivec, (fpi->fec_irq / 2) << 29);
  1001. FW(fecp, imask, 0);
  1002. FW(fecp, r_cntrl, FEC_RCNTRL_MII_MODE); /* MII enable */
  1003. FW(fecp, ecntrl, FEC_ECNTRL_PINMUX | FEC_ECNTRL_ETHER_EN);
  1004. netif_carrier_off(dev);
  1005. err = register_netdev(dev);
  1006. if (err != 0)
  1007. goto err;
  1008. registered = 1;
  1009. if (fpi->use_mdio) {
  1010. fep->mii_if.dev = dev;
  1011. fep->mii_if.mdio_read = fec_mii_read;
  1012. fep->mii_if.mdio_write = fec_mii_write;
  1013. fep->mii_if.phy_id_mask = 0x1f;
  1014. fep->mii_if.reg_num_mask = 0x1f;
  1015. fep->mii_if.phy_id = fec_mii_phy_id_detect(dev);
  1016. }
  1017. *devp = dev;
  1018. return 0;
  1019. err:
  1020. if (dev != NULL) {
  1021. if (fecp != NULL)
  1022. fec_whack_reset(fecp);
  1023. if (registered)
  1024. unregister_netdev(dev);
  1025. if (fep != NULL) {
  1026. if (fep->ring_base)
  1027. dma_free_coherent(NULL,
  1028. (fpi->tx_ring +
  1029. fpi->rx_ring) *
  1030. sizeof(cbd_t), fep->ring_base,
  1031. fep->ring_mem_addr);
  1032. }
  1033. free_netdev(dev);
  1034. }
  1035. return err;
  1036. }
  1037. int fec_8xx_cleanup_one(struct net_device *dev)
  1038. {
  1039. struct fec_enet_private *fep = netdev_priv(dev);
  1040. fec_t *fecp = fep->fecp;
  1041. const struct fec_platform_info *fpi = fep->fpi;
  1042. fec_whack_reset(fecp);
  1043. unregister_netdev(dev);
  1044. dma_free_coherent(NULL, (fpi->tx_ring + fpi->rx_ring) * sizeof(cbd_t),
  1045. fep->ring_base, fep->ring_mem_addr);
  1046. free_netdev(dev);
  1047. return 0;
  1048. }
  1049. /**************************************************************************************/
  1050. /**************************************************************************************/
  1051. /**************************************************************************************/
  1052. static int __init fec_8xx_init(void)
  1053. {
  1054. return fec_8xx_platform_init();
  1055. }
  1056. static void __exit fec_8xx_cleanup(void)
  1057. {
  1058. fec_8xx_platform_cleanup();
  1059. }
  1060. /**************************************************************************************/
  1061. /**************************************************************************************/
  1062. /**************************************************************************************/
  1063. module_init(fec_8xx_init);
  1064. module_exit(fec_8xx_cleanup);