e1000_ethtool.c 51 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. /* ethtool support for e1000 */
  21. #include "e1000.h"
  22. #include <asm/uaccess.h>
  23. extern char e1000_driver_name[];
  24. extern char e1000_driver_version[];
  25. extern int e1000_up(struct e1000_adapter *adapter);
  26. extern void e1000_down(struct e1000_adapter *adapter);
  27. extern void e1000_reset(struct e1000_adapter *adapter);
  28. extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  29. extern int e1000_setup_rx_resources(struct e1000_adapter *adapter);
  30. extern int e1000_setup_tx_resources(struct e1000_adapter *adapter);
  31. extern void e1000_free_rx_resources(struct e1000_adapter *adapter);
  32. extern void e1000_free_tx_resources(struct e1000_adapter *adapter);
  33. extern void e1000_update_stats(struct e1000_adapter *adapter);
  34. struct e1000_stats {
  35. char stat_string[ETH_GSTRING_LEN];
  36. int sizeof_stat;
  37. int stat_offset;
  38. };
  39. #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
  40. offsetof(struct e1000_adapter, m)
  41. static const struct e1000_stats e1000_gstrings_stats[] = {
  42. { "rx_packets", E1000_STAT(net_stats.rx_packets) },
  43. { "tx_packets", E1000_STAT(net_stats.tx_packets) },
  44. { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
  45. { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
  46. { "rx_errors", E1000_STAT(net_stats.rx_errors) },
  47. { "tx_errors", E1000_STAT(net_stats.tx_errors) },
  48. { "rx_dropped", E1000_STAT(net_stats.rx_dropped) },
  49. { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
  50. { "multicast", E1000_STAT(net_stats.multicast) },
  51. { "collisions", E1000_STAT(net_stats.collisions) },
  52. { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
  53. { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
  54. { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
  55. { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
  56. { "rx_fifo_errors", E1000_STAT(net_stats.rx_fifo_errors) },
  57. { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
  58. { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
  59. { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
  60. { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
  61. { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
  62. { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
  63. { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
  64. { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
  65. { "tx_deferred_ok", E1000_STAT(stats.dc) },
  66. { "tx_single_coll_ok", E1000_STAT(stats.scc) },
  67. { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
  68. { "rx_long_length_errors", E1000_STAT(stats.roc) },
  69. { "rx_short_length_errors", E1000_STAT(stats.ruc) },
  70. { "rx_align_errors", E1000_STAT(stats.algnerrc) },
  71. { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
  72. { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
  73. { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
  74. { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
  75. { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
  76. { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
  77. { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
  78. { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
  79. { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) }
  80. };
  81. #define E1000_STATS_LEN \
  82. sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
  83. static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
  84. "Register test (offline)", "Eeprom test (offline)",
  85. "Interrupt test (offline)", "Loopback test (offline)",
  86. "Link test (on/offline)"
  87. };
  88. #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
  89. static int
  90. e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  91. {
  92. struct e1000_adapter *adapter = netdev_priv(netdev);
  93. struct e1000_hw *hw = &adapter->hw;
  94. if(hw->media_type == e1000_media_type_copper) {
  95. ecmd->supported = (SUPPORTED_10baseT_Half |
  96. SUPPORTED_10baseT_Full |
  97. SUPPORTED_100baseT_Half |
  98. SUPPORTED_100baseT_Full |
  99. SUPPORTED_1000baseT_Full|
  100. SUPPORTED_Autoneg |
  101. SUPPORTED_TP);
  102. ecmd->advertising = ADVERTISED_TP;
  103. if(hw->autoneg == 1) {
  104. ecmd->advertising |= ADVERTISED_Autoneg;
  105. /* the e1000 autoneg seems to match ethtool nicely */
  106. ecmd->advertising |= hw->autoneg_advertised;
  107. }
  108. ecmd->port = PORT_TP;
  109. ecmd->phy_address = hw->phy_addr;
  110. if(hw->mac_type == e1000_82543)
  111. ecmd->transceiver = XCVR_EXTERNAL;
  112. else
  113. ecmd->transceiver = XCVR_INTERNAL;
  114. } else {
  115. ecmd->supported = (SUPPORTED_1000baseT_Full |
  116. SUPPORTED_FIBRE |
  117. SUPPORTED_Autoneg);
  118. ecmd->advertising = (ADVERTISED_1000baseT_Full |
  119. ADVERTISED_FIBRE |
  120. ADVERTISED_Autoneg);
  121. ecmd->port = PORT_FIBRE;
  122. if(hw->mac_type >= e1000_82545)
  123. ecmd->transceiver = XCVR_INTERNAL;
  124. else
  125. ecmd->transceiver = XCVR_EXTERNAL;
  126. }
  127. if(netif_carrier_ok(adapter->netdev)) {
  128. e1000_get_speed_and_duplex(hw, &adapter->link_speed,
  129. &adapter->link_duplex);
  130. ecmd->speed = adapter->link_speed;
  131. /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
  132. * and HALF_DUPLEX != DUPLEX_HALF */
  133. if(adapter->link_duplex == FULL_DUPLEX)
  134. ecmd->duplex = DUPLEX_FULL;
  135. else
  136. ecmd->duplex = DUPLEX_HALF;
  137. } else {
  138. ecmd->speed = -1;
  139. ecmd->duplex = -1;
  140. }
  141. ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
  142. hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
  143. return 0;
  144. }
  145. static int
  146. e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  147. {
  148. struct e1000_adapter *adapter = netdev_priv(netdev);
  149. struct e1000_hw *hw = &adapter->hw;
  150. if(ecmd->autoneg == AUTONEG_ENABLE) {
  151. hw->autoneg = 1;
  152. if(hw->media_type == e1000_media_type_fiber)
  153. hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
  154. ADVERTISED_FIBRE |
  155. ADVERTISED_Autoneg;
  156. else
  157. hw->autoneg_advertised = ADVERTISED_10baseT_Half |
  158. ADVERTISED_10baseT_Full |
  159. ADVERTISED_100baseT_Half |
  160. ADVERTISED_100baseT_Full |
  161. ADVERTISED_1000baseT_Full|
  162. ADVERTISED_Autoneg |
  163. ADVERTISED_TP;
  164. ecmd->advertising = hw->autoneg_advertised;
  165. } else
  166. if(e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
  167. return -EINVAL;
  168. /* reset the link */
  169. if(netif_running(adapter->netdev)) {
  170. e1000_down(adapter);
  171. e1000_reset(adapter);
  172. e1000_up(adapter);
  173. } else
  174. e1000_reset(adapter);
  175. return 0;
  176. }
  177. static void
  178. e1000_get_pauseparam(struct net_device *netdev,
  179. struct ethtool_pauseparam *pause)
  180. {
  181. struct e1000_adapter *adapter = netdev_priv(netdev);
  182. struct e1000_hw *hw = &adapter->hw;
  183. pause->autoneg =
  184. (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
  185. if(hw->fc == e1000_fc_rx_pause)
  186. pause->rx_pause = 1;
  187. else if(hw->fc == e1000_fc_tx_pause)
  188. pause->tx_pause = 1;
  189. else if(hw->fc == e1000_fc_full) {
  190. pause->rx_pause = 1;
  191. pause->tx_pause = 1;
  192. }
  193. }
  194. static int
  195. e1000_set_pauseparam(struct net_device *netdev,
  196. struct ethtool_pauseparam *pause)
  197. {
  198. struct e1000_adapter *adapter = netdev_priv(netdev);
  199. struct e1000_hw *hw = &adapter->hw;
  200. adapter->fc_autoneg = pause->autoneg;
  201. if(pause->rx_pause && pause->tx_pause)
  202. hw->fc = e1000_fc_full;
  203. else if(pause->rx_pause && !pause->tx_pause)
  204. hw->fc = e1000_fc_rx_pause;
  205. else if(!pause->rx_pause && pause->tx_pause)
  206. hw->fc = e1000_fc_tx_pause;
  207. else if(!pause->rx_pause && !pause->tx_pause)
  208. hw->fc = e1000_fc_none;
  209. hw->original_fc = hw->fc;
  210. if(adapter->fc_autoneg == AUTONEG_ENABLE) {
  211. if(netif_running(adapter->netdev)) {
  212. e1000_down(adapter);
  213. e1000_up(adapter);
  214. } else
  215. e1000_reset(adapter);
  216. }
  217. else
  218. return ((hw->media_type == e1000_media_type_fiber) ?
  219. e1000_setup_link(hw) : e1000_force_mac_fc(hw));
  220. return 0;
  221. }
  222. static uint32_t
  223. e1000_get_rx_csum(struct net_device *netdev)
  224. {
  225. struct e1000_adapter *adapter = netdev_priv(netdev);
  226. return adapter->rx_csum;
  227. }
  228. static int
  229. e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
  230. {
  231. struct e1000_adapter *adapter = netdev_priv(netdev);
  232. adapter->rx_csum = data;
  233. if(netif_running(netdev)) {
  234. e1000_down(adapter);
  235. e1000_up(adapter);
  236. } else
  237. e1000_reset(adapter);
  238. return 0;
  239. }
  240. static uint32_t
  241. e1000_get_tx_csum(struct net_device *netdev)
  242. {
  243. return (netdev->features & NETIF_F_HW_CSUM) != 0;
  244. }
  245. static int
  246. e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
  247. {
  248. struct e1000_adapter *adapter = netdev_priv(netdev);
  249. if(adapter->hw.mac_type < e1000_82543) {
  250. if (!data)
  251. return -EINVAL;
  252. return 0;
  253. }
  254. if (data)
  255. netdev->features |= NETIF_F_HW_CSUM;
  256. else
  257. netdev->features &= ~NETIF_F_HW_CSUM;
  258. return 0;
  259. }
  260. #ifdef NETIF_F_TSO
  261. static int
  262. e1000_set_tso(struct net_device *netdev, uint32_t data)
  263. {
  264. struct e1000_adapter *adapter = netdev_priv(netdev);
  265. if((adapter->hw.mac_type < e1000_82544) ||
  266. (adapter->hw.mac_type == e1000_82547))
  267. return data ? -EINVAL : 0;
  268. if (data)
  269. netdev->features |= NETIF_F_TSO;
  270. else
  271. netdev->features &= ~NETIF_F_TSO;
  272. return 0;
  273. }
  274. #endif /* NETIF_F_TSO */
  275. static uint32_t
  276. e1000_get_msglevel(struct net_device *netdev)
  277. {
  278. struct e1000_adapter *adapter = netdev_priv(netdev);
  279. return adapter->msg_enable;
  280. }
  281. static void
  282. e1000_set_msglevel(struct net_device *netdev, uint32_t data)
  283. {
  284. struct e1000_adapter *adapter = netdev_priv(netdev);
  285. adapter->msg_enable = data;
  286. }
  287. static int
  288. e1000_get_regs_len(struct net_device *netdev)
  289. {
  290. #define E1000_REGS_LEN 32
  291. return E1000_REGS_LEN * sizeof(uint32_t);
  292. }
  293. static void
  294. e1000_get_regs(struct net_device *netdev,
  295. struct ethtool_regs *regs, void *p)
  296. {
  297. struct e1000_adapter *adapter = netdev_priv(netdev);
  298. struct e1000_hw *hw = &adapter->hw;
  299. uint32_t *regs_buff = p;
  300. uint16_t phy_data;
  301. memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
  302. regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
  303. regs_buff[0] = E1000_READ_REG(hw, CTRL);
  304. regs_buff[1] = E1000_READ_REG(hw, STATUS);
  305. regs_buff[2] = E1000_READ_REG(hw, RCTL);
  306. regs_buff[3] = E1000_READ_REG(hw, RDLEN);
  307. regs_buff[4] = E1000_READ_REG(hw, RDH);
  308. regs_buff[5] = E1000_READ_REG(hw, RDT);
  309. regs_buff[6] = E1000_READ_REG(hw, RDTR);
  310. regs_buff[7] = E1000_READ_REG(hw, TCTL);
  311. regs_buff[8] = E1000_READ_REG(hw, TDLEN);
  312. regs_buff[9] = E1000_READ_REG(hw, TDH);
  313. regs_buff[10] = E1000_READ_REG(hw, TDT);
  314. regs_buff[11] = E1000_READ_REG(hw, TIDV);
  315. regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
  316. if(hw->phy_type == e1000_phy_igp) {
  317. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  318. IGP01E1000_PHY_AGC_A);
  319. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
  320. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  321. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  322. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  323. IGP01E1000_PHY_AGC_B);
  324. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
  325. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  326. regs_buff[14] = (uint32_t)phy_data; /* cable length */
  327. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  328. IGP01E1000_PHY_AGC_C);
  329. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
  330. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  331. regs_buff[15] = (uint32_t)phy_data; /* cable length */
  332. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  333. IGP01E1000_PHY_AGC_D);
  334. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
  335. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  336. regs_buff[16] = (uint32_t)phy_data; /* cable length */
  337. regs_buff[17] = 0; /* extended 10bt distance (not needed) */
  338. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  339. e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
  340. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  341. regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
  342. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  343. IGP01E1000_PHY_PCS_INIT_REG);
  344. e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
  345. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  346. regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
  347. regs_buff[20] = 0; /* polarity correction enabled (always) */
  348. regs_buff[22] = 0; /* phy receive errors (unavailable) */
  349. regs_buff[23] = regs_buff[18]; /* mdix mode */
  350. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  351. } else {
  352. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
  353. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  354. regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  355. regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  356. regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  357. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
  358. regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
  359. regs_buff[18] = regs_buff[13]; /* cable polarity */
  360. regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  361. regs_buff[20] = regs_buff[17]; /* polarity correction */
  362. /* phy receive errors */
  363. regs_buff[22] = adapter->phy_stats.receive_errors;
  364. regs_buff[23] = regs_buff[13]; /* mdix mode */
  365. }
  366. regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
  367. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
  368. regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
  369. regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
  370. if(hw->mac_type >= e1000_82540 &&
  371. hw->media_type == e1000_media_type_copper) {
  372. regs_buff[26] = E1000_READ_REG(hw, MANC);
  373. }
  374. }
  375. static int
  376. e1000_get_eeprom_len(struct net_device *netdev)
  377. {
  378. struct e1000_adapter *adapter = netdev_priv(netdev);
  379. return adapter->hw.eeprom.word_size * 2;
  380. }
  381. static int
  382. e1000_get_eeprom(struct net_device *netdev,
  383. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  384. {
  385. struct e1000_adapter *adapter = netdev_priv(netdev);
  386. struct e1000_hw *hw = &adapter->hw;
  387. uint16_t *eeprom_buff;
  388. int first_word, last_word;
  389. int ret_val = 0;
  390. uint16_t i;
  391. if(eeprom->len == 0)
  392. return -EINVAL;
  393. eeprom->magic = hw->vendor_id | (hw->device_id << 16);
  394. first_word = eeprom->offset >> 1;
  395. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  396. eeprom_buff = kmalloc(sizeof(uint16_t) *
  397. (last_word - first_word + 1), GFP_KERNEL);
  398. if(!eeprom_buff)
  399. return -ENOMEM;
  400. if(hw->eeprom.type == e1000_eeprom_spi)
  401. ret_val = e1000_read_eeprom(hw, first_word,
  402. last_word - first_word + 1,
  403. eeprom_buff);
  404. else {
  405. for (i = 0; i < last_word - first_word + 1; i++)
  406. if((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
  407. &eeprom_buff[i])))
  408. break;
  409. }
  410. /* Device's eeprom is always little-endian, word addressable */
  411. for (i = 0; i < last_word - first_word + 1; i++)
  412. le16_to_cpus(&eeprom_buff[i]);
  413. memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
  414. eeprom->len);
  415. kfree(eeprom_buff);
  416. return ret_val;
  417. }
  418. static int
  419. e1000_set_eeprom(struct net_device *netdev,
  420. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  421. {
  422. struct e1000_adapter *adapter = netdev_priv(netdev);
  423. struct e1000_hw *hw = &adapter->hw;
  424. uint16_t *eeprom_buff;
  425. void *ptr;
  426. int max_len, first_word, last_word, ret_val = 0;
  427. uint16_t i;
  428. if(eeprom->len == 0)
  429. return -EOPNOTSUPP;
  430. if(eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
  431. return -EFAULT;
  432. max_len = hw->eeprom.word_size * 2;
  433. first_word = eeprom->offset >> 1;
  434. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  435. eeprom_buff = kmalloc(max_len, GFP_KERNEL);
  436. if(!eeprom_buff)
  437. return -ENOMEM;
  438. ptr = (void *)eeprom_buff;
  439. if(eeprom->offset & 1) {
  440. /* need read/modify/write of first changed EEPROM word */
  441. /* only the second byte of the word is being modified */
  442. ret_val = e1000_read_eeprom(hw, first_word, 1,
  443. &eeprom_buff[0]);
  444. ptr++;
  445. }
  446. if(((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
  447. /* need read/modify/write of last changed EEPROM word */
  448. /* only the first byte of the word is being modified */
  449. ret_val = e1000_read_eeprom(hw, last_word, 1,
  450. &eeprom_buff[last_word - first_word]);
  451. }
  452. /* Device's eeprom is always little-endian, word addressable */
  453. for (i = 0; i < last_word - first_word + 1; i++)
  454. le16_to_cpus(&eeprom_buff[i]);
  455. memcpy(ptr, bytes, eeprom->len);
  456. for (i = 0; i < last_word - first_word + 1; i++)
  457. eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
  458. ret_val = e1000_write_eeprom(hw, first_word,
  459. last_word - first_word + 1, eeprom_buff);
  460. /* Update the checksum over the first part of the EEPROM if needed */
  461. if((ret_val == 0) && first_word <= EEPROM_CHECKSUM_REG)
  462. e1000_update_eeprom_checksum(hw);
  463. kfree(eeprom_buff);
  464. return ret_val;
  465. }
  466. static void
  467. e1000_get_drvinfo(struct net_device *netdev,
  468. struct ethtool_drvinfo *drvinfo)
  469. {
  470. struct e1000_adapter *adapter = netdev_priv(netdev);
  471. strncpy(drvinfo->driver, e1000_driver_name, 32);
  472. strncpy(drvinfo->version, e1000_driver_version, 32);
  473. strncpy(drvinfo->fw_version, "N/A", 32);
  474. strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
  475. drvinfo->n_stats = E1000_STATS_LEN;
  476. drvinfo->testinfo_len = E1000_TEST_LEN;
  477. drvinfo->regdump_len = e1000_get_regs_len(netdev);
  478. drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
  479. }
  480. static void
  481. e1000_get_ringparam(struct net_device *netdev,
  482. struct ethtool_ringparam *ring)
  483. {
  484. struct e1000_adapter *adapter = netdev_priv(netdev);
  485. e1000_mac_type mac_type = adapter->hw.mac_type;
  486. struct e1000_desc_ring *txdr = &adapter->tx_ring;
  487. struct e1000_desc_ring *rxdr = &adapter->rx_ring;
  488. ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
  489. E1000_MAX_82544_RXD;
  490. ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
  491. E1000_MAX_82544_TXD;
  492. ring->rx_mini_max_pending = 0;
  493. ring->rx_jumbo_max_pending = 0;
  494. ring->rx_pending = rxdr->count;
  495. ring->tx_pending = txdr->count;
  496. ring->rx_mini_pending = 0;
  497. ring->rx_jumbo_pending = 0;
  498. }
  499. static int
  500. e1000_set_ringparam(struct net_device *netdev,
  501. struct ethtool_ringparam *ring)
  502. {
  503. struct e1000_adapter *adapter = netdev_priv(netdev);
  504. e1000_mac_type mac_type = adapter->hw.mac_type;
  505. struct e1000_desc_ring *txdr = &adapter->tx_ring;
  506. struct e1000_desc_ring *rxdr = &adapter->rx_ring;
  507. struct e1000_desc_ring tx_old, tx_new, rx_old, rx_new;
  508. int err;
  509. tx_old = adapter->tx_ring;
  510. rx_old = adapter->rx_ring;
  511. if((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
  512. return -EINVAL;
  513. if(netif_running(adapter->netdev))
  514. e1000_down(adapter);
  515. rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
  516. rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
  517. E1000_MAX_RXD : E1000_MAX_82544_RXD));
  518. E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
  519. txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
  520. txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
  521. E1000_MAX_TXD : E1000_MAX_82544_TXD));
  522. E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
  523. if(netif_running(adapter->netdev)) {
  524. /* Try to get new resources before deleting old */
  525. if((err = e1000_setup_rx_resources(adapter)))
  526. goto err_setup_rx;
  527. if((err = e1000_setup_tx_resources(adapter)))
  528. goto err_setup_tx;
  529. /* save the new, restore the old in order to free it,
  530. * then restore the new back again */
  531. rx_new = adapter->rx_ring;
  532. tx_new = adapter->tx_ring;
  533. adapter->rx_ring = rx_old;
  534. adapter->tx_ring = tx_old;
  535. e1000_free_rx_resources(adapter);
  536. e1000_free_tx_resources(adapter);
  537. adapter->rx_ring = rx_new;
  538. adapter->tx_ring = tx_new;
  539. if((err = e1000_up(adapter)))
  540. return err;
  541. }
  542. return 0;
  543. err_setup_tx:
  544. e1000_free_rx_resources(adapter);
  545. err_setup_rx:
  546. adapter->rx_ring = rx_old;
  547. adapter->tx_ring = tx_old;
  548. e1000_up(adapter);
  549. return err;
  550. }
  551. #define REG_PATTERN_TEST(R, M, W) \
  552. { \
  553. uint32_t pat, value; \
  554. uint32_t test[] = \
  555. {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
  556. for(pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
  557. E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
  558. value = E1000_READ_REG(&adapter->hw, R); \
  559. if(value != (test[pat] & W & M)) { \
  560. DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
  561. "0x%08X expected 0x%08X\n", \
  562. E1000_##R, value, (test[pat] & W & M)); \
  563. *data = (adapter->hw.mac_type < e1000_82543) ? \
  564. E1000_82542_##R : E1000_##R; \
  565. return 1; \
  566. } \
  567. } \
  568. }
  569. #define REG_SET_AND_CHECK(R, M, W) \
  570. { \
  571. uint32_t value; \
  572. E1000_WRITE_REG(&adapter->hw, R, W & M); \
  573. value = E1000_READ_REG(&adapter->hw, R); \
  574. if((W & M) != (value & M)) { \
  575. DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
  576. "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
  577. *data = (adapter->hw.mac_type < e1000_82543) ? \
  578. E1000_82542_##R : E1000_##R; \
  579. return 1; \
  580. } \
  581. }
  582. static int
  583. e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
  584. {
  585. uint32_t value, before, after;
  586. uint32_t i, toggle;
  587. /* The status register is Read Only, so a write should fail.
  588. * Some bits that get toggled are ignored.
  589. */
  590. switch (adapter->hw.mac_type) {
  591. case e1000_82573:
  592. toggle = 0x7FFFF033;
  593. break;
  594. default:
  595. toggle = 0xFFFFF833;
  596. break;
  597. }
  598. before = E1000_READ_REG(&adapter->hw, STATUS);
  599. value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
  600. E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
  601. after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
  602. if(value != after) {
  603. DPRINTK(DRV, ERR, "failed STATUS register test got: "
  604. "0x%08X expected: 0x%08X\n", after, value);
  605. *data = 1;
  606. return 1;
  607. }
  608. /* restore previous status */
  609. E1000_WRITE_REG(&adapter->hw, STATUS, before);
  610. REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
  611. REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
  612. REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
  613. REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
  614. REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
  615. REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  616. REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
  617. REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
  618. REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
  619. REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
  620. REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
  621. REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
  622. REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  623. REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
  624. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
  625. REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
  626. REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
  627. if(adapter->hw.mac_type >= e1000_82543) {
  628. REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
  629. REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  630. REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
  631. REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  632. REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
  633. for(i = 0; i < E1000_RAR_ENTRIES; i++) {
  634. REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
  635. 0xFFFFFFFF);
  636. REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
  637. 0xFFFFFFFF);
  638. }
  639. } else {
  640. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
  641. REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
  642. REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
  643. REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
  644. }
  645. for(i = 0; i < E1000_MC_TBL_SIZE; i++)
  646. REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
  647. *data = 0;
  648. return 0;
  649. }
  650. static int
  651. e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
  652. {
  653. uint16_t temp;
  654. uint16_t checksum = 0;
  655. uint16_t i;
  656. *data = 0;
  657. /* Read and add up the contents of the EEPROM */
  658. for(i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
  659. if((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
  660. *data = 1;
  661. break;
  662. }
  663. checksum += temp;
  664. }
  665. /* If Checksum is not Correct return error else test passed */
  666. if((checksum != (uint16_t) EEPROM_SUM) && !(*data))
  667. *data = 2;
  668. return *data;
  669. }
  670. static irqreturn_t
  671. e1000_test_intr(int irq,
  672. void *data,
  673. struct pt_regs *regs)
  674. {
  675. struct net_device *netdev = (struct net_device *) data;
  676. struct e1000_adapter *adapter = netdev_priv(netdev);
  677. adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
  678. return IRQ_HANDLED;
  679. }
  680. static int
  681. e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
  682. {
  683. struct net_device *netdev = adapter->netdev;
  684. uint32_t mask, i=0, shared_int = TRUE;
  685. uint32_t irq = adapter->pdev->irq;
  686. *data = 0;
  687. /* Hook up test interrupt handler just for this test */
  688. if(!request_irq(irq, &e1000_test_intr, 0, netdev->name, netdev)) {
  689. shared_int = FALSE;
  690. } else if(request_irq(irq, &e1000_test_intr, SA_SHIRQ,
  691. netdev->name, netdev)){
  692. *data = 1;
  693. return -1;
  694. }
  695. /* Disable all the interrupts */
  696. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  697. msec_delay(10);
  698. /* Test each interrupt */
  699. for(; i < 10; i++) {
  700. /* Interrupt to test */
  701. mask = 1 << i;
  702. if(!shared_int) {
  703. /* Disable the interrupt to be reported in
  704. * the cause register and then force the same
  705. * interrupt and see if one gets posted. If
  706. * an interrupt was posted to the bus, the
  707. * test failed.
  708. */
  709. adapter->test_icr = 0;
  710. E1000_WRITE_REG(&adapter->hw, IMC, mask);
  711. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  712. msec_delay(10);
  713. if(adapter->test_icr & mask) {
  714. *data = 3;
  715. break;
  716. }
  717. }
  718. /* Enable the interrupt to be reported in
  719. * the cause register and then force the same
  720. * interrupt and see if one gets posted. If
  721. * an interrupt was not posted to the bus, the
  722. * test failed.
  723. */
  724. adapter->test_icr = 0;
  725. E1000_WRITE_REG(&adapter->hw, IMS, mask);
  726. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  727. msec_delay(10);
  728. if(!(adapter->test_icr & mask)) {
  729. *data = 4;
  730. break;
  731. }
  732. if(!shared_int) {
  733. /* Disable the other interrupts to be reported in
  734. * the cause register and then force the other
  735. * interrupts and see if any get posted. If
  736. * an interrupt was posted to the bus, the
  737. * test failed.
  738. */
  739. adapter->test_icr = 0;
  740. E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
  741. E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
  742. msec_delay(10);
  743. if(adapter->test_icr) {
  744. *data = 5;
  745. break;
  746. }
  747. }
  748. }
  749. /* Disable all the interrupts */
  750. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  751. msec_delay(10);
  752. /* Unhook test interrupt handler */
  753. free_irq(irq, netdev);
  754. return *data;
  755. }
  756. static void
  757. e1000_free_desc_rings(struct e1000_adapter *adapter)
  758. {
  759. struct e1000_desc_ring *txdr = &adapter->test_tx_ring;
  760. struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;
  761. struct pci_dev *pdev = adapter->pdev;
  762. int i;
  763. if(txdr->desc && txdr->buffer_info) {
  764. for(i = 0; i < txdr->count; i++) {
  765. if(txdr->buffer_info[i].dma)
  766. pci_unmap_single(pdev, txdr->buffer_info[i].dma,
  767. txdr->buffer_info[i].length,
  768. PCI_DMA_TODEVICE);
  769. if(txdr->buffer_info[i].skb)
  770. dev_kfree_skb(txdr->buffer_info[i].skb);
  771. }
  772. }
  773. if(rxdr->desc && rxdr->buffer_info) {
  774. for(i = 0; i < rxdr->count; i++) {
  775. if(rxdr->buffer_info[i].dma)
  776. pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
  777. rxdr->buffer_info[i].length,
  778. PCI_DMA_FROMDEVICE);
  779. if(rxdr->buffer_info[i].skb)
  780. dev_kfree_skb(rxdr->buffer_info[i].skb);
  781. }
  782. }
  783. if(txdr->desc)
  784. pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
  785. if(rxdr->desc)
  786. pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
  787. if(txdr->buffer_info)
  788. kfree(txdr->buffer_info);
  789. if(rxdr->buffer_info)
  790. kfree(rxdr->buffer_info);
  791. return;
  792. }
  793. static int
  794. e1000_setup_desc_rings(struct e1000_adapter *adapter)
  795. {
  796. struct e1000_desc_ring *txdr = &adapter->test_tx_ring;
  797. struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;
  798. struct pci_dev *pdev = adapter->pdev;
  799. uint32_t rctl;
  800. int size, i, ret_val;
  801. /* Setup Tx descriptor ring and Tx buffers */
  802. if(!txdr->count)
  803. txdr->count = E1000_DEFAULT_TXD;
  804. size = txdr->count * sizeof(struct e1000_buffer);
  805. if(!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  806. ret_val = 1;
  807. goto err_nomem;
  808. }
  809. memset(txdr->buffer_info, 0, size);
  810. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  811. E1000_ROUNDUP(txdr->size, 4096);
  812. if(!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
  813. ret_val = 2;
  814. goto err_nomem;
  815. }
  816. memset(txdr->desc, 0, txdr->size);
  817. txdr->next_to_use = txdr->next_to_clean = 0;
  818. E1000_WRITE_REG(&adapter->hw, TDBAL,
  819. ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
  820. E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
  821. E1000_WRITE_REG(&adapter->hw, TDLEN,
  822. txdr->count * sizeof(struct e1000_tx_desc));
  823. E1000_WRITE_REG(&adapter->hw, TDH, 0);
  824. E1000_WRITE_REG(&adapter->hw, TDT, 0);
  825. E1000_WRITE_REG(&adapter->hw, TCTL,
  826. E1000_TCTL_PSP | E1000_TCTL_EN |
  827. E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
  828. E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
  829. for(i = 0; i < txdr->count; i++) {
  830. struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
  831. struct sk_buff *skb;
  832. unsigned int size = 1024;
  833. if(!(skb = alloc_skb(size, GFP_KERNEL))) {
  834. ret_val = 3;
  835. goto err_nomem;
  836. }
  837. skb_put(skb, size);
  838. txdr->buffer_info[i].skb = skb;
  839. txdr->buffer_info[i].length = skb->len;
  840. txdr->buffer_info[i].dma =
  841. pci_map_single(pdev, skb->data, skb->len,
  842. PCI_DMA_TODEVICE);
  843. tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
  844. tx_desc->lower.data = cpu_to_le32(skb->len);
  845. tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
  846. E1000_TXD_CMD_IFCS |
  847. E1000_TXD_CMD_RPS);
  848. tx_desc->upper.data = 0;
  849. }
  850. /* Setup Rx descriptor ring and Rx buffers */
  851. if(!rxdr->count)
  852. rxdr->count = E1000_DEFAULT_RXD;
  853. size = rxdr->count * sizeof(struct e1000_buffer);
  854. if(!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  855. ret_val = 4;
  856. goto err_nomem;
  857. }
  858. memset(rxdr->buffer_info, 0, size);
  859. rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
  860. if(!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
  861. ret_val = 5;
  862. goto err_nomem;
  863. }
  864. memset(rxdr->desc, 0, rxdr->size);
  865. rxdr->next_to_use = rxdr->next_to_clean = 0;
  866. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  867. E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
  868. E1000_WRITE_REG(&adapter->hw, RDBAL,
  869. ((uint64_t) rxdr->dma & 0xFFFFFFFF));
  870. E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
  871. E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
  872. E1000_WRITE_REG(&adapter->hw, RDH, 0);
  873. E1000_WRITE_REG(&adapter->hw, RDT, 0);
  874. rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
  875. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  876. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  877. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  878. for(i = 0; i < rxdr->count; i++) {
  879. struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
  880. struct sk_buff *skb;
  881. if(!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
  882. GFP_KERNEL))) {
  883. ret_val = 6;
  884. goto err_nomem;
  885. }
  886. skb_reserve(skb, NET_IP_ALIGN);
  887. rxdr->buffer_info[i].skb = skb;
  888. rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
  889. rxdr->buffer_info[i].dma =
  890. pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
  891. PCI_DMA_FROMDEVICE);
  892. rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
  893. memset(skb->data, 0x00, skb->len);
  894. }
  895. return 0;
  896. err_nomem:
  897. e1000_free_desc_rings(adapter);
  898. return ret_val;
  899. }
  900. static void
  901. e1000_phy_disable_receiver(struct e1000_adapter *adapter)
  902. {
  903. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  904. e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
  905. e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
  906. e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
  907. e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
  908. }
  909. static void
  910. e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
  911. {
  912. uint16_t phy_reg;
  913. /* Because we reset the PHY above, we need to re-force TX_CLK in the
  914. * Extended PHY Specific Control Register to 25MHz clock. This
  915. * value defaults back to a 2.5MHz clock when the PHY is reset.
  916. */
  917. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  918. phy_reg |= M88E1000_EPSCR_TX_CLK_25;
  919. e1000_write_phy_reg(&adapter->hw,
  920. M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
  921. /* In addition, because of the s/w reset above, we need to enable
  922. * CRS on TX. This must be set for both full and half duplex
  923. * operation.
  924. */
  925. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  926. phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
  927. e1000_write_phy_reg(&adapter->hw,
  928. M88E1000_PHY_SPEC_CTRL, phy_reg);
  929. }
  930. static int
  931. e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
  932. {
  933. uint32_t ctrl_reg;
  934. uint16_t phy_reg;
  935. /* Setup the Device Control Register for PHY loopback test. */
  936. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  937. ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
  938. E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  939. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  940. E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
  941. E1000_CTRL_FD); /* Force Duplex to FULL */
  942. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  943. /* Read the PHY Specific Control Register (0x10) */
  944. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  945. /* Clear Auto-Crossover bits in PHY Specific Control Register
  946. * (bits 6:5).
  947. */
  948. phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
  949. e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
  950. /* Perform software reset on the PHY */
  951. e1000_phy_reset(&adapter->hw);
  952. /* Have to setup TX_CLK and TX_CRS after software reset */
  953. e1000_phy_reset_clk_and_crs(adapter);
  954. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
  955. /* Wait for reset to complete. */
  956. udelay(500);
  957. /* Have to setup TX_CLK and TX_CRS after software reset */
  958. e1000_phy_reset_clk_and_crs(adapter);
  959. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  960. e1000_phy_disable_receiver(adapter);
  961. /* Set the loopback bit in the PHY control register. */
  962. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  963. phy_reg |= MII_CR_LOOPBACK;
  964. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  965. /* Setup TX_CLK and TX_CRS one more time. */
  966. e1000_phy_reset_clk_and_crs(adapter);
  967. /* Check Phy Configuration */
  968. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  969. if(phy_reg != 0x4100)
  970. return 9;
  971. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  972. if(phy_reg != 0x0070)
  973. return 10;
  974. e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
  975. if(phy_reg != 0x001A)
  976. return 11;
  977. return 0;
  978. }
  979. static int
  980. e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
  981. {
  982. uint32_t ctrl_reg = 0;
  983. uint32_t stat_reg = 0;
  984. adapter->hw.autoneg = FALSE;
  985. if(adapter->hw.phy_type == e1000_phy_m88) {
  986. /* Auto-MDI/MDIX Off */
  987. e1000_write_phy_reg(&adapter->hw,
  988. M88E1000_PHY_SPEC_CTRL, 0x0808);
  989. /* reset to update Auto-MDI/MDIX */
  990. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
  991. /* autoneg off */
  992. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
  993. }
  994. /* force 1000, set loopback */
  995. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
  996. /* Now set up the MAC to the same speed/duplex as the PHY. */
  997. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  998. ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
  999. ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1000. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1001. E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
  1002. E1000_CTRL_FD); /* Force Duplex to FULL */
  1003. if(adapter->hw.media_type == e1000_media_type_copper &&
  1004. adapter->hw.phy_type == e1000_phy_m88) {
  1005. ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
  1006. } else {
  1007. /* Set the ILOS bit on the fiber Nic is half
  1008. * duplex link is detected. */
  1009. stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
  1010. if((stat_reg & E1000_STATUS_FD) == 0)
  1011. ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
  1012. }
  1013. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  1014. /* Disable the receiver on the PHY so when a cable is plugged in, the
  1015. * PHY does not begin to autoneg when a cable is reconnected to the NIC.
  1016. */
  1017. if(adapter->hw.phy_type == e1000_phy_m88)
  1018. e1000_phy_disable_receiver(adapter);
  1019. udelay(500);
  1020. return 0;
  1021. }
  1022. static int
  1023. e1000_set_phy_loopback(struct e1000_adapter *adapter)
  1024. {
  1025. uint16_t phy_reg = 0;
  1026. uint16_t count = 0;
  1027. switch (adapter->hw.mac_type) {
  1028. case e1000_82543:
  1029. if(adapter->hw.media_type == e1000_media_type_copper) {
  1030. /* Attempt to setup Loopback mode on Non-integrated PHY.
  1031. * Some PHY registers get corrupted at random, so
  1032. * attempt this 10 times.
  1033. */
  1034. while(e1000_nonintegrated_phy_loopback(adapter) &&
  1035. count++ < 10);
  1036. if(count < 11)
  1037. return 0;
  1038. }
  1039. break;
  1040. case e1000_82544:
  1041. case e1000_82540:
  1042. case e1000_82545:
  1043. case e1000_82545_rev_3:
  1044. case e1000_82546:
  1045. case e1000_82546_rev_3:
  1046. case e1000_82541:
  1047. case e1000_82541_rev_2:
  1048. case e1000_82547:
  1049. case e1000_82547_rev_2:
  1050. case e1000_82573:
  1051. return e1000_integrated_phy_loopback(adapter);
  1052. break;
  1053. default:
  1054. /* Default PHY loopback work is to read the MII
  1055. * control register and assert bit 14 (loopback mode).
  1056. */
  1057. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1058. phy_reg |= MII_CR_LOOPBACK;
  1059. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1060. return 0;
  1061. break;
  1062. }
  1063. return 8;
  1064. }
  1065. static int
  1066. e1000_setup_loopback_test(struct e1000_adapter *adapter)
  1067. {
  1068. uint32_t rctl;
  1069. if(adapter->hw.media_type == e1000_media_type_fiber ||
  1070. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  1071. if(adapter->hw.mac_type == e1000_82545 ||
  1072. adapter->hw.mac_type == e1000_82546 ||
  1073. adapter->hw.mac_type == e1000_82545_rev_3 ||
  1074. adapter->hw.mac_type == e1000_82546_rev_3)
  1075. return e1000_set_phy_loopback(adapter);
  1076. else {
  1077. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1078. rctl |= E1000_RCTL_LBM_TCVR;
  1079. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1080. return 0;
  1081. }
  1082. } else if(adapter->hw.media_type == e1000_media_type_copper)
  1083. return e1000_set_phy_loopback(adapter);
  1084. return 7;
  1085. }
  1086. static void
  1087. e1000_loopback_cleanup(struct e1000_adapter *adapter)
  1088. {
  1089. uint32_t rctl;
  1090. uint16_t phy_reg;
  1091. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1092. rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
  1093. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1094. if(adapter->hw.media_type == e1000_media_type_copper ||
  1095. ((adapter->hw.media_type == e1000_media_type_fiber ||
  1096. adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1097. (adapter->hw.mac_type == e1000_82545 ||
  1098. adapter->hw.mac_type == e1000_82546 ||
  1099. adapter->hw.mac_type == e1000_82545_rev_3 ||
  1100. adapter->hw.mac_type == e1000_82546_rev_3))) {
  1101. adapter->hw.autoneg = TRUE;
  1102. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1103. if(phy_reg & MII_CR_LOOPBACK) {
  1104. phy_reg &= ~MII_CR_LOOPBACK;
  1105. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1106. e1000_phy_reset(&adapter->hw);
  1107. }
  1108. }
  1109. }
  1110. static void
  1111. e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1112. {
  1113. memset(skb->data, 0xFF, frame_size);
  1114. frame_size = (frame_size % 2) ? (frame_size - 1) : frame_size;
  1115. memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
  1116. memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
  1117. memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
  1118. }
  1119. static int
  1120. e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1121. {
  1122. frame_size = (frame_size % 2) ? (frame_size - 1) : frame_size;
  1123. if(*(skb->data + 3) == 0xFF) {
  1124. if((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
  1125. (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
  1126. return 0;
  1127. }
  1128. }
  1129. return 13;
  1130. }
  1131. static int
  1132. e1000_run_loopback_test(struct e1000_adapter *adapter)
  1133. {
  1134. struct e1000_desc_ring *txdr = &adapter->test_tx_ring;
  1135. struct e1000_desc_ring *rxdr = &adapter->test_rx_ring;
  1136. struct pci_dev *pdev = adapter->pdev;
  1137. int i, j, k, l, lc, good_cnt, ret_val=0;
  1138. unsigned long time;
  1139. E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
  1140. /* Calculate the loop count based on the largest descriptor ring
  1141. * The idea is to wrap the largest ring a number of times using 64
  1142. * send/receive pairs during each loop
  1143. */
  1144. if(rxdr->count <= txdr->count)
  1145. lc = ((txdr->count / 64) * 2) + 1;
  1146. else
  1147. lc = ((rxdr->count / 64) * 2) + 1;
  1148. k = l = 0;
  1149. for(j = 0; j <= lc; j++) { /* loop count loop */
  1150. for(i = 0; i < 64; i++) { /* send the packets */
  1151. e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
  1152. 1024);
  1153. pci_dma_sync_single_for_device(pdev,
  1154. txdr->buffer_info[k].dma,
  1155. txdr->buffer_info[k].length,
  1156. PCI_DMA_TODEVICE);
  1157. if(unlikely(++k == txdr->count)) k = 0;
  1158. }
  1159. E1000_WRITE_REG(&adapter->hw, TDT, k);
  1160. msec_delay(200);
  1161. time = jiffies; /* set the start time for the receive */
  1162. good_cnt = 0;
  1163. do { /* receive the sent packets */
  1164. pci_dma_sync_single_for_cpu(pdev,
  1165. rxdr->buffer_info[l].dma,
  1166. rxdr->buffer_info[l].length,
  1167. PCI_DMA_FROMDEVICE);
  1168. ret_val = e1000_check_lbtest_frame(
  1169. rxdr->buffer_info[l].skb,
  1170. 1024);
  1171. if(!ret_val)
  1172. good_cnt++;
  1173. if(unlikely(++l == rxdr->count)) l = 0;
  1174. /* time + 20 msecs (200 msecs on 2.4) is more than
  1175. * enough time to complete the receives, if it's
  1176. * exceeded, break and error off
  1177. */
  1178. } while (good_cnt < 64 && jiffies < (time + 20));
  1179. if(good_cnt != 64) {
  1180. ret_val = 13; /* ret_val is the same as mis-compare */
  1181. break;
  1182. }
  1183. if(jiffies >= (time + 2)) {
  1184. ret_val = 14; /* error code for time out error */
  1185. break;
  1186. }
  1187. } /* end loop count loop */
  1188. return ret_val;
  1189. }
  1190. static int
  1191. e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
  1192. {
  1193. if((*data = e1000_setup_desc_rings(adapter))) goto err_loopback;
  1194. if((*data = e1000_setup_loopback_test(adapter))) goto err_loopback;
  1195. *data = e1000_run_loopback_test(adapter);
  1196. e1000_loopback_cleanup(adapter);
  1197. e1000_free_desc_rings(adapter);
  1198. err_loopback:
  1199. return *data;
  1200. }
  1201. static int
  1202. e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
  1203. {
  1204. *data = 0;
  1205. if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
  1206. int i = 0;
  1207. adapter->hw.serdes_link_down = TRUE;
  1208. /* On some blade server designs, link establishment
  1209. * could take as long as 2-3 minutes */
  1210. do {
  1211. e1000_check_for_link(&adapter->hw);
  1212. if (adapter->hw.serdes_link_down == FALSE)
  1213. return *data;
  1214. msec_delay(20);
  1215. } while (i++ < 3750);
  1216. *data = 1;
  1217. } else {
  1218. e1000_check_for_link(&adapter->hw);
  1219. if(adapter->hw.autoneg) /* if auto_neg is set wait for it */
  1220. msec_delay(4000);
  1221. if(!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
  1222. *data = 1;
  1223. }
  1224. }
  1225. return *data;
  1226. }
  1227. static int
  1228. e1000_diag_test_count(struct net_device *netdev)
  1229. {
  1230. return E1000_TEST_LEN;
  1231. }
  1232. static void
  1233. e1000_diag_test(struct net_device *netdev,
  1234. struct ethtool_test *eth_test, uint64_t *data)
  1235. {
  1236. struct e1000_adapter *adapter = netdev_priv(netdev);
  1237. boolean_t if_running = netif_running(netdev);
  1238. if(eth_test->flags == ETH_TEST_FL_OFFLINE) {
  1239. /* Offline tests */
  1240. /* save speed, duplex, autoneg settings */
  1241. uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
  1242. uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
  1243. uint8_t autoneg = adapter->hw.autoneg;
  1244. /* Link test performed before hardware reset so autoneg doesn't
  1245. * interfere with test result */
  1246. if(e1000_link_test(adapter, &data[4]))
  1247. eth_test->flags |= ETH_TEST_FL_FAILED;
  1248. if(if_running)
  1249. e1000_down(adapter);
  1250. else
  1251. e1000_reset(adapter);
  1252. if(e1000_reg_test(adapter, &data[0]))
  1253. eth_test->flags |= ETH_TEST_FL_FAILED;
  1254. e1000_reset(adapter);
  1255. if(e1000_eeprom_test(adapter, &data[1]))
  1256. eth_test->flags |= ETH_TEST_FL_FAILED;
  1257. e1000_reset(adapter);
  1258. if(e1000_intr_test(adapter, &data[2]))
  1259. eth_test->flags |= ETH_TEST_FL_FAILED;
  1260. e1000_reset(adapter);
  1261. if(e1000_loopback_test(adapter, &data[3]))
  1262. eth_test->flags |= ETH_TEST_FL_FAILED;
  1263. /* restore speed, duplex, autoneg settings */
  1264. adapter->hw.autoneg_advertised = autoneg_advertised;
  1265. adapter->hw.forced_speed_duplex = forced_speed_duplex;
  1266. adapter->hw.autoneg = autoneg;
  1267. e1000_reset(adapter);
  1268. if(if_running)
  1269. e1000_up(adapter);
  1270. } else {
  1271. /* Online tests */
  1272. if(e1000_link_test(adapter, &data[4]))
  1273. eth_test->flags |= ETH_TEST_FL_FAILED;
  1274. /* Offline tests aren't run; pass by default */
  1275. data[0] = 0;
  1276. data[1] = 0;
  1277. data[2] = 0;
  1278. data[3] = 0;
  1279. }
  1280. }
  1281. static void
  1282. e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1283. {
  1284. struct e1000_adapter *adapter = netdev_priv(netdev);
  1285. struct e1000_hw *hw = &adapter->hw;
  1286. switch(adapter->hw.device_id) {
  1287. case E1000_DEV_ID_82542:
  1288. case E1000_DEV_ID_82543GC_FIBER:
  1289. case E1000_DEV_ID_82543GC_COPPER:
  1290. case E1000_DEV_ID_82544EI_FIBER:
  1291. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1292. case E1000_DEV_ID_82545EM_FIBER:
  1293. case E1000_DEV_ID_82545EM_COPPER:
  1294. wol->supported = 0;
  1295. wol->wolopts = 0;
  1296. return;
  1297. case E1000_DEV_ID_82546EB_FIBER:
  1298. case E1000_DEV_ID_82546GB_FIBER:
  1299. /* Wake events only supported on port A for dual fiber */
  1300. if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
  1301. wol->supported = 0;
  1302. wol->wolopts = 0;
  1303. return;
  1304. }
  1305. /* Fall Through */
  1306. default:
  1307. wol->supported = WAKE_UCAST | WAKE_MCAST |
  1308. WAKE_BCAST | WAKE_MAGIC;
  1309. wol->wolopts = 0;
  1310. if(adapter->wol & E1000_WUFC_EX)
  1311. wol->wolopts |= WAKE_UCAST;
  1312. if(adapter->wol & E1000_WUFC_MC)
  1313. wol->wolopts |= WAKE_MCAST;
  1314. if(adapter->wol & E1000_WUFC_BC)
  1315. wol->wolopts |= WAKE_BCAST;
  1316. if(adapter->wol & E1000_WUFC_MAG)
  1317. wol->wolopts |= WAKE_MAGIC;
  1318. return;
  1319. }
  1320. }
  1321. static int
  1322. e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1323. {
  1324. struct e1000_adapter *adapter = netdev_priv(netdev);
  1325. struct e1000_hw *hw = &adapter->hw;
  1326. switch(adapter->hw.device_id) {
  1327. case E1000_DEV_ID_82542:
  1328. case E1000_DEV_ID_82543GC_FIBER:
  1329. case E1000_DEV_ID_82543GC_COPPER:
  1330. case E1000_DEV_ID_82544EI_FIBER:
  1331. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1332. case E1000_DEV_ID_82545EM_FIBER:
  1333. case E1000_DEV_ID_82545EM_COPPER:
  1334. return wol->wolopts ? -EOPNOTSUPP : 0;
  1335. case E1000_DEV_ID_82546EB_FIBER:
  1336. case E1000_DEV_ID_82546GB_FIBER:
  1337. /* Wake events only supported on port A for dual fiber */
  1338. if(E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
  1339. return wol->wolopts ? -EOPNOTSUPP : 0;
  1340. /* Fall Through */
  1341. default:
  1342. if(wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
  1343. return -EOPNOTSUPP;
  1344. adapter->wol = 0;
  1345. if(wol->wolopts & WAKE_UCAST)
  1346. adapter->wol |= E1000_WUFC_EX;
  1347. if(wol->wolopts & WAKE_MCAST)
  1348. adapter->wol |= E1000_WUFC_MC;
  1349. if(wol->wolopts & WAKE_BCAST)
  1350. adapter->wol |= E1000_WUFC_BC;
  1351. if(wol->wolopts & WAKE_MAGIC)
  1352. adapter->wol |= E1000_WUFC_MAG;
  1353. }
  1354. return 0;
  1355. }
  1356. /* toggle LED 4 times per second = 2 "blinks" per second */
  1357. #define E1000_ID_INTERVAL (HZ/4)
  1358. /* bit defines for adapter->led_status */
  1359. #define E1000_LED_ON 0
  1360. static void
  1361. e1000_led_blink_callback(unsigned long data)
  1362. {
  1363. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1364. if(test_and_change_bit(E1000_LED_ON, &adapter->led_status))
  1365. e1000_led_off(&adapter->hw);
  1366. else
  1367. e1000_led_on(&adapter->hw);
  1368. mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
  1369. }
  1370. static int
  1371. e1000_phys_id(struct net_device *netdev, uint32_t data)
  1372. {
  1373. struct e1000_adapter *adapter = netdev_priv(netdev);
  1374. if(!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
  1375. data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
  1376. if(adapter->hw.mac_type < e1000_82573) {
  1377. if(!adapter->blink_timer.function) {
  1378. init_timer(&adapter->blink_timer);
  1379. adapter->blink_timer.function = e1000_led_blink_callback;
  1380. adapter->blink_timer.data = (unsigned long) adapter;
  1381. }
  1382. e1000_setup_led(&adapter->hw);
  1383. mod_timer(&adapter->blink_timer, jiffies);
  1384. msleep_interruptible(data * 1000);
  1385. del_timer_sync(&adapter->blink_timer);
  1386. }
  1387. else {
  1388. E1000_WRITE_REG(&adapter->hw, LEDCTL, (E1000_LEDCTL_LED2_BLINK_RATE |
  1389. E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK |
  1390. (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
  1391. (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) |
  1392. (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT)));
  1393. msleep_interruptible(data * 1000);
  1394. }
  1395. e1000_led_off(&adapter->hw);
  1396. clear_bit(E1000_LED_ON, &adapter->led_status);
  1397. e1000_cleanup_led(&adapter->hw);
  1398. return 0;
  1399. }
  1400. static int
  1401. e1000_nway_reset(struct net_device *netdev)
  1402. {
  1403. struct e1000_adapter *adapter = netdev_priv(netdev);
  1404. if(netif_running(netdev)) {
  1405. e1000_down(adapter);
  1406. e1000_up(adapter);
  1407. }
  1408. return 0;
  1409. }
  1410. static int
  1411. e1000_get_stats_count(struct net_device *netdev)
  1412. {
  1413. return E1000_STATS_LEN;
  1414. }
  1415. static void
  1416. e1000_get_ethtool_stats(struct net_device *netdev,
  1417. struct ethtool_stats *stats, uint64_t *data)
  1418. {
  1419. struct e1000_adapter *adapter = netdev_priv(netdev);
  1420. int i;
  1421. e1000_update_stats(adapter);
  1422. for(i = 0; i < E1000_STATS_LEN; i++) {
  1423. char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
  1424. data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
  1425. sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
  1426. }
  1427. }
  1428. static void
  1429. e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
  1430. {
  1431. int i;
  1432. switch(stringset) {
  1433. case ETH_SS_TEST:
  1434. memcpy(data, *e1000_gstrings_test,
  1435. E1000_TEST_LEN*ETH_GSTRING_LEN);
  1436. break;
  1437. case ETH_SS_STATS:
  1438. for (i=0; i < E1000_STATS_LEN; i++) {
  1439. memcpy(data + i * ETH_GSTRING_LEN,
  1440. e1000_gstrings_stats[i].stat_string,
  1441. ETH_GSTRING_LEN);
  1442. }
  1443. break;
  1444. }
  1445. }
  1446. struct ethtool_ops e1000_ethtool_ops = {
  1447. .get_settings = e1000_get_settings,
  1448. .set_settings = e1000_set_settings,
  1449. .get_drvinfo = e1000_get_drvinfo,
  1450. .get_regs_len = e1000_get_regs_len,
  1451. .get_regs = e1000_get_regs,
  1452. .get_wol = e1000_get_wol,
  1453. .set_wol = e1000_set_wol,
  1454. .get_msglevel = e1000_get_msglevel,
  1455. .set_msglevel = e1000_set_msglevel,
  1456. .nway_reset = e1000_nway_reset,
  1457. .get_link = ethtool_op_get_link,
  1458. .get_eeprom_len = e1000_get_eeprom_len,
  1459. .get_eeprom = e1000_get_eeprom,
  1460. .set_eeprom = e1000_set_eeprom,
  1461. .get_ringparam = e1000_get_ringparam,
  1462. .set_ringparam = e1000_set_ringparam,
  1463. .get_pauseparam = e1000_get_pauseparam,
  1464. .set_pauseparam = e1000_set_pauseparam,
  1465. .get_rx_csum = e1000_get_rx_csum,
  1466. .set_rx_csum = e1000_set_rx_csum,
  1467. .get_tx_csum = e1000_get_tx_csum,
  1468. .set_tx_csum = e1000_set_tx_csum,
  1469. .get_sg = ethtool_op_get_sg,
  1470. .set_sg = ethtool_op_set_sg,
  1471. #ifdef NETIF_F_TSO
  1472. .get_tso = ethtool_op_get_tso,
  1473. .set_tso = e1000_set_tso,
  1474. #endif
  1475. .self_test_count = e1000_diag_test_count,
  1476. .self_test = e1000_diag_test,
  1477. .get_strings = e1000_get_strings,
  1478. .phys_id = e1000_phys_id,
  1479. .get_stats_count = e1000_get_stats_count,
  1480. .get_ethtool_stats = e1000_get_ethtool_stats,
  1481. };
  1482. void e1000_set_ethtool_ops(struct net_device *netdev)
  1483. {
  1484. SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
  1485. }