pmc551.c 29 KB

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  1. /*
  2. * $Id: pmc551.c,v 1.30 2005/01/05 18:05:13 dwmw2 Exp $
  3. *
  4. * PMC551 PCI Mezzanine Ram Device
  5. *
  6. * Author:
  7. * Mark Ferrell <mferrell@mvista.com>
  8. * Copyright 1999,2000 Nortel Networks
  9. *
  10. * License:
  11. * As part of this driver was derived from the slram.c driver it
  12. * falls under the same license, which is GNU General Public
  13. * License v2
  14. *
  15. * Description:
  16. * This driver is intended to support the PMC551 PCI Ram device
  17. * from Ramix Inc. The PMC551 is a PMC Mezzanine module for
  18. * cPCI embedded systems. The device contains a single SROM
  19. * that initially programs the V370PDC chipset onboard the
  20. * device, and various banks of DRAM/SDRAM onboard. This driver
  21. * implements this PCI Ram device as an MTD (Memory Technology
  22. * Device) so that it can be used to hold a file system, or for
  23. * added swap space in embedded systems. Since the memory on
  24. * this board isn't as fast as main memory we do not try to hook
  25. * it into main memory as that would simply reduce performance
  26. * on the system. Using it as a block device allows us to use
  27. * it as high speed swap or for a high speed disk device of some
  28. * sort. Which becomes very useful on diskless systems in the
  29. * embedded market I might add.
  30. *
  31. * Notes:
  32. * Due to what I assume is more buggy SROM, the 64M PMC551 I
  33. * have available claims that all 4 of it's DRAM banks have 64M
  34. * of ram configured (making a grand total of 256M onboard).
  35. * This is slightly annoying since the BAR0 size reflects the
  36. * aperture size, not the dram size, and the V370PDC supplies no
  37. * other method for memory size discovery. This problem is
  38. * mostly only relevant when compiled as a module, as the
  39. * unloading of the module with an aperture size smaller then
  40. * the ram will cause the driver to detect the onboard memory
  41. * size to be equal to the aperture size when the module is
  42. * reloaded. Soooo, to help, the module supports an msize
  43. * option to allow the specification of the onboard memory, and
  44. * an asize option, to allow the specification of the aperture
  45. * size. The aperture must be equal to or less then the memory
  46. * size, the driver will correct this if you screw it up. This
  47. * problem is not relevant for compiled in drivers as compiled
  48. * in drivers only init once.
  49. *
  50. * Credits:
  51. * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
  52. * initial example code of how to initialize this device and for
  53. * help with questions I had concerning operation of the device.
  54. *
  55. * Most of the MTD code for this driver was originally written
  56. * for the slram.o module in the MTD drivers package which
  57. * allows the mapping of system memory into an MTD device.
  58. * Since the PMC551 memory module is accessed in the same
  59. * fashion as system memory, the slram.c code became a very nice
  60. * fit to the needs of this driver. All we added was PCI
  61. * detection/initialization to the driver and automatically figure
  62. * out the size via the PCI detection.o, later changes by Corey
  63. * Minyard set up the card to utilize a 1M sliding apature.
  64. *
  65. * Corey Minyard <minyard@nortelnetworks.com>
  66. * * Modified driver to utilize a sliding aperture instead of
  67. * mapping all memory into kernel space which turned out to
  68. * be very wasteful.
  69. * * Located a bug in the SROM's initialization sequence that
  70. * made the memory unusable, added a fix to code to touch up
  71. * the DRAM some.
  72. *
  73. * Bugs/FIXME's:
  74. * * MUST fix the init function to not spin on a register
  75. * waiting for it to set .. this does not safely handle busted
  76. * devices that never reset the register correctly which will
  77. * cause the system to hang w/ a reboot being the only chance at
  78. * recover. [sort of fixed, could be better]
  79. * * Add I2C handling of the SROM so we can read the SROM's information
  80. * about the aperture size. This should always accurately reflect the
  81. * onboard memory size.
  82. * * Comb the init routine. It's still a bit cludgy on a few things.
  83. */
  84. #include <linux/version.h>
  85. #include <linux/config.h>
  86. #include <linux/kernel.h>
  87. #include <linux/module.h>
  88. #include <asm/uaccess.h>
  89. #include <linux/types.h>
  90. #include <linux/sched.h>
  91. #include <linux/init.h>
  92. #include <linux/ptrace.h>
  93. #include <linux/slab.h>
  94. #include <linux/string.h>
  95. #include <linux/timer.h>
  96. #include <linux/major.h>
  97. #include <linux/fs.h>
  98. #include <linux/ioctl.h>
  99. #include <asm/io.h>
  100. #include <asm/system.h>
  101. #include <linux/pci.h>
  102. #ifndef CONFIG_PCI
  103. #error Enable PCI in your kernel config
  104. #endif
  105. #include <linux/mtd/mtd.h>
  106. #include <linux/mtd/pmc551.h>
  107. #include <linux/mtd/compatmac.h>
  108. static struct mtd_info *pmc551list;
  109. static int pmc551_erase (struct mtd_info *mtd, struct erase_info *instr)
  110. {
  111. struct mypriv *priv = mtd->priv;
  112. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  113. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  114. unsigned long end;
  115. u_char *ptr;
  116. size_t retlen;
  117. #ifdef CONFIG_MTD_PMC551_DEBUG
  118. printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr, (long)instr->len);
  119. #endif
  120. end = instr->addr + instr->len - 1;
  121. /* Is it past the end? */
  122. if ( end > mtd->size ) {
  123. #ifdef CONFIG_MTD_PMC551_DEBUG
  124. printk(KERN_DEBUG "pmc551_erase() out of bounds (%ld > %ld)\n", (long)end, (long)mtd->size);
  125. #endif
  126. return -EINVAL;
  127. }
  128. eoff_hi = end & ~(priv->asize - 1);
  129. soff_hi = instr->addr & ~(priv->asize - 1);
  130. eoff_lo = end & (priv->asize - 1);
  131. soff_lo = instr->addr & (priv->asize - 1);
  132. pmc551_point (mtd, instr->addr, instr->len, &retlen, &ptr);
  133. if ( soff_hi == eoff_hi || mtd->size == priv->asize) {
  134. /* The whole thing fits within one access, so just one shot
  135. will do it. */
  136. memset(ptr, 0xff, instr->len);
  137. } else {
  138. /* We have to do multiple writes to get all the data
  139. written. */
  140. while (soff_hi != eoff_hi) {
  141. #ifdef CONFIG_MTD_PMC551_DEBUG
  142. printk( KERN_DEBUG "pmc551_erase() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  143. #endif
  144. memset(ptr, 0xff, priv->asize);
  145. if (soff_hi + priv->asize >= mtd->size) {
  146. goto out;
  147. }
  148. soff_hi += priv->asize;
  149. pmc551_point (mtd,(priv->base_map0|soff_hi),
  150. priv->asize, &retlen, &ptr);
  151. }
  152. memset (ptr, 0xff, eoff_lo);
  153. }
  154. out:
  155. instr->state = MTD_ERASE_DONE;
  156. #ifdef CONFIG_MTD_PMC551_DEBUG
  157. printk(KERN_DEBUG "pmc551_erase() done\n");
  158. #endif
  159. mtd_erase_callback(instr);
  160. return 0;
  161. }
  162. static int pmc551_point (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char **mtdbuf)
  163. {
  164. struct mypriv *priv = mtd->priv;
  165. u32 soff_hi;
  166. u32 soff_lo;
  167. #ifdef CONFIG_MTD_PMC551_DEBUG
  168. printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
  169. #endif
  170. if (from + len > mtd->size) {
  171. #ifdef CONFIG_MTD_PMC551_DEBUG
  172. printk(KERN_DEBUG "pmc551_point() out of bounds (%ld > %ld)\n", (long)from+len, (long)mtd->size);
  173. #endif
  174. return -EINVAL;
  175. }
  176. soff_hi = from & ~(priv->asize - 1);
  177. soff_lo = from & (priv->asize - 1);
  178. /* Cheap hack optimization */
  179. if( priv->curr_map0 != from ) {
  180. pci_write_config_dword ( priv->dev, PMC551_PCI_MEM_MAP0,
  181. (priv->base_map0 | soff_hi) );
  182. priv->curr_map0 = soff_hi;
  183. }
  184. *mtdbuf = priv->start + soff_lo;
  185. *retlen = len;
  186. return 0;
  187. }
  188. static void pmc551_unpoint (struct mtd_info *mtd, u_char *addr, loff_t from, size_t len)
  189. {
  190. #ifdef CONFIG_MTD_PMC551_DEBUG
  191. printk(KERN_DEBUG "pmc551_unpoint()\n");
  192. #endif
  193. }
  194. static int pmc551_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
  195. {
  196. struct mypriv *priv = mtd->priv;
  197. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  198. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  199. unsigned long end;
  200. u_char *ptr;
  201. u_char *copyto = buf;
  202. #ifdef CONFIG_MTD_PMC551_DEBUG
  203. printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n", (long)from, (long)len, (long)priv->asize);
  204. #endif
  205. end = from + len - 1;
  206. /* Is it past the end? */
  207. if (end > mtd->size) {
  208. #ifdef CONFIG_MTD_PMC551_DEBUG
  209. printk(KERN_DEBUG "pmc551_read() out of bounds (%ld > %ld)\n", (long) end, (long)mtd->size);
  210. #endif
  211. return -EINVAL;
  212. }
  213. soff_hi = from & ~(priv->asize - 1);
  214. eoff_hi = end & ~(priv->asize - 1);
  215. soff_lo = from & (priv->asize - 1);
  216. eoff_lo = end & (priv->asize - 1);
  217. pmc551_point (mtd, from, len, retlen, &ptr);
  218. if (soff_hi == eoff_hi) {
  219. /* The whole thing fits within one access, so just one shot
  220. will do it. */
  221. memcpy(copyto, ptr, len);
  222. copyto += len;
  223. } else {
  224. /* We have to do multiple writes to get all the data
  225. written. */
  226. while (soff_hi != eoff_hi) {
  227. #ifdef CONFIG_MTD_PMC551_DEBUG
  228. printk( KERN_DEBUG "pmc551_read() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  229. #endif
  230. memcpy(copyto, ptr, priv->asize);
  231. copyto += priv->asize;
  232. if (soff_hi + priv->asize >= mtd->size) {
  233. goto out;
  234. }
  235. soff_hi += priv->asize;
  236. pmc551_point (mtd, soff_hi, priv->asize, retlen, &ptr);
  237. }
  238. memcpy(copyto, ptr, eoff_lo);
  239. copyto += eoff_lo;
  240. }
  241. out:
  242. #ifdef CONFIG_MTD_PMC551_DEBUG
  243. printk(KERN_DEBUG "pmc551_read() done\n");
  244. #endif
  245. *retlen = copyto - buf;
  246. return 0;
  247. }
  248. static int pmc551_write (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
  249. {
  250. struct mypriv *priv = mtd->priv;
  251. u32 soff_hi, soff_lo; /* start address offset hi/lo */
  252. u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
  253. unsigned long end;
  254. u_char *ptr;
  255. const u_char *copyfrom = buf;
  256. #ifdef CONFIG_MTD_PMC551_DEBUG
  257. printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n", (long)to, (long)len, (long)priv->asize);
  258. #endif
  259. end = to + len - 1;
  260. /* Is it past the end? or did the u32 wrap? */
  261. if (end > mtd->size ) {
  262. #ifdef CONFIG_MTD_PMC551_DEBUG
  263. printk(KERN_DEBUG "pmc551_write() out of bounds (end: %ld, size: %ld, to: %ld)\n", (long) end, (long)mtd->size, (long)to);
  264. #endif
  265. return -EINVAL;
  266. }
  267. soff_hi = to & ~(priv->asize - 1);
  268. eoff_hi = end & ~(priv->asize - 1);
  269. soff_lo = to & (priv->asize - 1);
  270. eoff_lo = end & (priv->asize - 1);
  271. pmc551_point (mtd, to, len, retlen, &ptr);
  272. if (soff_hi == eoff_hi) {
  273. /* The whole thing fits within one access, so just one shot
  274. will do it. */
  275. memcpy(ptr, copyfrom, len);
  276. copyfrom += len;
  277. } else {
  278. /* We have to do multiple writes to get all the data
  279. written. */
  280. while (soff_hi != eoff_hi) {
  281. #ifdef CONFIG_MTD_PMC551_DEBUG
  282. printk( KERN_DEBUG "pmc551_write() soff_hi: %ld, eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
  283. #endif
  284. memcpy(ptr, copyfrom, priv->asize);
  285. copyfrom += priv->asize;
  286. if (soff_hi >= mtd->size) {
  287. goto out;
  288. }
  289. soff_hi += priv->asize;
  290. pmc551_point (mtd, soff_hi, priv->asize, retlen, &ptr);
  291. }
  292. memcpy(ptr, copyfrom, eoff_lo);
  293. copyfrom += eoff_lo;
  294. }
  295. out:
  296. #ifdef CONFIG_MTD_PMC551_DEBUG
  297. printk(KERN_DEBUG "pmc551_write() done\n");
  298. #endif
  299. *retlen = copyfrom - buf;
  300. return 0;
  301. }
  302. /*
  303. * Fixup routines for the V370PDC
  304. * PCI device ID 0x020011b0
  305. *
  306. * This function basicly kick starts the DRAM oboard the card and gets it
  307. * ready to be used. Before this is done the device reads VERY erratic, so
  308. * much that it can crash the Linux 2.2.x series kernels when a user cat's
  309. * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
  310. * register. FIXME: stop spinning on registers .. must implement a timeout
  311. * mechanism
  312. * returns the size of the memory region found.
  313. */
  314. static u32 fixup_pmc551 (struct pci_dev *dev)
  315. {
  316. #ifdef CONFIG_MTD_PMC551_BUGFIX
  317. u32 dram_data;
  318. #endif
  319. u32 size, dcmd, cfg, dtmp;
  320. u16 cmd, tmp, i;
  321. u8 bcmd, counter;
  322. /* Sanity Check */
  323. if(!dev) {
  324. return -ENODEV;
  325. }
  326. /*
  327. * Attempt to reset the card
  328. * FIXME: Stop Spinning registers
  329. */
  330. counter=0;
  331. /* unlock registers */
  332. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5 );
  333. /* read in old data */
  334. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd );
  335. /* bang the reset line up and down for a few */
  336. for(i=0;i<10;i++) {
  337. counter=0;
  338. bcmd &= ~0x80;
  339. while(counter++ < 100) {
  340. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  341. }
  342. counter=0;
  343. bcmd |= 0x80;
  344. while(counter++ < 100) {
  345. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  346. }
  347. }
  348. bcmd |= (0x40|0x20);
  349. pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
  350. /*
  351. * Take care and turn off the memory on the device while we
  352. * tweak the configurations
  353. */
  354. pci_read_config_word(dev, PCI_COMMAND, &cmd);
  355. tmp = cmd & ~(PCI_COMMAND_IO|PCI_COMMAND_MEMORY);
  356. pci_write_config_word(dev, PCI_COMMAND, tmp);
  357. /*
  358. * Disable existing aperture before probing memory size
  359. */
  360. pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd);
  361. dtmp=(dcmd|PMC551_PCI_MEM_MAP_ENABLE|PMC551_PCI_MEM_MAP_REG_EN);
  362. pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp);
  363. /*
  364. * Grab old BAR0 config so that we can figure out memory size
  365. * This is another bit of kludge going on. The reason for the
  366. * redundancy is I am hoping to retain the original configuration
  367. * previously assigned to the card by the BIOS or some previous
  368. * fixup routine in the kernel. So we read the old config into cfg,
  369. * then write all 1's to the memory space, read back the result into
  370. * "size", and then write back all the old config.
  371. */
  372. pci_read_config_dword( dev, PCI_BASE_ADDRESS_0, &cfg );
  373. #ifndef CONFIG_MTD_PMC551_BUGFIX
  374. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, ~0 );
  375. pci_read_config_dword( dev, PCI_BASE_ADDRESS_0, &size );
  376. size = (size&PCI_BASE_ADDRESS_MEM_MASK);
  377. size &= ~(size-1);
  378. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
  379. #else
  380. /*
  381. * Get the size of the memory by reading all the DRAM size values
  382. * and adding them up.
  383. *
  384. * KLUDGE ALERT: the boards we are using have invalid column and
  385. * row mux values. We fix them here, but this will break other
  386. * memory configurations.
  387. */
  388. pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data);
  389. size = PMC551_DRAM_BLK_GET_SIZE(dram_data);
  390. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  391. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  392. pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data);
  393. pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data);
  394. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  395. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  396. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  397. pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data);
  398. pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data);
  399. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  400. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  401. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  402. pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data);
  403. pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data);
  404. size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
  405. dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
  406. dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
  407. pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data);
  408. /*
  409. * Oops .. something went wrong
  410. */
  411. if( (size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) {
  412. return -ENODEV;
  413. }
  414. #endif /* CONFIG_MTD_PMC551_BUGFIX */
  415. if ((cfg&PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
  416. return -ENODEV;
  417. }
  418. /*
  419. * Precharge Dram
  420. */
  421. pci_write_config_word( dev, PMC551_SDRAM_MA, 0x0400 );
  422. pci_write_config_word( dev, PMC551_SDRAM_CMD, 0x00bf );
  423. /*
  424. * Wait until command has gone through
  425. * FIXME: register spinning issue
  426. */
  427. do { pci_read_config_word( dev, PMC551_SDRAM_CMD, &cmd );
  428. if(counter++ > 100)break;
  429. } while ( (PCI_COMMAND_IO) & cmd );
  430. /*
  431. * Turn on auto refresh
  432. * The loop is taken directly from Ramix's example code. I assume that
  433. * this must be held high for some duration of time, but I can find no
  434. * documentation refrencing the reasons why.
  435. */
  436. for ( i = 1; i<=8 ; i++) {
  437. pci_write_config_word (dev, PMC551_SDRAM_CMD, 0x0df);
  438. /*
  439. * Make certain command has gone through
  440. * FIXME: register spinning issue
  441. */
  442. counter=0;
  443. do { pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
  444. if(counter++ > 100)break;
  445. } while ( (PCI_COMMAND_IO) & cmd );
  446. }
  447. pci_write_config_word ( dev, PMC551_SDRAM_MA, 0x0020);
  448. pci_write_config_word ( dev, PMC551_SDRAM_CMD, 0x0ff);
  449. /*
  450. * Wait until command completes
  451. * FIXME: register spinning issue
  452. */
  453. counter=0;
  454. do { pci_read_config_word ( dev, PMC551_SDRAM_CMD, &cmd);
  455. if(counter++ > 100)break;
  456. } while ( (PCI_COMMAND_IO) & cmd );
  457. pci_read_config_dword ( dev, PMC551_DRAM_CFG, &dcmd);
  458. dcmd |= 0x02000000;
  459. pci_write_config_dword ( dev, PMC551_DRAM_CFG, dcmd);
  460. /*
  461. * Check to make certain fast back-to-back, if not
  462. * then set it so
  463. */
  464. pci_read_config_word( dev, PCI_STATUS, &cmd);
  465. if((cmd&PCI_COMMAND_FAST_BACK) == 0) {
  466. cmd |= PCI_COMMAND_FAST_BACK;
  467. pci_write_config_word( dev, PCI_STATUS, cmd);
  468. }
  469. /*
  470. * Check to make certain the DEVSEL is set correctly, this device
  471. * has a tendancy to assert DEVSEL and TRDY when a write is performed
  472. * to the memory when memory is read-only
  473. */
  474. if((cmd&PCI_STATUS_DEVSEL_MASK) != 0x0) {
  475. cmd &= ~PCI_STATUS_DEVSEL_MASK;
  476. pci_write_config_word( dev, PCI_STATUS, cmd );
  477. }
  478. /*
  479. * Set to be prefetchable and put everything back based on old cfg.
  480. * it's possible that the reset of the V370PDC nuked the original
  481. * setup
  482. */
  483. /*
  484. cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
  485. pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
  486. */
  487. /*
  488. * Turn PCI memory and I/O bus access back on
  489. */
  490. pci_write_config_word( dev, PCI_COMMAND,
  491. PCI_COMMAND_MEMORY | PCI_COMMAND_IO );
  492. #ifdef CONFIG_MTD_PMC551_DEBUG
  493. /*
  494. * Some screen fun
  495. */
  496. printk(KERN_DEBUG "pmc551: %d%c (0x%x) of %sprefetchable memory at 0x%lx\n",
  497. (size<1024)?size:(size<1048576)?size>>10:size>>20,
  498. (size<1024)?'B':(size<1048576)?'K':'M',
  499. size, ((dcmd&(0x1<<3)) == 0)?"non-":"",
  500. (dev->resource[0].start)&PCI_BASE_ADDRESS_MEM_MASK );
  501. /*
  502. * Check to see the state of the memory
  503. */
  504. pci_read_config_dword( dev, PMC551_DRAM_BLK0, &dcmd );
  505. printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n"
  506. "pmc551: DRAM_BLK0 Size: %d at %d\n"
  507. "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
  508. (((0x1<<1)&dcmd) == 0)?"RW":"RO",
  509. (((0x1<<0)&dcmd) == 0)?"Off":"On",
  510. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  511. ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
  512. pci_read_config_dword( dev, PMC551_DRAM_BLK1, &dcmd );
  513. printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n"
  514. "pmc551: DRAM_BLK1 Size: %d at %d\n"
  515. "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
  516. (((0x1<<1)&dcmd) == 0)?"RW":"RO",
  517. (((0x1<<0)&dcmd) == 0)?"Off":"On",
  518. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  519. ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
  520. pci_read_config_dword( dev, PMC551_DRAM_BLK2, &dcmd );
  521. printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n"
  522. "pmc551: DRAM_BLK2 Size: %d at %d\n"
  523. "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
  524. (((0x1<<1)&dcmd) == 0)?"RW":"RO",
  525. (((0x1<<0)&dcmd) == 0)?"Off":"On",
  526. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  527. ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
  528. pci_read_config_dword( dev, PMC551_DRAM_BLK3, &dcmd );
  529. printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n"
  530. "pmc551: DRAM_BLK3 Size: %d at %d\n"
  531. "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
  532. (((0x1<<1)&dcmd) == 0)?"RW":"RO",
  533. (((0x1<<0)&dcmd) == 0)?"Off":"On",
  534. PMC551_DRAM_BLK_GET_SIZE(dcmd),
  535. ((dcmd>>20)&0x7FF), ((dcmd>>13)&0x7), ((dcmd>>9)&0xF) );
  536. pci_read_config_word( dev, PCI_COMMAND, &cmd );
  537. printk( KERN_DEBUG "pmc551: Memory Access %s\n",
  538. (((0x1<<1)&cmd) == 0)?"off":"on" );
  539. printk( KERN_DEBUG "pmc551: I/O Access %s\n",
  540. (((0x1<<0)&cmd) == 0)?"off":"on" );
  541. pci_read_config_word( dev, PCI_STATUS, &cmd );
  542. printk( KERN_DEBUG "pmc551: Devsel %s\n",
  543. ((PCI_STATUS_DEVSEL_MASK&cmd)==0x000)?"Fast":
  544. ((PCI_STATUS_DEVSEL_MASK&cmd)==0x200)?"Medium":
  545. ((PCI_STATUS_DEVSEL_MASK&cmd)==0x400)?"Slow":"Invalid" );
  546. printk( KERN_DEBUG "pmc551: %sFast Back-to-Back\n",
  547. ((PCI_COMMAND_FAST_BACK&cmd) == 0)?"Not ":"" );
  548. pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd );
  549. printk( KERN_DEBUG "pmc551: EEPROM is under %s control\n"
  550. "pmc551: System Control Register is %slocked to PCI access\n"
  551. "pmc551: System Control Register is %slocked to EEPROM access\n",
  552. (bcmd&0x1)?"software":"hardware",
  553. (bcmd&0x20)?"":"un", (bcmd&0x40)?"":"un");
  554. #endif
  555. return size;
  556. }
  557. /*
  558. * Kernel version specific module stuffages
  559. */
  560. MODULE_LICENSE("GPL");
  561. MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
  562. MODULE_DESCRIPTION(PMC551_VERSION);
  563. /*
  564. * Stuff these outside the ifdef so as to not bust compiled in driver support
  565. */
  566. static int msize=0;
  567. #if defined(CONFIG_MTD_PMC551_APERTURE_SIZE)
  568. static int asize=CONFIG_MTD_PMC551_APERTURE_SIZE
  569. #else
  570. static int asize=0;
  571. #endif
  572. module_param(msize, int, 0);
  573. MODULE_PARM_DESC(msize, "memory size in Megabytes [1 - 1024]");
  574. module_param(asize, int, 0);
  575. MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]");
  576. /*
  577. * PMC551 Card Initialization
  578. */
  579. static int __init init_pmc551(void)
  580. {
  581. struct pci_dev *PCI_Device = NULL;
  582. struct mypriv *priv;
  583. int count, found=0;
  584. struct mtd_info *mtd;
  585. u32 length = 0;
  586. if(msize) {
  587. msize = (1 << (ffs(msize) - 1))<<20;
  588. if (msize > (1<<30)) {
  589. printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n", msize);
  590. return -EINVAL;
  591. }
  592. }
  593. if(asize) {
  594. asize = (1 << (ffs(asize) - 1))<<20;
  595. if (asize > (1<<30) ) {
  596. printk(KERN_NOTICE "pmc551: Invalid aperture size [%d]\n", asize);
  597. return -EINVAL;
  598. }
  599. }
  600. printk(KERN_INFO PMC551_VERSION);
  601. /*
  602. * PCU-bus chipset probe.
  603. */
  604. for( count = 0; count < MAX_MTD_DEVICES; count++ ) {
  605. if ((PCI_Device = pci_find_device(PCI_VENDOR_ID_V3_SEMI,
  606. PCI_DEVICE_ID_V3_SEMI_V370PDC,
  607. PCI_Device ) ) == NULL) {
  608. break;
  609. }
  610. printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%lX\n",
  611. PCI_Device->resource[0].start);
  612. /*
  613. * The PMC551 device acts VERY weird if you don't init it
  614. * first. i.e. it will not correctly report devsel. If for
  615. * some reason the sdram is in a wrote-protected state the
  616. * device will DEVSEL when it is written to causing problems
  617. * with the oldproc.c driver in
  618. * some kernels (2.2.*)
  619. */
  620. if((length = fixup_pmc551(PCI_Device)) <= 0) {
  621. printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n");
  622. break;
  623. }
  624. /*
  625. * This is needed until the driver is capable of reading the
  626. * onboard I2C SROM to discover the "real" memory size.
  627. */
  628. if(msize) {
  629. length = msize;
  630. printk(KERN_NOTICE "pmc551: Using specified memory size 0x%x\n", length);
  631. } else {
  632. msize = length;
  633. }
  634. mtd = kmalloc(sizeof(struct mtd_info), GFP_KERNEL);
  635. if (!mtd) {
  636. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD device.\n");
  637. break;
  638. }
  639. memset(mtd, 0, sizeof(struct mtd_info));
  640. priv = kmalloc (sizeof(struct mypriv), GFP_KERNEL);
  641. if (!priv) {
  642. printk(KERN_NOTICE "pmc551: Cannot allocate new MTD device.\n");
  643. kfree(mtd);
  644. break;
  645. }
  646. memset(priv, 0, sizeof(*priv));
  647. mtd->priv = priv;
  648. priv->dev = PCI_Device;
  649. if(asize > length) {
  650. printk(KERN_NOTICE "pmc551: reducing aperture size to fit %dM\n",length>>20);
  651. priv->asize = asize = length;
  652. } else if (asize == 0 || asize == length) {
  653. printk(KERN_NOTICE "pmc551: Using existing aperture size %dM\n", length>>20);
  654. priv->asize = asize = length;
  655. } else {
  656. printk(KERN_NOTICE "pmc551: Using specified aperture size %dM\n", asize>>20);
  657. priv->asize = asize;
  658. }
  659. priv->start = ioremap(((PCI_Device->resource[0].start)
  660. & PCI_BASE_ADDRESS_MEM_MASK),
  661. priv->asize);
  662. if (!priv->start) {
  663. printk(KERN_NOTICE "pmc551: Unable to map IO space\n");
  664. kfree(mtd->priv);
  665. kfree(mtd);
  666. break;
  667. }
  668. #ifdef CONFIG_MTD_PMC551_DEBUG
  669. printk( KERN_DEBUG "pmc551: setting aperture to %d\n",
  670. ffs(priv->asize>>20)-1);
  671. #endif
  672. priv->base_map0 = ( PMC551_PCI_MEM_MAP_REG_EN
  673. | PMC551_PCI_MEM_MAP_ENABLE
  674. | (ffs(priv->asize>>20)-1)<<4 );
  675. priv->curr_map0 = priv->base_map0;
  676. pci_write_config_dword ( priv->dev, PMC551_PCI_MEM_MAP0,
  677. priv->curr_map0 );
  678. #ifdef CONFIG_MTD_PMC551_DEBUG
  679. printk( KERN_DEBUG "pmc551: aperture set to %d\n",
  680. (priv->base_map0 & 0xF0)>>4 );
  681. #endif
  682. mtd->size = msize;
  683. mtd->flags = MTD_CAP_RAM;
  684. mtd->erase = pmc551_erase;
  685. mtd->read = pmc551_read;
  686. mtd->write = pmc551_write;
  687. mtd->point = pmc551_point;
  688. mtd->unpoint = pmc551_unpoint;
  689. mtd->type = MTD_RAM;
  690. mtd->name = "PMC551 RAM board";
  691. mtd->erasesize = 0x10000;
  692. mtd->owner = THIS_MODULE;
  693. if (add_mtd_device(mtd)) {
  694. printk(KERN_NOTICE "pmc551: Failed to register new device\n");
  695. iounmap(priv->start);
  696. kfree(mtd->priv);
  697. kfree(mtd);
  698. break;
  699. }
  700. printk(KERN_NOTICE "Registered pmc551 memory device.\n");
  701. printk(KERN_NOTICE "Mapped %dM of memory from 0x%p to 0x%p\n",
  702. priv->asize>>20,
  703. priv->start,
  704. priv->start + priv->asize);
  705. printk(KERN_NOTICE "Total memory is %d%c\n",
  706. (length<1024)?length:
  707. (length<1048576)?length>>10:length>>20,
  708. (length<1024)?'B':(length<1048576)?'K':'M');
  709. priv->nextpmc551 = pmc551list;
  710. pmc551list = mtd;
  711. found++;
  712. }
  713. if( !pmc551list ) {
  714. printk(KERN_NOTICE "pmc551: not detected\n");
  715. return -ENODEV;
  716. } else {
  717. printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found);
  718. return 0;
  719. }
  720. }
  721. /*
  722. * PMC551 Card Cleanup
  723. */
  724. static void __exit cleanup_pmc551(void)
  725. {
  726. int found=0;
  727. struct mtd_info *mtd;
  728. struct mypriv *priv;
  729. while((mtd=pmc551list)) {
  730. priv = mtd->priv;
  731. pmc551list = priv->nextpmc551;
  732. if(priv->start) {
  733. printk (KERN_DEBUG "pmc551: unmapping %dM starting at 0x%p\n",
  734. priv->asize>>20, priv->start);
  735. iounmap (priv->start);
  736. }
  737. kfree (mtd->priv);
  738. del_mtd_device (mtd);
  739. kfree (mtd);
  740. found++;
  741. }
  742. printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found);
  743. }
  744. module_init(init_pmc551);
  745. module_exit(cleanup_pmc551);