doc2001.c 26 KB

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  1. /*
  2. * Linux driver for Disk-On-Chip Millennium
  3. * (c) 1999 Machine Vision Holdings, Inc.
  4. * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
  5. *
  6. * $Id: doc2001.c,v 1.48 2005/01/05 18:05:12 dwmw2 Exp $
  7. */
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <asm/errno.h>
  11. #include <asm/io.h>
  12. #include <asm/uaccess.h>
  13. #include <linux/miscdevice.h>
  14. #include <linux/pci.h>
  15. #include <linux/delay.h>
  16. #include <linux/slab.h>
  17. #include <linux/sched.h>
  18. #include <linux/init.h>
  19. #include <linux/types.h>
  20. #include <linux/bitops.h>
  21. #include <linux/mtd/mtd.h>
  22. #include <linux/mtd/nand.h>
  23. #include <linux/mtd/doc2000.h>
  24. /* #define ECC_DEBUG */
  25. /* I have no idea why some DoC chips can not use memcop_form|to_io().
  26. * This may be due to the different revisions of the ASIC controller built-in or
  27. * simplily a QA/Bug issue. Who knows ?? If you have trouble, please uncomment
  28. * this:*/
  29. #undef USE_MEMCPY
  30. static int doc_read(struct mtd_info *mtd, loff_t from, size_t len,
  31. size_t *retlen, u_char *buf);
  32. static int doc_write(struct mtd_info *mtd, loff_t to, size_t len,
  33. size_t *retlen, const u_char *buf);
  34. static int doc_read_ecc(struct mtd_info *mtd, loff_t from, size_t len,
  35. size_t *retlen, u_char *buf, u_char *eccbuf,
  36. struct nand_oobinfo *oobsel);
  37. static int doc_write_ecc(struct mtd_info *mtd, loff_t to, size_t len,
  38. size_t *retlen, const u_char *buf, u_char *eccbuf,
  39. struct nand_oobinfo *oobsel);
  40. static int doc_read_oob(struct mtd_info *mtd, loff_t ofs, size_t len,
  41. size_t *retlen, u_char *buf);
  42. static int doc_write_oob(struct mtd_info *mtd, loff_t ofs, size_t len,
  43. size_t *retlen, const u_char *buf);
  44. static int doc_erase (struct mtd_info *mtd, struct erase_info *instr);
  45. static struct mtd_info *docmillist = NULL;
  46. /* Perform the required delay cycles by reading from the NOP register */
  47. static void DoC_Delay(void __iomem * docptr, unsigned short cycles)
  48. {
  49. volatile char dummy;
  50. int i;
  51. for (i = 0; i < cycles; i++)
  52. dummy = ReadDOC(docptr, NOP);
  53. }
  54. /* DOC_WaitReady: Wait for RDY line to be asserted by the flash chip */
  55. static int _DoC_WaitReady(void __iomem * docptr)
  56. {
  57. unsigned short c = 0xffff;
  58. DEBUG(MTD_DEBUG_LEVEL3,
  59. "_DoC_WaitReady called for out-of-line wait\n");
  60. /* Out-of-line routine to wait for chip response */
  61. while (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B) && --c)
  62. ;
  63. if (c == 0)
  64. DEBUG(MTD_DEBUG_LEVEL2, "_DoC_WaitReady timed out.\n");
  65. return (c == 0);
  66. }
  67. static inline int DoC_WaitReady(void __iomem * docptr)
  68. {
  69. /* This is inline, to optimise the common case, where it's ready instantly */
  70. int ret = 0;
  71. /* 4 read form NOP register should be issued in prior to the read from CDSNControl
  72. see Software Requirement 11.4 item 2. */
  73. DoC_Delay(docptr, 4);
  74. if (!(ReadDOC(docptr, CDSNControl) & CDSN_CTRL_FR_B))
  75. /* Call the out-of-line routine to wait */
  76. ret = _DoC_WaitReady(docptr);
  77. /* issue 2 read from NOP register after reading from CDSNControl register
  78. see Software Requirement 11.4 item 2. */
  79. DoC_Delay(docptr, 2);
  80. return ret;
  81. }
  82. /* DoC_Command: Send a flash command to the flash chip through the CDSN IO register
  83. with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is
  84. required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */
  85. static inline void DoC_Command(void __iomem * docptr, unsigned char command,
  86. unsigned char xtraflags)
  87. {
  88. /* Assert the CLE (Command Latch Enable) line to the flash chip */
  89. WriteDOC(xtraflags | CDSN_CTRL_CLE | CDSN_CTRL_CE, docptr, CDSNControl);
  90. DoC_Delay(docptr, 4);
  91. /* Send the command */
  92. WriteDOC(command, docptr, Mil_CDSN_IO);
  93. WriteDOC(0x00, docptr, WritePipeTerm);
  94. /* Lower the CLE line */
  95. WriteDOC(xtraflags | CDSN_CTRL_CE, docptr, CDSNControl);
  96. DoC_Delay(docptr, 4);
  97. }
  98. /* DoC_Address: Set the current address for the flash chip through the CDSN IO register
  99. with the internal pipeline. Each of 4 delay cycles (read from the NOP register) is
  100. required after writing to CDSN Control register, see Software Requirement 11.4 item 3. */
  101. static inline void DoC_Address(void __iomem * docptr, int numbytes, unsigned long ofs,
  102. unsigned char xtraflags1, unsigned char xtraflags2)
  103. {
  104. /* Assert the ALE (Address Latch Enable) line to the flash chip */
  105. WriteDOC(xtraflags1 | CDSN_CTRL_ALE | CDSN_CTRL_CE, docptr, CDSNControl);
  106. DoC_Delay(docptr, 4);
  107. /* Send the address */
  108. switch (numbytes)
  109. {
  110. case 1:
  111. /* Send single byte, bits 0-7. */
  112. WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO);
  113. WriteDOC(0x00, docptr, WritePipeTerm);
  114. break;
  115. case 2:
  116. /* Send bits 9-16 followed by 17-23 */
  117. WriteDOC((ofs >> 9) & 0xff, docptr, Mil_CDSN_IO);
  118. WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO);
  119. WriteDOC(0x00, docptr, WritePipeTerm);
  120. break;
  121. case 3:
  122. /* Send 0-7, 9-16, then 17-23 */
  123. WriteDOC(ofs & 0xff, docptr, Mil_CDSN_IO);
  124. WriteDOC((ofs >> 9) & 0xff, docptr, Mil_CDSN_IO);
  125. WriteDOC((ofs >> 17) & 0xff, docptr, Mil_CDSN_IO);
  126. WriteDOC(0x00, docptr, WritePipeTerm);
  127. break;
  128. default:
  129. return;
  130. }
  131. /* Lower the ALE line */
  132. WriteDOC(xtraflags1 | xtraflags2 | CDSN_CTRL_CE, docptr, CDSNControl);
  133. DoC_Delay(docptr, 4);
  134. }
  135. /* DoC_SelectChip: Select a given flash chip within the current floor */
  136. static int DoC_SelectChip(void __iomem * docptr, int chip)
  137. {
  138. /* Select the individual flash chip requested */
  139. WriteDOC(chip, docptr, CDSNDeviceSelect);
  140. DoC_Delay(docptr, 4);
  141. /* Wait for it to be ready */
  142. return DoC_WaitReady(docptr);
  143. }
  144. /* DoC_SelectFloor: Select a given floor (bank of flash chips) */
  145. static int DoC_SelectFloor(void __iomem * docptr, int floor)
  146. {
  147. /* Select the floor (bank) of chips required */
  148. WriteDOC(floor, docptr, FloorSelect);
  149. /* Wait for the chip to be ready */
  150. return DoC_WaitReady(docptr);
  151. }
  152. /* DoC_IdentChip: Identify a given NAND chip given {floor,chip} */
  153. static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip)
  154. {
  155. int mfr, id, i, j;
  156. volatile char dummy;
  157. /* Page in the required floor/chip
  158. FIXME: is this supported by Millennium ?? */
  159. DoC_SelectFloor(doc->virtadr, floor);
  160. DoC_SelectChip(doc->virtadr, chip);
  161. /* Reset the chip, see Software Requirement 11.4 item 1. */
  162. DoC_Command(doc->virtadr, NAND_CMD_RESET, CDSN_CTRL_WP);
  163. DoC_WaitReady(doc->virtadr);
  164. /* Read the NAND chip ID: 1. Send ReadID command */
  165. DoC_Command(doc->virtadr, NAND_CMD_READID, CDSN_CTRL_WP);
  166. /* Read the NAND chip ID: 2. Send address byte zero */
  167. DoC_Address(doc->virtadr, 1, 0x00, CDSN_CTRL_WP, 0x00);
  168. /* Read the manufacturer and device id codes of the flash device through
  169. CDSN IO register see Software Requirement 11.4 item 5.*/
  170. dummy = ReadDOC(doc->virtadr, ReadPipeInit);
  171. DoC_Delay(doc->virtadr, 2);
  172. mfr = ReadDOC(doc->virtadr, Mil_CDSN_IO);
  173. DoC_Delay(doc->virtadr, 2);
  174. id = ReadDOC(doc->virtadr, Mil_CDSN_IO);
  175. dummy = ReadDOC(doc->virtadr, LastDataRead);
  176. /* No response - return failure */
  177. if (mfr == 0xff || mfr == 0)
  178. return 0;
  179. /* FIXME: to deal with multi-flash on multi-Millennium case more carefully */
  180. for (i = 0; nand_flash_ids[i].name != NULL; i++) {
  181. if ( id == nand_flash_ids[i].id) {
  182. /* Try to identify manufacturer */
  183. for (j = 0; nand_manuf_ids[j].id != 0x0; j++) {
  184. if (nand_manuf_ids[j].id == mfr)
  185. break;
  186. }
  187. printk(KERN_INFO "Flash chip found: Manufacturer ID: %2.2X, "
  188. "Chip ID: %2.2X (%s:%s)\n",
  189. mfr, id, nand_manuf_ids[j].name, nand_flash_ids[i].name);
  190. doc->mfr = mfr;
  191. doc->id = id;
  192. doc->chipshift = ffs((nand_flash_ids[i].chipsize << 20)) - 1;
  193. break;
  194. }
  195. }
  196. if (nand_flash_ids[i].name == NULL)
  197. return 0;
  198. else
  199. return 1;
  200. }
  201. /* DoC_ScanChips: Find all NAND chips present in a DiskOnChip, and identify them */
  202. static void DoC_ScanChips(struct DiskOnChip *this)
  203. {
  204. int floor, chip;
  205. int numchips[MAX_FLOORS_MIL];
  206. int ret;
  207. this->numchips = 0;
  208. this->mfr = 0;
  209. this->id = 0;
  210. /* For each floor, find the number of valid chips it contains */
  211. for (floor = 0,ret = 1; floor < MAX_FLOORS_MIL; floor++) {
  212. numchips[floor] = 0;
  213. for (chip = 0; chip < MAX_CHIPS_MIL && ret != 0; chip++) {
  214. ret = DoC_IdentChip(this, floor, chip);
  215. if (ret) {
  216. numchips[floor]++;
  217. this->numchips++;
  218. }
  219. }
  220. }
  221. /* If there are none at all that we recognise, bail */
  222. if (!this->numchips) {
  223. printk("No flash chips recognised.\n");
  224. return;
  225. }
  226. /* Allocate an array to hold the information for each chip */
  227. this->chips = kmalloc(sizeof(struct Nand) * this->numchips, GFP_KERNEL);
  228. if (!this->chips){
  229. printk("No memory for allocating chip info structures\n");
  230. return;
  231. }
  232. /* Fill out the chip array with {floor, chipno} for each
  233. * detected chip in the device. */
  234. for (floor = 0, ret = 0; floor < MAX_FLOORS_MIL; floor++) {
  235. for (chip = 0 ; chip < numchips[floor] ; chip++) {
  236. this->chips[ret].floor = floor;
  237. this->chips[ret].chip = chip;
  238. this->chips[ret].curadr = 0;
  239. this->chips[ret].curmode = 0x50;
  240. ret++;
  241. }
  242. }
  243. /* Calculate and print the total size of the device */
  244. this->totlen = this->numchips * (1 << this->chipshift);
  245. printk(KERN_INFO "%d flash chips found. Total DiskOnChip size: %ld MiB\n",
  246. this->numchips ,this->totlen >> 20);
  247. }
  248. static int DoCMil_is_alias(struct DiskOnChip *doc1, struct DiskOnChip *doc2)
  249. {
  250. int tmp1, tmp2, retval;
  251. if (doc1->physadr == doc2->physadr)
  252. return 1;
  253. /* Use the alias resolution register which was set aside for this
  254. * purpose. If it's value is the same on both chips, they might
  255. * be the same chip, and we write to one and check for a change in
  256. * the other. It's unclear if this register is usuable in the
  257. * DoC 2000 (it's in the Millenium docs), but it seems to work. */
  258. tmp1 = ReadDOC(doc1->virtadr, AliasResolution);
  259. tmp2 = ReadDOC(doc2->virtadr, AliasResolution);
  260. if (tmp1 != tmp2)
  261. return 0;
  262. WriteDOC((tmp1+1) % 0xff, doc1->virtadr, AliasResolution);
  263. tmp2 = ReadDOC(doc2->virtadr, AliasResolution);
  264. if (tmp2 == (tmp1+1) % 0xff)
  265. retval = 1;
  266. else
  267. retval = 0;
  268. /* Restore register contents. May not be necessary, but do it just to
  269. * be safe. */
  270. WriteDOC(tmp1, doc1->virtadr, AliasResolution);
  271. return retval;
  272. }
  273. static const char im_name[] = "DoCMil_init";
  274. /* This routine is made available to other mtd code via
  275. * inter_module_register. It must only be accessed through
  276. * inter_module_get which will bump the use count of this module. The
  277. * addresses passed back in mtd are valid as long as the use count of
  278. * this module is non-zero, i.e. between inter_module_get and
  279. * inter_module_put. Keith Owens <kaos@ocs.com.au> 29 Oct 2000.
  280. */
  281. static void DoCMil_init(struct mtd_info *mtd)
  282. {
  283. struct DiskOnChip *this = mtd->priv;
  284. struct DiskOnChip *old = NULL;
  285. /* We must avoid being called twice for the same device. */
  286. if (docmillist)
  287. old = docmillist->priv;
  288. while (old) {
  289. if (DoCMil_is_alias(this, old)) {
  290. printk(KERN_NOTICE "Ignoring DiskOnChip Millennium at "
  291. "0x%lX - already configured\n", this->physadr);
  292. iounmap(this->virtadr);
  293. kfree(mtd);
  294. return;
  295. }
  296. if (old->nextdoc)
  297. old = old->nextdoc->priv;
  298. else
  299. old = NULL;
  300. }
  301. mtd->name = "DiskOnChip Millennium";
  302. printk(KERN_NOTICE "DiskOnChip Millennium found at address 0x%lX\n",
  303. this->physadr);
  304. mtd->type = MTD_NANDFLASH;
  305. mtd->flags = MTD_CAP_NANDFLASH;
  306. mtd->ecctype = MTD_ECC_RS_DiskOnChip;
  307. mtd->size = 0;
  308. /* FIXME: erase size is not always 8KiB */
  309. mtd->erasesize = 0x2000;
  310. mtd->oobblock = 512;
  311. mtd->oobsize = 16;
  312. mtd->owner = THIS_MODULE;
  313. mtd->erase = doc_erase;
  314. mtd->point = NULL;
  315. mtd->unpoint = NULL;
  316. mtd->read = doc_read;
  317. mtd->write = doc_write;
  318. mtd->read_ecc = doc_read_ecc;
  319. mtd->write_ecc = doc_write_ecc;
  320. mtd->read_oob = doc_read_oob;
  321. mtd->write_oob = doc_write_oob;
  322. mtd->sync = NULL;
  323. this->totlen = 0;
  324. this->numchips = 0;
  325. this->curfloor = -1;
  326. this->curchip = -1;
  327. /* Ident all the chips present. */
  328. DoC_ScanChips(this);
  329. if (!this->totlen) {
  330. kfree(mtd);
  331. iounmap(this->virtadr);
  332. } else {
  333. this->nextdoc = docmillist;
  334. docmillist = mtd;
  335. mtd->size = this->totlen;
  336. add_mtd_device(mtd);
  337. return;
  338. }
  339. }
  340. static int doc_read (struct mtd_info *mtd, loff_t from, size_t len,
  341. size_t *retlen, u_char *buf)
  342. {
  343. /* Just a special case of doc_read_ecc */
  344. return doc_read_ecc(mtd, from, len, retlen, buf, NULL, NULL);
  345. }
  346. static int doc_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
  347. size_t *retlen, u_char *buf, u_char *eccbuf,
  348. struct nand_oobinfo *oobsel)
  349. {
  350. int i, ret;
  351. volatile char dummy;
  352. unsigned char syndrome[6];
  353. struct DiskOnChip *this = mtd->priv;
  354. void __iomem *docptr = this->virtadr;
  355. struct Nand *mychip = &this->chips[from >> (this->chipshift)];
  356. /* Don't allow read past end of device */
  357. if (from >= this->totlen)
  358. return -EINVAL;
  359. /* Don't allow a single read to cross a 512-byte block boundary */
  360. if (from + len > ((from | 0x1ff) + 1))
  361. len = ((from | 0x1ff) + 1) - from;
  362. /* Find the chip which is to be used and select it */
  363. if (this->curfloor != mychip->floor) {
  364. DoC_SelectFloor(docptr, mychip->floor);
  365. DoC_SelectChip(docptr, mychip->chip);
  366. } else if (this->curchip != mychip->chip) {
  367. DoC_SelectChip(docptr, mychip->chip);
  368. }
  369. this->curfloor = mychip->floor;
  370. this->curchip = mychip->chip;
  371. /* issue the Read0 or Read1 command depend on which half of the page
  372. we are accessing. Polling the Flash Ready bit after issue 3 bytes
  373. address in Sequence Read Mode, see Software Requirement 11.4 item 1.*/
  374. DoC_Command(docptr, (from >> 8) & 1, CDSN_CTRL_WP);
  375. DoC_Address(docptr, 3, from, CDSN_CTRL_WP, 0x00);
  376. DoC_WaitReady(docptr);
  377. if (eccbuf) {
  378. /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/
  379. WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
  380. WriteDOC (DOC_ECC_EN, docptr, ECCConf);
  381. } else {
  382. /* disable the ECC engine */
  383. WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
  384. WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
  385. }
  386. /* Read the data via the internal pipeline through CDSN IO register,
  387. see Pipelined Read Operations 11.3 */
  388. dummy = ReadDOC(docptr, ReadPipeInit);
  389. #ifndef USE_MEMCPY
  390. for (i = 0; i < len-1; i++) {
  391. /* N.B. you have to increase the source address in this way or the
  392. ECC logic will not work properly */
  393. buf[i] = ReadDOC(docptr, Mil_CDSN_IO + (i & 0xff));
  394. }
  395. #else
  396. memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1);
  397. #endif
  398. buf[len - 1] = ReadDOC(docptr, LastDataRead);
  399. /* Let the caller know we completed it */
  400. *retlen = len;
  401. ret = 0;
  402. if (eccbuf) {
  403. /* Read the ECC data from Spare Data Area,
  404. see Reed-Solomon EDC/ECC 11.1 */
  405. dummy = ReadDOC(docptr, ReadPipeInit);
  406. #ifndef USE_MEMCPY
  407. for (i = 0; i < 5; i++) {
  408. /* N.B. you have to increase the source address in this way or the
  409. ECC logic will not work properly */
  410. eccbuf[i] = ReadDOC(docptr, Mil_CDSN_IO + i);
  411. }
  412. #else
  413. memcpy_fromio(eccbuf, docptr + DoC_Mil_CDSN_IO, 5);
  414. #endif
  415. eccbuf[5] = ReadDOC(docptr, LastDataRead);
  416. /* Flush the pipeline */
  417. dummy = ReadDOC(docptr, ECCConf);
  418. dummy = ReadDOC(docptr, ECCConf);
  419. /* Check the ECC Status */
  420. if (ReadDOC(docptr, ECCConf) & 0x80) {
  421. int nb_errors;
  422. /* There was an ECC error */
  423. #ifdef ECC_DEBUG
  424. printk("DiskOnChip ECC Error: Read at %lx\n", (long)from);
  425. #endif
  426. /* Read the ECC syndrom through the DiskOnChip ECC logic.
  427. These syndrome will be all ZERO when there is no error */
  428. for (i = 0; i < 6; i++) {
  429. syndrome[i] = ReadDOC(docptr, ECCSyndrome0 + i);
  430. }
  431. nb_errors = doc_decode_ecc(buf, syndrome);
  432. #ifdef ECC_DEBUG
  433. printk("ECC Errors corrected: %x\n", nb_errors);
  434. #endif
  435. if (nb_errors < 0) {
  436. /* We return error, but have actually done the read. Not that
  437. this can be told to user-space, via sys_read(), but at least
  438. MTD-aware stuff can know about it by checking *retlen */
  439. ret = -EIO;
  440. }
  441. }
  442. #ifdef PSYCHO_DEBUG
  443. printk("ECC DATA at %lx: %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
  444. (long)from, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3],
  445. eccbuf[4], eccbuf[5]);
  446. #endif
  447. /* disable the ECC engine */
  448. WriteDOC(DOC_ECC_DIS, docptr , ECCConf);
  449. }
  450. return ret;
  451. }
  452. static int doc_write (struct mtd_info *mtd, loff_t to, size_t len,
  453. size_t *retlen, const u_char *buf)
  454. {
  455. char eccbuf[6];
  456. return doc_write_ecc(mtd, to, len, retlen, buf, eccbuf, NULL);
  457. }
  458. static int doc_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
  459. size_t *retlen, const u_char *buf, u_char *eccbuf,
  460. struct nand_oobinfo *oobsel)
  461. {
  462. int i,ret = 0;
  463. volatile char dummy;
  464. struct DiskOnChip *this = mtd->priv;
  465. void __iomem *docptr = this->virtadr;
  466. struct Nand *mychip = &this->chips[to >> (this->chipshift)];
  467. /* Don't allow write past end of device */
  468. if (to >= this->totlen)
  469. return -EINVAL;
  470. #if 0
  471. /* Don't allow a single write to cross a 512-byte block boundary */
  472. if (to + len > ( (to | 0x1ff) + 1))
  473. len = ((to | 0x1ff) + 1) - to;
  474. #else
  475. /* Don't allow writes which aren't exactly one block */
  476. if (to & 0x1ff || len != 0x200)
  477. return -EINVAL;
  478. #endif
  479. /* Find the chip which is to be used and select it */
  480. if (this->curfloor != mychip->floor) {
  481. DoC_SelectFloor(docptr, mychip->floor);
  482. DoC_SelectChip(docptr, mychip->chip);
  483. } else if (this->curchip != mychip->chip) {
  484. DoC_SelectChip(docptr, mychip->chip);
  485. }
  486. this->curfloor = mychip->floor;
  487. this->curchip = mychip->chip;
  488. /* Reset the chip, see Software Requirement 11.4 item 1. */
  489. DoC_Command(docptr, NAND_CMD_RESET, 0x00);
  490. DoC_WaitReady(docptr);
  491. /* Set device to main plane of flash */
  492. DoC_Command(docptr, NAND_CMD_READ0, 0x00);
  493. /* issue the Serial Data In command to initial the Page Program process */
  494. DoC_Command(docptr, NAND_CMD_SEQIN, 0x00);
  495. DoC_Address(docptr, 3, to, 0x00, 0x00);
  496. DoC_WaitReady(docptr);
  497. if (eccbuf) {
  498. /* init the ECC engine, see Reed-Solomon EDC/ECC 11.1 .*/
  499. WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
  500. WriteDOC (DOC_ECC_EN | DOC_ECC_RW, docptr, ECCConf);
  501. } else {
  502. /* disable the ECC engine */
  503. WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
  504. WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
  505. }
  506. /* Write the data via the internal pipeline through CDSN IO register,
  507. see Pipelined Write Operations 11.2 */
  508. #ifndef USE_MEMCPY
  509. for (i = 0; i < len; i++) {
  510. /* N.B. you have to increase the source address in this way or the
  511. ECC logic will not work properly */
  512. WriteDOC(buf[i], docptr, Mil_CDSN_IO + i);
  513. }
  514. #else
  515. memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len);
  516. #endif
  517. WriteDOC(0x00, docptr, WritePipeTerm);
  518. if (eccbuf) {
  519. /* Write ECC data to flash, the ECC info is generated by the DiskOnChip ECC logic
  520. see Reed-Solomon EDC/ECC 11.1 */
  521. WriteDOC(0, docptr, NOP);
  522. WriteDOC(0, docptr, NOP);
  523. WriteDOC(0, docptr, NOP);
  524. /* Read the ECC data through the DiskOnChip ECC logic */
  525. for (i = 0; i < 6; i++) {
  526. eccbuf[i] = ReadDOC(docptr, ECCSyndrome0 + i);
  527. }
  528. /* ignore the ECC engine */
  529. WriteDOC(DOC_ECC_DIS, docptr , ECCConf);
  530. #ifndef USE_MEMCPY
  531. /* Write the ECC data to flash */
  532. for (i = 0; i < 6; i++) {
  533. /* N.B. you have to increase the source address in this way or the
  534. ECC logic will not work properly */
  535. WriteDOC(eccbuf[i], docptr, Mil_CDSN_IO + i);
  536. }
  537. #else
  538. memcpy_toio(docptr + DoC_Mil_CDSN_IO, eccbuf, 6);
  539. #endif
  540. /* write the block status BLOCK_USED (0x5555) at the end of ECC data
  541. FIXME: this is only a hack for programming the IPL area for LinuxBIOS
  542. and should be replace with proper codes in user space utilities */
  543. WriteDOC(0x55, docptr, Mil_CDSN_IO);
  544. WriteDOC(0x55, docptr, Mil_CDSN_IO + 1);
  545. WriteDOC(0x00, docptr, WritePipeTerm);
  546. #ifdef PSYCHO_DEBUG
  547. printk("OOB data at %lx is %2.2X %2.2X %2.2X %2.2X %2.2X %2.2X\n",
  548. (long) to, eccbuf[0], eccbuf[1], eccbuf[2], eccbuf[3],
  549. eccbuf[4], eccbuf[5]);
  550. #endif
  551. }
  552. /* Commit the Page Program command and wait for ready
  553. see Software Requirement 11.4 item 1.*/
  554. DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00);
  555. DoC_WaitReady(docptr);
  556. /* Read the status of the flash device through CDSN IO register
  557. see Software Requirement 11.4 item 5.*/
  558. DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP);
  559. dummy = ReadDOC(docptr, ReadPipeInit);
  560. DoC_Delay(docptr, 2);
  561. if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
  562. printk("Error programming flash\n");
  563. /* Error in programming
  564. FIXME: implement Bad Block Replacement (in nftl.c ??) */
  565. *retlen = 0;
  566. ret = -EIO;
  567. }
  568. dummy = ReadDOC(docptr, LastDataRead);
  569. /* Let the caller know we completed it */
  570. *retlen = len;
  571. return ret;
  572. }
  573. static int doc_read_oob(struct mtd_info *mtd, loff_t ofs, size_t len,
  574. size_t *retlen, u_char *buf)
  575. {
  576. #ifndef USE_MEMCPY
  577. int i;
  578. #endif
  579. volatile char dummy;
  580. struct DiskOnChip *this = mtd->priv;
  581. void __iomem *docptr = this->virtadr;
  582. struct Nand *mychip = &this->chips[ofs >> this->chipshift];
  583. /* Find the chip which is to be used and select it */
  584. if (this->curfloor != mychip->floor) {
  585. DoC_SelectFloor(docptr, mychip->floor);
  586. DoC_SelectChip(docptr, mychip->chip);
  587. } else if (this->curchip != mychip->chip) {
  588. DoC_SelectChip(docptr, mychip->chip);
  589. }
  590. this->curfloor = mychip->floor;
  591. this->curchip = mychip->chip;
  592. /* disable the ECC engine */
  593. WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
  594. WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
  595. /* issue the Read2 command to set the pointer to the Spare Data Area.
  596. Polling the Flash Ready bit after issue 3 bytes address in
  597. Sequence Read Mode, see Software Requirement 11.4 item 1.*/
  598. DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP);
  599. DoC_Address(docptr, 3, ofs, CDSN_CTRL_WP, 0x00);
  600. DoC_WaitReady(docptr);
  601. /* Read the data out via the internal pipeline through CDSN IO register,
  602. see Pipelined Read Operations 11.3 */
  603. dummy = ReadDOC(docptr, ReadPipeInit);
  604. #ifndef USE_MEMCPY
  605. for (i = 0; i < len-1; i++) {
  606. /* N.B. you have to increase the source address in this way or the
  607. ECC logic will not work properly */
  608. buf[i] = ReadDOC(docptr, Mil_CDSN_IO + i);
  609. }
  610. #else
  611. memcpy_fromio(buf, docptr + DoC_Mil_CDSN_IO, len - 1);
  612. #endif
  613. buf[len - 1] = ReadDOC(docptr, LastDataRead);
  614. *retlen = len;
  615. return 0;
  616. }
  617. static int doc_write_oob(struct mtd_info *mtd, loff_t ofs, size_t len,
  618. size_t *retlen, const u_char *buf)
  619. {
  620. #ifndef USE_MEMCPY
  621. int i;
  622. #endif
  623. volatile char dummy;
  624. int ret = 0;
  625. struct DiskOnChip *this = mtd->priv;
  626. void __iomem *docptr = this->virtadr;
  627. struct Nand *mychip = &this->chips[ofs >> this->chipshift];
  628. /* Find the chip which is to be used and select it */
  629. if (this->curfloor != mychip->floor) {
  630. DoC_SelectFloor(docptr, mychip->floor);
  631. DoC_SelectChip(docptr, mychip->chip);
  632. } else if (this->curchip != mychip->chip) {
  633. DoC_SelectChip(docptr, mychip->chip);
  634. }
  635. this->curfloor = mychip->floor;
  636. this->curchip = mychip->chip;
  637. /* disable the ECC engine */
  638. WriteDOC (DOC_ECC_RESET, docptr, ECCConf);
  639. WriteDOC (DOC_ECC_DIS, docptr, ECCConf);
  640. /* Reset the chip, see Software Requirement 11.4 item 1. */
  641. DoC_Command(docptr, NAND_CMD_RESET, CDSN_CTRL_WP);
  642. DoC_WaitReady(docptr);
  643. /* issue the Read2 command to set the pointer to the Spare Data Area. */
  644. DoC_Command(docptr, NAND_CMD_READOOB, CDSN_CTRL_WP);
  645. /* issue the Serial Data In command to initial the Page Program process */
  646. DoC_Command(docptr, NAND_CMD_SEQIN, 0x00);
  647. DoC_Address(docptr, 3, ofs, 0x00, 0x00);
  648. /* Write the data via the internal pipeline through CDSN IO register,
  649. see Pipelined Write Operations 11.2 */
  650. #ifndef USE_MEMCPY
  651. for (i = 0; i < len; i++) {
  652. /* N.B. you have to increase the source address in this way or the
  653. ECC logic will not work properly */
  654. WriteDOC(buf[i], docptr, Mil_CDSN_IO + i);
  655. }
  656. #else
  657. memcpy_toio(docptr + DoC_Mil_CDSN_IO, buf, len);
  658. #endif
  659. WriteDOC(0x00, docptr, WritePipeTerm);
  660. /* Commit the Page Program command and wait for ready
  661. see Software Requirement 11.4 item 1.*/
  662. DoC_Command(docptr, NAND_CMD_PAGEPROG, 0x00);
  663. DoC_WaitReady(docptr);
  664. /* Read the status of the flash device through CDSN IO register
  665. see Software Requirement 11.4 item 5.*/
  666. DoC_Command(docptr, NAND_CMD_STATUS, 0x00);
  667. dummy = ReadDOC(docptr, ReadPipeInit);
  668. DoC_Delay(docptr, 2);
  669. if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
  670. printk("Error programming oob data\n");
  671. /* FIXME: implement Bad Block Replacement (in nftl.c ??) */
  672. *retlen = 0;
  673. ret = -EIO;
  674. }
  675. dummy = ReadDOC(docptr, LastDataRead);
  676. *retlen = len;
  677. return ret;
  678. }
  679. int doc_erase (struct mtd_info *mtd, struct erase_info *instr)
  680. {
  681. volatile char dummy;
  682. struct DiskOnChip *this = mtd->priv;
  683. __u32 ofs = instr->addr;
  684. __u32 len = instr->len;
  685. void __iomem *docptr = this->virtadr;
  686. struct Nand *mychip = &this->chips[ofs >> this->chipshift];
  687. if (len != mtd->erasesize)
  688. printk(KERN_WARNING "Erase not right size (%x != %x)n",
  689. len, mtd->erasesize);
  690. /* Find the chip which is to be used and select it */
  691. if (this->curfloor != mychip->floor) {
  692. DoC_SelectFloor(docptr, mychip->floor);
  693. DoC_SelectChip(docptr, mychip->chip);
  694. } else if (this->curchip != mychip->chip) {
  695. DoC_SelectChip(docptr, mychip->chip);
  696. }
  697. this->curfloor = mychip->floor;
  698. this->curchip = mychip->chip;
  699. instr->state = MTD_ERASE_PENDING;
  700. /* issue the Erase Setup command */
  701. DoC_Command(docptr, NAND_CMD_ERASE1, 0x00);
  702. DoC_Address(docptr, 2, ofs, 0x00, 0x00);
  703. /* Commit the Erase Start command and wait for ready
  704. see Software Requirement 11.4 item 1.*/
  705. DoC_Command(docptr, NAND_CMD_ERASE2, 0x00);
  706. DoC_WaitReady(docptr);
  707. instr->state = MTD_ERASING;
  708. /* Read the status of the flash device through CDSN IO register
  709. see Software Requirement 11.4 item 5.
  710. FIXME: it seems that we are not wait long enough, some blocks are not
  711. erased fully */
  712. DoC_Command(docptr, NAND_CMD_STATUS, CDSN_CTRL_WP);
  713. dummy = ReadDOC(docptr, ReadPipeInit);
  714. DoC_Delay(docptr, 2);
  715. if (ReadDOC(docptr, Mil_CDSN_IO) & 1) {
  716. printk("Error Erasing at 0x%x\n", ofs);
  717. /* There was an error
  718. FIXME: implement Bad Block Replacement (in nftl.c ??) */
  719. instr->state = MTD_ERASE_FAILED;
  720. } else
  721. instr->state = MTD_ERASE_DONE;
  722. dummy = ReadDOC(docptr, LastDataRead);
  723. mtd_erase_callback(instr);
  724. return 0;
  725. }
  726. /****************************************************************************
  727. *
  728. * Module stuff
  729. *
  730. ****************************************************************************/
  731. static int __init init_doc2001(void)
  732. {
  733. inter_module_register(im_name, THIS_MODULE, &DoCMil_init);
  734. return 0;
  735. }
  736. static void __exit cleanup_doc2001(void)
  737. {
  738. struct mtd_info *mtd;
  739. struct DiskOnChip *this;
  740. while ((mtd=docmillist)) {
  741. this = mtd->priv;
  742. docmillist = this->nextdoc;
  743. del_mtd_device(mtd);
  744. iounmap(this->virtadr);
  745. kfree(this->chips);
  746. kfree(mtd);
  747. }
  748. inter_module_unregister(im_name);
  749. }
  750. module_exit(cleanup_doc2001);
  751. module_init(init_doc2001);
  752. MODULE_LICENSE("GPL");
  753. MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
  754. MODULE_DESCRIPTION("Alternative driver for DiskOnChip Millennium");