pxamci.h 2.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124
  1. #undef MMC_STRPCL
  2. #undef MMC_STAT
  3. #undef MMC_CLKRT
  4. #undef MMC_SPI
  5. #undef MMC_CMDAT
  6. #undef MMC_RESTO
  7. #undef MMC_RDTO
  8. #undef MMC_BLKLEN
  9. #undef MMC_NOB
  10. #undef MMC_PRTBUF
  11. #undef MMC_I_MASK
  12. #undef END_CMD_RES
  13. #undef PRG_DONE
  14. #undef DATA_TRAN_DONE
  15. #undef MMC_I_REG
  16. #undef MMC_CMD
  17. #undef MMC_ARGH
  18. #undef MMC_ARGL
  19. #undef MMC_RES
  20. #undef MMC_RXFIFO
  21. #undef MMC_TXFIFO
  22. #define MMC_STRPCL 0x0000
  23. #define STOP_CLOCK (1 << 0)
  24. #define START_CLOCK (2 << 0)
  25. #define MMC_STAT 0x0004
  26. #define STAT_END_CMD_RES (1 << 13)
  27. #define STAT_PRG_DONE (1 << 12)
  28. #define STAT_DATA_TRAN_DONE (1 << 11)
  29. #define STAT_CLK_EN (1 << 8)
  30. #define STAT_RECV_FIFO_FULL (1 << 7)
  31. #define STAT_XMIT_FIFO_EMPTY (1 << 6)
  32. #define STAT_RES_CRC_ERR (1 << 5)
  33. #define STAT_SPI_READ_ERROR_TOKEN (1 << 4)
  34. #define STAT_CRC_READ_ERROR (1 << 3)
  35. #define STAT_CRC_WRITE_ERROR (1 << 2)
  36. #define STAT_TIME_OUT_RESPONSE (1 << 1)
  37. #define STAT_READ_TIME_OUT (1 << 0)
  38. #define MMC_CLKRT 0x0008 /* 3 bit */
  39. #define MMC_SPI 0x000c
  40. #define SPI_CS_ADDRESS (1 << 3)
  41. #define SPI_CS_EN (1 << 2)
  42. #define CRC_ON (1 << 1)
  43. #define SPI_EN (1 << 0)
  44. #define MMC_CMDAT 0x0010
  45. #define CMDAT_DMAEN (1 << 7)
  46. #define CMDAT_INIT (1 << 6)
  47. #define CMDAT_BUSY (1 << 5)
  48. #define CMDAT_STREAM (1 << 4) /* 1 = stream */
  49. #define CMDAT_WRITE (1 << 3) /* 1 = write */
  50. #define CMDAT_DATAEN (1 << 2)
  51. #define CMDAT_RESP_NONE (0 << 0)
  52. #define CMDAT_RESP_SHORT (1 << 0)
  53. #define CMDAT_RESP_R2 (2 << 0)
  54. #define CMDAT_RESP_R3 (3 << 0)
  55. #define MMC_RESTO 0x0014 /* 7 bit */
  56. #define MMC_RDTO 0x0018 /* 16 bit */
  57. #define MMC_BLKLEN 0x001c /* 10 bit */
  58. #define MMC_NOB 0x0020 /* 16 bit */
  59. #define MMC_PRTBUF 0x0024
  60. #define BUF_PART_FULL (1 << 0)
  61. #define MMC_I_MASK 0x0028
  62. /*PXA27x MMC interrupts*/
  63. #define SDIO_SUSPEND_ACK (1 << 12)
  64. #define SDIO_INT (1 << 11)
  65. #define RD_STALLED (1 << 10)
  66. #define RES_ERR (1 << 9)
  67. #define DAT_ERR (1 << 8)
  68. #define TINT (1 << 7)
  69. /*PXA2xx MMC interrupts*/
  70. #define TXFIFO_WR_REQ (1 << 6)
  71. #define RXFIFO_RD_REQ (1 << 5)
  72. #define CLK_IS_OFF (1 << 4)
  73. #define STOP_CMD (1 << 3)
  74. #define END_CMD_RES (1 << 2)
  75. #define PRG_DONE (1 << 1)
  76. #define DATA_TRAN_DONE (1 << 0)
  77. #ifdef CONFIG_PXA27x
  78. #define MMC_I_MASK_ALL 0x00001fff
  79. #else
  80. #define MMC_I_MASK_ALL 0x0000007f
  81. #endif
  82. #define MMC_I_REG 0x002c
  83. /* same as MMC_I_MASK */
  84. #define MMC_CMD 0x0030
  85. #define MMC_ARGH 0x0034 /* 16 bit */
  86. #define MMC_ARGL 0x0038 /* 16 bit */
  87. #define MMC_RES 0x003c /* 16 bit */
  88. #define MMC_RXFIFO 0x0040 /* 8 bit */
  89. #define MMC_TXFIFO 0x0044 /* 8 bit */
  90. /*
  91. * The base MMC clock rate
  92. */
  93. #ifdef CONFIG_PXA27x
  94. #define CLOCKRATE_MIN 304688
  95. #define CLOCKRATE_MAX 19500000
  96. #else
  97. #define CLOCKRATE_MIN 312500
  98. #define CLOCKRATE_MAX 20000000
  99. #endif
  100. #define CLOCKRATE CLOCKRATE_MAX