saa7134-dvb.c 18 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625
  1. /*
  2. *
  3. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  4. *
  5. * Extended 3 / 2005 by Hartmut Hackmann to support various
  6. * cards with the tda10046 DVB-T channel decoder
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. */
  22. #include <linux/init.h>
  23. #include <linux/list.h>
  24. #include <linux/module.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/kthread.h>
  29. #include <linux/suspend.h>
  30. #include "saa7134-reg.h"
  31. #include "saa7134.h"
  32. #ifdef HAVE_MT352
  33. # include "mt352.h"
  34. # include "mt352_priv.h" /* FIXME */
  35. #endif
  36. #ifdef HAVE_TDA1004X
  37. # include "tda1004x.h"
  38. #endif
  39. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  40. MODULE_LICENSE("GPL");
  41. static unsigned int antenna_pwr = 0;
  42. module_param(antenna_pwr, int, 0444);
  43. MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
  44. /* ------------------------------------------------------------------ */
  45. #ifdef HAVE_MT352
  46. static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
  47. {
  48. u32 ok;
  49. if (!on) {
  50. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
  51. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  52. return 0;
  53. }
  54. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
  55. saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  56. udelay(10);
  57. saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
  58. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
  59. udelay(10);
  60. saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
  61. udelay(10);
  62. ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
  63. printk("%s: %s %s\n", dev->name, __FUNCTION__,
  64. ok ? "on" : "off");
  65. if (!ok)
  66. saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
  67. return ok;
  68. }
  69. static int mt352_pinnacle_init(struct dvb_frontend* fe)
  70. {
  71. static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
  72. static u8 reset [] = { RESET, 0x80 };
  73. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  74. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
  75. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
  76. static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
  77. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
  78. static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
  79. static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
  80. struct saa7134_dev *dev= fe->dvb->priv;
  81. printk("%s: %s called\n",dev->name,__FUNCTION__);
  82. mt352_write(fe, clock_config, sizeof(clock_config));
  83. udelay(200);
  84. mt352_write(fe, reset, sizeof(reset));
  85. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  86. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  87. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  88. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  89. mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
  90. mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
  91. mt352_write(fe, irq_cfg, sizeof(irq_cfg));
  92. return 0;
  93. }
  94. static int mt352_pinnacle_pll_set(struct dvb_frontend* fe,
  95. struct dvb_frontend_parameters* params,
  96. u8* pllbuf)
  97. {
  98. static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
  99. static int off = TDA9887_PRESENT | TDA9887_PORT2_ACTIVE;
  100. struct saa7134_dev *dev = fe->dvb->priv;
  101. struct v4l2_frequency f;
  102. /* set frequency (mt2050) */
  103. f.tuner = 0;
  104. f.type = V4L2_TUNER_DIGITAL_TV;
  105. f.frequency = params->frequency / 1000 * 16 / 1000;
  106. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
  107. saa7134_i2c_call_clients(dev,VIDIOC_S_FREQUENCY,&f);
  108. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&off);
  109. pinnacle_antenna_pwr(dev, antenna_pwr);
  110. /* mt352 setup */
  111. mt352_pinnacle_init(fe);
  112. pllbuf[0] = 0xc2;
  113. pllbuf[1] = 0x00;
  114. pllbuf[2] = 0x00;
  115. pllbuf[3] = 0x80;
  116. pllbuf[4] = 0x00;
  117. return 0;
  118. }
  119. static struct mt352_config pinnacle_300i = {
  120. .demod_address = 0x3c >> 1,
  121. .adc_clock = 20333,
  122. .if2 = 36150,
  123. .no_tuner = 1,
  124. .demod_init = mt352_pinnacle_init,
  125. .pll_set = mt352_pinnacle_pll_set,
  126. };
  127. #endif
  128. /* ------------------------------------------------------------------ */
  129. #ifdef HAVE_TDA1004X
  130. static int philips_tu1216_pll_init(struct dvb_frontend *fe)
  131. {
  132. struct saa7134_dev *dev = fe->dvb->priv;
  133. static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  134. struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
  135. /* setup PLL configuration */
  136. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  137. return -EIO;
  138. msleep(1);
  139. return 0;
  140. }
  141. static int philips_tu1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  142. {
  143. struct saa7134_dev *dev = fe->dvb->priv;
  144. u8 tuner_buf[4];
  145. struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,.len =
  146. sizeof(tuner_buf) };
  147. int tuner_frequency = 0;
  148. u8 band, cp, filter;
  149. /* determine charge pump */
  150. tuner_frequency = params->frequency + 36166000;
  151. if (tuner_frequency < 87000000)
  152. return -EINVAL;
  153. else if (tuner_frequency < 130000000)
  154. cp = 3;
  155. else if (tuner_frequency < 160000000)
  156. cp = 5;
  157. else if (tuner_frequency < 200000000)
  158. cp = 6;
  159. else if (tuner_frequency < 290000000)
  160. cp = 3;
  161. else if (tuner_frequency < 420000000)
  162. cp = 5;
  163. else if (tuner_frequency < 480000000)
  164. cp = 6;
  165. else if (tuner_frequency < 620000000)
  166. cp = 3;
  167. else if (tuner_frequency < 830000000)
  168. cp = 5;
  169. else if (tuner_frequency < 895000000)
  170. cp = 7;
  171. else
  172. return -EINVAL;
  173. /* determine band */
  174. if (params->frequency < 49000000)
  175. return -EINVAL;
  176. else if (params->frequency < 161000000)
  177. band = 1;
  178. else if (params->frequency < 444000000)
  179. band = 2;
  180. else if (params->frequency < 861000000)
  181. band = 4;
  182. else
  183. return -EINVAL;
  184. /* setup PLL filter */
  185. switch (params->u.ofdm.bandwidth) {
  186. case BANDWIDTH_6_MHZ:
  187. filter = 0;
  188. break;
  189. case BANDWIDTH_7_MHZ:
  190. filter = 0;
  191. break;
  192. case BANDWIDTH_8_MHZ:
  193. filter = 1;
  194. break;
  195. default:
  196. return -EINVAL;
  197. }
  198. /* calculate divisor
  199. * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
  200. */
  201. tuner_frequency = (((params->frequency / 1000) * 6) + 217496) / 1000;
  202. /* setup tuner buffer */
  203. tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
  204. tuner_buf[1] = tuner_frequency & 0xff;
  205. tuner_buf[2] = 0xca;
  206. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  207. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  208. return -EIO;
  209. msleep(1);
  210. return 0;
  211. }
  212. static int philips_tu1216_request_firmware(struct dvb_frontend *fe,
  213. const struct firmware **fw, char *name)
  214. {
  215. struct saa7134_dev *dev = fe->dvb->priv;
  216. return request_firmware(fw, name, &dev->pci->dev);
  217. }
  218. static struct tda1004x_config philips_tu1216_config = {
  219. .demod_address = 0x8,
  220. .invert = 1,
  221. .invert_oclk = 1,
  222. .xtal_freq = TDA10046_XTAL_4M,
  223. .agc_config = TDA10046_AGC_DEFAULT,
  224. .if_freq = TDA10046_FREQ_3617,
  225. .pll_init = philips_tu1216_pll_init,
  226. .pll_set = philips_tu1216_pll_set,
  227. .pll_sleep = NULL,
  228. .request_firmware = philips_tu1216_request_firmware,
  229. };
  230. /* ------------------------------------------------------------------ */
  231. static int philips_fmd1216_pll_init(struct dvb_frontend *fe)
  232. {
  233. struct saa7134_dev *dev = fe->dvb->priv;
  234. /* this message is to set up ATC and ALC */
  235. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0xa0 };
  236. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
  237. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  238. return -EIO;
  239. msleep(1);
  240. return 0;
  241. }
  242. static void philips_fmd1216_analog(struct dvb_frontend *fe)
  243. {
  244. struct saa7134_dev *dev = fe->dvb->priv;
  245. /* this message actually turns the tuner back to analog mode */
  246. static u8 fmd1216_init[] = { 0x0b, 0xdc, 0x9c, 0x60 };
  247. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = fmd1216_init,.len = sizeof(fmd1216_init) };
  248. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  249. msleep(1);
  250. fmd1216_init[2] = 0x86;
  251. fmd1216_init[3] = 0x54;
  252. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  253. msleep(1);
  254. }
  255. static int philips_fmd1216_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  256. {
  257. struct saa7134_dev *dev = fe->dvb->priv;
  258. u8 tuner_buf[4];
  259. struct i2c_msg tuner_msg = {.addr = 0x61,.flags = 0,.buf = tuner_buf,.len =
  260. sizeof(tuner_buf) };
  261. int tuner_frequency = 0;
  262. int divider = 0;
  263. u8 band, mode, cp;
  264. /* determine charge pump */
  265. tuner_frequency = params->frequency + 36130000;
  266. if (tuner_frequency < 87000000)
  267. return -EINVAL;
  268. /* low band */
  269. else if (tuner_frequency < 180000000) {
  270. band = 1;
  271. mode = 7;
  272. cp = 0;
  273. } else if (tuner_frequency < 195000000) {
  274. band = 1;
  275. mode = 6;
  276. cp = 1;
  277. /* mid band */
  278. } else if (tuner_frequency < 366000000) {
  279. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  280. band = 10;
  281. } else {
  282. band = 2;
  283. }
  284. mode = 7;
  285. cp = 0;
  286. } else if (tuner_frequency < 478000000) {
  287. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  288. band = 10;
  289. } else {
  290. band = 2;
  291. }
  292. mode = 6;
  293. cp = 1;
  294. /* high band */
  295. } else if (tuner_frequency < 662000000) {
  296. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  297. band = 12;
  298. } else {
  299. band = 4;
  300. }
  301. mode = 7;
  302. cp = 0;
  303. } else if (tuner_frequency < 840000000) {
  304. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  305. band = 12;
  306. } else {
  307. band = 4;
  308. }
  309. mode = 6;
  310. cp = 1;
  311. } else {
  312. if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) {
  313. band = 12;
  314. } else {
  315. band = 4;
  316. }
  317. mode = 7;
  318. cp = 1;
  319. }
  320. /* calculate divisor */
  321. /* ((36166000 + Finput) / 166666) rounded! */
  322. divider = (tuner_frequency + 83333) / 166667;
  323. /* setup tuner buffer */
  324. tuner_buf[0] = (divider >> 8) & 0x7f;
  325. tuner_buf[1] = divider & 0xff;
  326. tuner_buf[2] = 0x80 | (cp << 6) | (mode << 3) | 4;
  327. tuner_buf[3] = 0x40 | band;
  328. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  329. return -EIO;
  330. return 0;
  331. }
  332. #ifdef HAVE_TDA1004X
  333. static struct tda1004x_config medion_cardbus = {
  334. .demod_address = 0x08,
  335. .invert = 1,
  336. .invert_oclk = 0,
  337. .xtal_freq = TDA10046_XTAL_16M,
  338. .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
  339. .if_freq = TDA10046_FREQ_3613,
  340. .pll_init = philips_fmd1216_pll_init,
  341. .pll_set = philips_fmd1216_pll_set,
  342. .pll_sleep = philips_fmd1216_analog,
  343. .request_firmware = NULL,
  344. };
  345. #endif
  346. /* ------------------------------------------------------------------ */
  347. struct tda827x_data {
  348. u32 lomax;
  349. u8 spd;
  350. u8 bs;
  351. u8 bp;
  352. u8 cp;
  353. u8 gc3;
  354. u8 div1p5;
  355. };
  356. static struct tda827x_data tda827x_dvbt[] = {
  357. { .lomax = 62000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
  358. { .lomax = 66000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 1},
  359. { .lomax = 76000000, .spd = 3, .bs = 1, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
  360. { .lomax = 84000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 3, .div1p5 = 0},
  361. { .lomax = 93000000, .spd = 3, .bs = 2, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
  362. { .lomax = 98000000, .spd = 3, .bs = 3, .bp = 0, .cp = 0, .gc3 = 1, .div1p5 = 0},
  363. { .lomax = 109000000, .spd = 3, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  364. { .lomax = 123000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
  365. { .lomax = 133000000, .spd = 2, .bs = 3, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 1},
  366. { .lomax = 151000000, .spd = 2, .bs = 1, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  367. { .lomax = 154000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 1, .div1p5 = 0},
  368. { .lomax = 181000000, .spd = 2, .bs = 2, .bp = 1, .cp = 0, .gc3 = 0, .div1p5 = 0},
  369. { .lomax = 185000000, .spd = 2, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  370. { .lomax = 217000000, .spd = 2, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  371. { .lomax = 244000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
  372. { .lomax = 265000000, .spd = 1, .bs = 3, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 1},
  373. { .lomax = 302000000, .spd = 1, .bs = 1, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  374. { .lomax = 324000000, .spd = 1, .bs = 2, .bp = 2, .cp = 0, .gc3 = 1, .div1p5 = 0},
  375. { .lomax = 370000000, .spd = 1, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  376. { .lomax = 454000000, .spd = 1, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  377. { .lomax = 493000000, .spd = 0, .bs = 2, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
  378. { .lomax = 530000000, .spd = 0, .bs = 3, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 1},
  379. { .lomax = 554000000, .spd = 0, .bs = 1, .bp = 3, .cp = 0, .gc3 = 1, .div1p5 = 0},
  380. { .lomax = 604000000, .spd = 0, .bs = 1, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  381. { .lomax = 696000000, .spd = 0, .bs = 2, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  382. { .lomax = 740000000, .spd = 0, .bs = 2, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
  383. { .lomax = 820000000, .spd = 0, .bs = 3, .bp = 4, .cp = 0, .gc3 = 0, .div1p5 = 0},
  384. { .lomax = 865000000, .spd = 0, .bs = 3, .bp = 4, .cp = 1, .gc3 = 0, .div1p5 = 0},
  385. { .lomax = 0, .spd = 0, .bs = 0, .bp = 0, .cp = 0, .gc3 = 0, .div1p5 = 0}
  386. };
  387. static int philips_tda827x_pll_init(struct dvb_frontend *fe)
  388. {
  389. return 0;
  390. }
  391. static int philips_tda827x_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  392. {
  393. struct saa7134_dev *dev = fe->dvb->priv;
  394. u8 tuner_buf[14];
  395. struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tuner_buf,
  396. .len = sizeof(tuner_buf) };
  397. int i, tuner_freq, if_freq;
  398. u32 N;
  399. switch (params->u.ofdm.bandwidth) {
  400. case BANDWIDTH_6_MHZ:
  401. if_freq = 4000000;
  402. break;
  403. case BANDWIDTH_7_MHZ:
  404. if_freq = 4500000;
  405. break;
  406. default: /* 8 MHz or Auto */
  407. if_freq = 5000000;
  408. break;
  409. }
  410. tuner_freq = params->frequency + if_freq;
  411. i = 0;
  412. while (tda827x_dvbt[i].lomax < tuner_freq) {
  413. if(tda827x_dvbt[i + 1].lomax == 0)
  414. break;
  415. i++;
  416. }
  417. N = ((tuner_freq + 125000) / 250000) << (tda827x_dvbt[i].spd + 2);
  418. tuner_buf[0] = 0;
  419. tuner_buf[1] = (N>>8) | 0x40;
  420. tuner_buf[2] = N & 0xff;
  421. tuner_buf[3] = 0;
  422. tuner_buf[4] = 0x52;
  423. tuner_buf[5] = (tda827x_dvbt[i].spd << 6) + (tda827x_dvbt[i].div1p5 << 5) +
  424. (tda827x_dvbt[i].bs << 3) + tda827x_dvbt[i].bp;
  425. tuner_buf[6] = (tda827x_dvbt[i].gc3 << 4) + 0x8f;
  426. tuner_buf[7] = 0xbf;
  427. tuner_buf[8] = 0x2a;
  428. tuner_buf[9] = 0x05;
  429. tuner_buf[10] = 0xff;
  430. tuner_buf[11] = 0x00;
  431. tuner_buf[12] = 0x00;
  432. tuner_buf[13] = 0x40;
  433. tuner_msg.len = 14;
  434. if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
  435. return -EIO;
  436. msleep(500);
  437. /* correct CP value */
  438. tuner_buf[0] = 0x30;
  439. tuner_buf[1] = 0x50 + tda827x_dvbt[i].cp;
  440. tuner_msg.len = 2;
  441. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  442. return 0;
  443. }
  444. static void philips_tda827x_pll_sleep(struct dvb_frontend *fe)
  445. {
  446. struct saa7134_dev *dev = fe->dvb->priv;
  447. static u8 tda827x_sleep[] = { 0x30, 0xd0};
  448. struct i2c_msg tuner_msg = {.addr = 0x60,.flags = 0,.buf = tda827x_sleep,
  449. .len = sizeof(tda827x_sleep) };
  450. i2c_transfer(&dev->i2c_adap, &tuner_msg, 1);
  451. }
  452. static struct tda1004x_config tda827x_lifeview_config = {
  453. .demod_address = 0x08,
  454. .invert = 1,
  455. .invert_oclk = 0,
  456. .xtal_freq = TDA10046_XTAL_16M,
  457. .agc_config = TDA10046_AGC_TDA827X,
  458. .if_freq = TDA10046_FREQ_045,
  459. .pll_init = philips_tda827x_pll_init,
  460. .pll_set = philips_tda827x_pll_set,
  461. .pll_sleep = philips_tda827x_pll_sleep,
  462. .request_firmware = NULL,
  463. };
  464. #endif
  465. /* ------------------------------------------------------------------ */
  466. static int dvb_init(struct saa7134_dev *dev)
  467. {
  468. /* init struct videobuf_dvb */
  469. dev->ts.nr_bufs = 32;
  470. dev->ts.nr_packets = 32*4;
  471. dev->dvb.name = dev->name;
  472. videobuf_queue_init(&dev->dvb.dvbq, &saa7134_ts_qops,
  473. dev->pci, &dev->slock,
  474. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  475. V4L2_FIELD_ALTERNATE,
  476. sizeof(struct saa7134_buf),
  477. dev);
  478. switch (dev->board) {
  479. #ifdef HAVE_MT352
  480. case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
  481. printk("%s: pinnacle 300i dvb setup\n",dev->name);
  482. dev->dvb.frontend = mt352_attach(&pinnacle_300i,
  483. &dev->i2c_adap);
  484. break;
  485. #endif
  486. #ifdef HAVE_TDA1004X
  487. case SAA7134_BOARD_MD7134:
  488. dev->dvb.frontend = tda10046_attach(&medion_cardbus,
  489. &dev->i2c_adap);
  490. break;
  491. case SAA7134_BOARD_PHILIPS_TOUGH:
  492. dev->dvb.frontend = tda10046_attach(&philips_tu1216_config,
  493. &dev->i2c_adap);
  494. break;
  495. case SAA7134_BOARD_FLYDVBTDUO:
  496. dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
  497. &dev->i2c_adap);
  498. break;
  499. case SAA7134_BOARD_THYPHOON_DVBT_DUO_CARDBUS:
  500. dev->dvb.frontend = tda10046_attach(&tda827x_lifeview_config,
  501. &dev->i2c_adap);
  502. break;
  503. #endif
  504. default:
  505. printk("%s: Huh? unknown DVB card?\n",dev->name);
  506. break;
  507. }
  508. if (NULL == dev->dvb.frontend) {
  509. printk("%s: frontend initialization failed\n",dev->name);
  510. return -1;
  511. }
  512. /* register everything else */
  513. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev);
  514. }
  515. static int dvb_fini(struct saa7134_dev *dev)
  516. {
  517. static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
  518. switch (dev->board) {
  519. case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
  520. /* otherwise we don't detect the tuner on next insmod */
  521. saa7134_i2c_call_clients(dev,TDA9887_SET_CONFIG,&on);
  522. break;
  523. };
  524. videobuf_dvb_unregister(&dev->dvb);
  525. return 0;
  526. }
  527. static struct saa7134_mpeg_ops dvb_ops = {
  528. .type = SAA7134_MPEG_DVB,
  529. .init = dvb_init,
  530. .fini = dvb_fini,
  531. };
  532. static int __init dvb_register(void)
  533. {
  534. return saa7134_ts_register(&dvb_ops);
  535. }
  536. static void __exit dvb_unregister(void)
  537. {
  538. saa7134_ts_unregister(&dvb_ops);
  539. }
  540. module_init(dvb_register);
  541. module_exit(dvb_unregister);
  542. /* ------------------------------------------------------------------ */
  543. /*
  544. * Local variables:
  545. * c-basic-offset: 8
  546. * End:
  547. */