lgdt330x.c 21 KB

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  1. /*
  2. * Support for LGDT3302 and LGDT3303 - VSB/QAM
  3. *
  4. * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. *
  20. */
  21. /*
  22. * NOTES ABOUT THIS DRIVER
  23. *
  24. * This Linux driver supports:
  25. * DViCO FusionHDTV 3 Gold-Q
  26. * DViCO FusionHDTV 3 Gold-T
  27. * DViCO FusionHDTV 5 Gold
  28. *
  29. * TODO:
  30. * signal strength always returns 0.
  31. *
  32. */
  33. #include <linux/kernel.h>
  34. #include <linux/module.h>
  35. #include <linux/moduleparam.h>
  36. #include <linux/init.h>
  37. #include <linux/delay.h>
  38. #include <asm/byteorder.h>
  39. #include "dvb_frontend.h"
  40. #include "lgdt330x_priv.h"
  41. #include "lgdt330x.h"
  42. static int debug = 0;
  43. module_param(debug, int, 0644);
  44. MODULE_PARM_DESC(debug,"Turn on/off lgdt330x frontend debugging (default:off).");
  45. #define dprintk(args...) \
  46. do { \
  47. if (debug) printk(KERN_DEBUG "lgdt330x: " args); \
  48. } while (0)
  49. struct lgdt330x_state
  50. {
  51. struct i2c_adapter* i2c;
  52. struct dvb_frontend_ops ops;
  53. /* Configuration settings */
  54. const struct lgdt330x_config* config;
  55. struct dvb_frontend frontend;
  56. /* Demodulator private data */
  57. fe_modulation_t current_modulation;
  58. /* Tuner private data */
  59. u32 current_frequency;
  60. };
  61. static int i2c_write_demod_bytes (struct lgdt330x_state* state,
  62. u8 *buf, /* data bytes to send */
  63. int len /* number of bytes to send */ )
  64. {
  65. struct i2c_msg msg =
  66. { .addr = state->config->demod_address,
  67. .flags = 0,
  68. .buf = buf,
  69. .len = 2 };
  70. int i;
  71. int err;
  72. for (i=0; i<len-1; i+=2){
  73. if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
  74. printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __FUNCTION__, msg.buf[0], msg.buf[1], err);
  75. if (err < 0)
  76. return err;
  77. else
  78. return -EREMOTEIO;
  79. }
  80. msg.buf += 2;
  81. }
  82. return 0;
  83. }
  84. /*
  85. * This routine writes the register (reg) to the demod bus
  86. * then reads the data returned for (len) bytes.
  87. */
  88. static u8 i2c_read_demod_bytes (struct lgdt330x_state* state,
  89. enum I2C_REG reg, u8* buf, int len)
  90. {
  91. u8 wr [] = { reg };
  92. struct i2c_msg msg [] = {
  93. { .addr = state->config->demod_address,
  94. .flags = 0, .buf = wr, .len = 1 },
  95. { .addr = state->config->demod_address,
  96. .flags = I2C_M_RD, .buf = buf, .len = len },
  97. };
  98. int ret;
  99. ret = i2c_transfer(state->i2c, msg, 2);
  100. if (ret != 2) {
  101. printk(KERN_WARNING "lgdt330x: %s: addr 0x%02x select 0x%02x error (ret == %i)\n", __FUNCTION__, state->config->demod_address, reg, ret);
  102. } else {
  103. ret = 0;
  104. }
  105. return ret;
  106. }
  107. /* Software reset */
  108. static int lgdt3302_SwReset(struct lgdt330x_state* state)
  109. {
  110. u8 ret;
  111. u8 reset[] = {
  112. IRQ_MASK,
  113. 0x00 /* bit 6 is active low software reset
  114. * bits 5-0 are 1 to mask interrupts */
  115. };
  116. ret = i2c_write_demod_bytes(state,
  117. reset, sizeof(reset));
  118. if (ret == 0) {
  119. /* force reset high (inactive) and unmask interrupts */
  120. reset[1] = 0x7f;
  121. ret = i2c_write_demod_bytes(state,
  122. reset, sizeof(reset));
  123. }
  124. return ret;
  125. }
  126. static int lgdt3303_SwReset(struct lgdt330x_state* state)
  127. {
  128. u8 ret;
  129. u8 reset[] = {
  130. 0x02,
  131. 0x00 /* bit 0 is active low software reset */
  132. };
  133. ret = i2c_write_demod_bytes(state,
  134. reset, sizeof(reset));
  135. if (ret == 0) {
  136. /* force reset high (inactive) */
  137. reset[1] = 0x01;
  138. ret = i2c_write_demod_bytes(state,
  139. reset, sizeof(reset));
  140. }
  141. return ret;
  142. }
  143. static int lgdt330x_SwReset(struct lgdt330x_state* state)
  144. {
  145. switch (state->config->demod_chip) {
  146. case LGDT3302:
  147. return lgdt3302_SwReset(state);
  148. case LGDT3303:
  149. return lgdt3303_SwReset(state);
  150. default:
  151. return -ENODEV;
  152. }
  153. }
  154. static int lgdt330x_init(struct dvb_frontend* fe)
  155. {
  156. /* Hardware reset is done using gpio[0] of cx23880x chip.
  157. * I'd like to do it here, but don't know how to find chip address.
  158. * cx88-cards.c arranges for the reset bit to be inactive (high).
  159. * Maybe there needs to be a callable function in cx88-core or
  160. * the caller of this function needs to do it. */
  161. /*
  162. * Array of byte pairs <address, value>
  163. * to initialize each different chip
  164. */
  165. static u8 lgdt3302_init_data[] = {
  166. /* Use 50MHz parameter values from spec sheet since xtal is 50 */
  167. /* Change the value of NCOCTFV[25:0] of carrier
  168. recovery center frequency register */
  169. VSB_CARRIER_FREQ0, 0x00,
  170. VSB_CARRIER_FREQ1, 0x87,
  171. VSB_CARRIER_FREQ2, 0x8e,
  172. VSB_CARRIER_FREQ3, 0x01,
  173. /* Change the TPCLK pin polarity
  174. data is valid on falling clock */
  175. DEMUX_CONTROL, 0xfb,
  176. /* Change the value of IFBW[11:0] of
  177. AGC IF/RF loop filter bandwidth register */
  178. AGC_RF_BANDWIDTH0, 0x40,
  179. AGC_RF_BANDWIDTH1, 0x93,
  180. AGC_RF_BANDWIDTH2, 0x00,
  181. /* Change the value of bit 6, 'nINAGCBY' and
  182. 'NSSEL[1:0] of ACG function control register 2 */
  183. AGC_FUNC_CTRL2, 0xc6,
  184. /* Change the value of bit 6 'RFFIX'
  185. of AGC function control register 3 */
  186. AGC_FUNC_CTRL3, 0x40,
  187. /* Set the value of 'INLVTHD' register 0x2a/0x2c
  188. to 0x7fe */
  189. AGC_DELAY0, 0x07,
  190. AGC_DELAY2, 0xfe,
  191. /* Change the value of IAGCBW[15:8]
  192. of inner AGC loop filter bandwith */
  193. AGC_LOOP_BANDWIDTH0, 0x08,
  194. AGC_LOOP_BANDWIDTH1, 0x9a
  195. };
  196. static u8 lgdt3303_init_data[] = {
  197. 0x4c, 0x14
  198. };
  199. struct lgdt330x_state* state = fe->demodulator_priv;
  200. char *chip_name;
  201. int err;
  202. switch (state->config->demod_chip) {
  203. case LGDT3302:
  204. chip_name = "LGDT3302";
  205. err = i2c_write_demod_bytes(state, lgdt3302_init_data,
  206. sizeof(lgdt3302_init_data));
  207. break;
  208. case LGDT3303:
  209. chip_name = "LGDT3303";
  210. err = i2c_write_demod_bytes(state, lgdt3303_init_data,
  211. sizeof(lgdt3303_init_data));
  212. break;
  213. default:
  214. chip_name = "undefined";
  215. printk (KERN_WARNING "Only LGDT3302 and LGDT3303 are supported chips.\n");
  216. err = -ENODEV;
  217. }
  218. dprintk("%s entered as %s\n", __FUNCTION__, chip_name);
  219. if (err < 0)
  220. return err;
  221. return lgdt330x_SwReset(state);
  222. }
  223. static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber)
  224. {
  225. *ber = 0; /* Not supplied by the demod chips */
  226. return 0;
  227. }
  228. static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
  229. {
  230. struct lgdt330x_state* state = fe->demodulator_priv;
  231. int err;
  232. u8 buf[2];
  233. switch (state->config->demod_chip) {
  234. case LGDT3302:
  235. err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
  236. buf, sizeof(buf));
  237. break;
  238. case LGDT3303:
  239. err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
  240. buf, sizeof(buf));
  241. break;
  242. default:
  243. printk(KERN_WARNING
  244. "Only LGDT3302 and LGDT3303 are supported chips.\n");
  245. err = -ENODEV;
  246. }
  247. *ucblocks = (buf[0] << 8) | buf[1];
  248. return 0;
  249. }
  250. static int lgdt330x_set_parameters(struct dvb_frontend* fe,
  251. struct dvb_frontend_parameters *param)
  252. {
  253. /*
  254. * Array of byte pairs <address, value>
  255. * to initialize 8VSB for lgdt3303 chip 50 MHz IF
  256. */
  257. static u8 lgdt3303_8vsb_44_data[] = {
  258. 0x04, 0x00,
  259. 0x0d, 0x40,
  260. 0x0e, 0x87,
  261. 0x0f, 0x8e,
  262. 0x10, 0x01,
  263. 0x47, 0x8b };
  264. /*
  265. * Array of byte pairs <address, value>
  266. * to initialize QAM for lgdt3303 chip
  267. */
  268. static u8 lgdt3303_qam_data[] = {
  269. 0x04, 0x00,
  270. 0x0d, 0x00,
  271. 0x0e, 0x00,
  272. 0x0f, 0x00,
  273. 0x10, 0x00,
  274. 0x51, 0x63,
  275. 0x47, 0x66,
  276. 0x48, 0x66,
  277. 0x4d, 0x1a,
  278. 0x49, 0x08,
  279. 0x4a, 0x9b };
  280. struct lgdt330x_state* state = fe->demodulator_priv;
  281. static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 };
  282. int err;
  283. /* Change only if we are actually changing the modulation */
  284. if (state->current_modulation != param->u.vsb.modulation) {
  285. switch(param->u.vsb.modulation) {
  286. case VSB_8:
  287. dprintk("%s: VSB_8 MODE\n", __FUNCTION__);
  288. /* Select VSB mode */
  289. top_ctrl_cfg[1] = 0x03;
  290. /* Select ANT connector if supported by card */
  291. if (state->config->pll_rf_set)
  292. state->config->pll_rf_set(fe, 1);
  293. if (state->config->demod_chip == LGDT3303) {
  294. err = i2c_write_demod_bytes(state, lgdt3303_8vsb_44_data,
  295. sizeof(lgdt3303_8vsb_44_data));
  296. }
  297. break;
  298. case QAM_64:
  299. dprintk("%s: QAM_64 MODE\n", __FUNCTION__);
  300. /* Select QAM_64 mode */
  301. top_ctrl_cfg[1] = 0x00;
  302. /* Select CABLE connector if supported by card */
  303. if (state->config->pll_rf_set)
  304. state->config->pll_rf_set(fe, 0);
  305. if (state->config->demod_chip == LGDT3303) {
  306. err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
  307. sizeof(lgdt3303_qam_data));
  308. }
  309. break;
  310. case QAM_256:
  311. dprintk("%s: QAM_256 MODE\n", __FUNCTION__);
  312. /* Select QAM_256 mode */
  313. top_ctrl_cfg[1] = 0x01;
  314. /* Select CABLE connector if supported by card */
  315. if (state->config->pll_rf_set)
  316. state->config->pll_rf_set(fe, 0);
  317. if (state->config->demod_chip == LGDT3303) {
  318. err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
  319. sizeof(lgdt3303_qam_data));
  320. }
  321. break;
  322. default:
  323. printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __FUNCTION__, param->u.vsb.modulation);
  324. return -1;
  325. }
  326. /*
  327. * select serial or parallel MPEG harware interface
  328. * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303
  329. * Parallel: 0x00
  330. */
  331. top_ctrl_cfg[1] |= state->config->serial_mpeg;
  332. /* Select the requested mode */
  333. i2c_write_demod_bytes(state, top_ctrl_cfg,
  334. sizeof(top_ctrl_cfg));
  335. if (state->config->set_ts_params)
  336. state->config->set_ts_params(fe, 0);
  337. state->current_modulation = param->u.vsb.modulation;
  338. }
  339. /* Tune to the specified frequency */
  340. if (state->config->pll_set)
  341. state->config->pll_set(fe, param);
  342. /* Keep track of the new frequency */
  343. state->current_frequency = param->frequency;
  344. lgdt330x_SwReset(state);
  345. return 0;
  346. }
  347. static int lgdt330x_get_frontend(struct dvb_frontend* fe,
  348. struct dvb_frontend_parameters* param)
  349. {
  350. struct lgdt330x_state *state = fe->demodulator_priv;
  351. param->frequency = state->current_frequency;
  352. return 0;
  353. }
  354. static int lgdt3302_read_status(struct dvb_frontend* fe, fe_status_t* status)
  355. {
  356. struct lgdt330x_state* state = fe->demodulator_priv;
  357. u8 buf[3];
  358. *status = 0; /* Reset status result */
  359. /* AGC status register */
  360. i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
  361. dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
  362. if ((buf[0] & 0x0c) == 0x8){
  363. /* Test signal does not exist flag */
  364. /* as well as the AGC lock flag. */
  365. *status |= FE_HAS_SIGNAL;
  366. } else {
  367. /* Without a signal all other status bits are meaningless */
  368. return 0;
  369. }
  370. /*
  371. * You must set the Mask bits to 1 in the IRQ_MASK in order
  372. * to see that status bit in the IRQ_STATUS register.
  373. * This is done in SwReset();
  374. */
  375. /* signal status */
  376. i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
  377. dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __FUNCTION__, buf[0], buf[1], buf[2]);
  378. /* sync status */
  379. if ((buf[2] & 0x03) == 0x01) {
  380. *status |= FE_HAS_SYNC;
  381. }
  382. /* FEC error status */
  383. if ((buf[2] & 0x0c) == 0x08) {
  384. *status |= FE_HAS_LOCK;
  385. *status |= FE_HAS_VITERBI;
  386. }
  387. /* Carrier Recovery Lock Status Register */
  388. i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
  389. dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
  390. switch (state->current_modulation) {
  391. case QAM_256:
  392. case QAM_64:
  393. /* Need to undestand why there are 3 lock levels here */
  394. if ((buf[0] & 0x07) == 0x07)
  395. *status |= FE_HAS_CARRIER;
  396. break;
  397. case VSB_8:
  398. if ((buf[0] & 0x80) == 0x80)
  399. *status |= FE_HAS_CARRIER;
  400. break;
  401. default:
  402. printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
  403. }
  404. return 0;
  405. }
  406. static int lgdt3303_read_status(struct dvb_frontend* fe, fe_status_t* status)
  407. {
  408. struct lgdt330x_state* state = fe->demodulator_priv;
  409. int err;
  410. u8 buf[3];
  411. *status = 0; /* Reset status result */
  412. /* lgdt3303 AGC status register */
  413. err = i2c_read_demod_bytes(state, 0x58, buf, 1);
  414. if (err < 0)
  415. return err;
  416. dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
  417. if ((buf[0] & 0x21) == 0x01){
  418. /* Test input signal does not exist flag */
  419. /* as well as the AGC lock flag. */
  420. *status |= FE_HAS_SIGNAL;
  421. } else {
  422. /* Without a signal all other status bits are meaningless */
  423. return 0;
  424. }
  425. /* Carrier Recovery Lock Status Register */
  426. i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
  427. dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
  428. switch (state->current_modulation) {
  429. case QAM_256:
  430. case QAM_64:
  431. /* Need to undestand why there are 3 lock levels here */
  432. if ((buf[0] & 0x07) == 0x07)
  433. *status |= FE_HAS_CARRIER;
  434. else
  435. break;
  436. i2c_read_demod_bytes(state, 0x8a, buf, 1);
  437. if ((buf[0] & 0x04) == 0x04)
  438. *status |= FE_HAS_SYNC;
  439. if ((buf[0] & 0x01) == 0x01)
  440. *status |= FE_HAS_LOCK;
  441. if ((buf[0] & 0x08) == 0x08)
  442. *status |= FE_HAS_VITERBI;
  443. break;
  444. case VSB_8:
  445. if ((buf[0] & 0x80) == 0x80)
  446. *status |= FE_HAS_CARRIER;
  447. else
  448. break;
  449. i2c_read_demod_bytes(state, 0x38, buf, 1);
  450. if ((buf[0] & 0x02) == 0x00)
  451. *status |= FE_HAS_SYNC;
  452. if ((buf[0] & 0x01) == 0x01) {
  453. *status |= FE_HAS_LOCK;
  454. *status |= FE_HAS_VITERBI;
  455. }
  456. break;
  457. default:
  458. printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
  459. }
  460. return 0;
  461. }
  462. static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
  463. {
  464. /* not directly available. */
  465. *strength = 0;
  466. return 0;
  467. }
  468. static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr)
  469. {
  470. #ifdef SNR_IN_DB
  471. /*
  472. * Spec sheet shows formula for SNR_EQ = 10 log10(25 * 24**2 / noise)
  473. * and SNR_PH = 10 log10(25 * 32**2 / noise) for equalizer and phase tracker
  474. * respectively. The following tables are built on these formulas.
  475. * The usual definition is SNR = 20 log10(signal/noise)
  476. * If the specification is wrong the value retuned is 1/2 the actual SNR in db.
  477. *
  478. * This table is a an ordered list of noise values computed by the
  479. * formula from the spec sheet such that the index into the table
  480. * starting at 43 or 45 is the SNR value in db. There are duplicate noise
  481. * value entries at the beginning because the SNR varies more than
  482. * 1 db for a change of 1 digit in noise at very small values of noise.
  483. *
  484. * Examples from SNR_EQ table:
  485. * noise SNR
  486. * 0 43
  487. * 1 42
  488. * 2 39
  489. * 3 37
  490. * 4 36
  491. * 5 35
  492. * 6 34
  493. * 7 33
  494. * 8 33
  495. * 9 32
  496. * 10 32
  497. * 11 31
  498. * 12 31
  499. * 13 30
  500. */
  501. static const u32 SNR_EQ[] =
  502. { 1, 2, 2, 2, 3, 3, 4, 4, 5, 7,
  503. 9, 11, 13, 17, 21, 26, 33, 41, 52, 65,
  504. 81, 102, 129, 162, 204, 257, 323, 406, 511, 644,
  505. 810, 1020, 1284, 1616, 2035, 2561, 3224, 4059, 5110, 6433,
  506. 8098, 10195, 12835, 16158, 20341, 25608, 32238, 40585, 51094, 64323,
  507. 80978, 101945, 128341, 161571, 203406, 256073, 0x40000
  508. };
  509. static const u32 SNR_PH[] =
  510. { 1, 2, 2, 2, 3, 3, 4, 5, 6, 8,
  511. 10, 12, 15, 19, 23, 29, 37, 46, 58, 73,
  512. 91, 115, 144, 182, 229, 288, 362, 456, 574, 722,
  513. 909, 1144, 1440, 1813, 2282, 2873, 3617, 4553, 5732, 7216,
  514. 9084, 11436, 14396, 18124, 22817, 28724, 36161, 45524, 57312, 72151,
  515. 90833, 114351, 143960, 181235, 228161, 0x080000
  516. };
  517. static u8 buf[5];/* read data buffer */
  518. static u32 noise; /* noise value */
  519. static u32 snr_db; /* index into SNR_EQ[] */
  520. struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
  521. /* read both equalizer and phase tracker noise data */
  522. i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
  523. if (state->current_modulation == VSB_8) {
  524. /* Equalizer Mean-Square Error Register for VSB */
  525. noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
  526. /*
  527. * Look up noise value in table.
  528. * A better search algorithm could be used...
  529. * watch out there are duplicate entries.
  530. */
  531. for (snr_db = 0; snr_db < sizeof(SNR_EQ); snr_db++) {
  532. if (noise < SNR_EQ[snr_db]) {
  533. *snr = 43 - snr_db;
  534. break;
  535. }
  536. }
  537. } else {
  538. /* Phase Tracker Mean-Square Error Register for QAM */
  539. noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
  540. /* Look up noise value in table. */
  541. for (snr_db = 0; snr_db < sizeof(SNR_PH); snr_db++) {
  542. if (noise < SNR_PH[snr_db]) {
  543. *snr = 45 - snr_db;
  544. break;
  545. }
  546. }
  547. }
  548. #else
  549. /* Return the raw noise value */
  550. static u8 buf[5];/* read data buffer */
  551. static u32 noise; /* noise value */
  552. struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
  553. /* read both equalizer and pase tracker noise data */
  554. i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
  555. if (state->current_modulation == VSB_8) {
  556. /* Phase Tracker Mean-Square Error Register for VSB */
  557. noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
  558. } else {
  559. /* Carrier Recovery Mean-Square Error for QAM */
  560. i2c_read_demod_bytes(state, 0x1a, buf, 2);
  561. noise = ((buf[0] & 3) << 8) | buf[1];
  562. }
  563. /* Small values for noise mean signal is better so invert noise */
  564. *snr = ~noise;
  565. #endif
  566. dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
  567. return 0;
  568. }
  569. static int lgdt3303_read_snr(struct dvb_frontend* fe, u16* snr)
  570. {
  571. /* Return the raw noise value */
  572. static u8 buf[5];/* read data buffer */
  573. static u32 noise; /* noise value */
  574. struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
  575. if (state->current_modulation == VSB_8) {
  576. /* Phase Tracker Mean-Square Error Register for VSB */
  577. noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
  578. } else {
  579. /* Carrier Recovery Mean-Square Error for QAM */
  580. i2c_read_demod_bytes(state, 0x1a, buf, 2);
  581. noise = (buf[0] << 8) | buf[1];
  582. }
  583. /* Small values for noise mean signal is better so invert noise */
  584. *snr = ~noise;
  585. dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
  586. return 0;
  587. }
  588. static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
  589. {
  590. /* I have no idea about this - it may not be needed */
  591. fe_tune_settings->min_delay_ms = 500;
  592. fe_tune_settings->step_size = 0;
  593. fe_tune_settings->max_drift = 0;
  594. return 0;
  595. }
  596. static void lgdt330x_release(struct dvb_frontend* fe)
  597. {
  598. struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
  599. kfree(state);
  600. }
  601. static struct dvb_frontend_ops lgdt3302_ops;
  602. static struct dvb_frontend_ops lgdt3303_ops;
  603. struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
  604. struct i2c_adapter* i2c)
  605. {
  606. struct lgdt330x_state* state = NULL;
  607. u8 buf[1];
  608. /* Allocate memory for the internal state */
  609. state = (struct lgdt330x_state*) kmalloc(sizeof(struct lgdt330x_state), GFP_KERNEL);
  610. if (state == NULL)
  611. goto error;
  612. memset(state,0,sizeof(*state));
  613. /* Setup the state */
  614. state->config = config;
  615. state->i2c = i2c;
  616. switch (config->demod_chip) {
  617. case LGDT3302:
  618. memcpy(&state->ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops));
  619. break;
  620. case LGDT3303:
  621. memcpy(&state->ops, &lgdt3303_ops, sizeof(struct dvb_frontend_ops));
  622. break;
  623. default:
  624. goto error;
  625. }
  626. /* Verify communication with demod chip */
  627. if (i2c_read_demod_bytes(state, 2, buf, 1))
  628. goto error;
  629. state->current_frequency = -1;
  630. state->current_modulation = -1;
  631. /* Create dvb_frontend */
  632. state->frontend.ops = &state->ops;
  633. state->frontend.demodulator_priv = state;
  634. return &state->frontend;
  635. error:
  636. if (state)
  637. kfree(state);
  638. dprintk("%s: ERROR\n",__FUNCTION__);
  639. return NULL;
  640. }
  641. static struct dvb_frontend_ops lgdt3302_ops = {
  642. .info = {
  643. .name= "LG Electronics LGDT3302 VSB/QAM Frontend",
  644. .type = FE_ATSC,
  645. .frequency_min= 54000000,
  646. .frequency_max= 858000000,
  647. .frequency_stepsize= 62500,
  648. /* Symbol rate is for all VSB modes need to check QAM */
  649. .symbol_rate_min = 10762000,
  650. .symbol_rate_max = 10762000,
  651. .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
  652. },
  653. .init = lgdt330x_init,
  654. .set_frontend = lgdt330x_set_parameters,
  655. .get_frontend = lgdt330x_get_frontend,
  656. .get_tune_settings = lgdt330x_get_tune_settings,
  657. .read_status = lgdt3302_read_status,
  658. .read_ber = lgdt330x_read_ber,
  659. .read_signal_strength = lgdt330x_read_signal_strength,
  660. .read_snr = lgdt3302_read_snr,
  661. .read_ucblocks = lgdt330x_read_ucblocks,
  662. .release = lgdt330x_release,
  663. };
  664. static struct dvb_frontend_ops lgdt3303_ops = {
  665. .info = {
  666. .name= "LG Electronics LGDT3303 VSB/QAM Frontend",
  667. .type = FE_ATSC,
  668. .frequency_min= 54000000,
  669. .frequency_max= 858000000,
  670. .frequency_stepsize= 62500,
  671. /* Symbol rate is for all VSB modes need to check QAM */
  672. .symbol_rate_min = 10762000,
  673. .symbol_rate_max = 10762000,
  674. .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
  675. },
  676. .init = lgdt330x_init,
  677. .set_frontend = lgdt330x_set_parameters,
  678. .get_frontend = lgdt330x_get_frontend,
  679. .get_tune_settings = lgdt330x_get_tune_settings,
  680. .read_status = lgdt3303_read_status,
  681. .read_ber = lgdt330x_read_ber,
  682. .read_signal_strength = lgdt330x_read_signal_strength,
  683. .read_snr = lgdt3303_read_snr,
  684. .read_ucblocks = lgdt330x_read_ucblocks,
  685. .release = lgdt330x_release,
  686. };
  687. MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
  688. MODULE_AUTHOR("Wilson Michaels");
  689. MODULE_LICENSE("GPL");
  690. EXPORT_SYMBOL(lgdt330x_attach);
  691. /*
  692. * Local variables:
  693. * c-basic-offset: 8
  694. * End:
  695. */