cx22702.c 14 KB

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  1. /*
  2. Conexant 22702 DVB OFDM demodulator driver
  3. based on:
  4. Alps TDMB7 DVB OFDM demodulator driver
  5. Copyright (C) 2001-2002 Convergence Integrated Media GmbH
  6. Holger Waechtler <holger@convergence.de>
  7. Copyright (C) 2004 Steven Toth <steve@toth.demon.co.uk>
  8. This program is free software; you can redistribute it and/or modify
  9. it under the terms of the GNU General Public License as published by
  10. the Free Software Foundation; either version 2 of the License, or
  11. (at your option) any later version.
  12. This program is distributed in the hope that it will be useful,
  13. but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. GNU General Public License for more details.
  16. You should have received a copy of the GNU General Public License
  17. along with this program; if not, write to the Free Software
  18. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/module.h>
  23. #include <linux/string.h>
  24. #include <linux/slab.h>
  25. #include <linux/delay.h>
  26. #include "dvb_frontend.h"
  27. #include "dvb-pll.h"
  28. #include "cx22702.h"
  29. struct cx22702_state {
  30. struct i2c_adapter* i2c;
  31. struct dvb_frontend_ops ops;
  32. /* configuration settings */
  33. const struct cx22702_config* config;
  34. struct dvb_frontend frontend;
  35. /* previous uncorrected block counter */
  36. u8 prevUCBlocks;
  37. };
  38. static int debug = 0;
  39. #define dprintk if (debug) printk
  40. /* Register values to initialise the demod */
  41. static u8 init_tab [] = {
  42. 0x00, 0x00, /* Stop aquisition */
  43. 0x0B, 0x06,
  44. 0x09, 0x01,
  45. 0x0D, 0x41,
  46. 0x16, 0x32,
  47. 0x20, 0x0A,
  48. 0x21, 0x17,
  49. 0x24, 0x3e,
  50. 0x26, 0xff,
  51. 0x27, 0x10,
  52. 0x28, 0x00,
  53. 0x29, 0x00,
  54. 0x2a, 0x10,
  55. 0x2b, 0x00,
  56. 0x2c, 0x10,
  57. 0x2d, 0x00,
  58. 0x48, 0xd4,
  59. 0x49, 0x56,
  60. 0x6b, 0x1e,
  61. 0xc8, 0x02,
  62. 0xf9, 0x00,
  63. 0xfa, 0x00,
  64. 0xfb, 0x00,
  65. 0xfc, 0x00,
  66. 0xfd, 0x00,
  67. };
  68. static int cx22702_writereg (struct cx22702_state* state, u8 reg, u8 data)
  69. {
  70. int ret;
  71. u8 buf [] = { reg, data };
  72. struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
  73. ret = i2c_transfer(state->i2c, &msg, 1);
  74. if (ret != 1)
  75. printk("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
  76. __FUNCTION__, reg, data, ret);
  77. return (ret != 1) ? -1 : 0;
  78. }
  79. static u8 cx22702_readreg (struct cx22702_state* state, u8 reg)
  80. {
  81. int ret;
  82. u8 b0 [] = { reg };
  83. u8 b1 [] = { 0 };
  84. struct i2c_msg msg [] = {
  85. { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
  86. { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
  87. ret = i2c_transfer(state->i2c, msg, 2);
  88. if (ret != 2)
  89. printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
  90. return b1[0];
  91. }
  92. static int cx22702_set_inversion (struct cx22702_state *state, int inversion)
  93. {
  94. u8 val;
  95. switch (inversion) {
  96. case INVERSION_AUTO:
  97. return -EOPNOTSUPP;
  98. case INVERSION_ON:
  99. val = cx22702_readreg (state, 0x0C);
  100. return cx22702_writereg (state, 0x0C, val | 0x01);
  101. case INVERSION_OFF:
  102. val = cx22702_readreg (state, 0x0C);
  103. return cx22702_writereg (state, 0x0C, val & 0xfe);
  104. default:
  105. return -EINVAL;
  106. }
  107. }
  108. /* Retrieve the demod settings */
  109. static int cx22702_get_tps (struct cx22702_state *state, struct dvb_ofdm_parameters *p)
  110. {
  111. u8 val;
  112. /* Make sure the TPS regs are valid */
  113. if (!(cx22702_readreg(state, 0x0A) & 0x20))
  114. return -EAGAIN;
  115. val = cx22702_readreg (state, 0x01);
  116. switch( (val&0x18)>>3) {
  117. case 0: p->constellation = QPSK; break;
  118. case 1: p->constellation = QAM_16; break;
  119. case 2: p->constellation = QAM_64; break;
  120. }
  121. switch( val&0x07 ) {
  122. case 0: p->hierarchy_information = HIERARCHY_NONE; break;
  123. case 1: p->hierarchy_information = HIERARCHY_1; break;
  124. case 2: p->hierarchy_information = HIERARCHY_2; break;
  125. case 3: p->hierarchy_information = HIERARCHY_4; break;
  126. }
  127. val = cx22702_readreg (state, 0x02);
  128. switch( (val&0x38)>>3 ) {
  129. case 0: p->code_rate_HP = FEC_1_2; break;
  130. case 1: p->code_rate_HP = FEC_2_3; break;
  131. case 2: p->code_rate_HP = FEC_3_4; break;
  132. case 3: p->code_rate_HP = FEC_5_6; break;
  133. case 4: p->code_rate_HP = FEC_7_8; break;
  134. }
  135. switch( val&0x07 ) {
  136. case 0: p->code_rate_LP = FEC_1_2; break;
  137. case 1: p->code_rate_LP = FEC_2_3; break;
  138. case 2: p->code_rate_LP = FEC_3_4; break;
  139. case 3: p->code_rate_LP = FEC_5_6; break;
  140. case 4: p->code_rate_LP = FEC_7_8; break;
  141. }
  142. val = cx22702_readreg (state, 0x03);
  143. switch( (val&0x0c)>>2 ) {
  144. case 0: p->guard_interval = GUARD_INTERVAL_1_32; break;
  145. case 1: p->guard_interval = GUARD_INTERVAL_1_16; break;
  146. case 2: p->guard_interval = GUARD_INTERVAL_1_8; break;
  147. case 3: p->guard_interval = GUARD_INTERVAL_1_4; break;
  148. }
  149. switch( val&0x03 ) {
  150. case 0: p->transmission_mode = TRANSMISSION_MODE_2K; break;
  151. case 1: p->transmission_mode = TRANSMISSION_MODE_8K; break;
  152. }
  153. return 0;
  154. }
  155. /* Talk to the demod, set the FEC, GUARD, QAM settings etc */
  156. static int cx22702_set_tps (struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
  157. {
  158. u8 val;
  159. struct cx22702_state* state = fe->demodulator_priv;
  160. /* set PLL */
  161. cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) &0xfe);
  162. if (state->config->pll_set) {
  163. state->config->pll_set(fe, p);
  164. } else if (state->config->pll_desc) {
  165. u8 pllbuf[4];
  166. struct i2c_msg msg = { .addr = state->config->pll_address,
  167. .buf = pllbuf, .len = 4 };
  168. dvb_pll_configure(state->config->pll_desc, pllbuf,
  169. p->frequency,
  170. p->u.ofdm.bandwidth);
  171. i2c_transfer(state->i2c, &msg, 1);
  172. } else {
  173. BUG();
  174. }
  175. cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) | 1);
  176. /* set inversion */
  177. cx22702_set_inversion (state, p->inversion);
  178. /* set bandwidth */
  179. switch(p->u.ofdm.bandwidth) {
  180. case BANDWIDTH_6_MHZ:
  181. cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xcf) | 0x20 );
  182. break;
  183. case BANDWIDTH_7_MHZ:
  184. cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xcf) | 0x10 );
  185. break;
  186. case BANDWIDTH_8_MHZ:
  187. cx22702_writereg(state, 0x0C, cx22702_readreg(state, 0x0C) &0xcf );
  188. break;
  189. default:
  190. dprintk ("%s: invalid bandwidth\n",__FUNCTION__);
  191. return -EINVAL;
  192. }
  193. p->u.ofdm.code_rate_LP = FEC_AUTO; //temp hack as manual not working
  194. /* use auto configuration? */
  195. if((p->u.ofdm.hierarchy_information==HIERARCHY_AUTO) ||
  196. (p->u.ofdm.constellation==QAM_AUTO) ||
  197. (p->u.ofdm.code_rate_HP==FEC_AUTO) ||
  198. (p->u.ofdm.code_rate_LP==FEC_AUTO) ||
  199. (p->u.ofdm.guard_interval==GUARD_INTERVAL_AUTO) ||
  200. (p->u.ofdm.transmission_mode==TRANSMISSION_MODE_AUTO) ) {
  201. /* TPS Source - use hardware driven values */
  202. cx22702_writereg(state, 0x06, 0x10);
  203. cx22702_writereg(state, 0x07, 0x9);
  204. cx22702_writereg(state, 0x08, 0xC1);
  205. cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B) & 0xfc );
  206. cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40 );
  207. cx22702_writereg(state, 0x00, 0x01); /* Begin aquisition */
  208. dprintk("%s: Autodetecting\n",__FUNCTION__);
  209. return 0;
  210. }
  211. /* manually programmed values */
  212. val=0;
  213. switch(p->u.ofdm.constellation) {
  214. case QPSK: val = (val&0xe7); break;
  215. case QAM_16: val = (val&0xe7)|0x08; break;
  216. case QAM_64: val = (val&0xe7)|0x10; break;
  217. default:
  218. dprintk ("%s: invalid constellation\n",__FUNCTION__);
  219. return -EINVAL;
  220. }
  221. switch(p->u.ofdm.hierarchy_information) {
  222. case HIERARCHY_NONE: val = (val&0xf8); break;
  223. case HIERARCHY_1: val = (val&0xf8)|1; break;
  224. case HIERARCHY_2: val = (val&0xf8)|2; break;
  225. case HIERARCHY_4: val = (val&0xf8)|3; break;
  226. default:
  227. dprintk ("%s: invalid hierarchy\n",__FUNCTION__);
  228. return -EINVAL;
  229. }
  230. cx22702_writereg (state, 0x06, val);
  231. val=0;
  232. switch(p->u.ofdm.code_rate_HP) {
  233. case FEC_NONE:
  234. case FEC_1_2: val = (val&0xc7); break;
  235. case FEC_2_3: val = (val&0xc7)|0x08; break;
  236. case FEC_3_4: val = (val&0xc7)|0x10; break;
  237. case FEC_5_6: val = (val&0xc7)|0x18; break;
  238. case FEC_7_8: val = (val&0xc7)|0x20; break;
  239. default:
  240. dprintk ("%s: invalid code_rate_HP\n",__FUNCTION__);
  241. return -EINVAL;
  242. }
  243. switch(p->u.ofdm.code_rate_LP) {
  244. case FEC_NONE:
  245. case FEC_1_2: val = (val&0xf8); break;
  246. case FEC_2_3: val = (val&0xf8)|1; break;
  247. case FEC_3_4: val = (val&0xf8)|2; break;
  248. case FEC_5_6: val = (val&0xf8)|3; break;
  249. case FEC_7_8: val = (val&0xf8)|4; break;
  250. default:
  251. dprintk ("%s: invalid code_rate_LP\n",__FUNCTION__);
  252. return -EINVAL;
  253. }
  254. cx22702_writereg (state, 0x07, val);
  255. val=0;
  256. switch(p->u.ofdm.guard_interval) {
  257. case GUARD_INTERVAL_1_32: val = (val&0xf3); break;
  258. case GUARD_INTERVAL_1_16: val = (val&0xf3)|0x04; break;
  259. case GUARD_INTERVAL_1_8: val = (val&0xf3)|0x08; break;
  260. case GUARD_INTERVAL_1_4: val = (val&0xf3)|0x0c; break;
  261. default:
  262. dprintk ("%s: invalid guard_interval\n",__FUNCTION__);
  263. return -EINVAL;
  264. }
  265. switch(p->u.ofdm.transmission_mode) {
  266. case TRANSMISSION_MODE_2K: val = (val&0xfc); break;
  267. case TRANSMISSION_MODE_8K: val = (val&0xfc)|1; break;
  268. default:
  269. dprintk ("%s: invalid transmission_mode\n",__FUNCTION__);
  270. return -EINVAL;
  271. }
  272. cx22702_writereg(state, 0x08, val);
  273. cx22702_writereg(state, 0x0B, (cx22702_readreg(state, 0x0B) & 0xfc) | 0x02 );
  274. cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40 );
  275. /* Begin channel aquisition */
  276. cx22702_writereg(state, 0x00, 0x01);
  277. return 0;
  278. }
  279. /* Reset the demod hardware and reset all of the configuration registers
  280. to a default state. */
  281. static int cx22702_init (struct dvb_frontend* fe)
  282. {
  283. int i;
  284. struct cx22702_state* state = fe->demodulator_priv;
  285. cx22702_writereg (state, 0x00, 0x02);
  286. msleep(10);
  287. for (i=0; i<sizeof(init_tab); i+=2)
  288. cx22702_writereg (state, init_tab[i], init_tab[i+1]);
  289. cx22702_writereg (state, 0xf8, (state->config->output_mode << 1) & 0x02);
  290. /* init PLL */
  291. if (state->config->pll_init) {
  292. cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) & 0xfe);
  293. state->config->pll_init(fe);
  294. cx22702_writereg (state, 0x0D, cx22702_readreg(state,0x0D) | 1);
  295. }
  296. return 0;
  297. }
  298. static int cx22702_read_status(struct dvb_frontend* fe, fe_status_t* status)
  299. {
  300. struct cx22702_state* state = fe->demodulator_priv;
  301. u8 reg0A;
  302. u8 reg23;
  303. *status = 0;
  304. reg0A = cx22702_readreg (state, 0x0A);
  305. reg23 = cx22702_readreg (state, 0x23);
  306. dprintk ("%s: status demod=0x%02x agc=0x%02x\n"
  307. ,__FUNCTION__,reg0A,reg23);
  308. if(reg0A & 0x10) {
  309. *status |= FE_HAS_LOCK;
  310. *status |= FE_HAS_VITERBI;
  311. *status |= FE_HAS_SYNC;
  312. }
  313. if(reg0A & 0x20)
  314. *status |= FE_HAS_CARRIER;
  315. if(reg23 < 0xf0)
  316. *status |= FE_HAS_SIGNAL;
  317. return 0;
  318. }
  319. static int cx22702_read_ber(struct dvb_frontend* fe, u32* ber)
  320. {
  321. struct cx22702_state* state = fe->demodulator_priv;
  322. if(cx22702_readreg (state, 0xE4) & 0x02) {
  323. /* Realtime statistics */
  324. *ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
  325. | (cx22702_readreg (state, 0xDF)&0x7F);
  326. } else {
  327. /* Averagtine statistics */
  328. *ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
  329. | cx22702_readreg (state, 0xDF);
  330. }
  331. return 0;
  332. }
  333. static int cx22702_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength)
  334. {
  335. struct cx22702_state* state = fe->demodulator_priv;
  336. *signal_strength = cx22702_readreg (state, 0x23);
  337. return 0;
  338. }
  339. static int cx22702_read_snr(struct dvb_frontend* fe, u16* snr)
  340. {
  341. struct cx22702_state* state = fe->demodulator_priv;
  342. u16 rs_ber=0;
  343. if(cx22702_readreg (state, 0xE4) & 0x02) {
  344. /* Realtime statistics */
  345. rs_ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
  346. | (cx22702_readreg (state, 0xDF)& 0x7F);
  347. } else {
  348. /* Averagine statistics */
  349. rs_ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 8
  350. | cx22702_readreg (state, 0xDF);
  351. }
  352. *snr = ~rs_ber;
  353. return 0;
  354. }
  355. static int cx22702_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
  356. {
  357. struct cx22702_state* state = fe->demodulator_priv;
  358. u8 _ucblocks;
  359. /* RS Uncorrectable Packet Count then reset */
  360. _ucblocks = cx22702_readreg (state, 0xE3);
  361. if (state->prevUCBlocks < _ucblocks)
  362. *ucblocks = (_ucblocks - state->prevUCBlocks);
  363. else
  364. *ucblocks = state->prevUCBlocks - _ucblocks;
  365. state->prevUCBlocks = _ucblocks;
  366. return 0;
  367. }
  368. static int cx22702_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
  369. {
  370. struct cx22702_state* state = fe->demodulator_priv;
  371. u8 reg0C = cx22702_readreg (state, 0x0C);
  372. p->inversion = reg0C & 0x1 ? INVERSION_ON : INVERSION_OFF;
  373. return cx22702_get_tps (state, &p->u.ofdm);
  374. }
  375. static int cx22702_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
  376. {
  377. tune->min_delay_ms = 1000;
  378. return 0;
  379. }
  380. static void cx22702_release(struct dvb_frontend* fe)
  381. {
  382. struct cx22702_state* state = fe->demodulator_priv;
  383. kfree(state);
  384. }
  385. static struct dvb_frontend_ops cx22702_ops;
  386. struct dvb_frontend* cx22702_attach(const struct cx22702_config* config,
  387. struct i2c_adapter* i2c)
  388. {
  389. struct cx22702_state* state = NULL;
  390. /* allocate memory for the internal state */
  391. state = kmalloc(sizeof(struct cx22702_state), GFP_KERNEL);
  392. if (state == NULL)
  393. goto error;
  394. /* setup the state */
  395. state->config = config;
  396. state->i2c = i2c;
  397. memcpy(&state->ops, &cx22702_ops, sizeof(struct dvb_frontend_ops));
  398. state->prevUCBlocks = 0;
  399. /* check if the demod is there */
  400. if (cx22702_readreg(state, 0x1f) != 0x3)
  401. goto error;
  402. /* create dvb_frontend */
  403. state->frontend.ops = &state->ops;
  404. state->frontend.demodulator_priv = state;
  405. return &state->frontend;
  406. error:
  407. kfree(state);
  408. return NULL;
  409. }
  410. static struct dvb_frontend_ops cx22702_ops = {
  411. .info = {
  412. .name = "Conexant CX22702 DVB-T",
  413. .type = FE_OFDM,
  414. .frequency_min = 177000000,
  415. .frequency_max = 858000000,
  416. .frequency_stepsize = 166666,
  417. .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  418. FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  419. FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
  420. FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
  421. FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
  422. },
  423. .release = cx22702_release,
  424. .init = cx22702_init,
  425. .set_frontend = cx22702_set_tps,
  426. .get_frontend = cx22702_get_frontend,
  427. .get_tune_settings = cx22702_get_tune_settings,
  428. .read_status = cx22702_read_status,
  429. .read_ber = cx22702_read_ber,
  430. .read_signal_strength = cx22702_read_signal_strength,
  431. .read_snr = cx22702_read_snr,
  432. .read_ucblocks = cx22702_read_ucblocks,
  433. };
  434. module_param(debug, int, 0644);
  435. MODULE_PARM_DESC(debug, "Enable verbose debug messages");
  436. MODULE_DESCRIPTION("Conexant CX22702 DVB-T Demodulator driver");
  437. MODULE_AUTHOR("Steven Toth");
  438. MODULE_LICENSE("GPL");
  439. EXPORT_SYMBOL(cx22702_attach);