bcm3510.c 21 KB

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  1. /*
  2. * Support for the Broadcom BCM3510 ATSC demodulator (1st generation Air2PC)
  3. *
  4. * Copyright (C) 2001-5, B2C2 inc.
  5. *
  6. * GPL/Linux driver written by Patrick Boettcher <patrick.boettcher@desy.de>
  7. *
  8. * This driver is "hard-coded" to be used with the 1st generation of
  9. * Technisat/B2C2's Air2PC ATSC PCI/USB cards/boxes. The pll-programming
  10. * (Panasonic CT10S) is located here, which is actually wrong. Unless there is
  11. * another device with a BCM3510, this is no problem.
  12. *
  13. * The driver works also with QAM64 DVB-C, but had an unreasonable high
  14. * UNC. (Tested with the Air2PC ATSC 1st generation)
  15. *
  16. * You'll need a firmware for this driver in order to get it running. It is
  17. * called "dvb-fe-bcm3510-01.fw".
  18. *
  19. * This program is free software; you can redistribute it and/or modify it
  20. * under the terms of the GNU General Public License as published by the Free
  21. * Software Foundation; either version 2 of the License, or (at your option)
  22. * any later version.
  23. *
  24. * This program is distributed in the hope that it will be useful, but WITHOUT
  25. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  26. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  27. * more details.
  28. *
  29. * You should have received a copy of the GNU General Public License along with
  30. * this program; if not, write to the Free Software Foundation, Inc., 675 Mass
  31. * Ave, Cambridge, MA 02139, USA.
  32. */
  33. #include <linux/init.h>
  34. #include <linux/module.h>
  35. #include <linux/moduleparam.h>
  36. #include <linux/device.h>
  37. #include <linux/firmware.h>
  38. #include "dvb_frontend.h"
  39. #include "bcm3510.h"
  40. #include "bcm3510_priv.h"
  41. struct bcm3510_state {
  42. struct i2c_adapter* i2c;
  43. struct dvb_frontend_ops ops;
  44. const struct bcm3510_config* config;
  45. struct dvb_frontend frontend;
  46. /* demodulator private data */
  47. struct semaphore hab_sem;
  48. u8 firmware_loaded:1;
  49. unsigned long next_status_check;
  50. unsigned long status_check_interval;
  51. struct bcm3510_hab_cmd_status1 status1;
  52. struct bcm3510_hab_cmd_status2 status2;
  53. };
  54. static int debug;
  55. module_param(debug, int, 0644);
  56. MODULE_PARM_DESC(debug, "set debugging level (1=info,2=i2c (|-able)).");
  57. #define dprintk(level,x...) if (level & debug) printk(x)
  58. #define dbufout(b,l,m) {\
  59. int i; \
  60. for (i = 0; i < l; i++) \
  61. m("%02x ",b[i]); \
  62. }
  63. #define deb_info(args...) dprintk(0x01,args)
  64. #define deb_i2c(args...) dprintk(0x02,args)
  65. #define deb_hab(args...) dprintk(0x04,args)
  66. /* transfer functions */
  67. static int bcm3510_writebytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len)
  68. {
  69. u8 b[256];
  70. int err;
  71. struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = b, .len = len + 1 };
  72. b[0] = reg;
  73. memcpy(&b[1],buf,len);
  74. deb_i2c("i2c wr %02x: ",reg);
  75. dbufout(buf,len,deb_i2c);
  76. deb_i2c("\n");
  77. if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
  78. deb_info("%s: i2c write error (addr %02x, reg %02x, err == %i)\n",
  79. __FUNCTION__, state->config->demod_address, reg, err);
  80. return -EREMOTEIO;
  81. }
  82. return 0;
  83. }
  84. static int bcm3510_readbytes (struct bcm3510_state *state, u8 reg, u8 *buf, u8 len)
  85. {
  86. struct i2c_msg msg[] = {
  87. { .addr = state->config->demod_address, .flags = 0, .buf = &reg, .len = 1 },
  88. { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len }
  89. };
  90. int err;
  91. memset(buf,0,len);
  92. if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
  93. deb_info("%s: i2c read error (addr %02x, reg %02x, err == %i)\n",
  94. __FUNCTION__, state->config->demod_address, reg, err);
  95. return -EREMOTEIO;
  96. }
  97. deb_i2c("i2c rd %02x: ",reg);
  98. dbufout(buf,len,deb_i2c);
  99. deb_i2c("\n");
  100. return 0;
  101. }
  102. static int bcm3510_writeB(struct bcm3510_state *state, u8 reg, bcm3510_register_value v)
  103. {
  104. return bcm3510_writebytes(state,reg,&v.raw,1);
  105. }
  106. static int bcm3510_readB(struct bcm3510_state *state, u8 reg, bcm3510_register_value *v)
  107. {
  108. return bcm3510_readbytes(state,reg,&v->raw,1);
  109. }
  110. /* Host Access Buffer transfers */
  111. static int bcm3510_hab_get_response(struct bcm3510_state *st, u8 *buf, int len)
  112. {
  113. bcm3510_register_value v;
  114. int ret,i;
  115. v.HABADR_a6.HABADR = 0;
  116. if ((ret = bcm3510_writeB(st,0xa6,v)) < 0)
  117. return ret;
  118. for (i = 0; i < len; i++) {
  119. if ((ret = bcm3510_readB(st,0xa7,&v)) < 0)
  120. return ret;
  121. buf[i] = v.HABDATA_a7;
  122. }
  123. return 0;
  124. }
  125. static int bcm3510_hab_send_request(struct bcm3510_state *st, u8 *buf, int len)
  126. {
  127. bcm3510_register_value v,hab;
  128. int ret,i;
  129. unsigned long t;
  130. /* Check if any previous HAB request still needs to be serviced by the
  131. * Aquisition Processor before sending new request */
  132. if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
  133. return ret;
  134. if (v.HABSTAT_a8.HABR) {
  135. deb_info("HAB is running already - clearing it.\n");
  136. v.HABSTAT_a8.HABR = 0;
  137. bcm3510_writeB(st,0xa8,v);
  138. // return -EBUSY;
  139. }
  140. /* Send the start HAB Address (automatically incremented after write of
  141. * HABDATA) and write the HAB Data */
  142. hab.HABADR_a6.HABADR = 0;
  143. if ((ret = bcm3510_writeB(st,0xa6,hab)) < 0)
  144. return ret;
  145. for (i = 0; i < len; i++) {
  146. hab.HABDATA_a7 = buf[i];
  147. if ((ret = bcm3510_writeB(st,0xa7,hab)) < 0)
  148. return ret;
  149. }
  150. /* Set the HABR bit to indicate AP request in progress (LBHABR allows HABR to
  151. * be written) */
  152. v.raw = 0; v.HABSTAT_a8.HABR = 1; v.HABSTAT_a8.LDHABR = 1;
  153. if ((ret = bcm3510_writeB(st,0xa8,v)) < 0)
  154. return ret;
  155. /* Polling method: Wait until the AP finishes processing the HAB request */
  156. t = jiffies + 1*HZ;
  157. while (time_before(jiffies, t)) {
  158. deb_info("waiting for HAB to complete\n");
  159. msleep(10);
  160. if ((ret = bcm3510_readB(st,0xa8,&v)) < 0)
  161. return ret;
  162. if (!v.HABSTAT_a8.HABR)
  163. return 0;
  164. }
  165. deb_info("send_request execution timed out.\n");
  166. return -ETIMEDOUT;
  167. }
  168. static int bcm3510_do_hab_cmd(struct bcm3510_state *st, u8 cmd, u8 msgid, u8 *obuf, u8 olen, u8 *ibuf, u8 ilen)
  169. {
  170. u8 ob[olen+2],ib[ilen+2];
  171. int ret = 0;
  172. ob[0] = cmd;
  173. ob[1] = msgid;
  174. memcpy(&ob[2],obuf,olen);
  175. deb_hab("hab snd: ");
  176. dbufout(ob,olen+2,deb_hab);
  177. deb_hab("\n");
  178. if (down_interruptible(&st->hab_sem) < 0)
  179. return -EAGAIN;
  180. if ((ret = bcm3510_hab_send_request(st, ob, olen+2)) < 0 ||
  181. (ret = bcm3510_hab_get_response(st, ib, ilen+2)) < 0)
  182. goto error;
  183. deb_hab("hab get: ");
  184. dbufout(ib,ilen+2,deb_hab);
  185. deb_hab("\n");
  186. memcpy(ibuf,&ib[2],ilen);
  187. error:
  188. up(&st->hab_sem);
  189. return ret;
  190. }
  191. #if 0
  192. /* not needed, we use a semaphore to prevent HAB races */
  193. static int bcm3510_is_ap_ready(struct bcm3510_state *st)
  194. {
  195. bcm3510_register_value ap,hab;
  196. int ret;
  197. if ((ret = bcm3510_readB(st,0xa8,&hab)) < 0 ||
  198. (ret = bcm3510_readB(st,0xa2,&ap) < 0))
  199. return ret;
  200. if (ap.APSTAT1_a2.RESET || ap.APSTAT1_a2.IDLE || ap.APSTAT1_a2.STOP || hab.HABSTAT_a8.HABR) {
  201. deb_info("AP is busy\n");
  202. return -EBUSY;
  203. }
  204. return 0;
  205. }
  206. #endif
  207. static int bcm3510_bert_reset(struct bcm3510_state *st)
  208. {
  209. bcm3510_register_value b;
  210. int ret;
  211. if ((ret < bcm3510_readB(st,0xfa,&b)) < 0)
  212. return ret;
  213. b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b);
  214. b.BERCTL_fa.RESYNC = 1; bcm3510_writeB(st,0xfa,b);
  215. b.BERCTL_fa.RESYNC = 0; bcm3510_writeB(st,0xfa,b);
  216. b.BERCTL_fa.CNTCTL = 1; b.BERCTL_fa.BITCNT = 1; bcm3510_writeB(st,0xfa,b);
  217. /* clear residual bit counter TODO */
  218. return 0;
  219. }
  220. static int bcm3510_refresh_state(struct bcm3510_state *st)
  221. {
  222. if (time_after(jiffies,st->next_status_check)) {
  223. bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS1, NULL,0, (u8 *)&st->status1, sizeof(st->status1));
  224. bcm3510_do_hab_cmd(st, CMD_STATUS, MSGID_STATUS2, NULL,0, (u8 *)&st->status2, sizeof(st->status2));
  225. st->next_status_check = jiffies + (st->status_check_interval*HZ)/1000;
  226. }
  227. return 0;
  228. }
  229. static int bcm3510_read_status(struct dvb_frontend *fe, fe_status_t *status)
  230. {
  231. struct bcm3510_state* st = fe->demodulator_priv;
  232. bcm3510_refresh_state(st);
  233. *status = 0;
  234. if (st->status1.STATUS1.RECEIVER_LOCK)
  235. *status |= FE_HAS_LOCK | FE_HAS_SYNC;
  236. if (st->status1.STATUS1.FEC_LOCK)
  237. *status |= FE_HAS_VITERBI;
  238. if (st->status1.STATUS1.OUT_PLL_LOCK)
  239. *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
  240. if (*status & FE_HAS_LOCK)
  241. st->status_check_interval = 1500;
  242. else /* more frequently checks if no lock has been achieved yet */
  243. st->status_check_interval = 500;
  244. deb_info("real_status: %02x\n",*status);
  245. return 0;
  246. }
  247. static int bcm3510_read_ber(struct dvb_frontend* fe, u32* ber)
  248. {
  249. struct bcm3510_state* st = fe->demodulator_priv;
  250. bcm3510_refresh_state(st);
  251. *ber = (st->status2.LDBER0 << 16) | (st->status2.LDBER1 << 8) | st->status2.LDBER2;
  252. return 0;
  253. }
  254. static int bcm3510_read_unc(struct dvb_frontend* fe, u32* unc)
  255. {
  256. struct bcm3510_state* st = fe->demodulator_priv;
  257. bcm3510_refresh_state(st);
  258. *unc = (st->status2.LDUERC0 << 8) | st->status2.LDUERC1;
  259. return 0;
  260. }
  261. static int bcm3510_read_signal_strength(struct dvb_frontend* fe, u16* strength)
  262. {
  263. struct bcm3510_state* st = fe->demodulator_priv;
  264. s32 t;
  265. bcm3510_refresh_state(st);
  266. t = st->status2.SIGNAL;
  267. if (t > 190)
  268. t = 190;
  269. if (t < 90)
  270. t = 90;
  271. t -= 90;
  272. t = t * 0xff / 100;
  273. /* normalize if necessary */
  274. *strength = (t << 8) | t;
  275. return 0;
  276. }
  277. static int bcm3510_read_snr(struct dvb_frontend* fe, u16* snr)
  278. {
  279. struct bcm3510_state* st = fe->demodulator_priv;
  280. bcm3510_refresh_state(st);
  281. *snr = st->status1.SNR_EST0*1000 + ((st->status1.SNR_EST1*1000) >> 8);
  282. return 0;
  283. }
  284. /* tuner frontend programming */
  285. static int bcm3510_tuner_cmd(struct bcm3510_state* st,u8 bc, u16 n, u8 a)
  286. {
  287. struct bcm3510_hab_cmd_tune c;
  288. memset(&c,0,sizeof(struct bcm3510_hab_cmd_tune));
  289. /* I2C Mode disabled, set 16 control / Data pairs */
  290. c.length = 0x10;
  291. c.clock_width = 0;
  292. /* CS1, CS0, DATA, CLK bits control the tuner RF_AGC_SEL pin is set to
  293. * logic high (as Configuration) */
  294. c.misc = 0x10;
  295. /* Set duration of the initial state of TUNCTL = 3.34 micro Sec */
  296. c.TUNCTL_state = 0x40;
  297. /* PRESCALER DEVIDE RATIO | BC1_2_3_4; (band switch), 1stosc REFERENCE COUNTER REF_S12 and REF_S11 */
  298. c.ctl_dat[0].ctrl.size = BITS_8;
  299. c.ctl_dat[0].data = 0x80 | bc;
  300. /* Control DATA pin, 1stosc REFERENCE COUNTER REF_S10 to REF_S3 */
  301. c.ctl_dat[1].ctrl.size = BITS_8;
  302. c.ctl_dat[1].data = 4;
  303. /* set CONTROL BIT 1 to 1, 1stosc REFERENCE COUNTER REF_S2 to REF_S1 */
  304. c.ctl_dat[2].ctrl.size = BITS_3;
  305. c.ctl_dat[2].data = 0x20;
  306. /* control CS0 pin, pulse byte ? */
  307. c.ctl_dat[3].ctrl.size = BITS_3;
  308. c.ctl_dat[3].ctrl.clk_off = 1;
  309. c.ctl_dat[3].ctrl.cs0 = 1;
  310. c.ctl_dat[3].data = 0x40;
  311. /* PGM_S18 to PGM_S11 */
  312. c.ctl_dat[4].ctrl.size = BITS_8;
  313. c.ctl_dat[4].data = n >> 3;
  314. /* PGM_S10 to PGM_S8, SWL_S7 to SWL_S3 */
  315. c.ctl_dat[5].ctrl.size = BITS_8;
  316. c.ctl_dat[5].data = ((n & 0x7) << 5) | (a >> 2);
  317. /* SWL_S2 and SWL_S1, set CONTROL BIT 2 to 0 */
  318. c.ctl_dat[6].ctrl.size = BITS_3;
  319. c.ctl_dat[6].data = (a << 6) & 0xdf;
  320. /* control CS0 pin, pulse byte ? */
  321. c.ctl_dat[7].ctrl.size = BITS_3;
  322. c.ctl_dat[7].ctrl.clk_off = 1;
  323. c.ctl_dat[7].ctrl.cs0 = 1;
  324. c.ctl_dat[7].data = 0x40;
  325. /* PRESCALER DEVIDE RATIO, 2ndosc REFERENCE COUNTER REF_S12 and REF_S11 */
  326. c.ctl_dat[8].ctrl.size = BITS_8;
  327. c.ctl_dat[8].data = 0x80;
  328. /* 2ndosc REFERENCE COUNTER REF_S10 to REF_S3 */
  329. c.ctl_dat[9].ctrl.size = BITS_8;
  330. c.ctl_dat[9].data = 0x10;
  331. /* set CONTROL BIT 1 to 1, 2ndosc REFERENCE COUNTER REF_S2 to REF_S1 */
  332. c.ctl_dat[10].ctrl.size = BITS_3;
  333. c.ctl_dat[10].data = 0x20;
  334. /* pulse byte */
  335. c.ctl_dat[11].ctrl.size = BITS_3;
  336. c.ctl_dat[11].ctrl.clk_off = 1;
  337. c.ctl_dat[11].ctrl.cs1 = 1;
  338. c.ctl_dat[11].data = 0x40;
  339. /* PGM_S18 to PGM_S11 */
  340. c.ctl_dat[12].ctrl.size = BITS_8;
  341. c.ctl_dat[12].data = 0x2a;
  342. /* PGM_S10 to PGM_S8 and SWL_S7 to SWL_S3 */
  343. c.ctl_dat[13].ctrl.size = BITS_8;
  344. c.ctl_dat[13].data = 0x8e;
  345. /* SWL_S2 and SWL_S1 and set CONTROL BIT 2 to 0 */
  346. c.ctl_dat[14].ctrl.size = BITS_3;
  347. c.ctl_dat[14].data = 0;
  348. /* Pulse Byte */
  349. c.ctl_dat[15].ctrl.size = BITS_3;
  350. c.ctl_dat[15].ctrl.clk_off = 1;
  351. c.ctl_dat[15].ctrl.cs1 = 1;
  352. c.ctl_dat[15].data = 0x40;
  353. return bcm3510_do_hab_cmd(st,CMD_TUNE, MSGID_TUNE,(u8 *) &c,sizeof(c), NULL, 0);
  354. }
  355. static int bcm3510_set_freq(struct bcm3510_state* st,u32 freq)
  356. {
  357. u8 bc,a;
  358. u16 n;
  359. s32 YIntercept,Tfvco1;
  360. freq /= 1000;
  361. deb_info("%dkHz:",freq);
  362. /* set Band Switch */
  363. if (freq <= 168000)
  364. bc = 0x1c;
  365. else if (freq <= 378000)
  366. bc = 0x2c;
  367. else
  368. bc = 0x30;
  369. if (freq >= 470000) {
  370. freq -= 470001;
  371. YIntercept = 18805;
  372. } else if (freq >= 90000) {
  373. freq -= 90001;
  374. YIntercept = 15005;
  375. } else if (freq >= 76000){
  376. freq -= 76001;
  377. YIntercept = 14865;
  378. } else {
  379. freq -= 54001;
  380. YIntercept = 14645;
  381. }
  382. Tfvco1 = (((freq/6000)*60 + YIntercept)*4)/10;
  383. n = Tfvco1 >> 6;
  384. a = Tfvco1 & 0x3f;
  385. deb_info(" BC1_2_3_4: %x, N: %x A: %x\n", bc, n, a);
  386. if (n >= 16 && n <= 2047)
  387. return bcm3510_tuner_cmd(st,bc,n,a);
  388. return -EINVAL;
  389. }
  390. static int bcm3510_set_frontend(struct dvb_frontend* fe,
  391. struct dvb_frontend_parameters *p)
  392. {
  393. struct bcm3510_state* st = fe->demodulator_priv;
  394. struct bcm3510_hab_cmd_ext_acquire cmd;
  395. struct bcm3510_hab_cmd_bert_control bert;
  396. int ret;
  397. memset(&cmd,0,sizeof(cmd));
  398. switch (p->u.vsb.modulation) {
  399. case QAM_256:
  400. cmd.ACQUIRE0.MODE = 0x1;
  401. cmd.ACQUIRE1.SYM_RATE = 0x1;
  402. cmd.ACQUIRE1.IF_FREQ = 0x1;
  403. break;
  404. case QAM_64:
  405. cmd.ACQUIRE0.MODE = 0x2;
  406. cmd.ACQUIRE1.SYM_RATE = 0x2;
  407. cmd.ACQUIRE1.IF_FREQ = 0x1;
  408. break;
  409. /* case QAM_256:
  410. cmd.ACQUIRE0.MODE = 0x3;
  411. break;
  412. case QAM_128:
  413. cmd.ACQUIRE0.MODE = 0x4;
  414. break;
  415. case QAM_64:
  416. cmd.ACQUIRE0.MODE = 0x5;
  417. break;
  418. case QAM_32:
  419. cmd.ACQUIRE0.MODE = 0x6;
  420. break;
  421. case QAM_16:
  422. cmd.ACQUIRE0.MODE = 0x7;
  423. break;*/
  424. case VSB_8:
  425. cmd.ACQUIRE0.MODE = 0x8;
  426. cmd.ACQUIRE1.SYM_RATE = 0x0;
  427. cmd.ACQUIRE1.IF_FREQ = 0x0;
  428. break;
  429. case VSB_16:
  430. cmd.ACQUIRE0.MODE = 0x9;
  431. cmd.ACQUIRE1.SYM_RATE = 0x0;
  432. cmd.ACQUIRE1.IF_FREQ = 0x0;
  433. default:
  434. return -EINVAL;
  435. };
  436. cmd.ACQUIRE0.OFFSET = 0;
  437. cmd.ACQUIRE0.NTSCSWEEP = 1;
  438. cmd.ACQUIRE0.FA = 1;
  439. cmd.ACQUIRE0.BW = 0;
  440. /* if (enableOffset) {
  441. cmd.IF_OFFSET0 = xx;
  442. cmd.IF_OFFSET1 = xx;
  443. cmd.SYM_OFFSET0 = xx;
  444. cmd.SYM_OFFSET1 = xx;
  445. if (enableNtscSweep) {
  446. cmd.NTSC_OFFSET0;
  447. cmd.NTSC_OFFSET1;
  448. }
  449. } */
  450. bcm3510_do_hab_cmd(st, CMD_ACQUIRE, MSGID_EXT_TUNER_ACQUIRE, (u8 *) &cmd, sizeof(cmd), NULL, 0);
  451. /* doing it with different MSGIDs, data book and source differs */
  452. bert.BE = 0;
  453. bert.unused = 0;
  454. bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_CONTROL, (u8 *) &bert, sizeof(bert), NULL, 0);
  455. bcm3510_do_hab_cmd(st, CMD_STATE_CONTROL, MSGID_BERT_SET, (u8 *) &bert, sizeof(bert), NULL, 0);
  456. bcm3510_bert_reset(st);
  457. if ((ret = bcm3510_set_freq(st,p->frequency)) < 0)
  458. return ret;
  459. memset(&st->status1,0,sizeof(st->status1));
  460. memset(&st->status2,0,sizeof(st->status2));
  461. st->status_check_interval = 500;
  462. /* Give the AP some time */
  463. msleep(200);
  464. return 0;
  465. }
  466. static int bcm3510_sleep(struct dvb_frontend* fe)
  467. {
  468. return 0;
  469. }
  470. static int bcm3510_get_tune_settings(struct dvb_frontend *fe, struct dvb_frontend_tune_settings *s)
  471. {
  472. s->min_delay_ms = 1000;
  473. s->step_size = 0;
  474. s->max_drift = 0;
  475. return 0;
  476. }
  477. static void bcm3510_release(struct dvb_frontend* fe)
  478. {
  479. struct bcm3510_state* state = fe->demodulator_priv;
  480. kfree(state);
  481. }
  482. /* firmware download:
  483. * firmware file is build up like this:
  484. * 16bit addr, 16bit length, 8byte of length
  485. */
  486. #define BCM3510_DEFAULT_FIRMWARE "dvb-fe-bcm3510-01.fw"
  487. static int bcm3510_write_ram(struct bcm3510_state *st, u16 addr, u8 *b, u16 len)
  488. {
  489. int ret = 0,i;
  490. bcm3510_register_value vH, vL,vD;
  491. vH.MADRH_a9 = addr >> 8;
  492. vL.MADRL_aa = addr;
  493. if ((ret = bcm3510_writeB(st,0xa9,vH)) < 0) return ret;
  494. if ((ret = bcm3510_writeB(st,0xaa,vL)) < 0) return ret;
  495. for (i = 0; i < len; i++) {
  496. vD.MDATA_ab = b[i];
  497. if ((ret = bcm3510_writeB(st,0xab,vD)) < 0)
  498. return ret;
  499. }
  500. return 0;
  501. }
  502. static int bcm3510_download_firmware(struct dvb_frontend* fe)
  503. {
  504. struct bcm3510_state* st = fe->demodulator_priv;
  505. const struct firmware *fw;
  506. u16 addr,len;
  507. u8 *b;
  508. int ret,i;
  509. deb_info("requesting firmware\n");
  510. if ((ret = st->config->request_firmware(fe, &fw, BCM3510_DEFAULT_FIRMWARE)) < 0) {
  511. err("could not load firmware (%s): %d",BCM3510_DEFAULT_FIRMWARE,ret);
  512. return ret;
  513. }
  514. deb_info("got firmware: %d\n",fw->size);
  515. b = fw->data;
  516. for (i = 0; i < fw->size;) {
  517. addr = le16_to_cpu( *( (u16 *)&b[i] ) );
  518. len = le16_to_cpu( *( (u16 *)&b[i+2] ) );
  519. deb_info("firmware chunk, addr: 0x%04x, len: 0x%04x, total length: 0x%04x\n",addr,len,fw->size);
  520. if ((ret = bcm3510_write_ram(st,addr,&b[i+4],len)) < 0) {
  521. err("firmware download failed: %d\n",ret);
  522. return ret;
  523. }
  524. i += 4 + len;
  525. }
  526. release_firmware(fw);
  527. deb_info("firmware download successfully completed\n");
  528. return 0;
  529. }
  530. static int bcm3510_check_firmware_version(struct bcm3510_state *st)
  531. {
  532. struct bcm3510_hab_cmd_get_version_info ver;
  533. bcm3510_do_hab_cmd(st,CMD_GET_VERSION_INFO,MSGID_GET_VERSION_INFO,NULL,0,(u8*)&ver,sizeof(ver));
  534. deb_info("Version information: 0x%02x 0x%02x 0x%02x 0x%02x\n",
  535. ver.microcode_version, ver.script_version, ver.config_version, ver.demod_version);
  536. if (ver.script_version == BCM3510_DEF_SCRIPT_VERSION &&
  537. ver.config_version == BCM3510_DEF_CONFIG_VERSION &&
  538. ver.demod_version == BCM3510_DEF_DEMOD_VERSION)
  539. return 0;
  540. deb_info("version check failed\n");
  541. return -ENODEV;
  542. }
  543. /* (un)resetting the AP */
  544. static int bcm3510_reset(struct bcm3510_state *st)
  545. {
  546. int ret;
  547. unsigned long t;
  548. bcm3510_register_value v;
  549. bcm3510_readB(st,0xa0,&v); v.HCTL1_a0.RESET = 1;
  550. if ((ret = bcm3510_writeB(st,0xa0,v)) < 0)
  551. return ret;
  552. t = jiffies + 3*HZ;
  553. while (time_before(jiffies, t)) {
  554. msleep(10);
  555. if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
  556. return ret;
  557. if (v.APSTAT1_a2.RESET)
  558. return 0;
  559. }
  560. deb_info("reset timed out\n");
  561. return -ETIMEDOUT;
  562. }
  563. static int bcm3510_clear_reset(struct bcm3510_state *st)
  564. {
  565. bcm3510_register_value v;
  566. int ret;
  567. unsigned long t;
  568. v.raw = 0;
  569. if ((ret = bcm3510_writeB(st,0xa0,v)) < 0)
  570. return ret;
  571. t = jiffies + 3*HZ;
  572. while (time_before(jiffies, t)) {
  573. msleep(10);
  574. if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
  575. return ret;
  576. /* verify that reset is cleared */
  577. if (!v.APSTAT1_a2.RESET)
  578. return 0;
  579. }
  580. deb_info("reset clear timed out\n");
  581. return -ETIMEDOUT;
  582. }
  583. static int bcm3510_init_cold(struct bcm3510_state *st)
  584. {
  585. int ret;
  586. bcm3510_register_value v;
  587. /* read Acquisation Processor status register and check it is not in RUN mode */
  588. if ((ret = bcm3510_readB(st,0xa2,&v)) < 0)
  589. return ret;
  590. if (v.APSTAT1_a2.RUN) {
  591. deb_info("AP is already running - firmware already loaded.\n");
  592. return 0;
  593. }
  594. deb_info("reset?\n");
  595. if ((ret = bcm3510_reset(st)) < 0)
  596. return ret;
  597. deb_info("tristate?\n");
  598. /* tri-state */
  599. v.TSTCTL_2e.CTL = 0;
  600. if ((ret = bcm3510_writeB(st,0x2e,v)) < 0)
  601. return ret;
  602. deb_info("firmware?\n");
  603. if ((ret = bcm3510_download_firmware(&st->frontend)) < 0 ||
  604. (ret = bcm3510_clear_reset(st)) < 0)
  605. return ret;
  606. /* anything left here to Let the acquisition processor begin execution at program counter 0000 ??? */
  607. return 0;
  608. }
  609. static int bcm3510_init(struct dvb_frontend* fe)
  610. {
  611. struct bcm3510_state* st = fe->demodulator_priv;
  612. bcm3510_register_value j;
  613. struct bcm3510_hab_cmd_set_agc c;
  614. int ret;
  615. if ((ret = bcm3510_readB(st,0xca,&j)) < 0)
  616. return ret;
  617. deb_info("JDEC: %02x\n",j.raw);
  618. switch (j.JDEC_ca.JDEC) {
  619. case JDEC_WAIT_AT_RAM:
  620. deb_info("attempting to download firmware\n");
  621. if ((ret = bcm3510_init_cold(st)) < 0)
  622. return ret;
  623. case JDEC_EEPROM_LOAD_WAIT: /* fall-through is wanted */
  624. deb_info("firmware is loaded\n");
  625. bcm3510_check_firmware_version(st);
  626. break;
  627. default:
  628. return -ENODEV;
  629. }
  630. memset(&c,0,1);
  631. c.SEL = 1;
  632. bcm3510_do_hab_cmd(st,CMD_AUTO_PARAM,MSGID_SET_RF_AGC_SEL,(u8 *)&c,sizeof(c),NULL,0);
  633. return 0;
  634. }
  635. static struct dvb_frontend_ops bcm3510_ops;
  636. struct dvb_frontend* bcm3510_attach(const struct bcm3510_config *config,
  637. struct i2c_adapter *i2c)
  638. {
  639. struct bcm3510_state* state = NULL;
  640. int ret;
  641. bcm3510_register_value v;
  642. /* allocate memory for the internal state */
  643. state = kmalloc(sizeof(struct bcm3510_state), GFP_KERNEL);
  644. if (state == NULL)
  645. goto error;
  646. memset(state,0,sizeof(struct bcm3510_state));
  647. /* setup the state */
  648. state->config = config;
  649. state->i2c = i2c;
  650. memcpy(&state->ops, &bcm3510_ops, sizeof(struct dvb_frontend_ops));
  651. /* create dvb_frontend */
  652. state->frontend.ops = &state->ops;
  653. state->frontend.demodulator_priv = state;
  654. sema_init(&state->hab_sem, 1);
  655. if ((ret = bcm3510_readB(state,0xe0,&v)) < 0)
  656. goto error;
  657. deb_info("Revision: 0x%1x, Layer: 0x%1x.\n",v.REVID_e0.REV,v.REVID_e0.LAYER);
  658. if ((v.REVID_e0.REV != 0x1 && v.REVID_e0.LAYER != 0xb) && /* cold */
  659. (v.REVID_e0.REV != 0x8 && v.REVID_e0.LAYER != 0x0)) /* warm */
  660. goto error;
  661. info("Revision: 0x%1x, Layer: 0x%1x.",v.REVID_e0.REV,v.REVID_e0.LAYER);
  662. bcm3510_reset(state);
  663. return &state->frontend;
  664. error:
  665. kfree(state);
  666. return NULL;
  667. }
  668. EXPORT_SYMBOL(bcm3510_attach);
  669. static struct dvb_frontend_ops bcm3510_ops = {
  670. .info = {
  671. .name = "Broadcom BCM3510 VSB/QAM frontend",
  672. .type = FE_ATSC,
  673. .frequency_min = 54000000,
  674. .frequency_max = 803000000,
  675. /* stepsize is just a guess */
  676. .frequency_stepsize = 0,
  677. .caps =
  678. FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  679. FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  680. FE_CAN_8VSB | FE_CAN_16VSB |
  681. FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_128 | FE_CAN_QAM_256
  682. },
  683. .release = bcm3510_release,
  684. .init = bcm3510_init,
  685. .sleep = bcm3510_sleep,
  686. .set_frontend = bcm3510_set_frontend,
  687. .get_tune_settings = bcm3510_get_tune_settings,
  688. .read_status = bcm3510_read_status,
  689. .read_ber = bcm3510_read_ber,
  690. .read_signal_strength = bcm3510_read_signal_strength,
  691. .read_snr = bcm3510_read_snr,
  692. .read_ucblocks = bcm3510_read_unc,
  693. };
  694. MODULE_DESCRIPTION("Broadcom BCM3510 ATSC (8VSB/16VSB & ITU J83 AnnexB FEC QAM64/256) demodulator driver");
  695. MODULE_AUTHOR("Patrick Boettcher <patrick.boettcher@desy.de>");
  696. MODULE_LICENSE("GPL");