via-maciisi.c 15 KB

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  1. /*
  2. * Device driver for the IIsi-style ADB on some Mac LC and II-class machines
  3. *
  4. * Based on via-cuda.c and via-macii.c, as well as the original
  5. * adb-bus.c, which in turn is somewhat influenced by (but uses no
  6. * code from) the NetBSD HWDIRECT ADB code. Original IIsi driver work
  7. * was done by Robert Thompson and integrated into the old style
  8. * driver by Michael Schmitz.
  9. *
  10. * Original sources (c) Alan Cox, Paul Mackerras, and others.
  11. *
  12. * Rewritten for Unified ADB by David Huggins-Daines <dhd@debian.org>
  13. *
  14. * 7/13/2000- extensive changes by Andrew McPherson <andrew@macduff.dhs.org>
  15. * Works about 30% of the time now.
  16. */
  17. #include <linux/types.h>
  18. #include <linux/errno.h>
  19. #include <linux/kernel.h>
  20. #include <linux/sched.h>
  21. #include <linux/adb.h>
  22. #include <linux/cuda.h>
  23. #include <linux/delay.h>
  24. #include <linux/interrupt.h>
  25. #include <asm/macintosh.h>
  26. #include <asm/macints.h>
  27. #include <asm/machw.h>
  28. #include <asm/mac_via.h>
  29. static volatile unsigned char *via;
  30. /* VIA registers - spaced 0x200 bytes apart - only the ones we actually use */
  31. #define RS 0x200 /* skip between registers */
  32. #define B 0 /* B-side data */
  33. #define A RS /* A-side data */
  34. #define DIRB (2*RS) /* B-side direction (1=output) */
  35. #define DIRA (3*RS) /* A-side direction (1=output) */
  36. #define SR (10*RS) /* Shift register */
  37. #define ACR (11*RS) /* Auxiliary control register */
  38. #define IFR (13*RS) /* Interrupt flag register */
  39. #define IER (14*RS) /* Interrupt enable register */
  40. /* Bits in B data register: all active low */
  41. #define TREQ 0x08 /* Transfer request (input) */
  42. #define TACK 0x10 /* Transfer acknowledge (output) */
  43. #define TIP 0x20 /* Transfer in progress (output) */
  44. #define ST_MASK 0x30 /* mask for selecting ADB state bits */
  45. /* Bits in ACR */
  46. #define SR_CTRL 0x1c /* Shift register control bits */
  47. #define SR_EXT 0x0c /* Shift on external clock */
  48. #define SR_OUT 0x10 /* Shift out if 1 */
  49. /* Bits in IFR and IER */
  50. #define IER_SET 0x80 /* set bits in IER */
  51. #define IER_CLR 0 /* clear bits in IER */
  52. #define SR_INT 0x04 /* Shift register full/empty */
  53. #define SR_DATA 0x08 /* Shift register data */
  54. #define SR_CLOCK 0x10 /* Shift register clock */
  55. #define ADB_DELAY 150
  56. #undef DEBUG_MACIISI_ADB
  57. static struct adb_request* current_req = NULL;
  58. static struct adb_request* last_req = NULL;
  59. static unsigned char maciisi_rbuf[16];
  60. static unsigned char *reply_ptr = NULL;
  61. static int data_index;
  62. static int reading_reply;
  63. static int reply_len;
  64. static int tmp;
  65. static int need_sync;
  66. static enum maciisi_state {
  67. idle,
  68. sending,
  69. reading,
  70. } maciisi_state;
  71. static int maciisi_probe(void);
  72. static int maciisi_init(void);
  73. static int maciisi_send_request(struct adb_request* req, int sync);
  74. static void maciisi_sync(struct adb_request *req);
  75. static int maciisi_write(struct adb_request* req);
  76. static irqreturn_t maciisi_interrupt(int irq, void* arg, struct pt_regs* regs);
  77. static void maciisi_input(unsigned char *buf, int nb, struct pt_regs *regs);
  78. static int maciisi_init_via(void);
  79. static void maciisi_poll(void);
  80. static int maciisi_start(void);
  81. struct adb_driver via_maciisi_driver = {
  82. "Mac IIsi",
  83. maciisi_probe,
  84. maciisi_init,
  85. maciisi_send_request,
  86. NULL, /* maciisi_adb_autopoll, */
  87. maciisi_poll,
  88. NULL /* maciisi_reset_adb_bus */
  89. };
  90. static int
  91. maciisi_probe(void)
  92. {
  93. if (macintosh_config->adb_type != MAC_ADB_IISI)
  94. return -ENODEV;
  95. via = via1;
  96. return 0;
  97. }
  98. static int
  99. maciisi_init(void)
  100. {
  101. int err;
  102. if (via == NULL)
  103. return -ENODEV;
  104. if ((err = maciisi_init_via())) {
  105. printk(KERN_ERR "maciisi_init: maciisi_init_via() failed, code %d\n", err);
  106. via = NULL;
  107. return err;
  108. }
  109. if (request_irq(IRQ_MAC_ADB, maciisi_interrupt, IRQ_FLG_LOCK | IRQ_FLG_FAST,
  110. "ADB", maciisi_interrupt)) {
  111. printk(KERN_ERR "maciisi_init: can't get irq %d\n", IRQ_MAC_ADB);
  112. return -EAGAIN;
  113. }
  114. printk("adb: Mac IIsi driver v0.2 for Unified ADB.\n");
  115. return 0;
  116. }
  117. /* Flush data from the ADB controller */
  118. static void
  119. maciisi_stfu(void)
  120. {
  121. int status = via[B] & (TIP|TREQ);
  122. if (status & TREQ) {
  123. #ifdef DEBUG_MACIISI_ADB
  124. printk (KERN_DEBUG "maciisi_stfu called with TREQ high!\n");
  125. #endif
  126. return;
  127. }
  128. udelay(ADB_DELAY);
  129. via[ACR] &= ~SR_OUT;
  130. via[IER] = IER_CLR | SR_INT;
  131. udelay(ADB_DELAY);
  132. status = via[B] & (TIP|TREQ);
  133. if (!(status & TREQ))
  134. {
  135. via[B] |= TIP;
  136. while(1)
  137. {
  138. int poll_timeout = ADB_DELAY * 5;
  139. /* Poll for SR interrupt */
  140. while (!(via[IFR] & SR_INT) && poll_timeout-- > 0)
  141. status = via[B] & (TIP|TREQ);
  142. tmp = via[SR]; /* Clear shift register */
  143. #ifdef DEBUG_MACIISI_ADB
  144. printk(KERN_DEBUG "maciisi_stfu: status %x timeout %d data %x\n",
  145. status, poll_timeout, tmp);
  146. #endif
  147. if(via[B] & TREQ)
  148. break;
  149. /* ACK on-off */
  150. via[B] |= TACK;
  151. udelay(ADB_DELAY);
  152. via[B] &= ~TACK;
  153. }
  154. /* end frame */
  155. via[B] &= ~TIP;
  156. udelay(ADB_DELAY);
  157. }
  158. via[IER] = IER_SET | SR_INT;
  159. }
  160. /* All specifically VIA-related initialization goes here */
  161. static int
  162. maciisi_init_via(void)
  163. {
  164. int i;
  165. /* Set the lines up. We want TREQ as input TACK|TIP as output */
  166. via[DIRB] = (via[DIRB] | TACK | TIP) & ~TREQ;
  167. /* Shift register on input */
  168. via[ACR] = (via[ACR] & ~SR_CTRL) | SR_EXT;
  169. #ifdef DEBUG_MACIISI_ADB
  170. printk(KERN_DEBUG "maciisi_init_via: initial status %x\n", via[B] & (TIP|TREQ));
  171. #endif
  172. /* Wipe any pending data and int */
  173. tmp = via[SR];
  174. /* Enable keyboard interrupts */
  175. via[IER] = IER_SET | SR_INT;
  176. /* Set initial state: idle */
  177. via[B] &= ~(TACK|TIP);
  178. /* Clear interrupt bit */
  179. via[IFR] = SR_INT;
  180. for(i = 0; i < 60; i++) {
  181. udelay(ADB_DELAY);
  182. maciisi_stfu();
  183. udelay(ADB_DELAY);
  184. if(via[B] & TREQ)
  185. break;
  186. }
  187. if (i == 60)
  188. printk(KERN_ERR "maciisi_init_via: bus jam?\n");
  189. maciisi_state = idle;
  190. need_sync = 0;
  191. return 0;
  192. }
  193. /* Send a request, possibly waiting for a reply */
  194. static int
  195. maciisi_send_request(struct adb_request* req, int sync)
  196. {
  197. int i;
  198. #ifdef DEBUG_MACIISI_ADB
  199. static int dump_packet = 0;
  200. #endif
  201. if (via == NULL) {
  202. req->complete = 1;
  203. return -ENXIO;
  204. }
  205. #ifdef DEBUG_MACIISI_ADB
  206. if (dump_packet) {
  207. printk(KERN_DEBUG "maciisi_send_request:");
  208. for (i = 0; i < req->nbytes; i++) {
  209. printk(" %.2x", req->data[i]);
  210. }
  211. printk(" sync %d\n", sync);
  212. }
  213. #endif
  214. req->reply_expected = 1;
  215. i = maciisi_write(req);
  216. if (i)
  217. {
  218. /* Normally, if a packet requires syncing, that happens at the end of
  219. * maciisi_send_request. But if the transfer fails, it will be restarted
  220. * by maciisi_interrupt(). We use need_sync to tell maciisi_interrupt
  221. * when to sync a packet that it sends out.
  222. *
  223. * Suggestions on a better way to do this are welcome.
  224. */
  225. if(i == -EBUSY && sync)
  226. need_sync = 1;
  227. else
  228. need_sync = 0;
  229. return i;
  230. }
  231. if(sync)
  232. maciisi_sync(req);
  233. return 0;
  234. }
  235. /* Poll the ADB chip until the request completes */
  236. static void maciisi_sync(struct adb_request *req)
  237. {
  238. int count = 0;
  239. #ifdef DEBUG_MACIISI_ADB
  240. printk(KERN_DEBUG "maciisi_sync called\n");
  241. #endif
  242. /* If for some reason the ADB chip shuts up on us, we want to avoid an endless loop. */
  243. while (!req->complete && count++ < 50) {
  244. maciisi_poll();
  245. }
  246. /* This could be BAD... when the ADB controller doesn't respond
  247. * for this long, it's probably not coming back :-( */
  248. if(count >= 50) /* Hopefully shouldn't happen */
  249. printk(KERN_ERR "maciisi_send_request: poll timed out!\n");
  250. }
  251. /* Enqueue a request, and run the queue if possible */
  252. static int
  253. maciisi_write(struct adb_request* req)
  254. {
  255. unsigned long flags;
  256. int i;
  257. /* We will accept CUDA packets - the VIA sends them to us, so
  258. it figures that we should be able to send them to it */
  259. if (req->nbytes < 2 || req->data[0] > CUDA_PACKET) {
  260. printk(KERN_ERR "maciisi_write: packet too small or not an ADB or CUDA packet\n");
  261. req->complete = 1;
  262. return -EINVAL;
  263. }
  264. req->next = 0;
  265. req->sent = 0;
  266. req->complete = 0;
  267. req->reply_len = 0;
  268. local_irq_save(flags);
  269. if (current_req) {
  270. last_req->next = req;
  271. last_req = req;
  272. } else {
  273. current_req = req;
  274. last_req = req;
  275. }
  276. if (maciisi_state == idle)
  277. {
  278. i = maciisi_start();
  279. if(i != 0)
  280. {
  281. local_irq_restore(flags);
  282. return i;
  283. }
  284. }
  285. else
  286. {
  287. #ifdef DEBUG_MACIISI_ADB
  288. printk(KERN_DEBUG "maciisi_write: would start, but state is %d\n", maciisi_state);
  289. #endif
  290. local_irq_restore(flags);
  291. return -EBUSY;
  292. }
  293. local_irq_restore(flags);
  294. return 0;
  295. }
  296. static int
  297. maciisi_start(void)
  298. {
  299. struct adb_request* req;
  300. int status;
  301. #ifdef DEBUG_MACIISI_ADB
  302. status = via[B] & (TIP | TREQ);
  303. printk(KERN_DEBUG "maciisi_start called, state=%d, status=%x, ifr=%x\n", maciisi_state, status, via[IFR]);
  304. #endif
  305. if (maciisi_state != idle) {
  306. /* shouldn't happen */
  307. printk(KERN_ERR "maciisi_start: maciisi_start called when driver busy!\n");
  308. return -EBUSY;
  309. }
  310. req = current_req;
  311. if (req == NULL)
  312. return -EINVAL;
  313. status = via[B] & (TIP|TREQ);
  314. if (!(status & TREQ)) {
  315. #ifdef DEBUG_MACIISI_ADB
  316. printk(KERN_DEBUG "maciisi_start: bus busy - aborting\n");
  317. #endif
  318. return -EBUSY;
  319. }
  320. /* Okay, send */
  321. #ifdef DEBUG_MACIISI_ADB
  322. printk(KERN_DEBUG "maciisi_start: sending\n");
  323. #endif
  324. /* Set state to active */
  325. via[B] |= TIP;
  326. /* ACK off */
  327. via[B] &= ~TACK;
  328. /* Delay */
  329. udelay(ADB_DELAY);
  330. /* Shift out and send */
  331. via[ACR] |= SR_OUT;
  332. via[SR] = req->data[0];
  333. data_index = 1;
  334. /* ACK on */
  335. via[B] |= TACK;
  336. maciisi_state = sending;
  337. return 0;
  338. }
  339. void
  340. maciisi_poll(void)
  341. {
  342. unsigned long flags;
  343. local_irq_save(flags);
  344. if (via[IFR] & SR_INT) {
  345. maciisi_interrupt(0, 0, 0);
  346. }
  347. else /* avoid calling this function too quickly in a loop */
  348. udelay(ADB_DELAY);
  349. local_irq_restore(flags);
  350. }
  351. /* Shift register interrupt - this is *supposed* to mean that the
  352. register is either full or empty. In practice, I have no idea what
  353. it means :( */
  354. static irqreturn_t
  355. maciisi_interrupt(int irq, void* arg, struct pt_regs* regs)
  356. {
  357. int status;
  358. struct adb_request *req;
  359. #ifdef DEBUG_MACIISI_ADB
  360. static int dump_reply = 0;
  361. #endif
  362. int i;
  363. unsigned long flags;
  364. local_irq_save(flags);
  365. status = via[B] & (TIP|TREQ);
  366. #ifdef DEBUG_MACIISI_ADB
  367. printk(KERN_DEBUG "state %d status %x ifr %x\n", maciisi_state, status, via[IFR]);
  368. #endif
  369. if (!(via[IFR] & SR_INT)) {
  370. /* Shouldn't happen, we hope */
  371. printk(KERN_ERR "maciisi_interrupt: called without interrupt flag set\n");
  372. local_irq_restore(flags);
  373. return IRQ_NONE;
  374. }
  375. /* Clear the interrupt */
  376. /* via[IFR] = SR_INT; */
  377. switch_start:
  378. switch (maciisi_state) {
  379. case idle:
  380. if (status & TIP)
  381. printk(KERN_ERR "maciisi_interrupt: state is idle but TIP asserted!\n");
  382. if(!reading_reply)
  383. udelay(ADB_DELAY);
  384. /* Shift in */
  385. via[ACR] &= ~SR_OUT;
  386. /* Signal start of frame */
  387. via[B] |= TIP;
  388. /* Clear the interrupt (throw this value on the floor, it's useless) */
  389. tmp = via[SR];
  390. /* ACK adb chip, high-low */
  391. via[B] |= TACK;
  392. udelay(ADB_DELAY);
  393. via[B] &= ~TACK;
  394. reply_len = 0;
  395. maciisi_state = reading;
  396. if (reading_reply) {
  397. reply_ptr = current_req->reply;
  398. } else {
  399. reply_ptr = maciisi_rbuf;
  400. }
  401. break;
  402. case sending:
  403. /* via[SR]; */
  404. /* Set ACK off */
  405. via[B] &= ~TACK;
  406. req = current_req;
  407. if (!(status & TREQ)) {
  408. /* collision */
  409. printk(KERN_ERR "maciisi_interrupt: send collision\n");
  410. /* Set idle and input */
  411. via[ACR] &= ~SR_OUT;
  412. tmp = via[SR];
  413. via[B] &= ~TIP;
  414. /* Must re-send */
  415. reading_reply = 0;
  416. reply_len = 0;
  417. maciisi_state = idle;
  418. udelay(ADB_DELAY);
  419. /* process this now, because the IFR has been cleared */
  420. goto switch_start;
  421. }
  422. udelay(ADB_DELAY);
  423. if (data_index >= req->nbytes) {
  424. /* Sent the whole packet, put the bus back in idle state */
  425. /* Shift in, we are about to read a reply (hopefully) */
  426. via[ACR] &= ~SR_OUT;
  427. tmp = via[SR];
  428. /* End of frame */
  429. via[B] &= ~TIP;
  430. req->sent = 1;
  431. maciisi_state = idle;
  432. if (req->reply_expected) {
  433. /* Note: only set this once we've
  434. successfully sent the packet */
  435. reading_reply = 1;
  436. } else {
  437. current_req = req->next;
  438. if (req->done)
  439. (*req->done)(req);
  440. /* Do any queued requests now */
  441. i = maciisi_start();
  442. if(i == 0 && need_sync) {
  443. /* Packet needs to be synced */
  444. maciisi_sync(current_req);
  445. }
  446. if(i != -EBUSY)
  447. need_sync = 0;
  448. }
  449. } else {
  450. /* Sending more stuff */
  451. /* Shift out */
  452. via[ACR] |= SR_OUT;
  453. /* Write */
  454. via[SR] = req->data[data_index++];
  455. /* Signal 'byte ready' */
  456. via[B] |= TACK;
  457. }
  458. break;
  459. case reading:
  460. /* Shift in */
  461. /* via[ACR] &= ~SR_OUT; */ /* Not in 2.2 */
  462. if (reply_len++ > 16) {
  463. printk(KERN_ERR "maciisi_interrupt: reply too long, aborting read\n");
  464. via[B] |= TACK;
  465. udelay(ADB_DELAY);
  466. via[B] &= ~(TACK|TIP);
  467. maciisi_state = idle;
  468. i = maciisi_start();
  469. if(i == 0 && need_sync) {
  470. /* Packet needs to be synced */
  471. maciisi_sync(current_req);
  472. }
  473. if(i != -EBUSY)
  474. need_sync = 0;
  475. break;
  476. }
  477. /* Read data */
  478. *reply_ptr++ = via[SR];
  479. status = via[B] & (TIP|TREQ);
  480. /* ACK on/off */
  481. via[B] |= TACK;
  482. udelay(ADB_DELAY);
  483. via[B] &= ~TACK;
  484. if (!(status & TREQ))
  485. break; /* more stuff to deal with */
  486. /* end of frame */
  487. via[B] &= ~TIP;
  488. tmp = via[SR]; /* That's what happens in 2.2 */
  489. udelay(ADB_DELAY); /* Give controller time to recover */
  490. /* end of packet, deal with it */
  491. if (reading_reply) {
  492. req = current_req;
  493. req->reply_len = reply_ptr - req->reply;
  494. if (req->data[0] == ADB_PACKET) {
  495. /* Have to adjust the reply from ADB commands */
  496. if (req->reply_len <= 2 || (req->reply[1] & 2) != 0) {
  497. /* the 0x2 bit indicates no response */
  498. req->reply_len = 0;
  499. } else {
  500. /* leave just the command and result bytes in the reply */
  501. req->reply_len -= 2;
  502. memmove(req->reply, req->reply + 2, req->reply_len);
  503. }
  504. }
  505. #ifdef DEBUG_MACIISI_ADB
  506. if (dump_reply) {
  507. int i;
  508. printk(KERN_DEBUG "maciisi_interrupt: reply is ");
  509. for (i = 0; i < req->reply_len; ++i)
  510. printk(" %.2x", req->reply[i]);
  511. printk("\n");
  512. }
  513. #endif
  514. req->complete = 1;
  515. current_req = req->next;
  516. if (req->done)
  517. (*req->done)(req);
  518. /* Obviously, we got it */
  519. reading_reply = 0;
  520. } else {
  521. maciisi_input(maciisi_rbuf, reply_ptr - maciisi_rbuf, regs);
  522. }
  523. maciisi_state = idle;
  524. status = via[B] & (TIP|TREQ);
  525. if (!(status & TREQ)) {
  526. /* Timeout?! More likely, another packet coming in already */
  527. #ifdef DEBUG_MACIISI_ADB
  528. printk(KERN_DEBUG "extra data after packet: status %x ifr %x\n",
  529. status, via[IFR]);
  530. #endif
  531. #if 0
  532. udelay(ADB_DELAY);
  533. via[B] |= TIP;
  534. maciisi_state = reading;
  535. reading_reply = 0;
  536. reply_ptr = maciisi_rbuf;
  537. #else
  538. /* Process the packet now */
  539. reading_reply = 0;
  540. goto switch_start;
  541. #endif
  542. /* We used to do this... but the controller might actually have data for us */
  543. /* maciisi_stfu(); */
  544. }
  545. else {
  546. /* Do any queued requests now if possible */
  547. i = maciisi_start();
  548. if(i == 0 && need_sync) {
  549. /* Packet needs to be synced */
  550. maciisi_sync(current_req);
  551. }
  552. if(i != -EBUSY)
  553. need_sync = 0;
  554. }
  555. break;
  556. default:
  557. printk("maciisi_interrupt: unknown maciisi_state %d?\n", maciisi_state);
  558. }
  559. local_irq_restore(flags);
  560. return IRQ_HANDLED;
  561. }
  562. static void
  563. maciisi_input(unsigned char *buf, int nb, struct pt_regs *regs)
  564. {
  565. #ifdef DEBUG_MACIISI_ADB
  566. int i;
  567. #endif
  568. switch (buf[0]) {
  569. case ADB_PACKET:
  570. adb_input(buf+2, nb-2, regs, buf[1] & 0x40);
  571. break;
  572. default:
  573. #ifdef DEBUG_MACIISI_ADB
  574. printk(KERN_DEBUG "data from IIsi ADB (%d bytes):", nb);
  575. for (i = 0; i < nb; ++i)
  576. printk(" %.2x", buf[i]);
  577. printk("\n");
  578. #endif
  579. break;
  580. }
  581. }