mthca_dev.h 16 KB

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  1. /*
  2. * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. * Copyright (c) 2005 Cisco Systems. All rights reserved.
  5. * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
  6. * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
  7. *
  8. * This software is available to you under a choice of one of two
  9. * licenses. You may choose to be licensed under the terms of the GNU
  10. * General Public License (GPL) Version 2, available from the file
  11. * COPYING in the main directory of this source tree, or the
  12. * OpenIB.org BSD license below:
  13. *
  14. * Redistribution and use in source and binary forms, with or
  15. * without modification, are permitted provided that the following
  16. * conditions are met:
  17. *
  18. * - Redistributions of source code must retain the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer.
  21. *
  22. * - Redistributions in binary form must reproduce the above
  23. * copyright notice, this list of conditions and the following
  24. * disclaimer in the documentation and/or other materials
  25. * provided with the distribution.
  26. *
  27. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  28. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  29. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  30. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  31. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  32. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  33. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  34. * SOFTWARE.
  35. *
  36. * $Id: mthca_dev.h 1349 2004-12-16 21:09:43Z roland $
  37. */
  38. #ifndef MTHCA_DEV_H
  39. #define MTHCA_DEV_H
  40. #include <linux/spinlock.h>
  41. #include <linux/kernel.h>
  42. #include <linux/pci.h>
  43. #include <linux/dma-mapping.h>
  44. #include <asm/semaphore.h>
  45. #include "mthca_provider.h"
  46. #include "mthca_doorbell.h"
  47. #define DRV_NAME "ib_mthca"
  48. #define PFX DRV_NAME ": "
  49. #define DRV_VERSION "0.06"
  50. #define DRV_RELDATE "June 23, 2005"
  51. enum {
  52. MTHCA_FLAG_DDR_HIDDEN = 1 << 1,
  53. MTHCA_FLAG_SRQ = 1 << 2,
  54. MTHCA_FLAG_MSI = 1 << 3,
  55. MTHCA_FLAG_MSI_X = 1 << 4,
  56. MTHCA_FLAG_NO_LAM = 1 << 5,
  57. MTHCA_FLAG_FMR = 1 << 6,
  58. MTHCA_FLAG_MEMFREE = 1 << 7,
  59. MTHCA_FLAG_PCIE = 1 << 8
  60. };
  61. enum {
  62. MTHCA_MAX_PORTS = 2
  63. };
  64. enum {
  65. MTHCA_BOARD_ID_LEN = 64
  66. };
  67. enum {
  68. MTHCA_EQ_CONTEXT_SIZE = 0x40,
  69. MTHCA_CQ_CONTEXT_SIZE = 0x40,
  70. MTHCA_QP_CONTEXT_SIZE = 0x200,
  71. MTHCA_RDB_ENTRY_SIZE = 0x20,
  72. MTHCA_AV_SIZE = 0x20,
  73. MTHCA_MGM_ENTRY_SIZE = 0x40,
  74. /* Arbel FW gives us these, but we need them for Tavor */
  75. MTHCA_MPT_ENTRY_SIZE = 0x40,
  76. MTHCA_MTT_SEG_SIZE = 0x40,
  77. };
  78. enum {
  79. MTHCA_EQ_CMD,
  80. MTHCA_EQ_ASYNC,
  81. MTHCA_EQ_COMP,
  82. MTHCA_NUM_EQ
  83. };
  84. enum {
  85. MTHCA_OPCODE_NOP = 0x00,
  86. MTHCA_OPCODE_RDMA_WRITE = 0x08,
  87. MTHCA_OPCODE_RDMA_WRITE_IMM = 0x09,
  88. MTHCA_OPCODE_SEND = 0x0a,
  89. MTHCA_OPCODE_SEND_IMM = 0x0b,
  90. MTHCA_OPCODE_RDMA_READ = 0x10,
  91. MTHCA_OPCODE_ATOMIC_CS = 0x11,
  92. MTHCA_OPCODE_ATOMIC_FA = 0x12,
  93. MTHCA_OPCODE_BIND_MW = 0x18,
  94. MTHCA_OPCODE_INVALID = 0xff
  95. };
  96. struct mthca_cmd {
  97. struct pci_pool *pool;
  98. int use_events;
  99. struct semaphore hcr_sem;
  100. struct semaphore poll_sem;
  101. struct semaphore event_sem;
  102. int max_cmds;
  103. spinlock_t context_lock;
  104. int free_head;
  105. struct mthca_cmd_context *context;
  106. u16 token_mask;
  107. };
  108. struct mthca_limits {
  109. int num_ports;
  110. int vl_cap;
  111. int mtu_cap;
  112. int gid_table_len;
  113. int pkey_table_len;
  114. int local_ca_ack_delay;
  115. int num_uars;
  116. int max_sg;
  117. int num_qps;
  118. int reserved_qps;
  119. int num_srqs;
  120. int reserved_srqs;
  121. int num_eecs;
  122. int reserved_eecs;
  123. int num_cqs;
  124. int reserved_cqs;
  125. int num_eqs;
  126. int reserved_eqs;
  127. int num_mpts;
  128. int num_mtt_segs;
  129. int fmr_reserved_mtts;
  130. int reserved_mtts;
  131. int reserved_mrws;
  132. int reserved_uars;
  133. int num_mgms;
  134. int num_amgms;
  135. int reserved_mcgs;
  136. int num_pds;
  137. int reserved_pds;
  138. u8 port_width_cap;
  139. };
  140. struct mthca_alloc {
  141. u32 last;
  142. u32 top;
  143. u32 max;
  144. u32 mask;
  145. spinlock_t lock;
  146. unsigned long *table;
  147. };
  148. struct mthca_array {
  149. struct {
  150. void **page;
  151. int used;
  152. } *page_list;
  153. };
  154. struct mthca_uar_table {
  155. struct mthca_alloc alloc;
  156. u64 uarc_base;
  157. int uarc_size;
  158. };
  159. struct mthca_pd_table {
  160. struct mthca_alloc alloc;
  161. };
  162. struct mthca_buddy {
  163. unsigned long **bits;
  164. int max_order;
  165. spinlock_t lock;
  166. };
  167. struct mthca_mr_table {
  168. struct mthca_alloc mpt_alloc;
  169. struct mthca_buddy mtt_buddy;
  170. struct mthca_buddy *fmr_mtt_buddy;
  171. u64 mtt_base;
  172. u64 mpt_base;
  173. struct mthca_icm_table *mtt_table;
  174. struct mthca_icm_table *mpt_table;
  175. struct {
  176. void __iomem *mpt_base;
  177. void __iomem *mtt_base;
  178. struct mthca_buddy mtt_buddy;
  179. } tavor_fmr;
  180. };
  181. struct mthca_eq_table {
  182. struct mthca_alloc alloc;
  183. void __iomem *clr_int;
  184. u32 clr_mask;
  185. u32 arm_mask;
  186. struct mthca_eq eq[MTHCA_NUM_EQ];
  187. u64 icm_virt;
  188. struct page *icm_page;
  189. dma_addr_t icm_dma;
  190. int have_irq;
  191. u8 inta_pin;
  192. };
  193. struct mthca_cq_table {
  194. struct mthca_alloc alloc;
  195. spinlock_t lock;
  196. struct mthca_array cq;
  197. struct mthca_icm_table *table;
  198. };
  199. struct mthca_srq_table {
  200. struct mthca_alloc alloc;
  201. spinlock_t lock;
  202. struct mthca_array srq;
  203. struct mthca_icm_table *table;
  204. };
  205. struct mthca_qp_table {
  206. struct mthca_alloc alloc;
  207. u32 rdb_base;
  208. int rdb_shift;
  209. int sqp_start;
  210. spinlock_t lock;
  211. struct mthca_array qp;
  212. struct mthca_icm_table *qp_table;
  213. struct mthca_icm_table *eqp_table;
  214. struct mthca_icm_table *rdb_table;
  215. };
  216. struct mthca_av_table {
  217. struct pci_pool *pool;
  218. int num_ddr_avs;
  219. u64 ddr_av_base;
  220. void __iomem *av_map;
  221. struct mthca_alloc alloc;
  222. };
  223. struct mthca_mcg_table {
  224. struct semaphore sem;
  225. struct mthca_alloc alloc;
  226. struct mthca_icm_table *table;
  227. };
  228. struct mthca_dev {
  229. struct ib_device ib_dev;
  230. struct pci_dev *pdev;
  231. int hca_type;
  232. unsigned long mthca_flags;
  233. unsigned long device_cap_flags;
  234. u32 rev_id;
  235. char board_id[MTHCA_BOARD_ID_LEN];
  236. /* firmware info */
  237. u64 fw_ver;
  238. union {
  239. struct {
  240. u64 fw_start;
  241. u64 fw_end;
  242. } tavor;
  243. struct {
  244. u64 clr_int_base;
  245. u64 eq_arm_base;
  246. u64 eq_set_ci_base;
  247. struct mthca_icm *fw_icm;
  248. struct mthca_icm *aux_icm;
  249. u16 fw_pages;
  250. } arbel;
  251. } fw;
  252. u64 ddr_start;
  253. u64 ddr_end;
  254. MTHCA_DECLARE_DOORBELL_LOCK(doorbell_lock)
  255. struct semaphore cap_mask_mutex;
  256. void __iomem *hcr;
  257. void __iomem *kar;
  258. void __iomem *clr_base;
  259. union {
  260. struct {
  261. void __iomem *ecr_base;
  262. } tavor;
  263. struct {
  264. void __iomem *eq_arm;
  265. void __iomem *eq_set_ci_base;
  266. } arbel;
  267. } eq_regs;
  268. struct mthca_cmd cmd;
  269. struct mthca_limits limits;
  270. struct mthca_uar_table uar_table;
  271. struct mthca_pd_table pd_table;
  272. struct mthca_mr_table mr_table;
  273. struct mthca_eq_table eq_table;
  274. struct mthca_cq_table cq_table;
  275. struct mthca_srq_table srq_table;
  276. struct mthca_qp_table qp_table;
  277. struct mthca_av_table av_table;
  278. struct mthca_mcg_table mcg_table;
  279. struct mthca_uar driver_uar;
  280. struct mthca_db_table *db_tab;
  281. struct mthca_pd driver_pd;
  282. struct mthca_mr driver_mr;
  283. struct ib_mad_agent *send_agent[MTHCA_MAX_PORTS][2];
  284. struct ib_ah *sm_ah[MTHCA_MAX_PORTS];
  285. spinlock_t sm_lock;
  286. };
  287. #define mthca_dbg(mdev, format, arg...) \
  288. dev_dbg(&mdev->pdev->dev, format, ## arg)
  289. #define mthca_err(mdev, format, arg...) \
  290. dev_err(&mdev->pdev->dev, format, ## arg)
  291. #define mthca_info(mdev, format, arg...) \
  292. dev_info(&mdev->pdev->dev, format, ## arg)
  293. #define mthca_warn(mdev, format, arg...) \
  294. dev_warn(&mdev->pdev->dev, format, ## arg)
  295. extern void __buggy_use_of_MTHCA_GET(void);
  296. extern void __buggy_use_of_MTHCA_PUT(void);
  297. #define MTHCA_GET(dest, source, offset) \
  298. do { \
  299. void *__p = (char *) (source) + (offset); \
  300. switch (sizeof (dest)) { \
  301. case 1: (dest) = *(u8 *) __p; break; \
  302. case 2: (dest) = be16_to_cpup(__p); break; \
  303. case 4: (dest) = be32_to_cpup(__p); break; \
  304. case 8: (dest) = be64_to_cpup(__p); break; \
  305. default: __buggy_use_of_MTHCA_GET(); \
  306. } \
  307. } while (0)
  308. #define MTHCA_PUT(dest, source, offset) \
  309. do { \
  310. void *__d = ((char *) (dest) + (offset)); \
  311. switch (sizeof(source)) { \
  312. case 1: *(u8 *) __d = (source); break; \
  313. case 2: *(__be16 *) __d = cpu_to_be16(source); break; \
  314. case 4: *(__be32 *) __d = cpu_to_be32(source); break; \
  315. case 8: *(__be64 *) __d = cpu_to_be64(source); break; \
  316. default: __buggy_use_of_MTHCA_PUT(); \
  317. } \
  318. } while (0)
  319. int mthca_reset(struct mthca_dev *mdev);
  320. u32 mthca_alloc(struct mthca_alloc *alloc);
  321. void mthca_free(struct mthca_alloc *alloc, u32 obj);
  322. int mthca_alloc_init(struct mthca_alloc *alloc, u32 num, u32 mask,
  323. u32 reserved);
  324. void mthca_alloc_cleanup(struct mthca_alloc *alloc);
  325. void *mthca_array_get(struct mthca_array *array, int index);
  326. int mthca_array_set(struct mthca_array *array, int index, void *value);
  327. void mthca_array_clear(struct mthca_array *array, int index);
  328. int mthca_array_init(struct mthca_array *array, int nent);
  329. void mthca_array_cleanup(struct mthca_array *array, int nent);
  330. int mthca_buf_alloc(struct mthca_dev *dev, int size, int max_direct,
  331. union mthca_buf *buf, int *is_direct, struct mthca_pd *pd,
  332. int hca_write, struct mthca_mr *mr);
  333. void mthca_buf_free(struct mthca_dev *dev, int size, union mthca_buf *buf,
  334. int is_direct, struct mthca_mr *mr);
  335. int mthca_init_uar_table(struct mthca_dev *dev);
  336. int mthca_init_pd_table(struct mthca_dev *dev);
  337. int mthca_init_mr_table(struct mthca_dev *dev);
  338. int mthca_init_eq_table(struct mthca_dev *dev);
  339. int mthca_init_cq_table(struct mthca_dev *dev);
  340. int mthca_init_srq_table(struct mthca_dev *dev);
  341. int mthca_init_qp_table(struct mthca_dev *dev);
  342. int mthca_init_av_table(struct mthca_dev *dev);
  343. int mthca_init_mcg_table(struct mthca_dev *dev);
  344. void mthca_cleanup_uar_table(struct mthca_dev *dev);
  345. void mthca_cleanup_pd_table(struct mthca_dev *dev);
  346. void mthca_cleanup_mr_table(struct mthca_dev *dev);
  347. void mthca_cleanup_eq_table(struct mthca_dev *dev);
  348. void mthca_cleanup_cq_table(struct mthca_dev *dev);
  349. void mthca_cleanup_srq_table(struct mthca_dev *dev);
  350. void mthca_cleanup_qp_table(struct mthca_dev *dev);
  351. void mthca_cleanup_av_table(struct mthca_dev *dev);
  352. void mthca_cleanup_mcg_table(struct mthca_dev *dev);
  353. int mthca_register_device(struct mthca_dev *dev);
  354. void mthca_unregister_device(struct mthca_dev *dev);
  355. int mthca_uar_alloc(struct mthca_dev *dev, struct mthca_uar *uar);
  356. void mthca_uar_free(struct mthca_dev *dev, struct mthca_uar *uar);
  357. int mthca_pd_alloc(struct mthca_dev *dev, int privileged, struct mthca_pd *pd);
  358. void mthca_pd_free(struct mthca_dev *dev, struct mthca_pd *pd);
  359. struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size);
  360. void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt);
  361. int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
  362. int start_index, u64 *buffer_list, int list_len);
  363. int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
  364. u64 iova, u64 total_size, u32 access, struct mthca_mr *mr);
  365. int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
  366. u32 access, struct mthca_mr *mr);
  367. int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
  368. u64 *buffer_list, int buffer_size_shift,
  369. int list_len, u64 iova, u64 total_size,
  370. u32 access, struct mthca_mr *mr);
  371. void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr);
  372. int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
  373. u32 access, struct mthca_fmr *fmr);
  374. int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
  375. int list_len, u64 iova);
  376. void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
  377. int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
  378. int list_len, u64 iova);
  379. void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr);
  380. int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr);
  381. int mthca_map_eq_icm(struct mthca_dev *dev, u64 icm_virt);
  382. void mthca_unmap_eq_icm(struct mthca_dev *dev);
  383. int mthca_poll_cq(struct ib_cq *ibcq, int num_entries,
  384. struct ib_wc *entry);
  385. int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
  386. int mthca_arbel_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify);
  387. int mthca_init_cq(struct mthca_dev *dev, int nent,
  388. struct mthca_ucontext *ctx, u32 pdn,
  389. struct mthca_cq *cq);
  390. void mthca_free_cq(struct mthca_dev *dev,
  391. struct mthca_cq *cq);
  392. void mthca_cq_event(struct mthca_dev *dev, u32 cqn);
  393. void mthca_cq_clean(struct mthca_dev *dev, u32 cqn, u32 qpn,
  394. struct mthca_srq *srq);
  395. int mthca_alloc_srq(struct mthca_dev *dev, struct mthca_pd *pd,
  396. struct ib_srq_attr *attr, struct mthca_srq *srq);
  397. void mthca_free_srq(struct mthca_dev *dev, struct mthca_srq *srq);
  398. void mthca_srq_event(struct mthca_dev *dev, u32 srqn,
  399. enum ib_event_type event_type);
  400. void mthca_free_srq_wqe(struct mthca_srq *srq, u32 wqe_addr);
  401. int mthca_tavor_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr,
  402. struct ib_recv_wr **bad_wr);
  403. int mthca_arbel_post_srq_recv(struct ib_srq *srq, struct ib_recv_wr *wr,
  404. struct ib_recv_wr **bad_wr);
  405. void mthca_qp_event(struct mthca_dev *dev, u32 qpn,
  406. enum ib_event_type event_type);
  407. int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask);
  408. int mthca_tavor_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
  409. struct ib_send_wr **bad_wr);
  410. int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
  411. struct ib_recv_wr **bad_wr);
  412. int mthca_arbel_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
  413. struct ib_send_wr **bad_wr);
  414. int mthca_arbel_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
  415. struct ib_recv_wr **bad_wr);
  416. int mthca_free_err_wqe(struct mthca_dev *dev, struct mthca_qp *qp, int is_send,
  417. int index, int *dbd, __be32 *new_wqe);
  418. int mthca_alloc_qp(struct mthca_dev *dev,
  419. struct mthca_pd *pd,
  420. struct mthca_cq *send_cq,
  421. struct mthca_cq *recv_cq,
  422. enum ib_qp_type type,
  423. enum ib_sig_type send_policy,
  424. struct ib_qp_cap *cap,
  425. struct mthca_qp *qp);
  426. int mthca_alloc_sqp(struct mthca_dev *dev,
  427. struct mthca_pd *pd,
  428. struct mthca_cq *send_cq,
  429. struct mthca_cq *recv_cq,
  430. enum ib_sig_type send_policy,
  431. struct ib_qp_cap *cap,
  432. int qpn,
  433. int port,
  434. struct mthca_sqp *sqp);
  435. void mthca_free_qp(struct mthca_dev *dev, struct mthca_qp *qp);
  436. int mthca_create_ah(struct mthca_dev *dev,
  437. struct mthca_pd *pd,
  438. struct ib_ah_attr *ah_attr,
  439. struct mthca_ah *ah);
  440. int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah);
  441. int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
  442. struct ib_ud_header *header);
  443. int mthca_multicast_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
  444. int mthca_multicast_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid);
  445. int mthca_process_mad(struct ib_device *ibdev,
  446. int mad_flags,
  447. u8 port_num,
  448. struct ib_wc *in_wc,
  449. struct ib_grh *in_grh,
  450. struct ib_mad *in_mad,
  451. struct ib_mad *out_mad);
  452. int mthca_create_agents(struct mthca_dev *dev);
  453. void mthca_free_agents(struct mthca_dev *dev);
  454. static inline struct mthca_dev *to_mdev(struct ib_device *ibdev)
  455. {
  456. return container_of(ibdev, struct mthca_dev, ib_dev);
  457. }
  458. static inline int mthca_is_memfree(struct mthca_dev *dev)
  459. {
  460. return dev->mthca_flags & MTHCA_FLAG_MEMFREE;
  461. }
  462. #endif /* MTHCA_DEV_H */