mthca_av.c 6.3 KB

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  1. /*
  2. * Copyright (c) 2004 Topspin Communications. All rights reserved.
  3. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  4. *
  5. * This software is available to you under a choice of one of two
  6. * licenses. You may choose to be licensed under the terms of the GNU
  7. * General Public License (GPL) Version 2, available from the file
  8. * COPYING in the main directory of this source tree, or the
  9. * OpenIB.org BSD license below:
  10. *
  11. * Redistribution and use in source and binary forms, with or
  12. * without modification, are permitted provided that the following
  13. * conditions are met:
  14. *
  15. * - Redistributions of source code must retain the above
  16. * copyright notice, this list of conditions and the following
  17. * disclaimer.
  18. *
  19. * - Redistributions in binary form must reproduce the above
  20. * copyright notice, this list of conditions and the following
  21. * disclaimer in the documentation and/or other materials
  22. * provided with the distribution.
  23. *
  24. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  25. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  26. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  27. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  28. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  29. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  30. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  31. * SOFTWARE.
  32. *
  33. * $Id: mthca_av.c 1349 2004-12-16 21:09:43Z roland $
  34. */
  35. #include <linux/init.h>
  36. #include <rdma/ib_verbs.h>
  37. #include <rdma/ib_cache.h>
  38. #include "mthca_dev.h"
  39. struct mthca_av {
  40. __be32 port_pd;
  41. u8 reserved1;
  42. u8 g_slid;
  43. __be16 dlid;
  44. u8 reserved2;
  45. u8 gid_index;
  46. u8 msg_sr;
  47. u8 hop_limit;
  48. __be32 sl_tclass_flowlabel;
  49. __be32 dgid[4];
  50. };
  51. int mthca_create_ah(struct mthca_dev *dev,
  52. struct mthca_pd *pd,
  53. struct ib_ah_attr *ah_attr,
  54. struct mthca_ah *ah)
  55. {
  56. u32 index = -1;
  57. struct mthca_av *av = NULL;
  58. ah->type = MTHCA_AH_PCI_POOL;
  59. if (mthca_is_memfree(dev)) {
  60. ah->av = kmalloc(sizeof *ah->av, GFP_ATOMIC);
  61. if (!ah->av)
  62. return -ENOMEM;
  63. ah->type = MTHCA_AH_KMALLOC;
  64. av = ah->av;
  65. } else if (!atomic_read(&pd->sqp_count) &&
  66. !(dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN)) {
  67. index = mthca_alloc(&dev->av_table.alloc);
  68. /* fall back to allocate in host memory */
  69. if (index == -1)
  70. goto on_hca_fail;
  71. av = kmalloc(sizeof *av, GFP_ATOMIC);
  72. if (!av)
  73. goto on_hca_fail;
  74. ah->type = MTHCA_AH_ON_HCA;
  75. ah->avdma = dev->av_table.ddr_av_base +
  76. index * MTHCA_AV_SIZE;
  77. }
  78. on_hca_fail:
  79. if (ah->type == MTHCA_AH_PCI_POOL) {
  80. ah->av = pci_pool_alloc(dev->av_table.pool,
  81. SLAB_ATOMIC, &ah->avdma);
  82. if (!ah->av)
  83. return -ENOMEM;
  84. av = ah->av;
  85. }
  86. ah->key = pd->ntmr.ibmr.lkey;
  87. memset(av, 0, MTHCA_AV_SIZE);
  88. av->port_pd = cpu_to_be32(pd->pd_num | (ah_attr->port_num << 24));
  89. av->g_slid = ah_attr->src_path_bits;
  90. av->dlid = cpu_to_be16(ah_attr->dlid);
  91. av->msg_sr = (3 << 4) | /* 2K message */
  92. ah_attr->static_rate;
  93. av->sl_tclass_flowlabel = cpu_to_be32(ah_attr->sl << 28);
  94. if (ah_attr->ah_flags & IB_AH_GRH) {
  95. av->g_slid |= 0x80;
  96. av->gid_index = (ah_attr->port_num - 1) * dev->limits.gid_table_len +
  97. ah_attr->grh.sgid_index;
  98. av->hop_limit = ah_attr->grh.hop_limit;
  99. av->sl_tclass_flowlabel |=
  100. cpu_to_be32((ah_attr->grh.traffic_class << 20) |
  101. ah_attr->grh.flow_label);
  102. memcpy(av->dgid, ah_attr->grh.dgid.raw, 16);
  103. } else {
  104. /* Arbel workaround -- low byte of GID must be 2 */
  105. av->dgid[3] = cpu_to_be32(2);
  106. }
  107. if (0) {
  108. int j;
  109. mthca_dbg(dev, "Created UDAV at %p/%08lx:\n",
  110. av, (unsigned long) ah->avdma);
  111. for (j = 0; j < 8; ++j)
  112. printk(KERN_DEBUG " [%2x] %08x\n",
  113. j * 4, be32_to_cpu(((__be32 *) av)[j]));
  114. }
  115. if (ah->type == MTHCA_AH_ON_HCA) {
  116. memcpy_toio(dev->av_table.av_map + index * MTHCA_AV_SIZE,
  117. av, MTHCA_AV_SIZE);
  118. kfree(av);
  119. }
  120. return 0;
  121. }
  122. int mthca_destroy_ah(struct mthca_dev *dev, struct mthca_ah *ah)
  123. {
  124. switch (ah->type) {
  125. case MTHCA_AH_ON_HCA:
  126. mthca_free(&dev->av_table.alloc,
  127. (ah->avdma - dev->av_table.ddr_av_base) /
  128. MTHCA_AV_SIZE);
  129. break;
  130. case MTHCA_AH_PCI_POOL:
  131. pci_pool_free(dev->av_table.pool, ah->av, ah->avdma);
  132. break;
  133. case MTHCA_AH_KMALLOC:
  134. kfree(ah->av);
  135. break;
  136. }
  137. return 0;
  138. }
  139. int mthca_read_ah(struct mthca_dev *dev, struct mthca_ah *ah,
  140. struct ib_ud_header *header)
  141. {
  142. if (ah->type == MTHCA_AH_ON_HCA)
  143. return -EINVAL;
  144. header->lrh.service_level = be32_to_cpu(ah->av->sl_tclass_flowlabel) >> 28;
  145. header->lrh.destination_lid = ah->av->dlid;
  146. header->lrh.source_lid = cpu_to_be16(ah->av->g_slid & 0x7f);
  147. if (ah->av->g_slid & 0x80) {
  148. header->grh_present = 1;
  149. header->grh.traffic_class =
  150. (be32_to_cpu(ah->av->sl_tclass_flowlabel) >> 20) & 0xff;
  151. header->grh.flow_label =
  152. ah->av->sl_tclass_flowlabel & cpu_to_be32(0xfffff);
  153. ib_get_cached_gid(&dev->ib_dev,
  154. be32_to_cpu(ah->av->port_pd) >> 24,
  155. ah->av->gid_index,
  156. &header->grh.source_gid);
  157. memcpy(header->grh.destination_gid.raw,
  158. ah->av->dgid, 16);
  159. } else {
  160. header->grh_present = 0;
  161. }
  162. return 0;
  163. }
  164. int __devinit mthca_init_av_table(struct mthca_dev *dev)
  165. {
  166. int err;
  167. if (mthca_is_memfree(dev))
  168. return 0;
  169. err = mthca_alloc_init(&dev->av_table.alloc,
  170. dev->av_table.num_ddr_avs,
  171. dev->av_table.num_ddr_avs - 1,
  172. 0);
  173. if (err)
  174. return err;
  175. dev->av_table.pool = pci_pool_create("mthca_av", dev->pdev,
  176. MTHCA_AV_SIZE,
  177. MTHCA_AV_SIZE, 0);
  178. if (!dev->av_table.pool)
  179. goto out_free_alloc;
  180. if (!(dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN)) {
  181. dev->av_table.av_map = ioremap(pci_resource_start(dev->pdev, 4) +
  182. dev->av_table.ddr_av_base -
  183. dev->ddr_start,
  184. dev->av_table.num_ddr_avs *
  185. MTHCA_AV_SIZE);
  186. if (!dev->av_table.av_map)
  187. goto out_free_pool;
  188. } else
  189. dev->av_table.av_map = NULL;
  190. return 0;
  191. out_free_pool:
  192. pci_pool_destroy(dev->av_table.pool);
  193. out_free_alloc:
  194. mthca_alloc_cleanup(&dev->av_table.alloc);
  195. return -ENOMEM;
  196. }
  197. void __devexit mthca_cleanup_av_table(struct mthca_dev *dev)
  198. {
  199. if (mthca_is_memfree(dev))
  200. return;
  201. if (dev->av_table.av_map)
  202. iounmap(dev->av_table.av_map);
  203. pci_pool_destroy(dev->av_table.pool);
  204. mthca_alloc_cleanup(&dev->av_table.alloc);
  205. }