qd65xx.c 13 KB

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  1. /*
  2. * linux/drivers/ide/legacy/qd65xx.c Version 0.07 Sep 30, 2001
  3. *
  4. * Copyright (C) 1996-2001 Linus Torvalds & author (see below)
  5. */
  6. /*
  7. * Version 0.03 Cleaned auto-tune, added probe
  8. * Version 0.04 Added second channel tuning
  9. * Version 0.05 Enhanced tuning ; added qd6500 support
  10. * Version 0.06 Added dos driver's list
  11. * Version 0.07 Second channel bug fix
  12. *
  13. * QDI QD6500/QD6580 EIDE controller fast support
  14. *
  15. * Please set local bus speed using kernel parameter idebus
  16. * for example, "idebus=33" stands for 33Mhz VLbus
  17. * To activate controller support, use "ide0=qd65xx"
  18. * To enable tuning, use "ide0=autotune"
  19. * To enable second channel tuning (qd6580 only), use "ide1=autotune"
  20. */
  21. /*
  22. * Rewritten from the work of Colten Edwards <pje120@cs.usask.ca> by
  23. * Samuel Thibault <samuel.thibault@fnac.net>
  24. */
  25. #undef REALLY_SLOW_IO /* most systems can safely undef this */
  26. #include <linux/module.h>
  27. #include <linux/config.h>
  28. #include <linux/types.h>
  29. #include <linux/kernel.h>
  30. #include <linux/delay.h>
  31. #include <linux/timer.h>
  32. #include <linux/mm.h>
  33. #include <linux/ioport.h>
  34. #include <linux/blkdev.h>
  35. #include <linux/hdreg.h>
  36. #include <linux/ide.h>
  37. #include <linux/init.h>
  38. #include <asm/system.h>
  39. #include <asm/io.h>
  40. #include "qd65xx.h"
  41. /*
  42. * I/O ports are 0x30-0x31 (and 0x32-0x33 for qd6580)
  43. * or 0xb0-0xb1 (and 0xb2-0xb3 for qd6580)
  44. * -- qd6500 is a single IDE interface
  45. * -- qd6580 is a dual IDE interface
  46. *
  47. * More research on qd6580 being done by willmore@cig.mot.com (David)
  48. * More Information given by Petr Soucek (petr@ryston.cz)
  49. * http://www.ryston.cz/petr/vlb
  50. */
  51. /*
  52. * base: Timer1
  53. *
  54. *
  55. * base+0x01: Config (R/O)
  56. *
  57. * bit 0: ide baseport: 1 = 0x1f0 ; 0 = 0x170 (only useful for qd6500)
  58. * bit 1: qd65xx baseport: 1 = 0xb0 ; 0 = 0x30
  59. * bit 2: ID3: bus speed: 1 = <=33MHz ; 0 = >33MHz
  60. * bit 3: qd6500: 1 = disabled, 0 = enabled
  61. * qd6580: 1
  62. * upper nibble:
  63. * qd6500: 1100
  64. * qd6580: either 1010 or 0101
  65. *
  66. *
  67. * base+0x02: Timer2 (qd6580 only)
  68. *
  69. *
  70. * base+0x03: Control (qd6580 only)
  71. *
  72. * bits 0-3 must always be set 1
  73. * bit 4 must be set 1, but is set 0 by dos driver while measuring vlb clock
  74. * bit 0 : 1 = Only primary port enabled : channel 0 for hda, channel 1 for hdb
  75. * 0 = Primary and Secondary ports enabled : channel 0 for hda & hdb
  76. * channel 1 for hdc & hdd
  77. * bit 1 : 1 = only disks on primary port
  78. * 0 = disks & ATAPI devices on primary port
  79. * bit 2-4 : always 0
  80. * bit 5 : status, but of what ?
  81. * bit 6 : always set 1 by dos driver
  82. * bit 7 : set 1 for non-ATAPI devices on primary port
  83. * (maybe read-ahead and post-write buffer ?)
  84. */
  85. static int timings[4]={-1,-1,-1,-1}; /* stores current timing for each timer */
  86. static void qd_write_reg (u8 content, unsigned long reg)
  87. {
  88. unsigned long flags;
  89. spin_lock_irqsave(&ide_lock, flags);
  90. outb(content,reg);
  91. spin_unlock_irqrestore(&ide_lock, flags);
  92. }
  93. static u8 __init qd_read_reg (unsigned long reg)
  94. {
  95. unsigned long flags;
  96. u8 read;
  97. spin_lock_irqsave(&ide_lock, flags);
  98. read = inb(reg);
  99. spin_unlock_irqrestore(&ide_lock, flags);
  100. return read;
  101. }
  102. /*
  103. * qd_select:
  104. *
  105. * This routine is invoked from ide.c to prepare for access to a given drive.
  106. */
  107. static void qd_select (ide_drive_t *drive)
  108. {
  109. u8 index = (( (QD_TIMREG(drive)) & 0x80 ) >> 7) |
  110. (QD_TIMREG(drive) & 0x02);
  111. if (timings[index] != QD_TIMING(drive))
  112. qd_write_reg(timings[index] = QD_TIMING(drive), QD_TIMREG(drive));
  113. }
  114. /*
  115. * qd6500_compute_timing
  116. *
  117. * computes the timing value where
  118. * lower nibble represents active time, in count of VLB clocks
  119. * upper nibble represents recovery time, in count of VLB clocks
  120. */
  121. static u8 qd6500_compute_timing (ide_hwif_t *hwif, int active_time, int recovery_time)
  122. {
  123. u8 active_cycle,recovery_cycle;
  124. if (system_bus_clock()<=33) {
  125. active_cycle = 9 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 9);
  126. recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 0, 15);
  127. } else {
  128. active_cycle = 8 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 1, 8);
  129. recovery_cycle = 18 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 3, 18);
  130. }
  131. return((recovery_cycle<<4) | 0x08 | active_cycle);
  132. }
  133. /*
  134. * qd6580_compute_timing
  135. *
  136. * idem for qd6580
  137. */
  138. static u8 qd6580_compute_timing (int active_time, int recovery_time)
  139. {
  140. u8 active_cycle = 17 - IDE_IN(active_time * system_bus_clock() / 1000 + 1, 2, 17);
  141. u8 recovery_cycle = 15 - IDE_IN(recovery_time * system_bus_clock() / 1000 + 1, 2, 15);
  142. return((recovery_cycle<<4) | active_cycle);
  143. }
  144. /*
  145. * qd_find_disk_type
  146. *
  147. * tries to find timing from dos driver's table
  148. */
  149. static int qd_find_disk_type (ide_drive_t *drive,
  150. int *active_time, int *recovery_time)
  151. {
  152. struct qd65xx_timing_s *p;
  153. char model[40];
  154. if (!*drive->id->model) return 0;
  155. strncpy(model,drive->id->model,40);
  156. ide_fixstring(model,40,1); /* byte-swap */
  157. for (p = qd65xx_timing ; p->offset != -1 ; p++) {
  158. if (!strncmp(p->model, model+p->offset, 4)) {
  159. printk(KERN_DEBUG "%s: listed !\n", drive->name);
  160. *active_time = p->active;
  161. *recovery_time = p->recovery;
  162. return 1;
  163. }
  164. }
  165. return 0;
  166. }
  167. /*
  168. * qd_timing_ok:
  169. *
  170. * check whether timings don't conflict
  171. */
  172. static int qd_timing_ok (ide_drive_t drives[])
  173. {
  174. return (IDE_IMPLY(drives[0].present && drives[1].present,
  175. IDE_IMPLY(QD_TIMREG(drives) == QD_TIMREG(drives+1),
  176. QD_TIMING(drives) == QD_TIMING(drives+1))));
  177. /* if same timing register, must be same timing */
  178. }
  179. /*
  180. * qd_set_timing:
  181. *
  182. * records the timing, and enables selectproc as needed
  183. */
  184. static void qd_set_timing (ide_drive_t *drive, u8 timing)
  185. {
  186. ide_hwif_t *hwif = HWIF(drive);
  187. drive->drive_data &= 0xff00;
  188. drive->drive_data |= timing;
  189. if (qd_timing_ok(hwif->drives)) {
  190. qd_select(drive); /* selects once */
  191. hwif->selectproc = NULL;
  192. } else
  193. hwif->selectproc = &qd_select;
  194. printk(KERN_DEBUG "%s: %#x\n", drive->name, timing);
  195. }
  196. /*
  197. * qd6500_tune_drive
  198. */
  199. static void qd6500_tune_drive (ide_drive_t *drive, u8 pio)
  200. {
  201. int active_time = 175;
  202. int recovery_time = 415; /* worst case values from the dos driver */
  203. if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)
  204. && drive->id->tPIO && (drive->id->field_valid & 0x02)
  205. && drive->id->eide_pio >= 240) {
  206. printk(KERN_INFO "%s: PIO mode%d\n", drive->name,
  207. drive->id->tPIO);
  208. active_time = 110;
  209. recovery_time = drive->id->eide_pio - 120;
  210. }
  211. qd_set_timing(drive, qd6500_compute_timing(HWIF(drive), active_time, recovery_time));
  212. }
  213. /*
  214. * qd6580_tune_drive
  215. */
  216. static void qd6580_tune_drive (ide_drive_t *drive, u8 pio)
  217. {
  218. ide_pio_data_t d;
  219. int base = HWIF(drive)->select_data;
  220. int active_time = 175;
  221. int recovery_time = 415; /* worst case values from the dos driver */
  222. if (drive->id && !qd_find_disk_type(drive, &active_time, &recovery_time)) {
  223. pio = ide_get_best_pio_mode(drive, pio, 255, &d);
  224. pio = min_t(u8, pio, 4);
  225. switch (pio) {
  226. case 0: break;
  227. case 3:
  228. if (d.cycle_time >= 110) {
  229. active_time = 86;
  230. recovery_time = d.cycle_time - 102;
  231. } else
  232. printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
  233. break;
  234. case 4:
  235. if (d.cycle_time >= 69) {
  236. active_time = 70;
  237. recovery_time = d.cycle_time - 61;
  238. } else
  239. printk(KERN_WARNING "%s: Strange recovery time !\n",drive->name);
  240. break;
  241. default:
  242. if (d.cycle_time >= 180) {
  243. active_time = 110;
  244. recovery_time = d.cycle_time - 120;
  245. } else {
  246. active_time = ide_pio_timings[pio].active_time;
  247. recovery_time = d.cycle_time
  248. -active_time;
  249. }
  250. }
  251. printk(KERN_INFO "%s: PIO mode%d\n", drive->name,pio);
  252. }
  253. if (!HWIF(drive)->channel && drive->media != ide_disk) {
  254. qd_write_reg(0x5f, QD_CONTROL_PORT);
  255. printk(KERN_WARNING "%s: ATAPI: disabled read-ahead FIFO "
  256. "and post-write buffer on %s.\n",
  257. drive->name, HWIF(drive)->name);
  258. }
  259. qd_set_timing(drive, qd6580_compute_timing(active_time, recovery_time));
  260. }
  261. /*
  262. * qd_testreg
  263. *
  264. * tests if the given port is a register
  265. */
  266. static int __init qd_testreg(int port)
  267. {
  268. u8 savereg;
  269. u8 readreg;
  270. unsigned long flags;
  271. spin_lock_irqsave(&ide_lock, flags);
  272. savereg = inb_p(port);
  273. outb_p(QD_TESTVAL, port); /* safe value */
  274. readreg = inb_p(port);
  275. outb(savereg, port);
  276. spin_unlock_irqrestore(&ide_lock, flags);
  277. if (savereg == QD_TESTVAL) {
  278. printk(KERN_ERR "Outch ! the probe for qd65xx isn't reliable !\n");
  279. printk(KERN_ERR "Please contact maintainers to tell about your hardware\n");
  280. printk(KERN_ERR "Assuming qd65xx is not present.\n");
  281. return 1;
  282. }
  283. return (readreg != QD_TESTVAL);
  284. }
  285. /*
  286. * qd_setup:
  287. *
  288. * called to setup an ata channel : adjusts attributes & links for tuning
  289. */
  290. static void __init qd_setup(ide_hwif_t *hwif, int base, int config,
  291. unsigned int data0, unsigned int data1,
  292. void (*tuneproc) (ide_drive_t *, u8 pio))
  293. {
  294. hwif->chipset = ide_qd65xx;
  295. hwif->channel = hwif->index;
  296. hwif->select_data = base;
  297. hwif->config_data = config;
  298. hwif->drives[0].drive_data = data0;
  299. hwif->drives[1].drive_data = data1;
  300. hwif->drives[0].io_32bit =
  301. hwif->drives[1].io_32bit = 1;
  302. hwif->tuneproc = tuneproc;
  303. probe_hwif_init(hwif);
  304. }
  305. /*
  306. * qd_unsetup:
  307. *
  308. * called to unsetup an ata channel : back to default values, unlinks tuning
  309. */
  310. /*
  311. static void __exit qd_unsetup(ide_hwif_t *hwif)
  312. {
  313. u8 config = hwif->config_data;
  314. int base = hwif->select_data;
  315. void *tuneproc = (void *) hwif->tuneproc;
  316. if (hwif->chipset != ide_qd65xx)
  317. return;
  318. printk(KERN_NOTICE "%s: back to defaults\n", hwif->name);
  319. hwif->selectproc = NULL;
  320. hwif->tuneproc = NULL;
  321. if (tuneproc == (void *) qd6500_tune_drive) {
  322. // will do it for both
  323. qd_write_reg(QD6500_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
  324. } else if (tuneproc == (void *) qd6580_tune_drive) {
  325. if (QD_CONTROL(hwif) & QD_CONTR_SEC_DISABLED) {
  326. qd_write_reg(QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
  327. qd_write_reg(QD6580_DEF_DATA2, QD_TIMREG(&hwif->drives[1]));
  328. } else {
  329. qd_write_reg(hwif->channel ? QD6580_DEF_DATA2 : QD6580_DEF_DATA, QD_TIMREG(&hwif->drives[0]));
  330. }
  331. } else {
  332. printk(KERN_WARNING "Unknown qd65xx tuning fonction !\n");
  333. printk(KERN_WARNING "keeping settings !\n");
  334. }
  335. }
  336. */
  337. /*
  338. * qd_probe:
  339. *
  340. * looks at the specified baseport, and if qd found, registers & initialises it
  341. * return 1 if another qd may be probed
  342. */
  343. static int __init qd_probe(int base)
  344. {
  345. ide_hwif_t *hwif;
  346. u8 config;
  347. u8 unit;
  348. config = qd_read_reg(QD_CONFIG_PORT);
  349. if (! ((config & QD_CONFIG_BASEPORT) >> 1 == (base == 0xb0)) )
  350. return 1;
  351. unit = ! (config & QD_CONFIG_IDE_BASEPORT);
  352. if ((config & 0xf0) == QD_CONFIG_QD6500) {
  353. if (qd_testreg(base)) return 1; /* bad register */
  354. /* qd6500 found */
  355. hwif = &ide_hwifs[unit];
  356. printk(KERN_NOTICE "%s: qd6500 at %#x\n", hwif->name, base);
  357. printk(KERN_DEBUG "qd6500: config=%#x, ID3=%u\n",
  358. config, QD_ID3);
  359. if (config & QD_CONFIG_DISABLED) {
  360. printk(KERN_WARNING "qd6500 is disabled !\n");
  361. return 1;
  362. }
  363. qd_setup(hwif, base, config, QD6500_DEF_DATA, QD6500_DEF_DATA,
  364. &qd6500_tune_drive);
  365. create_proc_ide_interfaces();
  366. return 1;
  367. }
  368. if (((config & 0xf0) == QD_CONFIG_QD6580_A) ||
  369. ((config & 0xf0) == QD_CONFIG_QD6580_B)) {
  370. u8 control;
  371. if (qd_testreg(base) || qd_testreg(base+0x02)) return 1;
  372. /* bad registers */
  373. /* qd6580 found */
  374. control = qd_read_reg(QD_CONTROL_PORT);
  375. printk(KERN_NOTICE "qd6580 at %#x\n", base);
  376. printk(KERN_DEBUG "qd6580: config=%#x, control=%#x, ID3=%u\n",
  377. config, control, QD_ID3);
  378. if (control & QD_CONTR_SEC_DISABLED) {
  379. /* secondary disabled */
  380. hwif = &ide_hwifs[unit];
  381. printk(KERN_INFO "%s: qd6580: single IDE board\n",
  382. hwif->name);
  383. qd_setup(hwif, base, config | (control << 8),
  384. QD6580_DEF_DATA, QD6580_DEF_DATA2,
  385. &qd6580_tune_drive);
  386. qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
  387. create_proc_ide_interfaces();
  388. return 1;
  389. } else {
  390. ide_hwif_t *mate;
  391. hwif = &ide_hwifs[0];
  392. mate = &ide_hwifs[1];
  393. /* secondary enabled */
  394. printk(KERN_INFO "%s&%s: qd6580: dual IDE board\n",
  395. hwif->name, mate->name);
  396. qd_setup(hwif, base, config | (control << 8),
  397. QD6580_DEF_DATA, QD6580_DEF_DATA,
  398. &qd6580_tune_drive);
  399. qd_setup(mate, base, config | (control << 8),
  400. QD6580_DEF_DATA2, QD6580_DEF_DATA2,
  401. &qd6580_tune_drive);
  402. qd_write_reg(QD_DEF_CONTR,QD_CONTROL_PORT);
  403. create_proc_ide_interfaces();
  404. return 0; /* no other qd65xx possible */
  405. }
  406. }
  407. /* no qd65xx found */
  408. return 1;
  409. }
  410. /* Can be called directly from ide.c. */
  411. int __init qd65xx_init(void)
  412. {
  413. if (qd_probe(0x30))
  414. qd_probe(0xb0);
  415. if (ide_hwifs[0].chipset != ide_qd65xx &&
  416. ide_hwifs[1].chipset != ide_qd65xx)
  417. return -ENODEV;
  418. return 0;
  419. }
  420. #ifdef MODULE
  421. module_init(qd65xx_init);
  422. #endif
  423. MODULE_AUTHOR("Samuel Thibault");
  424. MODULE_DESCRIPTION("support of qd65xx vlb ide chipset");
  425. MODULE_LICENSE("GPL");