vr41xx_rtc.c 15 KB

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  1. /*
  2. * Driver for NEC VR4100 series Real Time Clock unit.
  3. *
  4. * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  19. */
  20. #include <linux/device.h>
  21. #include <linux/fs.h>
  22. #include <linux/init.h>
  23. #include <linux/ioport.h>
  24. #include <linux/irq.h>
  25. #include <linux/mc146818rtc.h>
  26. #include <linux/miscdevice.h>
  27. #include <linux/module.h>
  28. #include <linux/poll.h>
  29. #include <linux/rtc.h>
  30. #include <linux/spinlock.h>
  31. #include <linux/types.h>
  32. #include <linux/wait.h>
  33. #include <asm/div64.h>
  34. #include <asm/io.h>
  35. #include <asm/time.h>
  36. #include <asm/uaccess.h>
  37. #include <asm/vr41xx/vr41xx.h>
  38. MODULE_AUTHOR("Yoichi Yuasa <yuasa@hh.iij4u.or.jp>");
  39. MODULE_DESCRIPTION("NEC VR4100 series RTC driver");
  40. MODULE_LICENSE("GPL");
  41. #define RTC1_TYPE1_START 0x0b0000c0UL
  42. #define RTC1_TYPE1_END 0x0b0000dfUL
  43. #define RTC2_TYPE1_START 0x0b0001c0UL
  44. #define RTC2_TYPE1_END 0x0b0001dfUL
  45. #define RTC1_TYPE2_START 0x0f000100UL
  46. #define RTC1_TYPE2_END 0x0f00011fUL
  47. #define RTC2_TYPE2_START 0x0f000120UL
  48. #define RTC2_TYPE2_END 0x0f00013fUL
  49. #define RTC1_SIZE 0x20
  50. #define RTC2_SIZE 0x20
  51. /* RTC 1 registers */
  52. #define ETIMELREG 0x00
  53. #define ETIMEMREG 0x02
  54. #define ETIMEHREG 0x04
  55. /* RFU */
  56. #define ECMPLREG 0x08
  57. #define ECMPMREG 0x0a
  58. #define ECMPHREG 0x0c
  59. /* RFU */
  60. #define RTCL1LREG 0x10
  61. #define RTCL1HREG 0x12
  62. #define RTCL1CNTLREG 0x14
  63. #define RTCL1CNTHREG 0x16
  64. #define RTCL2LREG 0x18
  65. #define RTCL2HREG 0x1a
  66. #define RTCL2CNTLREG 0x1c
  67. #define RTCL2CNTHREG 0x1e
  68. /* RTC 2 registers */
  69. #define TCLKLREG 0x00
  70. #define TCLKHREG 0x02
  71. #define TCLKCNTLREG 0x04
  72. #define TCLKCNTHREG 0x06
  73. /* RFU */
  74. #define RTCINTREG 0x1e
  75. #define TCLOCK_INT 0x08
  76. #define RTCLONG2_INT 0x04
  77. #define RTCLONG1_INT 0x02
  78. #define ELAPSEDTIME_INT 0x01
  79. #define RTC_FREQUENCY 32768
  80. #define MAX_PERIODIC_RATE 6553
  81. #define MAX_USER_PERIODIC_RATE 64
  82. static void __iomem *rtc1_base;
  83. static void __iomem *rtc2_base;
  84. #define rtc1_read(offset) readw(rtc1_base + (offset))
  85. #define rtc1_write(offset, value) writew((value), rtc1_base + (offset))
  86. #define rtc2_read(offset) readw(rtc2_base + (offset))
  87. #define rtc2_write(offset, value) writew((value), rtc2_base + (offset))
  88. static unsigned long epoch = 1970; /* Jan 1 1970 00:00:00 */
  89. static spinlock_t rtc_task_lock;
  90. static wait_queue_head_t rtc_wait;
  91. static unsigned long rtc_irq_data;
  92. static struct fasync_struct *rtc_async_queue;
  93. static rtc_task_t *rtc_callback;
  94. static char rtc_name[] = "RTC";
  95. static unsigned long periodic_frequency;
  96. static unsigned long periodic_count;
  97. typedef enum {
  98. RTC_RELEASE,
  99. RTC_OPEN,
  100. } rtc_status_t;
  101. static rtc_status_t rtc_status;
  102. typedef enum {
  103. FUNCTION_RTC_IOCTL,
  104. FUNCTION_RTC_CONTROL,
  105. } rtc_callfrom_t;
  106. struct resource rtc_resource[2] = {
  107. { .name = rtc_name,
  108. .flags = IORESOURCE_MEM, },
  109. { .name = rtc_name,
  110. .flags = IORESOURCE_MEM, },
  111. };
  112. #define RTC_NUM_RESOURCES sizeof(rtc_resource) / sizeof(struct resource)
  113. static inline unsigned long read_elapsed_second(void)
  114. {
  115. unsigned long first_low, first_mid, first_high;
  116. unsigned long second_low, second_mid, second_high;
  117. do {
  118. first_low = rtc1_read(ETIMELREG);
  119. first_mid = rtc1_read(ETIMEMREG);
  120. first_high = rtc1_read(ETIMEHREG);
  121. second_low = rtc1_read(ETIMELREG);
  122. second_mid = rtc1_read(ETIMEMREG);
  123. second_high = rtc1_read(ETIMEHREG);
  124. } while (first_low != second_low || first_mid != second_mid ||
  125. first_high != second_high);
  126. return (first_high << 17) | (first_mid << 1) | (first_low >> 15);
  127. }
  128. static inline void write_elapsed_second(unsigned long sec)
  129. {
  130. spin_lock_irq(&rtc_lock);
  131. rtc1_write(ETIMELREG, (uint16_t)(sec << 15));
  132. rtc1_write(ETIMEMREG, (uint16_t)(sec >> 1));
  133. rtc1_write(ETIMEHREG, (uint16_t)(sec >> 17));
  134. spin_unlock_irq(&rtc_lock);
  135. }
  136. static void set_alarm(struct rtc_time *time)
  137. {
  138. unsigned long alarm_sec;
  139. alarm_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
  140. time->tm_hour, time->tm_min, time->tm_sec);
  141. spin_lock_irq(&rtc_lock);
  142. rtc1_write(ECMPLREG, (uint16_t)(alarm_sec << 15));
  143. rtc1_write(ECMPMREG, (uint16_t)(alarm_sec >> 1));
  144. rtc1_write(ECMPHREG, (uint16_t)(alarm_sec >> 17));
  145. spin_unlock_irq(&rtc_lock);
  146. }
  147. static void read_alarm(struct rtc_time *time)
  148. {
  149. unsigned long low, mid, high;
  150. spin_lock_irq(&rtc_lock);
  151. low = rtc1_read(ECMPLREG);
  152. mid = rtc1_read(ECMPMREG);
  153. high = rtc1_read(ECMPHREG);
  154. spin_unlock_irq(&rtc_lock);
  155. to_tm((high << 17) | (mid << 1) | (low >> 15), time);
  156. time->tm_year -= 1900;
  157. }
  158. static void read_time(struct rtc_time *time)
  159. {
  160. unsigned long epoch_sec, elapsed_sec;
  161. epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
  162. elapsed_sec = read_elapsed_second();
  163. to_tm(epoch_sec + elapsed_sec, time);
  164. time->tm_year -= 1900;
  165. }
  166. static void set_time(struct rtc_time *time)
  167. {
  168. unsigned long epoch_sec, current_sec;
  169. epoch_sec = mktime(epoch, 1, 1, 0, 0, 0);
  170. current_sec = mktime(time->tm_year + 1900, time->tm_mon + 1, time->tm_mday,
  171. time->tm_hour, time->tm_min, time->tm_sec);
  172. write_elapsed_second(current_sec - epoch_sec);
  173. }
  174. static ssize_t rtc_read(struct file *file, char __user *buf, size_t count, loff_t *ppos)
  175. {
  176. DECLARE_WAITQUEUE(wait, current);
  177. unsigned long irq_data;
  178. int retval = 0;
  179. if (count != sizeof(unsigned int) && count != sizeof(unsigned long))
  180. return -EINVAL;
  181. add_wait_queue(&rtc_wait, &wait);
  182. do {
  183. __set_current_state(TASK_INTERRUPTIBLE);
  184. spin_lock_irq(&rtc_lock);
  185. irq_data = rtc_irq_data;
  186. rtc_irq_data = 0;
  187. spin_unlock_irq(&rtc_lock);
  188. if (irq_data != 0)
  189. break;
  190. if (file->f_flags & O_NONBLOCK) {
  191. retval = -EAGAIN;
  192. break;
  193. }
  194. if (signal_pending(current)) {
  195. retval = -ERESTARTSYS;
  196. break;
  197. }
  198. } while (1);
  199. if (retval == 0) {
  200. if (count == sizeof(unsigned int)) {
  201. retval = put_user(irq_data, (unsigned int __user *)buf);
  202. if (retval == 0)
  203. retval = sizeof(unsigned int);
  204. } else {
  205. retval = put_user(irq_data, (unsigned long __user *)buf);
  206. if (retval == 0)
  207. retval = sizeof(unsigned long);
  208. }
  209. }
  210. __set_current_state(TASK_RUNNING);
  211. remove_wait_queue(&rtc_wait, &wait);
  212. return retval;
  213. }
  214. static unsigned int rtc_poll(struct file *file, struct poll_table_struct *table)
  215. {
  216. poll_wait(file, &rtc_wait, table);
  217. if (rtc_irq_data != 0)
  218. return POLLIN | POLLRDNORM;
  219. return 0;
  220. }
  221. static int rtc_do_ioctl(unsigned int cmd, unsigned long arg, rtc_callfrom_t from)
  222. {
  223. struct rtc_time time;
  224. unsigned long count;
  225. switch (cmd) {
  226. case RTC_AIE_ON:
  227. enable_irq(ELAPSEDTIME_IRQ);
  228. break;
  229. case RTC_AIE_OFF:
  230. disable_irq(ELAPSEDTIME_IRQ);
  231. break;
  232. case RTC_PIE_ON:
  233. enable_irq(RTCLONG1_IRQ);
  234. break;
  235. case RTC_PIE_OFF:
  236. disable_irq(RTCLONG1_IRQ);
  237. break;
  238. case RTC_ALM_SET:
  239. if (copy_from_user(&time, (struct rtc_time __user *)arg,
  240. sizeof(struct rtc_time)))
  241. return -EFAULT;
  242. set_alarm(&time);
  243. break;
  244. case RTC_ALM_READ:
  245. memset(&time, 0, sizeof(struct rtc_time));
  246. read_alarm(&time);
  247. break;
  248. case RTC_RD_TIME:
  249. memset(&time, 0, sizeof(struct rtc_time));
  250. read_time(&time);
  251. if (copy_to_user((void __user *)arg, &time, sizeof(struct rtc_time)))
  252. return -EFAULT;
  253. break;
  254. case RTC_SET_TIME:
  255. if (capable(CAP_SYS_TIME) == 0)
  256. return -EACCES;
  257. if (copy_from_user(&time, (struct rtc_time __user *)arg,
  258. sizeof(struct rtc_time)))
  259. return -EFAULT;
  260. set_time(&time);
  261. break;
  262. case RTC_IRQP_READ:
  263. return put_user(periodic_frequency, (unsigned long __user *)arg);
  264. break;
  265. case RTC_IRQP_SET:
  266. if (arg > MAX_PERIODIC_RATE)
  267. return -EINVAL;
  268. if (from == FUNCTION_RTC_IOCTL && arg > MAX_USER_PERIODIC_RATE &&
  269. capable(CAP_SYS_RESOURCE) == 0)
  270. return -EACCES;
  271. periodic_frequency = arg;
  272. count = RTC_FREQUENCY;
  273. do_div(count, arg);
  274. periodic_count = count;
  275. spin_lock_irq(&rtc_lock);
  276. rtc1_write(RTCL1LREG, count);
  277. rtc1_write(RTCL1HREG, count >> 16);
  278. spin_unlock_irq(&rtc_lock);
  279. break;
  280. case RTC_EPOCH_READ:
  281. return put_user(epoch, (unsigned long __user *)arg);
  282. case RTC_EPOCH_SET:
  283. /* Doesn't support before 1900 */
  284. if (arg < 1900)
  285. return -EINVAL;
  286. if (capable(CAP_SYS_TIME) == 0)
  287. return -EACCES;
  288. epoch = arg;
  289. break;
  290. default:
  291. return -EINVAL;
  292. }
  293. return 0;
  294. }
  295. static int rtc_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
  296. unsigned long arg)
  297. {
  298. return rtc_do_ioctl(cmd, arg, FUNCTION_RTC_IOCTL);
  299. }
  300. static int rtc_open(struct inode *inode, struct file *file)
  301. {
  302. spin_lock_irq(&rtc_lock);
  303. if (rtc_status == RTC_OPEN) {
  304. spin_unlock_irq(&rtc_lock);
  305. return -EBUSY;
  306. }
  307. rtc_status = RTC_OPEN;
  308. rtc_irq_data = 0;
  309. spin_unlock_irq(&rtc_lock);
  310. return 0;
  311. }
  312. static int rtc_release(struct inode *inode, struct file *file)
  313. {
  314. if (file->f_flags & FASYNC)
  315. (void)fasync_helper(-1, file, 0, &rtc_async_queue);
  316. spin_lock_irq(&rtc_lock);
  317. rtc1_write(ECMPLREG, 0);
  318. rtc1_write(ECMPMREG, 0);
  319. rtc1_write(ECMPHREG, 0);
  320. rtc1_write(RTCL1LREG, 0);
  321. rtc1_write(RTCL1HREG, 0);
  322. rtc_status = RTC_RELEASE;
  323. spin_unlock_irq(&rtc_lock);
  324. disable_irq(ELAPSEDTIME_IRQ);
  325. disable_irq(RTCLONG1_IRQ);
  326. return 0;
  327. }
  328. static int rtc_fasync(int fd, struct file *file, int on)
  329. {
  330. return fasync_helper(fd, file, on, &rtc_async_queue);
  331. }
  332. static struct file_operations rtc_fops = {
  333. .owner = THIS_MODULE,
  334. .llseek = no_llseek,
  335. .read = rtc_read,
  336. .poll = rtc_poll,
  337. .ioctl = rtc_ioctl,
  338. .open = rtc_open,
  339. .release = rtc_release,
  340. .fasync = rtc_fasync,
  341. };
  342. static irqreturn_t elapsedtime_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  343. {
  344. spin_lock(&rtc_lock);
  345. rtc2_write(RTCINTREG, ELAPSEDTIME_INT);
  346. rtc_irq_data += 0x100;
  347. rtc_irq_data &= ~0xff;
  348. rtc_irq_data |= RTC_AF;
  349. spin_unlock(&rtc_lock);
  350. spin_lock(&rtc_lock);
  351. if (rtc_callback)
  352. rtc_callback->func(rtc_callback->private_data);
  353. spin_unlock(&rtc_lock);
  354. wake_up_interruptible(&rtc_wait);
  355. kill_fasync(&rtc_async_queue, SIGIO, POLL_IN);
  356. return IRQ_HANDLED;
  357. }
  358. static irqreturn_t rtclong1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  359. {
  360. unsigned long count = periodic_count;
  361. spin_lock(&rtc_lock);
  362. rtc2_write(RTCINTREG, RTCLONG1_INT);
  363. rtc1_write(RTCL1LREG, count);
  364. rtc1_write(RTCL1HREG, count >> 16);
  365. rtc_irq_data += 0x100;
  366. rtc_irq_data &= ~0xff;
  367. rtc_irq_data |= RTC_PF;
  368. spin_unlock(&rtc_lock);
  369. spin_lock(&rtc_task_lock);
  370. if (rtc_callback)
  371. rtc_callback->func(rtc_callback->private_data);
  372. spin_unlock(&rtc_task_lock);
  373. wake_up_interruptible(&rtc_wait);
  374. kill_fasync(&rtc_async_queue, SIGIO, POLL_IN);
  375. return IRQ_HANDLED;
  376. }
  377. int rtc_register(rtc_task_t *task)
  378. {
  379. if (task == NULL || task->func == NULL)
  380. return -EINVAL;
  381. spin_lock_irq(&rtc_lock);
  382. if (rtc_status == RTC_OPEN) {
  383. spin_unlock_irq(&rtc_lock);
  384. return -EBUSY;
  385. }
  386. spin_lock(&rtc_task_lock);
  387. if (rtc_callback != NULL) {
  388. spin_unlock(&rtc_task_lock);
  389. spin_unlock_irq(&rtc_task_lock);
  390. return -EBUSY;
  391. }
  392. rtc_callback = task;
  393. spin_unlock(&rtc_task_lock);
  394. rtc_status = RTC_OPEN;
  395. spin_unlock_irq(&rtc_lock);
  396. return 0;
  397. }
  398. EXPORT_SYMBOL_GPL(rtc_register);
  399. int rtc_unregister(rtc_task_t *task)
  400. {
  401. spin_lock_irq(&rtc_task_lock);
  402. if (task == NULL || rtc_callback != task) {
  403. spin_unlock_irq(&rtc_task_lock);
  404. return -ENXIO;
  405. }
  406. spin_lock(&rtc_lock);
  407. rtc1_write(ECMPLREG, 0);
  408. rtc1_write(ECMPMREG, 0);
  409. rtc1_write(ECMPHREG, 0);
  410. rtc1_write(RTCL1LREG, 0);
  411. rtc1_write(RTCL1HREG, 0);
  412. rtc_status = RTC_RELEASE;
  413. spin_unlock(&rtc_lock);
  414. rtc_callback = NULL;
  415. spin_unlock_irq(&rtc_task_lock);
  416. disable_irq(ELAPSEDTIME_IRQ);
  417. disable_irq(RTCLONG1_IRQ);
  418. return 0;
  419. }
  420. EXPORT_SYMBOL_GPL(rtc_unregister);
  421. int rtc_control(rtc_task_t *task, unsigned int cmd, unsigned long arg)
  422. {
  423. int retval = 0;
  424. spin_lock_irq(&rtc_task_lock);
  425. if (rtc_callback != task)
  426. retval = -ENXIO;
  427. else
  428. rtc_do_ioctl(cmd, arg, FUNCTION_RTC_CONTROL);
  429. spin_unlock_irq(&rtc_task_lock);
  430. return retval;
  431. }
  432. EXPORT_SYMBOL_GPL(rtc_control);
  433. static struct miscdevice rtc_miscdevice = {
  434. .minor = RTC_MINOR,
  435. .name = rtc_name,
  436. .fops = &rtc_fops,
  437. };
  438. static int rtc_probe(struct device *dev)
  439. {
  440. struct platform_device *pdev;
  441. unsigned int irq;
  442. int retval;
  443. pdev = to_platform_device(dev);
  444. if (pdev->num_resources != 2)
  445. return -EBUSY;
  446. rtc1_base = ioremap(pdev->resource[0].start, RTC1_SIZE);
  447. if (rtc1_base == NULL)
  448. return -EBUSY;
  449. rtc2_base = ioremap(pdev->resource[1].start, RTC2_SIZE);
  450. if (rtc2_base == NULL) {
  451. iounmap(rtc1_base);
  452. rtc1_base = NULL;
  453. return -EBUSY;
  454. }
  455. retval = misc_register(&rtc_miscdevice);
  456. if (retval < 0) {
  457. iounmap(rtc1_base);
  458. iounmap(rtc2_base);
  459. rtc1_base = NULL;
  460. rtc2_base = NULL;
  461. return retval;
  462. }
  463. spin_lock_irq(&rtc_lock);
  464. rtc1_write(ECMPLREG, 0);
  465. rtc1_write(ECMPMREG, 0);
  466. rtc1_write(ECMPHREG, 0);
  467. rtc1_write(RTCL1LREG, 0);
  468. rtc1_write(RTCL1HREG, 0);
  469. rtc_status = RTC_RELEASE;
  470. rtc_irq_data = 0;
  471. spin_unlock_irq(&rtc_lock);
  472. init_waitqueue_head(&rtc_wait);
  473. irq = ELAPSEDTIME_IRQ;
  474. retval = request_irq(irq, elapsedtime_interrupt, SA_INTERRUPT,
  475. "elapsed_time", NULL);
  476. if (retval == 0) {
  477. irq = RTCLONG1_IRQ;
  478. retval = request_irq(irq, rtclong1_interrupt, SA_INTERRUPT,
  479. "rtclong1", NULL);
  480. }
  481. if (retval < 0) {
  482. printk(KERN_ERR "rtc: IRQ%d is busy\n", irq);
  483. if (irq == RTCLONG1_IRQ)
  484. free_irq(ELAPSEDTIME_IRQ, NULL);
  485. iounmap(rtc1_base);
  486. iounmap(rtc2_base);
  487. rtc1_base = NULL;
  488. rtc2_base = NULL;
  489. return retval;
  490. }
  491. disable_irq(ELAPSEDTIME_IRQ);
  492. disable_irq(RTCLONG1_IRQ);
  493. spin_lock_init(&rtc_task_lock);
  494. printk(KERN_INFO "rtc: Real Time Clock of NEC VR4100 series\n");
  495. return 0;
  496. }
  497. static int rtc_remove(struct device *dev)
  498. {
  499. int retval;
  500. retval = misc_deregister(&rtc_miscdevice);
  501. if (retval < 0)
  502. return retval;
  503. free_irq(ELAPSEDTIME_IRQ, NULL);
  504. free_irq(RTCLONG1_IRQ, NULL);
  505. if (rtc1_base != NULL)
  506. iounmap(rtc1_base);
  507. if (rtc2_base != NULL)
  508. iounmap(rtc2_base);
  509. return 0;
  510. }
  511. static struct platform_device *rtc_platform_device;
  512. static struct device_driver rtc_device_driver = {
  513. .name = rtc_name,
  514. .bus = &platform_bus_type,
  515. .probe = rtc_probe,
  516. .remove = rtc_remove,
  517. };
  518. static int __devinit vr41xx_rtc_init(void)
  519. {
  520. int retval;
  521. switch (current_cpu_data.cputype) {
  522. case CPU_VR4111:
  523. case CPU_VR4121:
  524. rtc_resource[0].start = RTC1_TYPE1_START;
  525. rtc_resource[0].end = RTC1_TYPE1_END;
  526. rtc_resource[1].start = RTC2_TYPE1_START;
  527. rtc_resource[1].end = RTC2_TYPE1_END;
  528. break;
  529. case CPU_VR4122:
  530. case CPU_VR4131:
  531. case CPU_VR4133:
  532. rtc_resource[0].start = RTC1_TYPE2_START;
  533. rtc_resource[0].end = RTC1_TYPE2_END;
  534. rtc_resource[1].start = RTC2_TYPE2_START;
  535. rtc_resource[1].end = RTC2_TYPE2_END;
  536. break;
  537. default:
  538. return -ENODEV;
  539. break;
  540. }
  541. rtc_platform_device = platform_device_register_simple("RTC", -1, rtc_resource, RTC_NUM_RESOURCES);
  542. if (IS_ERR(rtc_platform_device))
  543. return PTR_ERR(rtc_platform_device);
  544. retval = driver_register(&rtc_device_driver);
  545. if (retval < 0)
  546. platform_device_unregister(rtc_platform_device);
  547. return retval;
  548. }
  549. static void __devexit vr41xx_rtc_exit(void)
  550. {
  551. driver_unregister(&rtc_device_driver);
  552. platform_device_unregister(rtc_platform_device);
  553. }
  554. module_init(vr41xx_rtc_init);
  555. module_exit(vr41xx_rtc_exit);