tpm_infineon.c 13 KB

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  1. /*
  2. * Description:
  3. * Device Driver for the Infineon Technologies
  4. * SLD 9630 TT 1.1 and SLB 9635 TT 1.2 Trusted Platform Module
  5. * Specifications at www.trustedcomputinggroup.org
  6. *
  7. * Copyright (C) 2005, Marcel Selhorst <selhorst@crypto.rub.de>
  8. * Applied Data Security Group, Ruhr-University Bochum, Germany
  9. * Project-Homepage: http://www.prosec.rub.de/tpm
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License as
  13. * published by the Free Software Foundation, version 2 of the
  14. * License.
  15. */
  16. #include <linux/pnp.h>
  17. #include "tpm.h"
  18. /* Infineon specific definitions */
  19. /* maximum number of WTX-packages */
  20. #define TPM_MAX_WTX_PACKAGES 50
  21. /* msleep-Time for WTX-packages */
  22. #define TPM_WTX_MSLEEP_TIME 20
  23. /* msleep-Time --> Interval to check status register */
  24. #define TPM_MSLEEP_TIME 3
  25. /* gives number of max. msleep()-calls before throwing timeout */
  26. #define TPM_MAX_TRIES 5000
  27. #define TPM_INFINEON_DEV_VEN_VALUE 0x15D1
  28. /* These values will be filled after PnP-call */
  29. static int TPM_INF_DATA = 0;
  30. static int TPM_INF_ADDR = 0;
  31. static int pnp_registered = 0;
  32. /* TPM header definitions */
  33. enum infineon_tpm_header {
  34. TPM_VL_VER = 0x01,
  35. TPM_VL_CHANNEL_CONTROL = 0x07,
  36. TPM_VL_CHANNEL_PERSONALISATION = 0x0A,
  37. TPM_VL_CHANNEL_TPM = 0x0B,
  38. TPM_VL_CONTROL = 0x00,
  39. TPM_INF_NAK = 0x15,
  40. TPM_CTRL_WTX = 0x10,
  41. TPM_CTRL_WTX_ABORT = 0x18,
  42. TPM_CTRL_WTX_ABORT_ACK = 0x18,
  43. TPM_CTRL_ERROR = 0x20,
  44. TPM_CTRL_CHAININGACK = 0x40,
  45. TPM_CTRL_CHAINING = 0x80,
  46. TPM_CTRL_DATA = 0x04,
  47. TPM_CTRL_DATA_CHA = 0x84,
  48. TPM_CTRL_DATA_CHA_ACK = 0xC4
  49. };
  50. enum infineon_tpm_register {
  51. WRFIFO = 0x00,
  52. RDFIFO = 0x01,
  53. STAT = 0x02,
  54. CMD = 0x03
  55. };
  56. enum infineon_tpm_command_bits {
  57. CMD_DIS = 0x00,
  58. CMD_LP = 0x01,
  59. CMD_RES = 0x02,
  60. CMD_IRQC = 0x06
  61. };
  62. enum infineon_tpm_status_bits {
  63. STAT_XFE = 0x00,
  64. STAT_LPA = 0x01,
  65. STAT_FOK = 0x02,
  66. STAT_TOK = 0x03,
  67. STAT_IRQA = 0x06,
  68. STAT_RDA = 0x07
  69. };
  70. /* some outgoing values */
  71. enum infineon_tpm_values {
  72. CHIP_ID1 = 0x20,
  73. CHIP_ID2 = 0x21,
  74. TPM_DAR = 0x30,
  75. RESET_LP_IRQC_DISABLE = 0x41,
  76. ENABLE_REGISTER_PAIR = 0x55,
  77. IOLIMH = 0x60,
  78. IOLIML = 0x61,
  79. DISABLE_REGISTER_PAIR = 0xAA,
  80. IDVENL = 0xF1,
  81. IDVENH = 0xF2,
  82. IDPDL = 0xF3,
  83. IDPDH = 0xF4
  84. };
  85. static int number_of_wtx;
  86. static int empty_fifo(struct tpm_chip *chip, int clear_wrfifo)
  87. {
  88. int status;
  89. int check = 0;
  90. int i;
  91. if (clear_wrfifo) {
  92. for (i = 0; i < 4096; i++) {
  93. status = inb(chip->vendor->base + WRFIFO);
  94. if (status == 0xff) {
  95. if (check == 5)
  96. break;
  97. else
  98. check++;
  99. }
  100. }
  101. }
  102. /* Note: The values which are currently in the FIFO of the TPM
  103. are thrown away since there is no usage for them. Usually,
  104. this has nothing to say, since the TPM will give its answer
  105. immediately or will be aborted anyway, so the data here is
  106. usually garbage and useless.
  107. We have to clean this, because the next communication with
  108. the TPM would be rubbish, if there is still some old data
  109. in the Read FIFO.
  110. */
  111. i = 0;
  112. do {
  113. status = inb(chip->vendor->base + RDFIFO);
  114. status = inb(chip->vendor->base + STAT);
  115. i++;
  116. if (i == TPM_MAX_TRIES)
  117. return -EIO;
  118. } while ((status & (1 << STAT_RDA)) != 0);
  119. return 0;
  120. }
  121. static int wait(struct tpm_chip *chip, int wait_for_bit)
  122. {
  123. int status;
  124. int i;
  125. for (i = 0; i < TPM_MAX_TRIES; i++) {
  126. status = inb(chip->vendor->base + STAT);
  127. /* check the status-register if wait_for_bit is set */
  128. if (status & 1 << wait_for_bit)
  129. break;
  130. msleep(TPM_MSLEEP_TIME);
  131. }
  132. if (i == TPM_MAX_TRIES) { /* timeout occurs */
  133. if (wait_for_bit == STAT_XFE)
  134. dev_err(&chip->pci_dev->dev,
  135. "Timeout in wait(STAT_XFE)\n");
  136. if (wait_for_bit == STAT_RDA)
  137. dev_err(&chip->pci_dev->dev,
  138. "Timeout in wait(STAT_RDA)\n");
  139. return -EIO;
  140. }
  141. return 0;
  142. };
  143. static void wait_and_send(struct tpm_chip *chip, u8 sendbyte)
  144. {
  145. wait(chip, STAT_XFE);
  146. outb(sendbyte, chip->vendor->base + WRFIFO);
  147. }
  148. /* Note: WTX means Waiting-Time-Extension. Whenever the TPM needs more
  149. calculation time, it sends a WTX-package, which has to be acknowledged
  150. or aborted. This usually occurs if you are hammering the TPM with key
  151. creation. Set the maximum number of WTX-packages in the definitions
  152. above, if the number is reached, the waiting-time will be denied
  153. and the TPM command has to be resend.
  154. */
  155. static void tpm_wtx(struct tpm_chip *chip)
  156. {
  157. number_of_wtx++;
  158. dev_info(&chip->pci_dev->dev, "Granting WTX (%02d / %02d)\n",
  159. number_of_wtx, TPM_MAX_WTX_PACKAGES);
  160. wait_and_send(chip, TPM_VL_VER);
  161. wait_and_send(chip, TPM_CTRL_WTX);
  162. wait_and_send(chip, 0x00);
  163. wait_and_send(chip, 0x00);
  164. msleep(TPM_WTX_MSLEEP_TIME);
  165. }
  166. static void tpm_wtx_abort(struct tpm_chip *chip)
  167. {
  168. dev_info(&chip->pci_dev->dev, "Aborting WTX\n");
  169. wait_and_send(chip, TPM_VL_VER);
  170. wait_and_send(chip, TPM_CTRL_WTX_ABORT);
  171. wait_and_send(chip, 0x00);
  172. wait_and_send(chip, 0x00);
  173. number_of_wtx = 0;
  174. msleep(TPM_WTX_MSLEEP_TIME);
  175. }
  176. static int tpm_inf_recv(struct tpm_chip *chip, u8 * buf, size_t count)
  177. {
  178. int i;
  179. int ret;
  180. u32 size = 0;
  181. recv_begin:
  182. /* start receiving header */
  183. for (i = 0; i < 4; i++) {
  184. ret = wait(chip, STAT_RDA);
  185. if (ret)
  186. return -EIO;
  187. buf[i] = inb(chip->vendor->base + RDFIFO);
  188. }
  189. if (buf[0] != TPM_VL_VER) {
  190. dev_err(&chip->pci_dev->dev,
  191. "Wrong transport protocol implementation!\n");
  192. return -EIO;
  193. }
  194. if (buf[1] == TPM_CTRL_DATA) {
  195. /* size of the data received */
  196. size = ((buf[2] << 8) | buf[3]);
  197. for (i = 0; i < size; i++) {
  198. wait(chip, STAT_RDA);
  199. buf[i] = inb(chip->vendor->base + RDFIFO);
  200. }
  201. if ((size == 0x6D00) && (buf[1] == 0x80)) {
  202. dev_err(&chip->pci_dev->dev,
  203. "Error handling on vendor layer!\n");
  204. return -EIO;
  205. }
  206. for (i = 0; i < size; i++)
  207. buf[i] = buf[i + 6];
  208. size = size - 6;
  209. return size;
  210. }
  211. if (buf[1] == TPM_CTRL_WTX) {
  212. dev_info(&chip->pci_dev->dev, "WTX-package received\n");
  213. if (number_of_wtx < TPM_MAX_WTX_PACKAGES) {
  214. tpm_wtx(chip);
  215. goto recv_begin;
  216. } else {
  217. tpm_wtx_abort(chip);
  218. goto recv_begin;
  219. }
  220. }
  221. if (buf[1] == TPM_CTRL_WTX_ABORT_ACK) {
  222. dev_info(&chip->pci_dev->dev, "WTX-abort acknowledged\n");
  223. return size;
  224. }
  225. if (buf[1] == TPM_CTRL_ERROR) {
  226. dev_err(&chip->pci_dev->dev, "ERROR-package received:\n");
  227. if (buf[4] == TPM_INF_NAK)
  228. dev_err(&chip->pci_dev->dev,
  229. "-> Negative acknowledgement"
  230. " - retransmit command!\n");
  231. return -EIO;
  232. }
  233. return -EIO;
  234. }
  235. static int tpm_inf_send(struct tpm_chip *chip, u8 * buf, size_t count)
  236. {
  237. int i;
  238. int ret;
  239. u8 count_high, count_low, count_4, count_3, count_2, count_1;
  240. /* Disabling Reset, LP and IRQC */
  241. outb(RESET_LP_IRQC_DISABLE, chip->vendor->base + CMD);
  242. ret = empty_fifo(chip, 1);
  243. if (ret) {
  244. dev_err(&chip->pci_dev->dev, "Timeout while clearing FIFO\n");
  245. return -EIO;
  246. }
  247. ret = wait(chip, STAT_XFE);
  248. if (ret)
  249. return -EIO;
  250. count_4 = (count & 0xff000000) >> 24;
  251. count_3 = (count & 0x00ff0000) >> 16;
  252. count_2 = (count & 0x0000ff00) >> 8;
  253. count_1 = (count & 0x000000ff);
  254. count_high = ((count + 6) & 0xffffff00) >> 8;
  255. count_low = ((count + 6) & 0x000000ff);
  256. /* Sending Header */
  257. wait_and_send(chip, TPM_VL_VER);
  258. wait_and_send(chip, TPM_CTRL_DATA);
  259. wait_and_send(chip, count_high);
  260. wait_and_send(chip, count_low);
  261. /* Sending Data Header */
  262. wait_and_send(chip, TPM_VL_VER);
  263. wait_and_send(chip, TPM_VL_CHANNEL_TPM);
  264. wait_and_send(chip, count_4);
  265. wait_and_send(chip, count_3);
  266. wait_and_send(chip, count_2);
  267. wait_and_send(chip, count_1);
  268. /* Sending Data */
  269. for (i = 0; i < count; i++) {
  270. wait_and_send(chip, buf[i]);
  271. }
  272. return count;
  273. }
  274. static void tpm_inf_cancel(struct tpm_chip *chip)
  275. {
  276. /*
  277. Since we are using the legacy mode to communicate
  278. with the TPM, we have no cancel functions, but have
  279. a workaround for interrupting the TPM through WTX.
  280. */
  281. }
  282. static DEVICE_ATTR(pubek, S_IRUGO, tpm_show_pubek, NULL);
  283. static DEVICE_ATTR(pcrs, S_IRUGO, tpm_show_pcrs, NULL);
  284. static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps, NULL);
  285. static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel);
  286. static struct attribute *inf_attrs[] = {
  287. &dev_attr_pubek.attr,
  288. &dev_attr_pcrs.attr,
  289. &dev_attr_caps.attr,
  290. &dev_attr_cancel.attr,
  291. NULL,
  292. };
  293. static struct attribute_group inf_attr_grp = {.attrs = inf_attrs };
  294. static struct file_operations inf_ops = {
  295. .owner = THIS_MODULE,
  296. .llseek = no_llseek,
  297. .open = tpm_open,
  298. .read = tpm_read,
  299. .write = tpm_write,
  300. .release = tpm_release,
  301. };
  302. static struct tpm_vendor_specific tpm_inf = {
  303. .recv = tpm_inf_recv,
  304. .send = tpm_inf_send,
  305. .cancel = tpm_inf_cancel,
  306. .req_complete_mask = 0,
  307. .req_complete_val = 0,
  308. .attr_group = &inf_attr_grp,
  309. .miscdev = {.fops = &inf_ops,},
  310. };
  311. static const struct pnp_device_id tpm_pnp_tbl[] = {
  312. /* Infineon TPMs */
  313. {"IFX0101", 0},
  314. {"IFX0102", 0},
  315. {"", 0}
  316. };
  317. MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
  318. static int __devinit tpm_inf_pnp_probe(struct pnp_dev *dev,
  319. const struct pnp_device_id *dev_id)
  320. {
  321. if (pnp_port_valid(dev, 0)) {
  322. TPM_INF_ADDR = (pnp_port_start(dev, 0) & 0xff);
  323. TPM_INF_DATA = ((TPM_INF_ADDR + 1) & 0xff);
  324. tpm_inf.base = pnp_port_start(dev, 1);
  325. dev_info(&dev->dev, "Found %s with ID %s\n",
  326. dev->name, dev_id->id);
  327. return 0;
  328. }
  329. return -ENODEV;
  330. }
  331. static struct pnp_driver tpm_inf_pnp = {
  332. .name = "tpm_inf_pnp",
  333. .id_table = tpm_pnp_tbl,
  334. .probe = tpm_inf_pnp_probe,
  335. };
  336. static int __devinit tpm_inf_probe(struct pci_dev *pci_dev,
  337. const struct pci_device_id *pci_id)
  338. {
  339. int rc = 0;
  340. u8 iol, ioh;
  341. int vendorid[2];
  342. int version[2];
  343. int productid[2];
  344. char chipname[20];
  345. rc = pci_enable_device(pci_dev);
  346. if (rc)
  347. return rc;
  348. dev_info(&pci_dev->dev, "LPC-bus found at 0x%x\n", pci_id->device);
  349. /* read IO-ports from PnP */
  350. rc = pnp_register_driver(&tpm_inf_pnp);
  351. if (rc < 0) {
  352. dev_err(&pci_dev->dev,
  353. "Error %x from pnp_register_driver!\n",rc);
  354. goto error2;
  355. }
  356. if (!rc) {
  357. dev_info(&pci_dev->dev, "No Infineon TPM found!\n");
  358. goto error;
  359. } else {
  360. pnp_registered = 1;
  361. }
  362. /* Make sure, we have received valid config ports */
  363. if (!TPM_INF_ADDR) {
  364. dev_err(&pci_dev->dev, "No valid IO-ports received!\n");
  365. goto error;
  366. }
  367. /* query chip for its vendor, its version number a.s.o. */
  368. outb(ENABLE_REGISTER_PAIR, TPM_INF_ADDR);
  369. outb(IDVENL, TPM_INF_ADDR);
  370. vendorid[1] = inb(TPM_INF_DATA);
  371. outb(IDVENH, TPM_INF_ADDR);
  372. vendorid[0] = inb(TPM_INF_DATA);
  373. outb(IDPDL, TPM_INF_ADDR);
  374. productid[1] = inb(TPM_INF_DATA);
  375. outb(IDPDH, TPM_INF_ADDR);
  376. productid[0] = inb(TPM_INF_DATA);
  377. outb(CHIP_ID1, TPM_INF_ADDR);
  378. version[1] = inb(TPM_INF_DATA);
  379. outb(CHIP_ID2, TPM_INF_ADDR);
  380. version[0] = inb(TPM_INF_DATA);
  381. switch ((productid[0] << 8) | productid[1]) {
  382. case 6:
  383. snprintf(chipname, sizeof(chipname), " (SLD 9630 TT 1.1)");
  384. break;
  385. case 11:
  386. snprintf(chipname, sizeof(chipname), " (SLB 9635 TT 1.2)");
  387. break;
  388. default:
  389. snprintf(chipname, sizeof(chipname), " (unknown chip)");
  390. break;
  391. }
  392. if ((vendorid[0] << 8 | vendorid[1]) == (TPM_INFINEON_DEV_VEN_VALUE)) {
  393. if (tpm_inf.base == 0) {
  394. dev_err(&pci_dev->dev, "No IO-ports found!\n");
  395. goto error;
  396. }
  397. /* configure TPM with IO-ports */
  398. outb(IOLIMH, TPM_INF_ADDR);
  399. outb(((tpm_inf.base >> 8) & 0xff), TPM_INF_DATA);
  400. outb(IOLIML, TPM_INF_ADDR);
  401. outb((tpm_inf.base & 0xff), TPM_INF_DATA);
  402. /* control if IO-ports are set correctly */
  403. outb(IOLIMH, TPM_INF_ADDR);
  404. ioh = inb(TPM_INF_DATA);
  405. outb(IOLIML, TPM_INF_ADDR);
  406. iol = inb(TPM_INF_DATA);
  407. if ((ioh << 8 | iol) != tpm_inf.base) {
  408. dev_err(&pci_dev->dev,
  409. "Could not set IO-ports to %04x\n",
  410. tpm_inf.base);
  411. goto error;
  412. }
  413. /* activate register */
  414. outb(TPM_DAR, TPM_INF_ADDR);
  415. outb(0x01, TPM_INF_DATA);
  416. outb(DISABLE_REGISTER_PAIR, TPM_INF_ADDR);
  417. /* disable RESET, LP and IRQC */
  418. outb(RESET_LP_IRQC_DISABLE, tpm_inf.base + CMD);
  419. /* Finally, we're done, print some infos */
  420. dev_info(&pci_dev->dev, "TPM found: "
  421. "config base 0x%x, "
  422. "io base 0x%x, "
  423. "chip version %02x%02x, "
  424. "vendor id %x%x (Infineon), "
  425. "product id %02x%02x"
  426. "%s\n",
  427. TPM_INF_ADDR,
  428. tpm_inf.base,
  429. version[0], version[1],
  430. vendorid[0], vendorid[1],
  431. productid[0], productid[1], chipname);
  432. rc = tpm_register_hardware(pci_dev, &tpm_inf);
  433. if (rc < 0)
  434. goto error;
  435. return 0;
  436. } else {
  437. dev_info(&pci_dev->dev, "No Infineon TPM found!\n");
  438. error:
  439. pnp_unregister_driver(&tpm_inf_pnp);
  440. error2:
  441. pci_disable_device(pci_dev);
  442. pnp_registered = 0;
  443. return -ENODEV;
  444. }
  445. }
  446. static struct pci_device_id tpm_pci_tbl[] __devinitdata = {
  447. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801BA_0)},
  448. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_12)},
  449. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_0)},
  450. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_12)},
  451. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_0)},
  452. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0)},
  453. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1)},
  454. {PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_2)},
  455. {0,}
  456. };
  457. MODULE_DEVICE_TABLE(pci, tpm_pci_tbl);
  458. static struct pci_driver inf_pci_driver = {
  459. .name = "tpm_inf",
  460. .id_table = tpm_pci_tbl,
  461. .probe = tpm_inf_probe,
  462. .remove = __devexit_p(tpm_remove),
  463. .suspend = tpm_pm_suspend,
  464. .resume = tpm_pm_resume,
  465. };
  466. static int __init init_inf(void)
  467. {
  468. return pci_register_driver(&inf_pci_driver);
  469. }
  470. static void __exit cleanup_inf(void)
  471. {
  472. if (pnp_registered)
  473. pnp_unregister_driver(&tpm_inf_pnp);
  474. pci_unregister_driver(&inf_pci_driver);
  475. }
  476. module_init(init_inf);
  477. module_exit(cleanup_inf);
  478. MODULE_AUTHOR("Marcel Selhorst <selhorst@crypto.rub.de>");
  479. MODULE_DESCRIPTION("Driver for Infineon TPM SLD 9630 TT 1.1 / SLB 9635 TT 1.2");
  480. MODULE_VERSION("1.5");
  481. MODULE_LICENSE("GPL");