synclink_cs.c 118 KB

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  1. /*
  2. * linux/drivers/char/pcmcia/synclink_cs.c
  3. *
  4. * $Id: synclink_cs.c,v 4.34 2005/09/08 13:20:54 paulkf Exp $
  5. *
  6. * Device driver for Microgate SyncLink PC Card
  7. * multiprotocol serial adapter.
  8. *
  9. * written by Paul Fulghum for Microgate Corporation
  10. * paulkf@microgate.com
  11. *
  12. * Microgate and SyncLink are trademarks of Microgate Corporation
  13. *
  14. * This code is released under the GNU General Public License (GPL)
  15. *
  16. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  17. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  18. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  19. * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
  20. * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
  21. * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  22. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  24. * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  25. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
  26. * OF THE POSSIBILITY OF SUCH DAMAGE.
  27. */
  28. #define VERSION(ver,rel,seq) (((ver)<<16) | ((rel)<<8) | (seq))
  29. #if defined(__i386__)
  30. # define BREAKPOINT() asm(" int $3");
  31. #else
  32. # define BREAKPOINT() { }
  33. #endif
  34. #define MAX_DEVICE_COUNT 4
  35. #include <linux/config.h>
  36. #include <linux/module.h>
  37. #include <linux/errno.h>
  38. #include <linux/signal.h>
  39. #include <linux/sched.h>
  40. #include <linux/timer.h>
  41. #include <linux/time.h>
  42. #include <linux/interrupt.h>
  43. #include <linux/pci.h>
  44. #include <linux/tty.h>
  45. #include <linux/tty_flip.h>
  46. #include <linux/serial.h>
  47. #include <linux/major.h>
  48. #include <linux/string.h>
  49. #include <linux/fcntl.h>
  50. #include <linux/ptrace.h>
  51. #include <linux/ioport.h>
  52. #include <linux/mm.h>
  53. #include <linux/slab.h>
  54. #include <linux/netdevice.h>
  55. #include <linux/vmalloc.h>
  56. #include <linux/init.h>
  57. #include <asm/serial.h>
  58. #include <linux/delay.h>
  59. #include <linux/ioctl.h>
  60. #include <asm/system.h>
  61. #include <asm/io.h>
  62. #include <asm/irq.h>
  63. #include <asm/dma.h>
  64. #include <linux/bitops.h>
  65. #include <asm/types.h>
  66. #include <linux/termios.h>
  67. #include <linux/workqueue.h>
  68. #include <linux/hdlc.h>
  69. #include <pcmcia/cs_types.h>
  70. #include <pcmcia/cs.h>
  71. #include <pcmcia/cistpl.h>
  72. #include <pcmcia/cisreg.h>
  73. #include <pcmcia/ds.h>
  74. #ifdef CONFIG_HDLC_MODULE
  75. #define CONFIG_HDLC 1
  76. #endif
  77. #define GET_USER(error,value,addr) error = get_user(value,addr)
  78. #define COPY_FROM_USER(error,dest,src,size) error = copy_from_user(dest,src,size) ? -EFAULT : 0
  79. #define PUT_USER(error,value,addr) error = put_user(value,addr)
  80. #define COPY_TO_USER(error,dest,src,size) error = copy_to_user(dest,src,size) ? -EFAULT : 0
  81. #include <asm/uaccess.h>
  82. #include "linux/synclink.h"
  83. static MGSL_PARAMS default_params = {
  84. MGSL_MODE_HDLC, /* unsigned long mode */
  85. 0, /* unsigned char loopback; */
  86. HDLC_FLAG_UNDERRUN_ABORT15, /* unsigned short flags; */
  87. HDLC_ENCODING_NRZI_SPACE, /* unsigned char encoding; */
  88. 0, /* unsigned long clock_speed; */
  89. 0xff, /* unsigned char addr_filter; */
  90. HDLC_CRC_16_CCITT, /* unsigned short crc_type; */
  91. HDLC_PREAMBLE_LENGTH_8BITS, /* unsigned char preamble_length; */
  92. HDLC_PREAMBLE_PATTERN_NONE, /* unsigned char preamble; */
  93. 9600, /* unsigned long data_rate; */
  94. 8, /* unsigned char data_bits; */
  95. 1, /* unsigned char stop_bits; */
  96. ASYNC_PARITY_NONE /* unsigned char parity; */
  97. };
  98. typedef struct
  99. {
  100. int count;
  101. unsigned char status;
  102. char data[1];
  103. } RXBUF;
  104. /* The queue of BH actions to be performed */
  105. #define BH_RECEIVE 1
  106. #define BH_TRANSMIT 2
  107. #define BH_STATUS 4
  108. #define IO_PIN_SHUTDOWN_LIMIT 100
  109. #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
  110. struct _input_signal_events {
  111. int ri_up;
  112. int ri_down;
  113. int dsr_up;
  114. int dsr_down;
  115. int dcd_up;
  116. int dcd_down;
  117. int cts_up;
  118. int cts_down;
  119. };
  120. /*
  121. * Device instance data structure
  122. */
  123. typedef struct _mgslpc_info {
  124. void *if_ptr; /* General purpose pointer (used by SPPP) */
  125. int magic;
  126. int flags;
  127. int count; /* count of opens */
  128. int line;
  129. unsigned short close_delay;
  130. unsigned short closing_wait; /* time to wait before closing */
  131. struct mgsl_icount icount;
  132. struct tty_struct *tty;
  133. int timeout;
  134. int x_char; /* xon/xoff character */
  135. int blocked_open; /* # of blocked opens */
  136. unsigned char read_status_mask;
  137. unsigned char ignore_status_mask;
  138. unsigned char *tx_buf;
  139. int tx_put;
  140. int tx_get;
  141. int tx_count;
  142. /* circular list of fixed length rx buffers */
  143. unsigned char *rx_buf; /* memory allocated for all rx buffers */
  144. int rx_buf_total_size; /* size of memory allocated for rx buffers */
  145. int rx_put; /* index of next empty rx buffer */
  146. int rx_get; /* index of next full rx buffer */
  147. int rx_buf_size; /* size in bytes of single rx buffer */
  148. int rx_buf_count; /* total number of rx buffers */
  149. int rx_frame_count; /* number of full rx buffers */
  150. wait_queue_head_t open_wait;
  151. wait_queue_head_t close_wait;
  152. wait_queue_head_t status_event_wait_q;
  153. wait_queue_head_t event_wait_q;
  154. struct timer_list tx_timer; /* HDLC transmit timeout timer */
  155. struct _mgslpc_info *next_device; /* device list link */
  156. unsigned short imra_value;
  157. unsigned short imrb_value;
  158. unsigned char pim_value;
  159. spinlock_t lock;
  160. struct work_struct task; /* task structure for scheduling bh */
  161. u32 max_frame_size;
  162. u32 pending_bh;
  163. int bh_running;
  164. int bh_requested;
  165. int dcd_chkcount; /* check counts to prevent */
  166. int cts_chkcount; /* too many IRQs if a signal */
  167. int dsr_chkcount; /* is floating */
  168. int ri_chkcount;
  169. int rx_enabled;
  170. int rx_overflow;
  171. int tx_enabled;
  172. int tx_active;
  173. int tx_aborting;
  174. u32 idle_mode;
  175. int if_mode; /* serial interface selection (RS-232, v.35 etc) */
  176. char device_name[25]; /* device instance name */
  177. unsigned int io_base; /* base I/O address of adapter */
  178. unsigned int irq_level;
  179. MGSL_PARAMS params; /* communications parameters */
  180. unsigned char serial_signals; /* current serial signal states */
  181. char irq_occurred; /* for diagnostics use */
  182. char testing_irq;
  183. unsigned int init_error; /* startup error (DIAGS) */
  184. char flag_buf[MAX_ASYNC_BUFFER_SIZE];
  185. BOOLEAN drop_rts_on_tx_done;
  186. struct _input_signal_events input_signal_events;
  187. /* PCMCIA support */
  188. dev_link_t link;
  189. dev_node_t node;
  190. int stop;
  191. /* SPPP/Cisco HDLC device parts */
  192. int netcount;
  193. int dosyncppp;
  194. spinlock_t netlock;
  195. #ifdef CONFIG_HDLC
  196. struct net_device *netdev;
  197. #endif
  198. } MGSLPC_INFO;
  199. #define MGSLPC_MAGIC 0x5402
  200. /*
  201. * The size of the serial xmit buffer is 1 page, or 4096 bytes
  202. */
  203. #define TXBUFSIZE 4096
  204. #define CHA 0x00 /* channel A offset */
  205. #define CHB 0x40 /* channel B offset */
  206. /*
  207. * FIXME: PPC has PVR defined in asm/reg.h. For now we just undef it.
  208. */
  209. #undef PVR
  210. #define RXFIFO 0
  211. #define TXFIFO 0
  212. #define STAR 0x20
  213. #define CMDR 0x20
  214. #define RSTA 0x21
  215. #define PRE 0x21
  216. #define MODE 0x22
  217. #define TIMR 0x23
  218. #define XAD1 0x24
  219. #define XAD2 0x25
  220. #define RAH1 0x26
  221. #define RAH2 0x27
  222. #define DAFO 0x27
  223. #define RAL1 0x28
  224. #define RFC 0x28
  225. #define RHCR 0x29
  226. #define RAL2 0x29
  227. #define RBCL 0x2a
  228. #define XBCL 0x2a
  229. #define RBCH 0x2b
  230. #define XBCH 0x2b
  231. #define CCR0 0x2c
  232. #define CCR1 0x2d
  233. #define CCR2 0x2e
  234. #define CCR3 0x2f
  235. #define VSTR 0x34
  236. #define BGR 0x34
  237. #define RLCR 0x35
  238. #define AML 0x36
  239. #define AMH 0x37
  240. #define GIS 0x38
  241. #define IVA 0x38
  242. #define IPC 0x39
  243. #define ISR 0x3a
  244. #define IMR 0x3a
  245. #define PVR 0x3c
  246. #define PIS 0x3d
  247. #define PIM 0x3d
  248. #define PCR 0x3e
  249. #define CCR4 0x3f
  250. // IMR/ISR
  251. #define IRQ_BREAK_ON BIT15 // rx break detected
  252. #define IRQ_DATAOVERRUN BIT14 // receive data overflow
  253. #define IRQ_ALLSENT BIT13 // all sent
  254. #define IRQ_UNDERRUN BIT12 // transmit data underrun
  255. #define IRQ_TIMER BIT11 // timer interrupt
  256. #define IRQ_CTS BIT10 // CTS status change
  257. #define IRQ_TXREPEAT BIT9 // tx message repeat
  258. #define IRQ_TXFIFO BIT8 // transmit pool ready
  259. #define IRQ_RXEOM BIT7 // receive message end
  260. #define IRQ_EXITHUNT BIT6 // receive frame start
  261. #define IRQ_RXTIME BIT6 // rx char timeout
  262. #define IRQ_DCD BIT2 // carrier detect status change
  263. #define IRQ_OVERRUN BIT1 // receive frame overflow
  264. #define IRQ_RXFIFO BIT0 // receive pool full
  265. // STAR
  266. #define XFW BIT6 // transmit FIFO write enable
  267. #define CEC BIT2 // command executing
  268. #define CTS BIT1 // CTS state
  269. #define PVR_DTR BIT0
  270. #define PVR_DSR BIT1
  271. #define PVR_RI BIT2
  272. #define PVR_AUTOCTS BIT3
  273. #define PVR_RS232 0x20 /* 0010b */
  274. #define PVR_V35 0xe0 /* 1110b */
  275. #define PVR_RS422 0x40 /* 0100b */
  276. /* Register access functions */
  277. #define write_reg(info, reg, val) outb((val),(info)->io_base + (reg))
  278. #define read_reg(info, reg) inb((info)->io_base + (reg))
  279. #define read_reg16(info, reg) inw((info)->io_base + (reg))
  280. #define write_reg16(info, reg, val) outw((val), (info)->io_base + (reg))
  281. #define set_reg_bits(info, reg, mask) \
  282. write_reg(info, (reg), \
  283. (unsigned char) (read_reg(info, (reg)) | (mask)))
  284. #define clear_reg_bits(info, reg, mask) \
  285. write_reg(info, (reg), \
  286. (unsigned char) (read_reg(info, (reg)) & ~(mask)))
  287. /*
  288. * interrupt enable/disable routines
  289. */
  290. static void irq_disable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  291. {
  292. if (channel == CHA) {
  293. info->imra_value |= mask;
  294. write_reg16(info, CHA + IMR, info->imra_value);
  295. } else {
  296. info->imrb_value |= mask;
  297. write_reg16(info, CHB + IMR, info->imrb_value);
  298. }
  299. }
  300. static void irq_enable(MGSLPC_INFO *info, unsigned char channel, unsigned short mask)
  301. {
  302. if (channel == CHA) {
  303. info->imra_value &= ~mask;
  304. write_reg16(info, CHA + IMR, info->imra_value);
  305. } else {
  306. info->imrb_value &= ~mask;
  307. write_reg16(info, CHB + IMR, info->imrb_value);
  308. }
  309. }
  310. #define port_irq_disable(info, mask) \
  311. { info->pim_value |= (mask); write_reg(info, PIM, info->pim_value); }
  312. #define port_irq_enable(info, mask) \
  313. { info->pim_value &= ~(mask); write_reg(info, PIM, info->pim_value); }
  314. static void rx_start(MGSLPC_INFO *info);
  315. static void rx_stop(MGSLPC_INFO *info);
  316. static void tx_start(MGSLPC_INFO *info);
  317. static void tx_stop(MGSLPC_INFO *info);
  318. static void tx_set_idle(MGSLPC_INFO *info);
  319. static void get_signals(MGSLPC_INFO *info);
  320. static void set_signals(MGSLPC_INFO *info);
  321. static void reset_device(MGSLPC_INFO *info);
  322. static void hdlc_mode(MGSLPC_INFO *info);
  323. static void async_mode(MGSLPC_INFO *info);
  324. static void tx_timeout(unsigned long context);
  325. static int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg);
  326. #ifdef CONFIG_HDLC
  327. #define dev_to_port(D) (dev_to_hdlc(D)->priv)
  328. static void hdlcdev_tx_done(MGSLPC_INFO *info);
  329. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size);
  330. static int hdlcdev_init(MGSLPC_INFO *info);
  331. static void hdlcdev_exit(MGSLPC_INFO *info);
  332. #endif
  333. static void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit);
  334. static BOOLEAN register_test(MGSLPC_INFO *info);
  335. static BOOLEAN irq_test(MGSLPC_INFO *info);
  336. static int adapter_test(MGSLPC_INFO *info);
  337. static int claim_resources(MGSLPC_INFO *info);
  338. static void release_resources(MGSLPC_INFO *info);
  339. static void mgslpc_add_device(MGSLPC_INFO *info);
  340. static void mgslpc_remove_device(MGSLPC_INFO *info);
  341. static int rx_get_frame(MGSLPC_INFO *info);
  342. static void rx_reset_buffers(MGSLPC_INFO *info);
  343. static int rx_alloc_buffers(MGSLPC_INFO *info);
  344. static void rx_free_buffers(MGSLPC_INFO *info);
  345. static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs);
  346. /*
  347. * Bottom half interrupt handlers
  348. */
  349. static void bh_handler(void* Context);
  350. static void bh_transmit(MGSLPC_INFO *info);
  351. static void bh_status(MGSLPC_INFO *info);
  352. /*
  353. * ioctl handlers
  354. */
  355. static int tiocmget(struct tty_struct *tty, struct file *file);
  356. static int tiocmset(struct tty_struct *tty, struct file *file,
  357. unsigned int set, unsigned int clear);
  358. static int get_stats(MGSLPC_INFO *info, struct mgsl_icount __user *user_icount);
  359. static int get_params(MGSLPC_INFO *info, MGSL_PARAMS __user *user_params);
  360. static int set_params(MGSLPC_INFO *info, MGSL_PARAMS __user *new_params);
  361. static int get_txidle(MGSLPC_INFO *info, int __user *idle_mode);
  362. static int set_txidle(MGSLPC_INFO *info, int idle_mode);
  363. static int set_txenable(MGSLPC_INFO *info, int enable);
  364. static int tx_abort(MGSLPC_INFO *info);
  365. static int set_rxenable(MGSLPC_INFO *info, int enable);
  366. static int wait_events(MGSLPC_INFO *info, int __user *mask);
  367. static MGSLPC_INFO *mgslpc_device_list = NULL;
  368. static int mgslpc_device_count = 0;
  369. /*
  370. * Set this param to non-zero to load eax with the
  371. * .text section address and breakpoint on module load.
  372. * This is useful for use with gdb and add-symbol-file command.
  373. */
  374. static int break_on_load=0;
  375. /*
  376. * Driver major number, defaults to zero to get auto
  377. * assigned major number. May be forced as module parameter.
  378. */
  379. static int ttymajor=0;
  380. static int debug_level = 0;
  381. static int maxframe[MAX_DEVICE_COUNT] = {0,};
  382. static int dosyncppp[MAX_DEVICE_COUNT] = {1,1,1,1};
  383. module_param(break_on_load, bool, 0);
  384. module_param(ttymajor, int, 0);
  385. module_param(debug_level, int, 0);
  386. module_param_array(maxframe, int, NULL, 0);
  387. module_param_array(dosyncppp, int, NULL, 0);
  388. MODULE_LICENSE("GPL");
  389. static char *driver_name = "SyncLink PC Card driver";
  390. static char *driver_version = "$Revision: 4.34 $";
  391. static struct tty_driver *serial_driver;
  392. /* number of characters left in xmit buffer before we ask for more */
  393. #define WAKEUP_CHARS 256
  394. static void mgslpc_change_params(MGSLPC_INFO *info);
  395. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout);
  396. /* PCMCIA prototypes */
  397. static void mgslpc_config(dev_link_t *link);
  398. static void mgslpc_release(u_long arg);
  399. static int mgslpc_event(event_t event, int priority,
  400. event_callback_args_t *args);
  401. static dev_link_t *mgslpc_attach(void);
  402. static void mgslpc_detach(dev_link_t *);
  403. static dev_info_t dev_info = "synclink_cs";
  404. static dev_link_t *dev_list = NULL;
  405. /*
  406. * 1st function defined in .text section. Calling this function in
  407. * init_module() followed by a breakpoint allows a remote debugger
  408. * (gdb) to get the .text address for the add-symbol-file command.
  409. * This allows remote debugging of dynamically loadable modules.
  410. */
  411. static void* mgslpc_get_text_ptr(void)
  412. {
  413. return mgslpc_get_text_ptr;
  414. }
  415. /**
  416. * line discipline callback wrappers
  417. *
  418. * The wrappers maintain line discipline references
  419. * while calling into the line discipline.
  420. *
  421. * ldisc_flush_buffer - flush line discipline receive buffers
  422. * ldisc_receive_buf - pass receive data to line discipline
  423. */
  424. static void ldisc_flush_buffer(struct tty_struct *tty)
  425. {
  426. struct tty_ldisc *ld = tty_ldisc_ref(tty);
  427. if (ld) {
  428. if (ld->flush_buffer)
  429. ld->flush_buffer(tty);
  430. tty_ldisc_deref(ld);
  431. }
  432. }
  433. static void ldisc_receive_buf(struct tty_struct *tty,
  434. const __u8 *data, char *flags, int count)
  435. {
  436. struct tty_ldisc *ld;
  437. if (!tty)
  438. return;
  439. ld = tty_ldisc_ref(tty);
  440. if (ld) {
  441. if (ld->receive_buf)
  442. ld->receive_buf(tty, data, flags, count);
  443. tty_ldisc_deref(ld);
  444. }
  445. }
  446. static dev_link_t *mgslpc_attach(void)
  447. {
  448. MGSLPC_INFO *info;
  449. dev_link_t *link;
  450. client_reg_t client_reg;
  451. int ret;
  452. if (debug_level >= DEBUG_LEVEL_INFO)
  453. printk("mgslpc_attach\n");
  454. info = (MGSLPC_INFO *)kmalloc(sizeof(MGSLPC_INFO), GFP_KERNEL);
  455. if (!info) {
  456. printk("Error can't allocate device instance data\n");
  457. return NULL;
  458. }
  459. memset(info, 0, sizeof(MGSLPC_INFO));
  460. info->magic = MGSLPC_MAGIC;
  461. INIT_WORK(&info->task, bh_handler, info);
  462. info->max_frame_size = 4096;
  463. info->close_delay = 5*HZ/10;
  464. info->closing_wait = 30*HZ;
  465. init_waitqueue_head(&info->open_wait);
  466. init_waitqueue_head(&info->close_wait);
  467. init_waitqueue_head(&info->status_event_wait_q);
  468. init_waitqueue_head(&info->event_wait_q);
  469. spin_lock_init(&info->lock);
  470. spin_lock_init(&info->netlock);
  471. memcpy(&info->params,&default_params,sizeof(MGSL_PARAMS));
  472. info->idle_mode = HDLC_TXIDLE_FLAGS;
  473. info->imra_value = 0xffff;
  474. info->imrb_value = 0xffff;
  475. info->pim_value = 0xff;
  476. link = &info->link;
  477. link->priv = info;
  478. /* Initialize the dev_link_t structure */
  479. /* Interrupt setup */
  480. link->irq.Attributes = IRQ_TYPE_EXCLUSIVE;
  481. link->irq.IRQInfo1 = IRQ_LEVEL_ID;
  482. link->irq.Handler = NULL;
  483. link->conf.Attributes = 0;
  484. link->conf.Vcc = 50;
  485. link->conf.IntType = INT_MEMORY_AND_IO;
  486. /* Register with Card Services */
  487. link->next = dev_list;
  488. dev_list = link;
  489. client_reg.dev_info = &dev_info;
  490. client_reg.Version = 0x0210;
  491. client_reg.event_callback_args.client_data = link;
  492. ret = pcmcia_register_client(&link->handle, &client_reg);
  493. if (ret != CS_SUCCESS) {
  494. cs_error(link->handle, RegisterClient, ret);
  495. mgslpc_detach(link);
  496. return NULL;
  497. }
  498. mgslpc_add_device(info);
  499. return link;
  500. }
  501. /* Card has been inserted.
  502. */
  503. #define CS_CHECK(fn, ret) \
  504. do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
  505. static void mgslpc_config(dev_link_t *link)
  506. {
  507. client_handle_t handle = link->handle;
  508. MGSLPC_INFO *info = link->priv;
  509. tuple_t tuple;
  510. cisparse_t parse;
  511. int last_fn, last_ret;
  512. u_char buf[64];
  513. config_info_t conf;
  514. cistpl_cftable_entry_t dflt = { 0 };
  515. cistpl_cftable_entry_t *cfg;
  516. if (debug_level >= DEBUG_LEVEL_INFO)
  517. printk("mgslpc_config(0x%p)\n", link);
  518. /* read CONFIG tuple to find its configuration registers */
  519. tuple.DesiredTuple = CISTPL_CONFIG;
  520. tuple.Attributes = 0;
  521. tuple.TupleData = buf;
  522. tuple.TupleDataMax = sizeof(buf);
  523. tuple.TupleOffset = 0;
  524. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
  525. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
  526. CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
  527. link->conf.ConfigBase = parse.config.base;
  528. link->conf.Present = parse.config.rmask[0];
  529. /* Configure card */
  530. link->state |= DEV_CONFIG;
  531. /* Look up the current Vcc */
  532. CS_CHECK(GetConfigurationInfo, pcmcia_get_configuration_info(handle, &conf));
  533. link->conf.Vcc = conf.Vcc;
  534. /* get CIS configuration entry */
  535. tuple.DesiredTuple = CISTPL_CFTABLE_ENTRY;
  536. CS_CHECK(GetFirstTuple, pcmcia_get_first_tuple(handle, &tuple));
  537. cfg = &(parse.cftable_entry);
  538. CS_CHECK(GetTupleData, pcmcia_get_tuple_data(handle, &tuple));
  539. CS_CHECK(ParseTuple, pcmcia_parse_tuple(handle, &tuple, &parse));
  540. if (cfg->flags & CISTPL_CFTABLE_DEFAULT) dflt = *cfg;
  541. if (cfg->index == 0)
  542. goto cs_failed;
  543. link->conf.ConfigIndex = cfg->index;
  544. link->conf.Attributes |= CONF_ENABLE_IRQ;
  545. /* IO window settings */
  546. link->io.NumPorts1 = 0;
  547. if ((cfg->io.nwin > 0) || (dflt.io.nwin > 0)) {
  548. cistpl_io_t *io = (cfg->io.nwin) ? &cfg->io : &dflt.io;
  549. link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
  550. if (!(io->flags & CISTPL_IO_8BIT))
  551. link->io.Attributes1 = IO_DATA_PATH_WIDTH_16;
  552. if (!(io->flags & CISTPL_IO_16BIT))
  553. link->io.Attributes1 = IO_DATA_PATH_WIDTH_8;
  554. link->io.IOAddrLines = io->flags & CISTPL_IO_LINES_MASK;
  555. link->io.BasePort1 = io->win[0].base;
  556. link->io.NumPorts1 = io->win[0].len;
  557. CS_CHECK(RequestIO, pcmcia_request_io(link->handle, &link->io));
  558. }
  559. link->conf.Attributes = CONF_ENABLE_IRQ;
  560. link->conf.Vcc = 50;
  561. link->conf.IntType = INT_MEMORY_AND_IO;
  562. link->conf.ConfigIndex = 8;
  563. link->conf.Present = PRESENT_OPTION;
  564. link->irq.Attributes |= IRQ_HANDLE_PRESENT;
  565. link->irq.Handler = mgslpc_isr;
  566. link->irq.Instance = info;
  567. CS_CHECK(RequestIRQ, pcmcia_request_irq(link->handle, &link->irq));
  568. CS_CHECK(RequestConfiguration, pcmcia_request_configuration(link->handle, &link->conf));
  569. info->io_base = link->io.BasePort1;
  570. info->irq_level = link->irq.AssignedIRQ;
  571. /* add to linked list of devices */
  572. sprintf(info->node.dev_name, "mgslpc0");
  573. info->node.major = info->node.minor = 0;
  574. link->dev = &info->node;
  575. printk(KERN_INFO "%s: index 0x%02x:",
  576. info->node.dev_name, link->conf.ConfigIndex);
  577. if (link->conf.Attributes & CONF_ENABLE_IRQ)
  578. printk(", irq %d", link->irq.AssignedIRQ);
  579. if (link->io.NumPorts1)
  580. printk(", io 0x%04x-0x%04x", link->io.BasePort1,
  581. link->io.BasePort1+link->io.NumPorts1-1);
  582. printk("\n");
  583. link->state &= ~DEV_CONFIG_PENDING;
  584. return;
  585. cs_failed:
  586. cs_error(link->handle, last_fn, last_ret);
  587. mgslpc_release((u_long)link);
  588. }
  589. /* Card has been removed.
  590. * Unregister device and release PCMCIA configuration.
  591. * If device is open, postpone until it is closed.
  592. */
  593. static void mgslpc_release(u_long arg)
  594. {
  595. dev_link_t *link = (dev_link_t *)arg;
  596. if (debug_level >= DEBUG_LEVEL_INFO)
  597. printk("mgslpc_release(0x%p)\n", link);
  598. /* Unlink the device chain */
  599. link->dev = NULL;
  600. link->state &= ~DEV_CONFIG;
  601. pcmcia_release_configuration(link->handle);
  602. if (link->io.NumPorts1)
  603. pcmcia_release_io(link->handle, &link->io);
  604. if (link->irq.AssignedIRQ)
  605. pcmcia_release_irq(link->handle, &link->irq);
  606. if (link->state & DEV_STALE_LINK)
  607. mgslpc_detach(link);
  608. }
  609. static void mgslpc_detach(dev_link_t *link)
  610. {
  611. dev_link_t **linkp;
  612. if (debug_level >= DEBUG_LEVEL_INFO)
  613. printk("mgslpc_detach(0x%p)\n", link);
  614. /* find device */
  615. for (linkp = &dev_list; *linkp; linkp = &(*linkp)->next)
  616. if (*linkp == link) break;
  617. if (*linkp == NULL)
  618. return;
  619. if (link->state & DEV_CONFIG) {
  620. /* device is configured/active, mark it so when
  621. * release() is called a proper detach() occurs.
  622. */
  623. if (debug_level >= DEBUG_LEVEL_INFO)
  624. printk(KERN_DEBUG "synclinkpc: detach postponed, '%s' "
  625. "still locked\n", link->dev->dev_name);
  626. link->state |= DEV_STALE_LINK;
  627. return;
  628. }
  629. /* Break the link with Card Services */
  630. if (link->handle)
  631. pcmcia_deregister_client(link->handle);
  632. /* Unlink device structure, and free it */
  633. *linkp = link->next;
  634. mgslpc_remove_device((MGSLPC_INFO *)link->priv);
  635. }
  636. static int mgslpc_event(event_t event, int priority,
  637. event_callback_args_t *args)
  638. {
  639. dev_link_t *link = args->client_data;
  640. MGSLPC_INFO *info = link->priv;
  641. if (debug_level >= DEBUG_LEVEL_INFO)
  642. printk("mgslpc_event(0x%06x)\n", event);
  643. switch (event) {
  644. case CS_EVENT_CARD_REMOVAL:
  645. link->state &= ~DEV_PRESENT;
  646. if (link->state & DEV_CONFIG) {
  647. ((MGSLPC_INFO *)link->priv)->stop = 1;
  648. mgslpc_release((u_long)link);
  649. }
  650. break;
  651. case CS_EVENT_CARD_INSERTION:
  652. link->state |= DEV_PRESENT | DEV_CONFIG_PENDING;
  653. mgslpc_config(link);
  654. break;
  655. case CS_EVENT_PM_SUSPEND:
  656. link->state |= DEV_SUSPEND;
  657. /* Fall through... */
  658. case CS_EVENT_RESET_PHYSICAL:
  659. /* Mark the device as stopped, to block IO until later */
  660. info->stop = 1;
  661. if (link->state & DEV_CONFIG)
  662. pcmcia_release_configuration(link->handle);
  663. break;
  664. case CS_EVENT_PM_RESUME:
  665. link->state &= ~DEV_SUSPEND;
  666. /* Fall through... */
  667. case CS_EVENT_CARD_RESET:
  668. if (link->state & DEV_CONFIG)
  669. pcmcia_request_configuration(link->handle, &link->conf);
  670. info->stop = 0;
  671. break;
  672. }
  673. return 0;
  674. }
  675. static inline int mgslpc_paranoia_check(MGSLPC_INFO *info,
  676. char *name, const char *routine)
  677. {
  678. #ifdef MGSLPC_PARANOIA_CHECK
  679. static const char *badmagic =
  680. "Warning: bad magic number for mgsl struct (%s) in %s\n";
  681. static const char *badinfo =
  682. "Warning: null mgslpc_info for (%s) in %s\n";
  683. if (!info) {
  684. printk(badinfo, name, routine);
  685. return 1;
  686. }
  687. if (info->magic != MGSLPC_MAGIC) {
  688. printk(badmagic, name, routine);
  689. return 1;
  690. }
  691. #else
  692. if (!info)
  693. return 1;
  694. #endif
  695. return 0;
  696. }
  697. #define CMD_RXFIFO BIT7 // release current rx FIFO
  698. #define CMD_RXRESET BIT6 // receiver reset
  699. #define CMD_RXFIFO_READ BIT5
  700. #define CMD_START_TIMER BIT4
  701. #define CMD_TXFIFO BIT3 // release current tx FIFO
  702. #define CMD_TXEOM BIT1 // transmit end message
  703. #define CMD_TXRESET BIT0 // transmit reset
  704. static BOOLEAN wait_command_complete(MGSLPC_INFO *info, unsigned char channel)
  705. {
  706. int i = 0;
  707. /* wait for command completion */
  708. while (read_reg(info, (unsigned char)(channel+STAR)) & BIT2) {
  709. udelay(1);
  710. if (i++ == 1000)
  711. return FALSE;
  712. }
  713. return TRUE;
  714. }
  715. static void issue_command(MGSLPC_INFO *info, unsigned char channel, unsigned char cmd)
  716. {
  717. wait_command_complete(info, channel);
  718. write_reg(info, (unsigned char) (channel + CMDR), cmd);
  719. }
  720. static void tx_pause(struct tty_struct *tty)
  721. {
  722. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  723. unsigned long flags;
  724. if (mgslpc_paranoia_check(info, tty->name, "tx_pause"))
  725. return;
  726. if (debug_level >= DEBUG_LEVEL_INFO)
  727. printk("tx_pause(%s)\n",info->device_name);
  728. spin_lock_irqsave(&info->lock,flags);
  729. if (info->tx_enabled)
  730. tx_stop(info);
  731. spin_unlock_irqrestore(&info->lock,flags);
  732. }
  733. static void tx_release(struct tty_struct *tty)
  734. {
  735. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  736. unsigned long flags;
  737. if (mgslpc_paranoia_check(info, tty->name, "tx_release"))
  738. return;
  739. if (debug_level >= DEBUG_LEVEL_INFO)
  740. printk("tx_release(%s)\n",info->device_name);
  741. spin_lock_irqsave(&info->lock,flags);
  742. if (!info->tx_enabled)
  743. tx_start(info);
  744. spin_unlock_irqrestore(&info->lock,flags);
  745. }
  746. /* Return next bottom half action to perform.
  747. * or 0 if nothing to do.
  748. */
  749. static int bh_action(MGSLPC_INFO *info)
  750. {
  751. unsigned long flags;
  752. int rc = 0;
  753. spin_lock_irqsave(&info->lock,flags);
  754. if (info->pending_bh & BH_RECEIVE) {
  755. info->pending_bh &= ~BH_RECEIVE;
  756. rc = BH_RECEIVE;
  757. } else if (info->pending_bh & BH_TRANSMIT) {
  758. info->pending_bh &= ~BH_TRANSMIT;
  759. rc = BH_TRANSMIT;
  760. } else if (info->pending_bh & BH_STATUS) {
  761. info->pending_bh &= ~BH_STATUS;
  762. rc = BH_STATUS;
  763. }
  764. if (!rc) {
  765. /* Mark BH routine as complete */
  766. info->bh_running = 0;
  767. info->bh_requested = 0;
  768. }
  769. spin_unlock_irqrestore(&info->lock,flags);
  770. return rc;
  771. }
  772. void bh_handler(void* Context)
  773. {
  774. MGSLPC_INFO *info = (MGSLPC_INFO*)Context;
  775. int action;
  776. if (!info)
  777. return;
  778. if (debug_level >= DEBUG_LEVEL_BH)
  779. printk( "%s(%d):bh_handler(%s) entry\n",
  780. __FILE__,__LINE__,info->device_name);
  781. info->bh_running = 1;
  782. while((action = bh_action(info)) != 0) {
  783. /* Process work item */
  784. if ( debug_level >= DEBUG_LEVEL_BH )
  785. printk( "%s(%d):bh_handler() work item action=%d\n",
  786. __FILE__,__LINE__,action);
  787. switch (action) {
  788. case BH_RECEIVE:
  789. while(rx_get_frame(info));
  790. break;
  791. case BH_TRANSMIT:
  792. bh_transmit(info);
  793. break;
  794. case BH_STATUS:
  795. bh_status(info);
  796. break;
  797. default:
  798. /* unknown work item ID */
  799. printk("Unknown work item ID=%08X!\n", action);
  800. break;
  801. }
  802. }
  803. if (debug_level >= DEBUG_LEVEL_BH)
  804. printk( "%s(%d):bh_handler(%s) exit\n",
  805. __FILE__,__LINE__,info->device_name);
  806. }
  807. void bh_transmit(MGSLPC_INFO *info)
  808. {
  809. struct tty_struct *tty = info->tty;
  810. if (debug_level >= DEBUG_LEVEL_BH)
  811. printk("bh_transmit() entry on %s\n", info->device_name);
  812. if (tty) {
  813. tty_wakeup(tty);
  814. wake_up_interruptible(&tty->write_wait);
  815. }
  816. }
  817. void bh_status(MGSLPC_INFO *info)
  818. {
  819. info->ri_chkcount = 0;
  820. info->dsr_chkcount = 0;
  821. info->dcd_chkcount = 0;
  822. info->cts_chkcount = 0;
  823. }
  824. /* eom: non-zero = end of frame */
  825. static void rx_ready_hdlc(MGSLPC_INFO *info, int eom)
  826. {
  827. unsigned char data[2];
  828. unsigned char fifo_count, read_count, i;
  829. RXBUF *buf = (RXBUF*)(info->rx_buf + (info->rx_put * info->rx_buf_size));
  830. if (debug_level >= DEBUG_LEVEL_ISR)
  831. printk("%s(%d):rx_ready_hdlc(eom=%d)\n",__FILE__,__LINE__,eom);
  832. if (!info->rx_enabled)
  833. return;
  834. if (info->rx_frame_count >= info->rx_buf_count) {
  835. /* no more free buffers */
  836. issue_command(info, CHA, CMD_RXRESET);
  837. info->pending_bh |= BH_RECEIVE;
  838. info->rx_overflow = 1;
  839. info->icount.buf_overrun++;
  840. return;
  841. }
  842. if (eom) {
  843. /* end of frame, get FIFO count from RBCL register */
  844. if (!(fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f)))
  845. fifo_count = 32;
  846. } else
  847. fifo_count = 32;
  848. do {
  849. if (fifo_count == 1) {
  850. read_count = 1;
  851. data[0] = read_reg(info, CHA + RXFIFO);
  852. } else {
  853. read_count = 2;
  854. *((unsigned short *) data) = read_reg16(info, CHA + RXFIFO);
  855. }
  856. fifo_count -= read_count;
  857. if (!fifo_count && eom)
  858. buf->status = data[--read_count];
  859. for (i = 0; i < read_count; i++) {
  860. if (buf->count >= info->max_frame_size) {
  861. /* frame too large, reset receiver and reset current buffer */
  862. issue_command(info, CHA, CMD_RXRESET);
  863. buf->count = 0;
  864. return;
  865. }
  866. *(buf->data + buf->count) = data[i];
  867. buf->count++;
  868. }
  869. } while (fifo_count);
  870. if (eom) {
  871. info->pending_bh |= BH_RECEIVE;
  872. info->rx_frame_count++;
  873. info->rx_put++;
  874. if (info->rx_put >= info->rx_buf_count)
  875. info->rx_put = 0;
  876. }
  877. issue_command(info, CHA, CMD_RXFIFO);
  878. }
  879. static void rx_ready_async(MGSLPC_INFO *info, int tcd)
  880. {
  881. unsigned char data, status;
  882. int fifo_count;
  883. struct tty_struct *tty = info->tty;
  884. struct mgsl_icount *icount = &info->icount;
  885. if (tcd) {
  886. /* early termination, get FIFO count from RBCL register */
  887. fifo_count = (unsigned char)(read_reg(info, CHA+RBCL) & 0x1f);
  888. /* Zero fifo count could mean 0 or 32 bytes available.
  889. * If BIT5 of STAR is set then at least 1 byte is available.
  890. */
  891. if (!fifo_count && (read_reg(info,CHA+STAR) & BIT5))
  892. fifo_count = 32;
  893. } else
  894. fifo_count = 32;
  895. /* Flush received async data to receive data buffer. */
  896. while (fifo_count) {
  897. data = read_reg(info, CHA + RXFIFO);
  898. status = read_reg(info, CHA + RXFIFO);
  899. fifo_count -= 2;
  900. if (tty->flip.count >= TTY_FLIPBUF_SIZE)
  901. break;
  902. *tty->flip.char_buf_ptr = data;
  903. icount->rx++;
  904. *tty->flip.flag_buf_ptr = 0;
  905. // if no frameing/crc error then save data
  906. // BIT7:parity error
  907. // BIT6:framing error
  908. if (status & (BIT7 + BIT6)) {
  909. if (status & BIT7)
  910. icount->parity++;
  911. else
  912. icount->frame++;
  913. /* discard char if tty control flags say so */
  914. if (status & info->ignore_status_mask)
  915. continue;
  916. status &= info->read_status_mask;
  917. if (status & BIT7)
  918. *tty->flip.flag_buf_ptr = TTY_PARITY;
  919. else if (status & BIT6)
  920. *tty->flip.flag_buf_ptr = TTY_FRAME;
  921. }
  922. tty->flip.flag_buf_ptr++;
  923. tty->flip.char_buf_ptr++;
  924. tty->flip.count++;
  925. }
  926. issue_command(info, CHA, CMD_RXFIFO);
  927. if (debug_level >= DEBUG_LEVEL_ISR) {
  928. printk("%s(%d):rx_ready_async count=%d\n",
  929. __FILE__,__LINE__,tty->flip.count);
  930. printk("%s(%d):rx=%d brk=%d parity=%d frame=%d overrun=%d\n",
  931. __FILE__,__LINE__,icount->rx,icount->brk,
  932. icount->parity,icount->frame,icount->overrun);
  933. }
  934. if (tty->flip.count)
  935. tty_flip_buffer_push(tty);
  936. }
  937. static void tx_done(MGSLPC_INFO *info)
  938. {
  939. if (!info->tx_active)
  940. return;
  941. info->tx_active = 0;
  942. info->tx_aborting = 0;
  943. if (info->params.mode == MGSL_MODE_ASYNC)
  944. return;
  945. info->tx_count = info->tx_put = info->tx_get = 0;
  946. del_timer(&info->tx_timer);
  947. if (info->drop_rts_on_tx_done) {
  948. get_signals(info);
  949. if (info->serial_signals & SerialSignal_RTS) {
  950. info->serial_signals &= ~SerialSignal_RTS;
  951. set_signals(info);
  952. }
  953. info->drop_rts_on_tx_done = 0;
  954. }
  955. #ifdef CONFIG_HDLC
  956. if (info->netcount)
  957. hdlcdev_tx_done(info);
  958. else
  959. #endif
  960. {
  961. if (info->tty->stopped || info->tty->hw_stopped) {
  962. tx_stop(info);
  963. return;
  964. }
  965. info->pending_bh |= BH_TRANSMIT;
  966. }
  967. }
  968. static void tx_ready(MGSLPC_INFO *info)
  969. {
  970. unsigned char fifo_count = 32;
  971. int c;
  972. if (debug_level >= DEBUG_LEVEL_ISR)
  973. printk("%s(%d):tx_ready(%s)\n", __FILE__,__LINE__,info->device_name);
  974. if (info->params.mode == MGSL_MODE_HDLC) {
  975. if (!info->tx_active)
  976. return;
  977. } else {
  978. if (info->tty->stopped || info->tty->hw_stopped) {
  979. tx_stop(info);
  980. return;
  981. }
  982. if (!info->tx_count)
  983. info->tx_active = 0;
  984. }
  985. if (!info->tx_count)
  986. return;
  987. while (info->tx_count && fifo_count) {
  988. c = min(2, min_t(int, fifo_count, min(info->tx_count, TXBUFSIZE - info->tx_get)));
  989. if (c == 1) {
  990. write_reg(info, CHA + TXFIFO, *(info->tx_buf + info->tx_get));
  991. } else {
  992. write_reg16(info, CHA + TXFIFO,
  993. *((unsigned short*)(info->tx_buf + info->tx_get)));
  994. }
  995. info->tx_count -= c;
  996. info->tx_get = (info->tx_get + c) & (TXBUFSIZE - 1);
  997. fifo_count -= c;
  998. }
  999. if (info->params.mode == MGSL_MODE_ASYNC) {
  1000. if (info->tx_count < WAKEUP_CHARS)
  1001. info->pending_bh |= BH_TRANSMIT;
  1002. issue_command(info, CHA, CMD_TXFIFO);
  1003. } else {
  1004. if (info->tx_count)
  1005. issue_command(info, CHA, CMD_TXFIFO);
  1006. else
  1007. issue_command(info, CHA, CMD_TXFIFO + CMD_TXEOM);
  1008. }
  1009. }
  1010. static void cts_change(MGSLPC_INFO *info)
  1011. {
  1012. get_signals(info);
  1013. if ((info->cts_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1014. irq_disable(info, CHB, IRQ_CTS);
  1015. info->icount.cts++;
  1016. if (info->serial_signals & SerialSignal_CTS)
  1017. info->input_signal_events.cts_up++;
  1018. else
  1019. info->input_signal_events.cts_down++;
  1020. wake_up_interruptible(&info->status_event_wait_q);
  1021. wake_up_interruptible(&info->event_wait_q);
  1022. if (info->flags & ASYNC_CTS_FLOW) {
  1023. if (info->tty->hw_stopped) {
  1024. if (info->serial_signals & SerialSignal_CTS) {
  1025. if (debug_level >= DEBUG_LEVEL_ISR)
  1026. printk("CTS tx start...");
  1027. if (info->tty)
  1028. info->tty->hw_stopped = 0;
  1029. tx_start(info);
  1030. info->pending_bh |= BH_TRANSMIT;
  1031. return;
  1032. }
  1033. } else {
  1034. if (!(info->serial_signals & SerialSignal_CTS)) {
  1035. if (debug_level >= DEBUG_LEVEL_ISR)
  1036. printk("CTS tx stop...");
  1037. if (info->tty)
  1038. info->tty->hw_stopped = 1;
  1039. tx_stop(info);
  1040. }
  1041. }
  1042. }
  1043. info->pending_bh |= BH_STATUS;
  1044. }
  1045. static void dcd_change(MGSLPC_INFO *info)
  1046. {
  1047. get_signals(info);
  1048. if ((info->dcd_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1049. irq_disable(info, CHB, IRQ_DCD);
  1050. info->icount.dcd++;
  1051. if (info->serial_signals & SerialSignal_DCD) {
  1052. info->input_signal_events.dcd_up++;
  1053. }
  1054. else
  1055. info->input_signal_events.dcd_down++;
  1056. #ifdef CONFIG_HDLC
  1057. if (info->netcount)
  1058. hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, info->netdev);
  1059. #endif
  1060. wake_up_interruptible(&info->status_event_wait_q);
  1061. wake_up_interruptible(&info->event_wait_q);
  1062. if (info->flags & ASYNC_CHECK_CD) {
  1063. if (debug_level >= DEBUG_LEVEL_ISR)
  1064. printk("%s CD now %s...", info->device_name,
  1065. (info->serial_signals & SerialSignal_DCD) ? "on" : "off");
  1066. if (info->serial_signals & SerialSignal_DCD)
  1067. wake_up_interruptible(&info->open_wait);
  1068. else {
  1069. if (debug_level >= DEBUG_LEVEL_ISR)
  1070. printk("doing serial hangup...");
  1071. if (info->tty)
  1072. tty_hangup(info->tty);
  1073. }
  1074. }
  1075. info->pending_bh |= BH_STATUS;
  1076. }
  1077. static void dsr_change(MGSLPC_INFO *info)
  1078. {
  1079. get_signals(info);
  1080. if ((info->dsr_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1081. port_irq_disable(info, PVR_DSR);
  1082. info->icount.dsr++;
  1083. if (info->serial_signals & SerialSignal_DSR)
  1084. info->input_signal_events.dsr_up++;
  1085. else
  1086. info->input_signal_events.dsr_down++;
  1087. wake_up_interruptible(&info->status_event_wait_q);
  1088. wake_up_interruptible(&info->event_wait_q);
  1089. info->pending_bh |= BH_STATUS;
  1090. }
  1091. static void ri_change(MGSLPC_INFO *info)
  1092. {
  1093. get_signals(info);
  1094. if ((info->ri_chkcount)++ >= IO_PIN_SHUTDOWN_LIMIT)
  1095. port_irq_disable(info, PVR_RI);
  1096. info->icount.rng++;
  1097. if (info->serial_signals & SerialSignal_RI)
  1098. info->input_signal_events.ri_up++;
  1099. else
  1100. info->input_signal_events.ri_down++;
  1101. wake_up_interruptible(&info->status_event_wait_q);
  1102. wake_up_interruptible(&info->event_wait_q);
  1103. info->pending_bh |= BH_STATUS;
  1104. }
  1105. /* Interrupt service routine entry point.
  1106. *
  1107. * Arguments:
  1108. *
  1109. * irq interrupt number that caused interrupt
  1110. * dev_id device ID supplied during interrupt registration
  1111. * regs interrupted processor context
  1112. */
  1113. static irqreturn_t mgslpc_isr(int irq, void *dev_id, struct pt_regs * regs)
  1114. {
  1115. MGSLPC_INFO * info = (MGSLPC_INFO *)dev_id;
  1116. unsigned short isr;
  1117. unsigned char gis, pis;
  1118. int count=0;
  1119. if (debug_level >= DEBUG_LEVEL_ISR)
  1120. printk("mgslpc_isr(%d) entry.\n", irq);
  1121. if (!info)
  1122. return IRQ_NONE;
  1123. if (!(info->link.state & DEV_CONFIG))
  1124. return IRQ_HANDLED;
  1125. spin_lock(&info->lock);
  1126. while ((gis = read_reg(info, CHA + GIS))) {
  1127. if (debug_level >= DEBUG_LEVEL_ISR)
  1128. printk("mgslpc_isr %s gis=%04X\n", info->device_name,gis);
  1129. if ((gis & 0x70) || count > 1000) {
  1130. printk("synclink_cs:hardware failed or ejected\n");
  1131. break;
  1132. }
  1133. count++;
  1134. if (gis & (BIT1 + BIT0)) {
  1135. isr = read_reg16(info, CHB + ISR);
  1136. if (isr & IRQ_DCD)
  1137. dcd_change(info);
  1138. if (isr & IRQ_CTS)
  1139. cts_change(info);
  1140. }
  1141. if (gis & (BIT3 + BIT2))
  1142. {
  1143. isr = read_reg16(info, CHA + ISR);
  1144. if (isr & IRQ_TIMER) {
  1145. info->irq_occurred = 1;
  1146. irq_disable(info, CHA, IRQ_TIMER);
  1147. }
  1148. /* receive IRQs */
  1149. if (isr & IRQ_EXITHUNT) {
  1150. info->icount.exithunt++;
  1151. wake_up_interruptible(&info->event_wait_q);
  1152. }
  1153. if (isr & IRQ_BREAK_ON) {
  1154. info->icount.brk++;
  1155. if (info->flags & ASYNC_SAK)
  1156. do_SAK(info->tty);
  1157. }
  1158. if (isr & IRQ_RXTIME) {
  1159. issue_command(info, CHA, CMD_RXFIFO_READ);
  1160. }
  1161. if (isr & (IRQ_RXEOM + IRQ_RXFIFO)) {
  1162. if (info->params.mode == MGSL_MODE_HDLC)
  1163. rx_ready_hdlc(info, isr & IRQ_RXEOM);
  1164. else
  1165. rx_ready_async(info, isr & IRQ_RXEOM);
  1166. }
  1167. /* transmit IRQs */
  1168. if (isr & IRQ_UNDERRUN) {
  1169. if (info->tx_aborting)
  1170. info->icount.txabort++;
  1171. else
  1172. info->icount.txunder++;
  1173. tx_done(info);
  1174. }
  1175. else if (isr & IRQ_ALLSENT) {
  1176. info->icount.txok++;
  1177. tx_done(info);
  1178. }
  1179. else if (isr & IRQ_TXFIFO)
  1180. tx_ready(info);
  1181. }
  1182. if (gis & BIT7) {
  1183. pis = read_reg(info, CHA + PIS);
  1184. if (pis & BIT1)
  1185. dsr_change(info);
  1186. if (pis & BIT2)
  1187. ri_change(info);
  1188. }
  1189. }
  1190. /* Request bottom half processing if there's something
  1191. * for it to do and the bh is not already running
  1192. */
  1193. if (info->pending_bh && !info->bh_running && !info->bh_requested) {
  1194. if ( debug_level >= DEBUG_LEVEL_ISR )
  1195. printk("%s(%d):%s queueing bh task.\n",
  1196. __FILE__,__LINE__,info->device_name);
  1197. schedule_work(&info->task);
  1198. info->bh_requested = 1;
  1199. }
  1200. spin_unlock(&info->lock);
  1201. if (debug_level >= DEBUG_LEVEL_ISR)
  1202. printk("%s(%d):mgslpc_isr(%d)exit.\n",
  1203. __FILE__,__LINE__,irq);
  1204. return IRQ_HANDLED;
  1205. }
  1206. /* Initialize and start device.
  1207. */
  1208. static int startup(MGSLPC_INFO * info)
  1209. {
  1210. int retval = 0;
  1211. if (debug_level >= DEBUG_LEVEL_INFO)
  1212. printk("%s(%d):startup(%s)\n",__FILE__,__LINE__,info->device_name);
  1213. if (info->flags & ASYNC_INITIALIZED)
  1214. return 0;
  1215. if (!info->tx_buf) {
  1216. /* allocate a page of memory for a transmit buffer */
  1217. info->tx_buf = (unsigned char *)get_zeroed_page(GFP_KERNEL);
  1218. if (!info->tx_buf) {
  1219. printk(KERN_ERR"%s(%d):%s can't allocate transmit buffer\n",
  1220. __FILE__,__LINE__,info->device_name);
  1221. return -ENOMEM;
  1222. }
  1223. }
  1224. info->pending_bh = 0;
  1225. memset(&info->icount, 0, sizeof(info->icount));
  1226. init_timer(&info->tx_timer);
  1227. info->tx_timer.data = (unsigned long)info;
  1228. info->tx_timer.function = tx_timeout;
  1229. /* Allocate and claim adapter resources */
  1230. retval = claim_resources(info);
  1231. /* perform existance check and diagnostics */
  1232. if ( !retval )
  1233. retval = adapter_test(info);
  1234. if ( retval ) {
  1235. if (capable(CAP_SYS_ADMIN) && info->tty)
  1236. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1237. release_resources(info);
  1238. return retval;
  1239. }
  1240. /* program hardware for current parameters */
  1241. mgslpc_change_params(info);
  1242. if (info->tty)
  1243. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  1244. info->flags |= ASYNC_INITIALIZED;
  1245. return 0;
  1246. }
  1247. /* Called by mgslpc_close() and mgslpc_hangup() to shutdown hardware
  1248. */
  1249. static void shutdown(MGSLPC_INFO * info)
  1250. {
  1251. unsigned long flags;
  1252. if (!(info->flags & ASYNC_INITIALIZED))
  1253. return;
  1254. if (debug_level >= DEBUG_LEVEL_INFO)
  1255. printk("%s(%d):mgslpc_shutdown(%s)\n",
  1256. __FILE__,__LINE__, info->device_name );
  1257. /* clear status wait queue because status changes */
  1258. /* can't happen after shutting down the hardware */
  1259. wake_up_interruptible(&info->status_event_wait_q);
  1260. wake_up_interruptible(&info->event_wait_q);
  1261. del_timer(&info->tx_timer);
  1262. if (info->tx_buf) {
  1263. free_page((unsigned long) info->tx_buf);
  1264. info->tx_buf = NULL;
  1265. }
  1266. spin_lock_irqsave(&info->lock,flags);
  1267. rx_stop(info);
  1268. tx_stop(info);
  1269. /* TODO:disable interrupts instead of reset to preserve signal states */
  1270. reset_device(info);
  1271. if (!info->tty || info->tty->termios->c_cflag & HUPCL) {
  1272. info->serial_signals &= ~(SerialSignal_DTR + SerialSignal_RTS);
  1273. set_signals(info);
  1274. }
  1275. spin_unlock_irqrestore(&info->lock,flags);
  1276. release_resources(info);
  1277. if (info->tty)
  1278. set_bit(TTY_IO_ERROR, &info->tty->flags);
  1279. info->flags &= ~ASYNC_INITIALIZED;
  1280. }
  1281. static void mgslpc_program_hw(MGSLPC_INFO *info)
  1282. {
  1283. unsigned long flags;
  1284. spin_lock_irqsave(&info->lock,flags);
  1285. rx_stop(info);
  1286. tx_stop(info);
  1287. info->tx_count = info->tx_put = info->tx_get = 0;
  1288. if (info->params.mode == MGSL_MODE_HDLC || info->netcount)
  1289. hdlc_mode(info);
  1290. else
  1291. async_mode(info);
  1292. set_signals(info);
  1293. info->dcd_chkcount = 0;
  1294. info->cts_chkcount = 0;
  1295. info->ri_chkcount = 0;
  1296. info->dsr_chkcount = 0;
  1297. irq_enable(info, CHB, IRQ_DCD | IRQ_CTS);
  1298. port_irq_enable(info, (unsigned char) PVR_DSR | PVR_RI);
  1299. get_signals(info);
  1300. if (info->netcount || info->tty->termios->c_cflag & CREAD)
  1301. rx_start(info);
  1302. spin_unlock_irqrestore(&info->lock,flags);
  1303. }
  1304. /* Reconfigure adapter based on new parameters
  1305. */
  1306. static void mgslpc_change_params(MGSLPC_INFO *info)
  1307. {
  1308. unsigned cflag;
  1309. int bits_per_char;
  1310. if (!info->tty || !info->tty->termios)
  1311. return;
  1312. if (debug_level >= DEBUG_LEVEL_INFO)
  1313. printk("%s(%d):mgslpc_change_params(%s)\n",
  1314. __FILE__,__LINE__, info->device_name );
  1315. cflag = info->tty->termios->c_cflag;
  1316. /* if B0 rate (hangup) specified then negate DTR and RTS */
  1317. /* otherwise assert DTR and RTS */
  1318. if (cflag & CBAUD)
  1319. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  1320. else
  1321. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  1322. /* byte size and parity */
  1323. switch (cflag & CSIZE) {
  1324. case CS5: info->params.data_bits = 5; break;
  1325. case CS6: info->params.data_bits = 6; break;
  1326. case CS7: info->params.data_bits = 7; break;
  1327. case CS8: info->params.data_bits = 8; break;
  1328. default: info->params.data_bits = 7; break;
  1329. }
  1330. if (cflag & CSTOPB)
  1331. info->params.stop_bits = 2;
  1332. else
  1333. info->params.stop_bits = 1;
  1334. info->params.parity = ASYNC_PARITY_NONE;
  1335. if (cflag & PARENB) {
  1336. if (cflag & PARODD)
  1337. info->params.parity = ASYNC_PARITY_ODD;
  1338. else
  1339. info->params.parity = ASYNC_PARITY_EVEN;
  1340. #ifdef CMSPAR
  1341. if (cflag & CMSPAR)
  1342. info->params.parity = ASYNC_PARITY_SPACE;
  1343. #endif
  1344. }
  1345. /* calculate number of jiffies to transmit a full
  1346. * FIFO (32 bytes) at specified data rate
  1347. */
  1348. bits_per_char = info->params.data_bits +
  1349. info->params.stop_bits + 1;
  1350. /* if port data rate is set to 460800 or less then
  1351. * allow tty settings to override, otherwise keep the
  1352. * current data rate.
  1353. */
  1354. if (info->params.data_rate <= 460800) {
  1355. info->params.data_rate = tty_get_baud_rate(info->tty);
  1356. }
  1357. if ( info->params.data_rate ) {
  1358. info->timeout = (32*HZ*bits_per_char) /
  1359. info->params.data_rate;
  1360. }
  1361. info->timeout += HZ/50; /* Add .02 seconds of slop */
  1362. if (cflag & CRTSCTS)
  1363. info->flags |= ASYNC_CTS_FLOW;
  1364. else
  1365. info->flags &= ~ASYNC_CTS_FLOW;
  1366. if (cflag & CLOCAL)
  1367. info->flags &= ~ASYNC_CHECK_CD;
  1368. else
  1369. info->flags |= ASYNC_CHECK_CD;
  1370. /* process tty input control flags */
  1371. info->read_status_mask = 0;
  1372. if (I_INPCK(info->tty))
  1373. info->read_status_mask |= BIT7 | BIT6;
  1374. if (I_IGNPAR(info->tty))
  1375. info->ignore_status_mask |= BIT7 | BIT6;
  1376. mgslpc_program_hw(info);
  1377. }
  1378. /* Add a character to the transmit buffer
  1379. */
  1380. static void mgslpc_put_char(struct tty_struct *tty, unsigned char ch)
  1381. {
  1382. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1383. unsigned long flags;
  1384. if (debug_level >= DEBUG_LEVEL_INFO) {
  1385. printk( "%s(%d):mgslpc_put_char(%d) on %s\n",
  1386. __FILE__,__LINE__,ch,info->device_name);
  1387. }
  1388. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_put_char"))
  1389. return;
  1390. if (!tty || !info->tx_buf)
  1391. return;
  1392. spin_lock_irqsave(&info->lock,flags);
  1393. if (info->params.mode == MGSL_MODE_ASYNC || !info->tx_active) {
  1394. if (info->tx_count < TXBUFSIZE - 1) {
  1395. info->tx_buf[info->tx_put++] = ch;
  1396. info->tx_put &= TXBUFSIZE-1;
  1397. info->tx_count++;
  1398. }
  1399. }
  1400. spin_unlock_irqrestore(&info->lock,flags);
  1401. }
  1402. /* Enable transmitter so remaining characters in the
  1403. * transmit buffer are sent.
  1404. */
  1405. static void mgslpc_flush_chars(struct tty_struct *tty)
  1406. {
  1407. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1408. unsigned long flags;
  1409. if (debug_level >= DEBUG_LEVEL_INFO)
  1410. printk( "%s(%d):mgslpc_flush_chars() entry on %s tx_count=%d\n",
  1411. __FILE__,__LINE__,info->device_name,info->tx_count);
  1412. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_chars"))
  1413. return;
  1414. if (info->tx_count <= 0 || tty->stopped ||
  1415. tty->hw_stopped || !info->tx_buf)
  1416. return;
  1417. if (debug_level >= DEBUG_LEVEL_INFO)
  1418. printk( "%s(%d):mgslpc_flush_chars() entry on %s starting transmitter\n",
  1419. __FILE__,__LINE__,info->device_name);
  1420. spin_lock_irqsave(&info->lock,flags);
  1421. if (!info->tx_active)
  1422. tx_start(info);
  1423. spin_unlock_irqrestore(&info->lock,flags);
  1424. }
  1425. /* Send a block of data
  1426. *
  1427. * Arguments:
  1428. *
  1429. * tty pointer to tty information structure
  1430. * buf pointer to buffer containing send data
  1431. * count size of send data in bytes
  1432. *
  1433. * Returns: number of characters written
  1434. */
  1435. static int mgslpc_write(struct tty_struct * tty,
  1436. const unsigned char *buf, int count)
  1437. {
  1438. int c, ret = 0;
  1439. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1440. unsigned long flags;
  1441. if (debug_level >= DEBUG_LEVEL_INFO)
  1442. printk( "%s(%d):mgslpc_write(%s) count=%d\n",
  1443. __FILE__,__LINE__,info->device_name,count);
  1444. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write") ||
  1445. !tty || !info->tx_buf)
  1446. goto cleanup;
  1447. if (info->params.mode == MGSL_MODE_HDLC) {
  1448. if (count > TXBUFSIZE) {
  1449. ret = -EIO;
  1450. goto cleanup;
  1451. }
  1452. if (info->tx_active)
  1453. goto cleanup;
  1454. else if (info->tx_count)
  1455. goto start;
  1456. }
  1457. for (;;) {
  1458. c = min(count,
  1459. min(TXBUFSIZE - info->tx_count - 1,
  1460. TXBUFSIZE - info->tx_put));
  1461. if (c <= 0)
  1462. break;
  1463. memcpy(info->tx_buf + info->tx_put, buf, c);
  1464. spin_lock_irqsave(&info->lock,flags);
  1465. info->tx_put = (info->tx_put + c) & (TXBUFSIZE-1);
  1466. info->tx_count += c;
  1467. spin_unlock_irqrestore(&info->lock,flags);
  1468. buf += c;
  1469. count -= c;
  1470. ret += c;
  1471. }
  1472. start:
  1473. if (info->tx_count && !tty->stopped && !tty->hw_stopped) {
  1474. spin_lock_irqsave(&info->lock,flags);
  1475. if (!info->tx_active)
  1476. tx_start(info);
  1477. spin_unlock_irqrestore(&info->lock,flags);
  1478. }
  1479. cleanup:
  1480. if (debug_level >= DEBUG_LEVEL_INFO)
  1481. printk( "%s(%d):mgslpc_write(%s) returning=%d\n",
  1482. __FILE__,__LINE__,info->device_name,ret);
  1483. return ret;
  1484. }
  1485. /* Return the count of free bytes in transmit buffer
  1486. */
  1487. static int mgslpc_write_room(struct tty_struct *tty)
  1488. {
  1489. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1490. int ret;
  1491. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_write_room"))
  1492. return 0;
  1493. if (info->params.mode == MGSL_MODE_HDLC) {
  1494. /* HDLC (frame oriented) mode */
  1495. if (info->tx_active)
  1496. return 0;
  1497. else
  1498. return HDLC_MAX_FRAME_SIZE;
  1499. } else {
  1500. ret = TXBUFSIZE - info->tx_count - 1;
  1501. if (ret < 0)
  1502. ret = 0;
  1503. }
  1504. if (debug_level >= DEBUG_LEVEL_INFO)
  1505. printk("%s(%d):mgslpc_write_room(%s)=%d\n",
  1506. __FILE__,__LINE__, info->device_name, ret);
  1507. return ret;
  1508. }
  1509. /* Return the count of bytes in transmit buffer
  1510. */
  1511. static int mgslpc_chars_in_buffer(struct tty_struct *tty)
  1512. {
  1513. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1514. int rc;
  1515. if (debug_level >= DEBUG_LEVEL_INFO)
  1516. printk("%s(%d):mgslpc_chars_in_buffer(%s)\n",
  1517. __FILE__,__LINE__, info->device_name );
  1518. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_chars_in_buffer"))
  1519. return 0;
  1520. if (info->params.mode == MGSL_MODE_HDLC)
  1521. rc = info->tx_active ? info->max_frame_size : 0;
  1522. else
  1523. rc = info->tx_count;
  1524. if (debug_level >= DEBUG_LEVEL_INFO)
  1525. printk("%s(%d):mgslpc_chars_in_buffer(%s)=%d\n",
  1526. __FILE__,__LINE__, info->device_name, rc);
  1527. return rc;
  1528. }
  1529. /* Discard all data in the send buffer
  1530. */
  1531. static void mgslpc_flush_buffer(struct tty_struct *tty)
  1532. {
  1533. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1534. unsigned long flags;
  1535. if (debug_level >= DEBUG_LEVEL_INFO)
  1536. printk("%s(%d):mgslpc_flush_buffer(%s) entry\n",
  1537. __FILE__,__LINE__, info->device_name );
  1538. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_flush_buffer"))
  1539. return;
  1540. spin_lock_irqsave(&info->lock,flags);
  1541. info->tx_count = info->tx_put = info->tx_get = 0;
  1542. del_timer(&info->tx_timer);
  1543. spin_unlock_irqrestore(&info->lock,flags);
  1544. wake_up_interruptible(&tty->write_wait);
  1545. tty_wakeup(tty);
  1546. }
  1547. /* Send a high-priority XON/XOFF character
  1548. */
  1549. static void mgslpc_send_xchar(struct tty_struct *tty, char ch)
  1550. {
  1551. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1552. unsigned long flags;
  1553. if (debug_level >= DEBUG_LEVEL_INFO)
  1554. printk("%s(%d):mgslpc_send_xchar(%s,%d)\n",
  1555. __FILE__,__LINE__, info->device_name, ch );
  1556. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_send_xchar"))
  1557. return;
  1558. info->x_char = ch;
  1559. if (ch) {
  1560. spin_lock_irqsave(&info->lock,flags);
  1561. if (!info->tx_enabled)
  1562. tx_start(info);
  1563. spin_unlock_irqrestore(&info->lock,flags);
  1564. }
  1565. }
  1566. /* Signal remote device to throttle send data (our receive data)
  1567. */
  1568. static void mgslpc_throttle(struct tty_struct * tty)
  1569. {
  1570. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1571. unsigned long flags;
  1572. if (debug_level >= DEBUG_LEVEL_INFO)
  1573. printk("%s(%d):mgslpc_throttle(%s) entry\n",
  1574. __FILE__,__LINE__, info->device_name );
  1575. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_throttle"))
  1576. return;
  1577. if (I_IXOFF(tty))
  1578. mgslpc_send_xchar(tty, STOP_CHAR(tty));
  1579. if (tty->termios->c_cflag & CRTSCTS) {
  1580. spin_lock_irqsave(&info->lock,flags);
  1581. info->serial_signals &= ~SerialSignal_RTS;
  1582. set_signals(info);
  1583. spin_unlock_irqrestore(&info->lock,flags);
  1584. }
  1585. }
  1586. /* Signal remote device to stop throttling send data (our receive data)
  1587. */
  1588. static void mgslpc_unthrottle(struct tty_struct * tty)
  1589. {
  1590. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1591. unsigned long flags;
  1592. if (debug_level >= DEBUG_LEVEL_INFO)
  1593. printk("%s(%d):mgslpc_unthrottle(%s) entry\n",
  1594. __FILE__,__LINE__, info->device_name );
  1595. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_unthrottle"))
  1596. return;
  1597. if (I_IXOFF(tty)) {
  1598. if (info->x_char)
  1599. info->x_char = 0;
  1600. else
  1601. mgslpc_send_xchar(tty, START_CHAR(tty));
  1602. }
  1603. if (tty->termios->c_cflag & CRTSCTS) {
  1604. spin_lock_irqsave(&info->lock,flags);
  1605. info->serial_signals |= SerialSignal_RTS;
  1606. set_signals(info);
  1607. spin_unlock_irqrestore(&info->lock,flags);
  1608. }
  1609. }
  1610. /* get the current serial statistics
  1611. */
  1612. static int get_stats(MGSLPC_INFO * info, struct mgsl_icount __user *user_icount)
  1613. {
  1614. int err;
  1615. if (debug_level >= DEBUG_LEVEL_INFO)
  1616. printk("get_params(%s)\n", info->device_name);
  1617. if (!user_icount) {
  1618. memset(&info->icount, 0, sizeof(info->icount));
  1619. } else {
  1620. COPY_TO_USER(err, user_icount, &info->icount, sizeof(struct mgsl_icount));
  1621. if (err)
  1622. return -EFAULT;
  1623. }
  1624. return 0;
  1625. }
  1626. /* get the current serial parameters
  1627. */
  1628. static int get_params(MGSLPC_INFO * info, MGSL_PARAMS __user *user_params)
  1629. {
  1630. int err;
  1631. if (debug_level >= DEBUG_LEVEL_INFO)
  1632. printk("get_params(%s)\n", info->device_name);
  1633. COPY_TO_USER(err,user_params, &info->params, sizeof(MGSL_PARAMS));
  1634. if (err)
  1635. return -EFAULT;
  1636. return 0;
  1637. }
  1638. /* set the serial parameters
  1639. *
  1640. * Arguments:
  1641. *
  1642. * info pointer to device instance data
  1643. * new_params user buffer containing new serial params
  1644. *
  1645. * Returns: 0 if success, otherwise error code
  1646. */
  1647. static int set_params(MGSLPC_INFO * info, MGSL_PARAMS __user *new_params)
  1648. {
  1649. unsigned long flags;
  1650. MGSL_PARAMS tmp_params;
  1651. int err;
  1652. if (debug_level >= DEBUG_LEVEL_INFO)
  1653. printk("%s(%d):set_params %s\n", __FILE__,__LINE__,
  1654. info->device_name );
  1655. COPY_FROM_USER(err,&tmp_params, new_params, sizeof(MGSL_PARAMS));
  1656. if (err) {
  1657. if ( debug_level >= DEBUG_LEVEL_INFO )
  1658. printk( "%s(%d):set_params(%s) user buffer copy failed\n",
  1659. __FILE__,__LINE__,info->device_name);
  1660. return -EFAULT;
  1661. }
  1662. spin_lock_irqsave(&info->lock,flags);
  1663. memcpy(&info->params,&tmp_params,sizeof(MGSL_PARAMS));
  1664. spin_unlock_irqrestore(&info->lock,flags);
  1665. mgslpc_change_params(info);
  1666. return 0;
  1667. }
  1668. static int get_txidle(MGSLPC_INFO * info, int __user *idle_mode)
  1669. {
  1670. int err;
  1671. if (debug_level >= DEBUG_LEVEL_INFO)
  1672. printk("get_txidle(%s)=%d\n", info->device_name, info->idle_mode);
  1673. COPY_TO_USER(err,idle_mode, &info->idle_mode, sizeof(int));
  1674. if (err)
  1675. return -EFAULT;
  1676. return 0;
  1677. }
  1678. static int set_txidle(MGSLPC_INFO * info, int idle_mode)
  1679. {
  1680. unsigned long flags;
  1681. if (debug_level >= DEBUG_LEVEL_INFO)
  1682. printk("set_txidle(%s,%d)\n", info->device_name, idle_mode);
  1683. spin_lock_irqsave(&info->lock,flags);
  1684. info->idle_mode = idle_mode;
  1685. tx_set_idle(info);
  1686. spin_unlock_irqrestore(&info->lock,flags);
  1687. return 0;
  1688. }
  1689. static int get_interface(MGSLPC_INFO * info, int __user *if_mode)
  1690. {
  1691. int err;
  1692. if (debug_level >= DEBUG_LEVEL_INFO)
  1693. printk("get_interface(%s)=%d\n", info->device_name, info->if_mode);
  1694. COPY_TO_USER(err,if_mode, &info->if_mode, sizeof(int));
  1695. if (err)
  1696. return -EFAULT;
  1697. return 0;
  1698. }
  1699. static int set_interface(MGSLPC_INFO * info, int if_mode)
  1700. {
  1701. unsigned long flags;
  1702. unsigned char val;
  1703. if (debug_level >= DEBUG_LEVEL_INFO)
  1704. printk("set_interface(%s,%d)\n", info->device_name, if_mode);
  1705. spin_lock_irqsave(&info->lock,flags);
  1706. info->if_mode = if_mode;
  1707. val = read_reg(info, PVR) & 0x0f;
  1708. switch (info->if_mode)
  1709. {
  1710. case MGSL_INTERFACE_RS232: val |= PVR_RS232; break;
  1711. case MGSL_INTERFACE_V35: val |= PVR_V35; break;
  1712. case MGSL_INTERFACE_RS422: val |= PVR_RS422; break;
  1713. }
  1714. write_reg(info, PVR, val);
  1715. spin_unlock_irqrestore(&info->lock,flags);
  1716. return 0;
  1717. }
  1718. static int set_txenable(MGSLPC_INFO * info, int enable)
  1719. {
  1720. unsigned long flags;
  1721. if (debug_level >= DEBUG_LEVEL_INFO)
  1722. printk("set_txenable(%s,%d)\n", info->device_name, enable);
  1723. spin_lock_irqsave(&info->lock,flags);
  1724. if (enable) {
  1725. if (!info->tx_enabled)
  1726. tx_start(info);
  1727. } else {
  1728. if (info->tx_enabled)
  1729. tx_stop(info);
  1730. }
  1731. spin_unlock_irqrestore(&info->lock,flags);
  1732. return 0;
  1733. }
  1734. static int tx_abort(MGSLPC_INFO * info)
  1735. {
  1736. unsigned long flags;
  1737. if (debug_level >= DEBUG_LEVEL_INFO)
  1738. printk("tx_abort(%s)\n", info->device_name);
  1739. spin_lock_irqsave(&info->lock,flags);
  1740. if (info->tx_active && info->tx_count &&
  1741. info->params.mode == MGSL_MODE_HDLC) {
  1742. /* clear data count so FIFO is not filled on next IRQ.
  1743. * This results in underrun and abort transmission.
  1744. */
  1745. info->tx_count = info->tx_put = info->tx_get = 0;
  1746. info->tx_aborting = TRUE;
  1747. }
  1748. spin_unlock_irqrestore(&info->lock,flags);
  1749. return 0;
  1750. }
  1751. static int set_rxenable(MGSLPC_INFO * info, int enable)
  1752. {
  1753. unsigned long flags;
  1754. if (debug_level >= DEBUG_LEVEL_INFO)
  1755. printk("set_rxenable(%s,%d)\n", info->device_name, enable);
  1756. spin_lock_irqsave(&info->lock,flags);
  1757. if (enable) {
  1758. if (!info->rx_enabled)
  1759. rx_start(info);
  1760. } else {
  1761. if (info->rx_enabled)
  1762. rx_stop(info);
  1763. }
  1764. spin_unlock_irqrestore(&info->lock,flags);
  1765. return 0;
  1766. }
  1767. /* wait for specified event to occur
  1768. *
  1769. * Arguments: info pointer to device instance data
  1770. * mask pointer to bitmask of events to wait for
  1771. * Return Value: 0 if successful and bit mask updated with
  1772. * of events triggerred,
  1773. * otherwise error code
  1774. */
  1775. static int wait_events(MGSLPC_INFO * info, int __user *mask_ptr)
  1776. {
  1777. unsigned long flags;
  1778. int s;
  1779. int rc=0;
  1780. struct mgsl_icount cprev, cnow;
  1781. int events;
  1782. int mask;
  1783. struct _input_signal_events oldsigs, newsigs;
  1784. DECLARE_WAITQUEUE(wait, current);
  1785. COPY_FROM_USER(rc,&mask, mask_ptr, sizeof(int));
  1786. if (rc)
  1787. return -EFAULT;
  1788. if (debug_level >= DEBUG_LEVEL_INFO)
  1789. printk("wait_events(%s,%d)\n", info->device_name, mask);
  1790. spin_lock_irqsave(&info->lock,flags);
  1791. /* return immediately if state matches requested events */
  1792. get_signals(info);
  1793. s = info->serial_signals;
  1794. events = mask &
  1795. ( ((s & SerialSignal_DSR) ? MgslEvent_DsrActive:MgslEvent_DsrInactive) +
  1796. ((s & SerialSignal_DCD) ? MgslEvent_DcdActive:MgslEvent_DcdInactive) +
  1797. ((s & SerialSignal_CTS) ? MgslEvent_CtsActive:MgslEvent_CtsInactive) +
  1798. ((s & SerialSignal_RI) ? MgslEvent_RiActive :MgslEvent_RiInactive) );
  1799. if (events) {
  1800. spin_unlock_irqrestore(&info->lock,flags);
  1801. goto exit;
  1802. }
  1803. /* save current irq counts */
  1804. cprev = info->icount;
  1805. oldsigs = info->input_signal_events;
  1806. if ((info->params.mode == MGSL_MODE_HDLC) &&
  1807. (mask & MgslEvent_ExitHuntMode))
  1808. irq_enable(info, CHA, IRQ_EXITHUNT);
  1809. set_current_state(TASK_INTERRUPTIBLE);
  1810. add_wait_queue(&info->event_wait_q, &wait);
  1811. spin_unlock_irqrestore(&info->lock,flags);
  1812. for(;;) {
  1813. schedule();
  1814. if (signal_pending(current)) {
  1815. rc = -ERESTARTSYS;
  1816. break;
  1817. }
  1818. /* get current irq counts */
  1819. spin_lock_irqsave(&info->lock,flags);
  1820. cnow = info->icount;
  1821. newsigs = info->input_signal_events;
  1822. set_current_state(TASK_INTERRUPTIBLE);
  1823. spin_unlock_irqrestore(&info->lock,flags);
  1824. /* if no change, wait aborted for some reason */
  1825. if (newsigs.dsr_up == oldsigs.dsr_up &&
  1826. newsigs.dsr_down == oldsigs.dsr_down &&
  1827. newsigs.dcd_up == oldsigs.dcd_up &&
  1828. newsigs.dcd_down == oldsigs.dcd_down &&
  1829. newsigs.cts_up == oldsigs.cts_up &&
  1830. newsigs.cts_down == oldsigs.cts_down &&
  1831. newsigs.ri_up == oldsigs.ri_up &&
  1832. newsigs.ri_down == oldsigs.ri_down &&
  1833. cnow.exithunt == cprev.exithunt &&
  1834. cnow.rxidle == cprev.rxidle) {
  1835. rc = -EIO;
  1836. break;
  1837. }
  1838. events = mask &
  1839. ( (newsigs.dsr_up != oldsigs.dsr_up ? MgslEvent_DsrActive:0) +
  1840. (newsigs.dsr_down != oldsigs.dsr_down ? MgslEvent_DsrInactive:0) +
  1841. (newsigs.dcd_up != oldsigs.dcd_up ? MgslEvent_DcdActive:0) +
  1842. (newsigs.dcd_down != oldsigs.dcd_down ? MgslEvent_DcdInactive:0) +
  1843. (newsigs.cts_up != oldsigs.cts_up ? MgslEvent_CtsActive:0) +
  1844. (newsigs.cts_down != oldsigs.cts_down ? MgslEvent_CtsInactive:0) +
  1845. (newsigs.ri_up != oldsigs.ri_up ? MgslEvent_RiActive:0) +
  1846. (newsigs.ri_down != oldsigs.ri_down ? MgslEvent_RiInactive:0) +
  1847. (cnow.exithunt != cprev.exithunt ? MgslEvent_ExitHuntMode:0) +
  1848. (cnow.rxidle != cprev.rxidle ? MgslEvent_IdleReceived:0) );
  1849. if (events)
  1850. break;
  1851. cprev = cnow;
  1852. oldsigs = newsigs;
  1853. }
  1854. remove_wait_queue(&info->event_wait_q, &wait);
  1855. set_current_state(TASK_RUNNING);
  1856. if (mask & MgslEvent_ExitHuntMode) {
  1857. spin_lock_irqsave(&info->lock,flags);
  1858. if (!waitqueue_active(&info->event_wait_q))
  1859. irq_disable(info, CHA, IRQ_EXITHUNT);
  1860. spin_unlock_irqrestore(&info->lock,flags);
  1861. }
  1862. exit:
  1863. if (rc == 0)
  1864. PUT_USER(rc, events, mask_ptr);
  1865. return rc;
  1866. }
  1867. static int modem_input_wait(MGSLPC_INFO *info,int arg)
  1868. {
  1869. unsigned long flags;
  1870. int rc;
  1871. struct mgsl_icount cprev, cnow;
  1872. DECLARE_WAITQUEUE(wait, current);
  1873. /* save current irq counts */
  1874. spin_lock_irqsave(&info->lock,flags);
  1875. cprev = info->icount;
  1876. add_wait_queue(&info->status_event_wait_q, &wait);
  1877. set_current_state(TASK_INTERRUPTIBLE);
  1878. spin_unlock_irqrestore(&info->lock,flags);
  1879. for(;;) {
  1880. schedule();
  1881. if (signal_pending(current)) {
  1882. rc = -ERESTARTSYS;
  1883. break;
  1884. }
  1885. /* get new irq counts */
  1886. spin_lock_irqsave(&info->lock,flags);
  1887. cnow = info->icount;
  1888. set_current_state(TASK_INTERRUPTIBLE);
  1889. spin_unlock_irqrestore(&info->lock,flags);
  1890. /* if no change, wait aborted for some reason */
  1891. if (cnow.rng == cprev.rng && cnow.dsr == cprev.dsr &&
  1892. cnow.dcd == cprev.dcd && cnow.cts == cprev.cts) {
  1893. rc = -EIO;
  1894. break;
  1895. }
  1896. /* check for change in caller specified modem input */
  1897. if ((arg & TIOCM_RNG && cnow.rng != cprev.rng) ||
  1898. (arg & TIOCM_DSR && cnow.dsr != cprev.dsr) ||
  1899. (arg & TIOCM_CD && cnow.dcd != cprev.dcd) ||
  1900. (arg & TIOCM_CTS && cnow.cts != cprev.cts)) {
  1901. rc = 0;
  1902. break;
  1903. }
  1904. cprev = cnow;
  1905. }
  1906. remove_wait_queue(&info->status_event_wait_q, &wait);
  1907. set_current_state(TASK_RUNNING);
  1908. return rc;
  1909. }
  1910. /* return the state of the serial control and status signals
  1911. */
  1912. static int tiocmget(struct tty_struct *tty, struct file *file)
  1913. {
  1914. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1915. unsigned int result;
  1916. unsigned long flags;
  1917. spin_lock_irqsave(&info->lock,flags);
  1918. get_signals(info);
  1919. spin_unlock_irqrestore(&info->lock,flags);
  1920. result = ((info->serial_signals & SerialSignal_RTS) ? TIOCM_RTS:0) +
  1921. ((info->serial_signals & SerialSignal_DTR) ? TIOCM_DTR:0) +
  1922. ((info->serial_signals & SerialSignal_DCD) ? TIOCM_CAR:0) +
  1923. ((info->serial_signals & SerialSignal_RI) ? TIOCM_RNG:0) +
  1924. ((info->serial_signals & SerialSignal_DSR) ? TIOCM_DSR:0) +
  1925. ((info->serial_signals & SerialSignal_CTS) ? TIOCM_CTS:0);
  1926. if (debug_level >= DEBUG_LEVEL_INFO)
  1927. printk("%s(%d):%s tiocmget() value=%08X\n",
  1928. __FILE__,__LINE__, info->device_name, result );
  1929. return result;
  1930. }
  1931. /* set modem control signals (DTR/RTS)
  1932. */
  1933. static int tiocmset(struct tty_struct *tty, struct file *file,
  1934. unsigned int set, unsigned int clear)
  1935. {
  1936. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  1937. unsigned long flags;
  1938. if (debug_level >= DEBUG_LEVEL_INFO)
  1939. printk("%s(%d):%s tiocmset(%x,%x)\n",
  1940. __FILE__,__LINE__,info->device_name, set, clear);
  1941. if (set & TIOCM_RTS)
  1942. info->serial_signals |= SerialSignal_RTS;
  1943. if (set & TIOCM_DTR)
  1944. info->serial_signals |= SerialSignal_DTR;
  1945. if (clear & TIOCM_RTS)
  1946. info->serial_signals &= ~SerialSignal_RTS;
  1947. if (clear & TIOCM_DTR)
  1948. info->serial_signals &= ~SerialSignal_DTR;
  1949. spin_lock_irqsave(&info->lock,flags);
  1950. set_signals(info);
  1951. spin_unlock_irqrestore(&info->lock,flags);
  1952. return 0;
  1953. }
  1954. /* Set or clear transmit break condition
  1955. *
  1956. * Arguments: tty pointer to tty instance data
  1957. * break_state -1=set break condition, 0=clear
  1958. */
  1959. static void mgslpc_break(struct tty_struct *tty, int break_state)
  1960. {
  1961. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1962. unsigned long flags;
  1963. if (debug_level >= DEBUG_LEVEL_INFO)
  1964. printk("%s(%d):mgslpc_break(%s,%d)\n",
  1965. __FILE__,__LINE__, info->device_name, break_state);
  1966. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_break"))
  1967. return;
  1968. spin_lock_irqsave(&info->lock,flags);
  1969. if (break_state == -1)
  1970. set_reg_bits(info, CHA+DAFO, BIT6);
  1971. else
  1972. clear_reg_bits(info, CHA+DAFO, BIT6);
  1973. spin_unlock_irqrestore(&info->lock,flags);
  1974. }
  1975. /* Service an IOCTL request
  1976. *
  1977. * Arguments:
  1978. *
  1979. * tty pointer to tty instance data
  1980. * file pointer to associated file object for device
  1981. * cmd IOCTL command code
  1982. * arg command argument/context
  1983. *
  1984. * Return Value: 0 if success, otherwise error code
  1985. */
  1986. static int mgslpc_ioctl(struct tty_struct *tty, struct file * file,
  1987. unsigned int cmd, unsigned long arg)
  1988. {
  1989. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  1990. if (debug_level >= DEBUG_LEVEL_INFO)
  1991. printk("%s(%d):mgslpc_ioctl %s cmd=%08X\n", __FILE__,__LINE__,
  1992. info->device_name, cmd );
  1993. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_ioctl"))
  1994. return -ENODEV;
  1995. if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
  1996. (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1997. if (tty->flags & (1 << TTY_IO_ERROR))
  1998. return -EIO;
  1999. }
  2000. return ioctl_common(info, cmd, arg);
  2001. }
  2002. int ioctl_common(MGSLPC_INFO *info, unsigned int cmd, unsigned long arg)
  2003. {
  2004. int error;
  2005. struct mgsl_icount cnow; /* kernel counter temps */
  2006. struct serial_icounter_struct __user *p_cuser; /* user space */
  2007. void __user *argp = (void __user *)arg;
  2008. unsigned long flags;
  2009. switch (cmd) {
  2010. case MGSL_IOCGPARAMS:
  2011. return get_params(info, argp);
  2012. case MGSL_IOCSPARAMS:
  2013. return set_params(info, argp);
  2014. case MGSL_IOCGTXIDLE:
  2015. return get_txidle(info, argp);
  2016. case MGSL_IOCSTXIDLE:
  2017. return set_txidle(info, (int)arg);
  2018. case MGSL_IOCGIF:
  2019. return get_interface(info, argp);
  2020. case MGSL_IOCSIF:
  2021. return set_interface(info,(int)arg);
  2022. case MGSL_IOCTXENABLE:
  2023. return set_txenable(info,(int)arg);
  2024. case MGSL_IOCRXENABLE:
  2025. return set_rxenable(info,(int)arg);
  2026. case MGSL_IOCTXABORT:
  2027. return tx_abort(info);
  2028. case MGSL_IOCGSTATS:
  2029. return get_stats(info, argp);
  2030. case MGSL_IOCWAITEVENT:
  2031. return wait_events(info, argp);
  2032. case TIOCMIWAIT:
  2033. return modem_input_wait(info,(int)arg);
  2034. case TIOCGICOUNT:
  2035. spin_lock_irqsave(&info->lock,flags);
  2036. cnow = info->icount;
  2037. spin_unlock_irqrestore(&info->lock,flags);
  2038. p_cuser = argp;
  2039. PUT_USER(error,cnow.cts, &p_cuser->cts);
  2040. if (error) return error;
  2041. PUT_USER(error,cnow.dsr, &p_cuser->dsr);
  2042. if (error) return error;
  2043. PUT_USER(error,cnow.rng, &p_cuser->rng);
  2044. if (error) return error;
  2045. PUT_USER(error,cnow.dcd, &p_cuser->dcd);
  2046. if (error) return error;
  2047. PUT_USER(error,cnow.rx, &p_cuser->rx);
  2048. if (error) return error;
  2049. PUT_USER(error,cnow.tx, &p_cuser->tx);
  2050. if (error) return error;
  2051. PUT_USER(error,cnow.frame, &p_cuser->frame);
  2052. if (error) return error;
  2053. PUT_USER(error,cnow.overrun, &p_cuser->overrun);
  2054. if (error) return error;
  2055. PUT_USER(error,cnow.parity, &p_cuser->parity);
  2056. if (error) return error;
  2057. PUT_USER(error,cnow.brk, &p_cuser->brk);
  2058. if (error) return error;
  2059. PUT_USER(error,cnow.buf_overrun, &p_cuser->buf_overrun);
  2060. if (error) return error;
  2061. return 0;
  2062. default:
  2063. return -ENOIOCTLCMD;
  2064. }
  2065. return 0;
  2066. }
  2067. /* Set new termios settings
  2068. *
  2069. * Arguments:
  2070. *
  2071. * tty pointer to tty structure
  2072. * termios pointer to buffer to hold returned old termios
  2073. */
  2074. static void mgslpc_set_termios(struct tty_struct *tty, struct termios *old_termios)
  2075. {
  2076. MGSLPC_INFO *info = (MGSLPC_INFO *)tty->driver_data;
  2077. unsigned long flags;
  2078. if (debug_level >= DEBUG_LEVEL_INFO)
  2079. printk("%s(%d):mgslpc_set_termios %s\n", __FILE__,__LINE__,
  2080. tty->driver->name );
  2081. /* just return if nothing has changed */
  2082. if ((tty->termios->c_cflag == old_termios->c_cflag)
  2083. && (RELEVANT_IFLAG(tty->termios->c_iflag)
  2084. == RELEVANT_IFLAG(old_termios->c_iflag)))
  2085. return;
  2086. mgslpc_change_params(info);
  2087. /* Handle transition to B0 status */
  2088. if (old_termios->c_cflag & CBAUD &&
  2089. !(tty->termios->c_cflag & CBAUD)) {
  2090. info->serial_signals &= ~(SerialSignal_RTS + SerialSignal_DTR);
  2091. spin_lock_irqsave(&info->lock,flags);
  2092. set_signals(info);
  2093. spin_unlock_irqrestore(&info->lock,flags);
  2094. }
  2095. /* Handle transition away from B0 status */
  2096. if (!(old_termios->c_cflag & CBAUD) &&
  2097. tty->termios->c_cflag & CBAUD) {
  2098. info->serial_signals |= SerialSignal_DTR;
  2099. if (!(tty->termios->c_cflag & CRTSCTS) ||
  2100. !test_bit(TTY_THROTTLED, &tty->flags)) {
  2101. info->serial_signals |= SerialSignal_RTS;
  2102. }
  2103. spin_lock_irqsave(&info->lock,flags);
  2104. set_signals(info);
  2105. spin_unlock_irqrestore(&info->lock,flags);
  2106. }
  2107. /* Handle turning off CRTSCTS */
  2108. if (old_termios->c_cflag & CRTSCTS &&
  2109. !(tty->termios->c_cflag & CRTSCTS)) {
  2110. tty->hw_stopped = 0;
  2111. tx_release(tty);
  2112. }
  2113. }
  2114. static void mgslpc_close(struct tty_struct *tty, struct file * filp)
  2115. {
  2116. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2117. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_close"))
  2118. return;
  2119. if (debug_level >= DEBUG_LEVEL_INFO)
  2120. printk("%s(%d):mgslpc_close(%s) entry, count=%d\n",
  2121. __FILE__,__LINE__, info->device_name, info->count);
  2122. if (!info->count)
  2123. return;
  2124. if (tty_hung_up_p(filp))
  2125. goto cleanup;
  2126. if ((tty->count == 1) && (info->count != 1)) {
  2127. /*
  2128. * tty->count is 1 and the tty structure will be freed.
  2129. * info->count should be one in this case.
  2130. * if it's not, correct it so that the port is shutdown.
  2131. */
  2132. printk("mgslpc_close: bad refcount; tty->count is 1, "
  2133. "info->count is %d\n", info->count);
  2134. info->count = 1;
  2135. }
  2136. info->count--;
  2137. /* if at least one open remaining, leave hardware active */
  2138. if (info->count)
  2139. goto cleanup;
  2140. info->flags |= ASYNC_CLOSING;
  2141. /* set tty->closing to notify line discipline to
  2142. * only process XON/XOFF characters. Only the N_TTY
  2143. * discipline appears to use this (ppp does not).
  2144. */
  2145. tty->closing = 1;
  2146. /* wait for transmit data to clear all layers */
  2147. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) {
  2148. if (debug_level >= DEBUG_LEVEL_INFO)
  2149. printk("%s(%d):mgslpc_close(%s) calling tty_wait_until_sent\n",
  2150. __FILE__,__LINE__, info->device_name );
  2151. tty_wait_until_sent(tty, info->closing_wait);
  2152. }
  2153. if (info->flags & ASYNC_INITIALIZED)
  2154. mgslpc_wait_until_sent(tty, info->timeout);
  2155. if (tty->driver->flush_buffer)
  2156. tty->driver->flush_buffer(tty);
  2157. ldisc_flush_buffer(tty);
  2158. shutdown(info);
  2159. tty->closing = 0;
  2160. info->tty = NULL;
  2161. if (info->blocked_open) {
  2162. if (info->close_delay) {
  2163. msleep_interruptible(jiffies_to_msecs(info->close_delay));
  2164. }
  2165. wake_up_interruptible(&info->open_wait);
  2166. }
  2167. info->flags &= ~(ASYNC_NORMAL_ACTIVE|ASYNC_CLOSING);
  2168. wake_up_interruptible(&info->close_wait);
  2169. cleanup:
  2170. if (debug_level >= DEBUG_LEVEL_INFO)
  2171. printk("%s(%d):mgslpc_close(%s) exit, count=%d\n", __FILE__,__LINE__,
  2172. tty->driver->name, info->count);
  2173. }
  2174. /* Wait until the transmitter is empty.
  2175. */
  2176. static void mgslpc_wait_until_sent(struct tty_struct *tty, int timeout)
  2177. {
  2178. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2179. unsigned long orig_jiffies, char_time;
  2180. if (!info )
  2181. return;
  2182. if (debug_level >= DEBUG_LEVEL_INFO)
  2183. printk("%s(%d):mgslpc_wait_until_sent(%s) entry\n",
  2184. __FILE__,__LINE__, info->device_name );
  2185. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_wait_until_sent"))
  2186. return;
  2187. if (!(info->flags & ASYNC_INITIALIZED))
  2188. goto exit;
  2189. orig_jiffies = jiffies;
  2190. /* Set check interval to 1/5 of estimated time to
  2191. * send a character, and make it at least 1. The check
  2192. * interval should also be less than the timeout.
  2193. * Note: use tight timings here to satisfy the NIST-PCTS.
  2194. */
  2195. if ( info->params.data_rate ) {
  2196. char_time = info->timeout/(32 * 5);
  2197. if (!char_time)
  2198. char_time++;
  2199. } else
  2200. char_time = 1;
  2201. if (timeout)
  2202. char_time = min_t(unsigned long, char_time, timeout);
  2203. if (info->params.mode == MGSL_MODE_HDLC) {
  2204. while (info->tx_active) {
  2205. msleep_interruptible(jiffies_to_msecs(char_time));
  2206. if (signal_pending(current))
  2207. break;
  2208. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2209. break;
  2210. }
  2211. } else {
  2212. while ((info->tx_count || info->tx_active) &&
  2213. info->tx_enabled) {
  2214. msleep_interruptible(jiffies_to_msecs(char_time));
  2215. if (signal_pending(current))
  2216. break;
  2217. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  2218. break;
  2219. }
  2220. }
  2221. exit:
  2222. if (debug_level >= DEBUG_LEVEL_INFO)
  2223. printk("%s(%d):mgslpc_wait_until_sent(%s) exit\n",
  2224. __FILE__,__LINE__, info->device_name );
  2225. }
  2226. /* Called by tty_hangup() when a hangup is signaled.
  2227. * This is the same as closing all open files for the port.
  2228. */
  2229. static void mgslpc_hangup(struct tty_struct *tty)
  2230. {
  2231. MGSLPC_INFO * info = (MGSLPC_INFO *)tty->driver_data;
  2232. if (debug_level >= DEBUG_LEVEL_INFO)
  2233. printk("%s(%d):mgslpc_hangup(%s)\n",
  2234. __FILE__,__LINE__, info->device_name );
  2235. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_hangup"))
  2236. return;
  2237. mgslpc_flush_buffer(tty);
  2238. shutdown(info);
  2239. info->count = 0;
  2240. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  2241. info->tty = NULL;
  2242. wake_up_interruptible(&info->open_wait);
  2243. }
  2244. /* Block the current process until the specified port
  2245. * is ready to be opened.
  2246. */
  2247. static int block_til_ready(struct tty_struct *tty, struct file *filp,
  2248. MGSLPC_INFO *info)
  2249. {
  2250. DECLARE_WAITQUEUE(wait, current);
  2251. int retval;
  2252. int do_clocal = 0, extra_count = 0;
  2253. unsigned long flags;
  2254. if (debug_level >= DEBUG_LEVEL_INFO)
  2255. printk("%s(%d):block_til_ready on %s\n",
  2256. __FILE__,__LINE__, tty->driver->name );
  2257. if (filp->f_flags & O_NONBLOCK || tty->flags & (1 << TTY_IO_ERROR)){
  2258. /* nonblock mode is set or port is not enabled */
  2259. /* just verify that callout device is not active */
  2260. info->flags |= ASYNC_NORMAL_ACTIVE;
  2261. return 0;
  2262. }
  2263. if (tty->termios->c_cflag & CLOCAL)
  2264. do_clocal = 1;
  2265. /* Wait for carrier detect and the line to become
  2266. * free (i.e., not in use by the callout). While we are in
  2267. * this loop, info->count is dropped by one, so that
  2268. * mgslpc_close() knows when to free things. We restore it upon
  2269. * exit, either normal or abnormal.
  2270. */
  2271. retval = 0;
  2272. add_wait_queue(&info->open_wait, &wait);
  2273. if (debug_level >= DEBUG_LEVEL_INFO)
  2274. printk("%s(%d):block_til_ready before block on %s count=%d\n",
  2275. __FILE__,__LINE__, tty->driver->name, info->count );
  2276. spin_lock_irqsave(&info->lock, flags);
  2277. if (!tty_hung_up_p(filp)) {
  2278. extra_count = 1;
  2279. info->count--;
  2280. }
  2281. spin_unlock_irqrestore(&info->lock, flags);
  2282. info->blocked_open++;
  2283. while (1) {
  2284. if ((tty->termios->c_cflag & CBAUD)) {
  2285. spin_lock_irqsave(&info->lock,flags);
  2286. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  2287. set_signals(info);
  2288. spin_unlock_irqrestore(&info->lock,flags);
  2289. }
  2290. set_current_state(TASK_INTERRUPTIBLE);
  2291. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)){
  2292. retval = (info->flags & ASYNC_HUP_NOTIFY) ?
  2293. -EAGAIN : -ERESTARTSYS;
  2294. break;
  2295. }
  2296. spin_lock_irqsave(&info->lock,flags);
  2297. get_signals(info);
  2298. spin_unlock_irqrestore(&info->lock,flags);
  2299. if (!(info->flags & ASYNC_CLOSING) &&
  2300. (do_clocal || (info->serial_signals & SerialSignal_DCD)) ) {
  2301. break;
  2302. }
  2303. if (signal_pending(current)) {
  2304. retval = -ERESTARTSYS;
  2305. break;
  2306. }
  2307. if (debug_level >= DEBUG_LEVEL_INFO)
  2308. printk("%s(%d):block_til_ready blocking on %s count=%d\n",
  2309. __FILE__,__LINE__, tty->driver->name, info->count );
  2310. schedule();
  2311. }
  2312. set_current_state(TASK_RUNNING);
  2313. remove_wait_queue(&info->open_wait, &wait);
  2314. if (extra_count)
  2315. info->count++;
  2316. info->blocked_open--;
  2317. if (debug_level >= DEBUG_LEVEL_INFO)
  2318. printk("%s(%d):block_til_ready after blocking on %s count=%d\n",
  2319. __FILE__,__LINE__, tty->driver->name, info->count );
  2320. if (!retval)
  2321. info->flags |= ASYNC_NORMAL_ACTIVE;
  2322. return retval;
  2323. }
  2324. static int mgslpc_open(struct tty_struct *tty, struct file * filp)
  2325. {
  2326. MGSLPC_INFO *info;
  2327. int retval, line;
  2328. unsigned long flags;
  2329. /* verify range of specified line number */
  2330. line = tty->index;
  2331. if ((line < 0) || (line >= mgslpc_device_count)) {
  2332. printk("%s(%d):mgslpc_open with invalid line #%d.\n",
  2333. __FILE__,__LINE__,line);
  2334. return -ENODEV;
  2335. }
  2336. /* find the info structure for the specified line */
  2337. info = mgslpc_device_list;
  2338. while(info && info->line != line)
  2339. info = info->next_device;
  2340. if (mgslpc_paranoia_check(info, tty->name, "mgslpc_open"))
  2341. return -ENODEV;
  2342. tty->driver_data = info;
  2343. info->tty = tty;
  2344. if (debug_level >= DEBUG_LEVEL_INFO)
  2345. printk("%s(%d):mgslpc_open(%s), old ref count = %d\n",
  2346. __FILE__,__LINE__,tty->driver->name, info->count);
  2347. /* If port is closing, signal caller to try again */
  2348. if (tty_hung_up_p(filp) || info->flags & ASYNC_CLOSING){
  2349. if (info->flags & ASYNC_CLOSING)
  2350. interruptible_sleep_on(&info->close_wait);
  2351. retval = ((info->flags & ASYNC_HUP_NOTIFY) ?
  2352. -EAGAIN : -ERESTARTSYS);
  2353. goto cleanup;
  2354. }
  2355. info->tty->low_latency = (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2356. spin_lock_irqsave(&info->netlock, flags);
  2357. if (info->netcount) {
  2358. retval = -EBUSY;
  2359. spin_unlock_irqrestore(&info->netlock, flags);
  2360. goto cleanup;
  2361. }
  2362. info->count++;
  2363. spin_unlock_irqrestore(&info->netlock, flags);
  2364. if (info->count == 1) {
  2365. /* 1st open on this device, init hardware */
  2366. retval = startup(info);
  2367. if (retval < 0)
  2368. goto cleanup;
  2369. }
  2370. retval = block_til_ready(tty, filp, info);
  2371. if (retval) {
  2372. if (debug_level >= DEBUG_LEVEL_INFO)
  2373. printk("%s(%d):block_til_ready(%s) returned %d\n",
  2374. __FILE__,__LINE__, info->device_name, retval);
  2375. goto cleanup;
  2376. }
  2377. if (debug_level >= DEBUG_LEVEL_INFO)
  2378. printk("%s(%d):mgslpc_open(%s) success\n",
  2379. __FILE__,__LINE__, info->device_name);
  2380. retval = 0;
  2381. cleanup:
  2382. if (retval) {
  2383. if (tty->count == 1)
  2384. info->tty = NULL; /* tty layer will release tty struct */
  2385. if(info->count)
  2386. info->count--;
  2387. }
  2388. return retval;
  2389. }
  2390. /*
  2391. * /proc fs routines....
  2392. */
  2393. static inline int line_info(char *buf, MGSLPC_INFO *info)
  2394. {
  2395. char stat_buf[30];
  2396. int ret;
  2397. unsigned long flags;
  2398. ret = sprintf(buf, "%s:io:%04X irq:%d",
  2399. info->device_name, info->io_base, info->irq_level);
  2400. /* output current serial signal states */
  2401. spin_lock_irqsave(&info->lock,flags);
  2402. get_signals(info);
  2403. spin_unlock_irqrestore(&info->lock,flags);
  2404. stat_buf[0] = 0;
  2405. stat_buf[1] = 0;
  2406. if (info->serial_signals & SerialSignal_RTS)
  2407. strcat(stat_buf, "|RTS");
  2408. if (info->serial_signals & SerialSignal_CTS)
  2409. strcat(stat_buf, "|CTS");
  2410. if (info->serial_signals & SerialSignal_DTR)
  2411. strcat(stat_buf, "|DTR");
  2412. if (info->serial_signals & SerialSignal_DSR)
  2413. strcat(stat_buf, "|DSR");
  2414. if (info->serial_signals & SerialSignal_DCD)
  2415. strcat(stat_buf, "|CD");
  2416. if (info->serial_signals & SerialSignal_RI)
  2417. strcat(stat_buf, "|RI");
  2418. if (info->params.mode == MGSL_MODE_HDLC) {
  2419. ret += sprintf(buf+ret, " HDLC txok:%d rxok:%d",
  2420. info->icount.txok, info->icount.rxok);
  2421. if (info->icount.txunder)
  2422. ret += sprintf(buf+ret, " txunder:%d", info->icount.txunder);
  2423. if (info->icount.txabort)
  2424. ret += sprintf(buf+ret, " txabort:%d", info->icount.txabort);
  2425. if (info->icount.rxshort)
  2426. ret += sprintf(buf+ret, " rxshort:%d", info->icount.rxshort);
  2427. if (info->icount.rxlong)
  2428. ret += sprintf(buf+ret, " rxlong:%d", info->icount.rxlong);
  2429. if (info->icount.rxover)
  2430. ret += sprintf(buf+ret, " rxover:%d", info->icount.rxover);
  2431. if (info->icount.rxcrc)
  2432. ret += sprintf(buf+ret, " rxcrc:%d", info->icount.rxcrc);
  2433. } else {
  2434. ret += sprintf(buf+ret, " ASYNC tx:%d rx:%d",
  2435. info->icount.tx, info->icount.rx);
  2436. if (info->icount.frame)
  2437. ret += sprintf(buf+ret, " fe:%d", info->icount.frame);
  2438. if (info->icount.parity)
  2439. ret += sprintf(buf+ret, " pe:%d", info->icount.parity);
  2440. if (info->icount.brk)
  2441. ret += sprintf(buf+ret, " brk:%d", info->icount.brk);
  2442. if (info->icount.overrun)
  2443. ret += sprintf(buf+ret, " oe:%d", info->icount.overrun);
  2444. }
  2445. /* Append serial signal status to end */
  2446. ret += sprintf(buf+ret, " %s\n", stat_buf+1);
  2447. ret += sprintf(buf+ret, "txactive=%d bh_req=%d bh_run=%d pending_bh=%x\n",
  2448. info->tx_active,info->bh_requested,info->bh_running,
  2449. info->pending_bh);
  2450. return ret;
  2451. }
  2452. /* Called to print information about devices
  2453. */
  2454. static int mgslpc_read_proc(char *page, char **start, off_t off, int count,
  2455. int *eof, void *data)
  2456. {
  2457. int len = 0, l;
  2458. off_t begin = 0;
  2459. MGSLPC_INFO *info;
  2460. len += sprintf(page, "synclink driver:%s\n", driver_version);
  2461. info = mgslpc_device_list;
  2462. while( info ) {
  2463. l = line_info(page + len, info);
  2464. len += l;
  2465. if (len+begin > off+count)
  2466. goto done;
  2467. if (len+begin < off) {
  2468. begin += len;
  2469. len = 0;
  2470. }
  2471. info = info->next_device;
  2472. }
  2473. *eof = 1;
  2474. done:
  2475. if (off >= len+begin)
  2476. return 0;
  2477. *start = page + (off-begin);
  2478. return ((count < begin+len-off) ? count : begin+len-off);
  2479. }
  2480. int rx_alloc_buffers(MGSLPC_INFO *info)
  2481. {
  2482. /* each buffer has header and data */
  2483. info->rx_buf_size = sizeof(RXBUF) + info->max_frame_size;
  2484. /* calculate total allocation size for 8 buffers */
  2485. info->rx_buf_total_size = info->rx_buf_size * 8;
  2486. /* limit total allocated memory */
  2487. if (info->rx_buf_total_size > 0x10000)
  2488. info->rx_buf_total_size = 0x10000;
  2489. /* calculate number of buffers */
  2490. info->rx_buf_count = info->rx_buf_total_size / info->rx_buf_size;
  2491. info->rx_buf = kmalloc(info->rx_buf_total_size, GFP_KERNEL);
  2492. if (info->rx_buf == NULL)
  2493. return -ENOMEM;
  2494. rx_reset_buffers(info);
  2495. return 0;
  2496. }
  2497. void rx_free_buffers(MGSLPC_INFO *info)
  2498. {
  2499. if (info->rx_buf)
  2500. kfree(info->rx_buf);
  2501. info->rx_buf = NULL;
  2502. }
  2503. int claim_resources(MGSLPC_INFO *info)
  2504. {
  2505. if (rx_alloc_buffers(info) < 0 ) {
  2506. printk( "Cant allocate rx buffer %s\n", info->device_name);
  2507. release_resources(info);
  2508. return -ENODEV;
  2509. }
  2510. return 0;
  2511. }
  2512. void release_resources(MGSLPC_INFO *info)
  2513. {
  2514. if (debug_level >= DEBUG_LEVEL_INFO)
  2515. printk("release_resources(%s)\n", info->device_name);
  2516. rx_free_buffers(info);
  2517. }
  2518. /* Add the specified device instance data structure to the
  2519. * global linked list of devices and increment the device count.
  2520. *
  2521. * Arguments: info pointer to device instance data
  2522. */
  2523. void mgslpc_add_device(MGSLPC_INFO *info)
  2524. {
  2525. info->next_device = NULL;
  2526. info->line = mgslpc_device_count;
  2527. sprintf(info->device_name,"ttySLP%d",info->line);
  2528. if (info->line < MAX_DEVICE_COUNT) {
  2529. if (maxframe[info->line])
  2530. info->max_frame_size = maxframe[info->line];
  2531. info->dosyncppp = dosyncppp[info->line];
  2532. }
  2533. mgslpc_device_count++;
  2534. if (!mgslpc_device_list)
  2535. mgslpc_device_list = info;
  2536. else {
  2537. MGSLPC_INFO *current_dev = mgslpc_device_list;
  2538. while( current_dev->next_device )
  2539. current_dev = current_dev->next_device;
  2540. current_dev->next_device = info;
  2541. }
  2542. if (info->max_frame_size < 4096)
  2543. info->max_frame_size = 4096;
  2544. else if (info->max_frame_size > 65535)
  2545. info->max_frame_size = 65535;
  2546. printk( "SyncLink PC Card %s:IO=%04X IRQ=%d\n",
  2547. info->device_name, info->io_base, info->irq_level);
  2548. #ifdef CONFIG_HDLC
  2549. hdlcdev_init(info);
  2550. #endif
  2551. }
  2552. void mgslpc_remove_device(MGSLPC_INFO *remove_info)
  2553. {
  2554. MGSLPC_INFO *info = mgslpc_device_list;
  2555. MGSLPC_INFO *last = NULL;
  2556. while(info) {
  2557. if (info == remove_info) {
  2558. if (last)
  2559. last->next_device = info->next_device;
  2560. else
  2561. mgslpc_device_list = info->next_device;
  2562. #ifdef CONFIG_HDLC
  2563. hdlcdev_exit(info);
  2564. #endif
  2565. release_resources(info);
  2566. kfree(info);
  2567. mgslpc_device_count--;
  2568. return;
  2569. }
  2570. last = info;
  2571. info = info->next_device;
  2572. }
  2573. }
  2574. static struct pcmcia_device_id mgslpc_ids[] = {
  2575. PCMCIA_DEVICE_MANF_CARD(0x02c5, 0x0050),
  2576. PCMCIA_DEVICE_NULL
  2577. };
  2578. MODULE_DEVICE_TABLE(pcmcia, mgslpc_ids);
  2579. static struct pcmcia_driver mgslpc_driver = {
  2580. .owner = THIS_MODULE,
  2581. .drv = {
  2582. .name = "synclink_cs",
  2583. },
  2584. .attach = mgslpc_attach,
  2585. .event = mgslpc_event,
  2586. .detach = mgslpc_detach,
  2587. .id_table = mgslpc_ids,
  2588. };
  2589. static struct tty_operations mgslpc_ops = {
  2590. .open = mgslpc_open,
  2591. .close = mgslpc_close,
  2592. .write = mgslpc_write,
  2593. .put_char = mgslpc_put_char,
  2594. .flush_chars = mgslpc_flush_chars,
  2595. .write_room = mgslpc_write_room,
  2596. .chars_in_buffer = mgslpc_chars_in_buffer,
  2597. .flush_buffer = mgslpc_flush_buffer,
  2598. .ioctl = mgslpc_ioctl,
  2599. .throttle = mgslpc_throttle,
  2600. .unthrottle = mgslpc_unthrottle,
  2601. .send_xchar = mgslpc_send_xchar,
  2602. .break_ctl = mgslpc_break,
  2603. .wait_until_sent = mgslpc_wait_until_sent,
  2604. .read_proc = mgslpc_read_proc,
  2605. .set_termios = mgslpc_set_termios,
  2606. .stop = tx_pause,
  2607. .start = tx_release,
  2608. .hangup = mgslpc_hangup,
  2609. .tiocmget = tiocmget,
  2610. .tiocmset = tiocmset,
  2611. };
  2612. static void synclink_cs_cleanup(void)
  2613. {
  2614. int rc;
  2615. printk("Unloading %s: version %s\n", driver_name, driver_version);
  2616. while(mgslpc_device_list)
  2617. mgslpc_remove_device(mgslpc_device_list);
  2618. if (serial_driver) {
  2619. if ((rc = tty_unregister_driver(serial_driver)))
  2620. printk("%s(%d) failed to unregister tty driver err=%d\n",
  2621. __FILE__,__LINE__,rc);
  2622. put_tty_driver(serial_driver);
  2623. }
  2624. pcmcia_unregister_driver(&mgslpc_driver);
  2625. BUG_ON(dev_list != NULL);
  2626. }
  2627. static int __init synclink_cs_init(void)
  2628. {
  2629. int rc;
  2630. if (break_on_load) {
  2631. mgslpc_get_text_ptr();
  2632. BREAKPOINT();
  2633. }
  2634. printk("%s %s\n", driver_name, driver_version);
  2635. if ((rc = pcmcia_register_driver(&mgslpc_driver)) < 0)
  2636. return rc;
  2637. serial_driver = alloc_tty_driver(MAX_DEVICE_COUNT);
  2638. if (!serial_driver) {
  2639. rc = -ENOMEM;
  2640. goto error;
  2641. }
  2642. /* Initialize the tty_driver structure */
  2643. serial_driver->owner = THIS_MODULE;
  2644. serial_driver->driver_name = "synclink_cs";
  2645. serial_driver->name = "ttySLP";
  2646. serial_driver->major = ttymajor;
  2647. serial_driver->minor_start = 64;
  2648. serial_driver->type = TTY_DRIVER_TYPE_SERIAL;
  2649. serial_driver->subtype = SERIAL_TYPE_NORMAL;
  2650. serial_driver->init_termios = tty_std_termios;
  2651. serial_driver->init_termios.c_cflag =
  2652. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  2653. serial_driver->flags = TTY_DRIVER_REAL_RAW;
  2654. tty_set_operations(serial_driver, &mgslpc_ops);
  2655. if ((rc = tty_register_driver(serial_driver)) < 0) {
  2656. printk("%s(%d):Couldn't register serial driver\n",
  2657. __FILE__,__LINE__);
  2658. put_tty_driver(serial_driver);
  2659. serial_driver = NULL;
  2660. goto error;
  2661. }
  2662. printk("%s %s, tty major#%d\n",
  2663. driver_name, driver_version,
  2664. serial_driver->major);
  2665. return 0;
  2666. error:
  2667. synclink_cs_cleanup();
  2668. return rc;
  2669. }
  2670. static void __exit synclink_cs_exit(void)
  2671. {
  2672. synclink_cs_cleanup();
  2673. }
  2674. module_init(synclink_cs_init);
  2675. module_exit(synclink_cs_exit);
  2676. static void mgslpc_set_rate(MGSLPC_INFO *info, unsigned char channel, unsigned int rate)
  2677. {
  2678. unsigned int M, N;
  2679. unsigned char val;
  2680. /* note:standard BRG mode is broken in V3.2 chip
  2681. * so enhanced mode is always used
  2682. */
  2683. if (rate) {
  2684. N = 3686400 / rate;
  2685. if (!N)
  2686. N = 1;
  2687. N >>= 1;
  2688. for (M = 1; N > 64 && M < 16; M++)
  2689. N >>= 1;
  2690. N--;
  2691. /* BGR[5..0] = N
  2692. * BGR[9..6] = M
  2693. * BGR[7..0] contained in BGR register
  2694. * BGR[9..8] contained in CCR2[7..6]
  2695. * divisor = (N+1)*2^M
  2696. *
  2697. * Note: M *must* not be zero (causes asymetric duty cycle)
  2698. */
  2699. write_reg(info, (unsigned char) (channel + BGR),
  2700. (unsigned char) ((M << 6) + N));
  2701. val = read_reg(info, (unsigned char) (channel + CCR2)) & 0x3f;
  2702. val |= ((M << 4) & 0xc0);
  2703. write_reg(info, (unsigned char) (channel + CCR2), val);
  2704. }
  2705. }
  2706. /* Enabled the AUX clock output at the specified frequency.
  2707. */
  2708. static void enable_auxclk(MGSLPC_INFO *info)
  2709. {
  2710. unsigned char val;
  2711. /* MODE
  2712. *
  2713. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2714. * 05 ADM Address Mode, 0 = no addr recognition
  2715. * 04 TMD Timer Mode, 0 = external
  2716. * 03 RAC Receiver Active, 0 = inactive
  2717. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2718. * 01 TRS Timer Resolution, 1=512
  2719. * 00 TLP Test Loop, 0 = no loop
  2720. *
  2721. * 1000 0010
  2722. */
  2723. val = 0x82;
  2724. /* channel B RTS is used to enable AUXCLK driver on SP505 */
  2725. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2726. val |= BIT2;
  2727. write_reg(info, CHB + MODE, val);
  2728. /* CCR0
  2729. *
  2730. * 07 PU Power Up, 1=active, 0=power down
  2731. * 06 MCE Master Clock Enable, 1=enabled
  2732. * 05 Reserved, 0
  2733. * 04..02 SC[2..0] Encoding
  2734. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2735. *
  2736. * 11000000
  2737. */
  2738. write_reg(info, CHB + CCR0, 0xc0);
  2739. /* CCR1
  2740. *
  2741. * 07 SFLG Shared Flag, 0 = disable shared flags
  2742. * 06 GALP Go Active On Loop, 0 = not used
  2743. * 05 GLP Go On Loop, 0 = not used
  2744. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2745. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2746. * 02..00 CM[2..0] Clock Mode
  2747. *
  2748. * 0001 0111
  2749. */
  2750. write_reg(info, CHB + CCR1, 0x17);
  2751. /* CCR2 (Channel B)
  2752. *
  2753. * 07..06 BGR[9..8] Baud rate bits 9..8
  2754. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2755. * 04 SSEL Clock source select, 1=submode b
  2756. * 03 TOE 0=TxCLK is input, 1=TxCLK is output
  2757. * 02 RWX Read/Write Exchange 0=disabled
  2758. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2759. * 00 DIV, data inversion 0=disabled, 1=enabled
  2760. *
  2761. * 0011 1000
  2762. */
  2763. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2764. write_reg(info, CHB + CCR2, 0x38);
  2765. else
  2766. write_reg(info, CHB + CCR2, 0x30);
  2767. /* CCR4
  2768. *
  2769. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2770. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2771. * 05 TST1 Test Pin, 0=normal operation
  2772. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2773. * 03..02 Reserved, must be 0
  2774. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2775. *
  2776. * 0101 0000
  2777. */
  2778. write_reg(info, CHB + CCR4, 0x50);
  2779. /* if auxclk not enabled, set internal BRG so
  2780. * CTS transitions can be detected (requires TxC)
  2781. */
  2782. if (info->params.mode == MGSL_MODE_HDLC && info->params.clock_speed)
  2783. mgslpc_set_rate(info, CHB, info->params.clock_speed);
  2784. else
  2785. mgslpc_set_rate(info, CHB, 921600);
  2786. }
  2787. static void loopback_enable(MGSLPC_INFO *info)
  2788. {
  2789. unsigned char val;
  2790. /* CCR1:02..00 CM[2..0] Clock Mode = 111 (clock mode 7) */
  2791. val = read_reg(info, CHA + CCR1) | (BIT2 + BIT1 + BIT0);
  2792. write_reg(info, CHA + CCR1, val);
  2793. /* CCR2:04 SSEL Clock source select, 1=submode b */
  2794. val = read_reg(info, CHA + CCR2) | (BIT4 + BIT5);
  2795. write_reg(info, CHA + CCR2, val);
  2796. /* set LinkSpeed if available, otherwise default to 2Mbps */
  2797. if (info->params.clock_speed)
  2798. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2799. else
  2800. mgslpc_set_rate(info, CHA, 1843200);
  2801. /* MODE:00 TLP Test Loop, 1=loopback enabled */
  2802. val = read_reg(info, CHA + MODE) | BIT0;
  2803. write_reg(info, CHA + MODE, val);
  2804. }
  2805. void hdlc_mode(MGSLPC_INFO *info)
  2806. {
  2807. unsigned char val;
  2808. unsigned char clkmode, clksubmode;
  2809. /* disable all interrupts */
  2810. irq_disable(info, CHA, 0xffff);
  2811. irq_disable(info, CHB, 0xffff);
  2812. port_irq_disable(info, 0xff);
  2813. /* assume clock mode 0a, rcv=RxC xmt=TxC */
  2814. clkmode = clksubmode = 0;
  2815. if (info->params.flags & HDLC_FLAG_RXC_DPLL
  2816. && info->params.flags & HDLC_FLAG_TXC_DPLL) {
  2817. /* clock mode 7a, rcv = DPLL, xmt = DPLL */
  2818. clkmode = 7;
  2819. } else if (info->params.flags & HDLC_FLAG_RXC_BRG
  2820. && info->params.flags & HDLC_FLAG_TXC_BRG) {
  2821. /* clock mode 7b, rcv = BRG, xmt = BRG */
  2822. clkmode = 7;
  2823. clksubmode = 1;
  2824. } else if (info->params.flags & HDLC_FLAG_RXC_DPLL) {
  2825. if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2826. /* clock mode 6b, rcv = DPLL, xmt = BRG/16 */
  2827. clkmode = 6;
  2828. clksubmode = 1;
  2829. } else {
  2830. /* clock mode 6a, rcv = DPLL, xmt = TxC */
  2831. clkmode = 6;
  2832. }
  2833. } else if (info->params.flags & HDLC_FLAG_TXC_BRG) {
  2834. /* clock mode 0b, rcv = RxC, xmt = BRG */
  2835. clksubmode = 1;
  2836. }
  2837. /* MODE
  2838. *
  2839. * 07..06 MDS[1..0] 10 = transparent HDLC mode
  2840. * 05 ADM Address Mode, 0 = no addr recognition
  2841. * 04 TMD Timer Mode, 0 = external
  2842. * 03 RAC Receiver Active, 0 = inactive
  2843. * 02 RTS 0=RTS active during xmit, 1=RTS always active
  2844. * 01 TRS Timer Resolution, 1=512
  2845. * 00 TLP Test Loop, 0 = no loop
  2846. *
  2847. * 1000 0010
  2848. */
  2849. val = 0x82;
  2850. if (info->params.loopback)
  2851. val |= BIT0;
  2852. /* preserve RTS state */
  2853. if (info->serial_signals & SerialSignal_RTS)
  2854. val |= BIT2;
  2855. write_reg(info, CHA + MODE, val);
  2856. /* CCR0
  2857. *
  2858. * 07 PU Power Up, 1=active, 0=power down
  2859. * 06 MCE Master Clock Enable, 1=enabled
  2860. * 05 Reserved, 0
  2861. * 04..02 SC[2..0] Encoding
  2862. * 01..00 SM[1..0] Serial Mode, 00=HDLC
  2863. *
  2864. * 11000000
  2865. */
  2866. val = 0xc0;
  2867. switch (info->params.encoding)
  2868. {
  2869. case HDLC_ENCODING_NRZI:
  2870. val |= BIT3;
  2871. break;
  2872. case HDLC_ENCODING_BIPHASE_SPACE:
  2873. val |= BIT4;
  2874. break; // FM0
  2875. case HDLC_ENCODING_BIPHASE_MARK:
  2876. val |= BIT4 + BIT2;
  2877. break; // FM1
  2878. case HDLC_ENCODING_BIPHASE_LEVEL:
  2879. val |= BIT4 + BIT3;
  2880. break; // Manchester
  2881. }
  2882. write_reg(info, CHA + CCR0, val);
  2883. /* CCR1
  2884. *
  2885. * 07 SFLG Shared Flag, 0 = disable shared flags
  2886. * 06 GALP Go Active On Loop, 0 = not used
  2887. * 05 GLP Go On Loop, 0 = not used
  2888. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  2889. * 03 ITF Interframe Time Fill, 0=mark, 1=flag
  2890. * 02..00 CM[2..0] Clock Mode
  2891. *
  2892. * 0001 0000
  2893. */
  2894. val = 0x10 + clkmode;
  2895. write_reg(info, CHA + CCR1, val);
  2896. /* CCR2
  2897. *
  2898. * 07..06 BGR[9..8] Baud rate bits 9..8
  2899. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  2900. * 04 SSEL Clock source select, 1=submode b
  2901. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  2902. * 02 RWX Read/Write Exchange 0=disabled
  2903. * 01 C32, CRC select, 0=CRC-16, 1=CRC-32
  2904. * 00 DIV, data inversion 0=disabled, 1=enabled
  2905. *
  2906. * 0000 0000
  2907. */
  2908. val = 0x00;
  2909. if (clkmode == 2 || clkmode == 3 || clkmode == 6
  2910. || clkmode == 7 || (clkmode == 0 && clksubmode == 1))
  2911. val |= BIT5;
  2912. if (clksubmode)
  2913. val |= BIT4;
  2914. if (info->params.crc_type == HDLC_CRC_32_CCITT)
  2915. val |= BIT1;
  2916. if (info->params.encoding == HDLC_ENCODING_NRZB)
  2917. val |= BIT0;
  2918. write_reg(info, CHA + CCR2, val);
  2919. /* CCR3
  2920. *
  2921. * 07..06 PRE[1..0] Preamble count 00=1, 01=2, 10=4, 11=8
  2922. * 05 EPT Enable preamble transmission, 1=enabled
  2923. * 04 RADD Receive address pushed to FIFO, 0=disabled
  2924. * 03 CRL CRC Reset Level, 0=FFFF
  2925. * 02 RCRC Rx CRC 0=On 1=Off
  2926. * 01 TCRC Tx CRC 0=On 1=Off
  2927. * 00 PSD DPLL Phase Shift Disable
  2928. *
  2929. * 0000 0000
  2930. */
  2931. val = 0x00;
  2932. if (info->params.crc_type == HDLC_CRC_NONE)
  2933. val |= BIT2 + BIT1;
  2934. if (info->params.preamble != HDLC_PREAMBLE_PATTERN_NONE)
  2935. val |= BIT5;
  2936. switch (info->params.preamble_length)
  2937. {
  2938. case HDLC_PREAMBLE_LENGTH_16BITS:
  2939. val |= BIT6;
  2940. break;
  2941. case HDLC_PREAMBLE_LENGTH_32BITS:
  2942. val |= BIT6;
  2943. break;
  2944. case HDLC_PREAMBLE_LENGTH_64BITS:
  2945. val |= BIT7 + BIT6;
  2946. break;
  2947. }
  2948. write_reg(info, CHA + CCR3, val);
  2949. /* PRE - Preamble pattern */
  2950. val = 0;
  2951. switch (info->params.preamble)
  2952. {
  2953. case HDLC_PREAMBLE_PATTERN_FLAGS: val = 0x7e; break;
  2954. case HDLC_PREAMBLE_PATTERN_10: val = 0xaa; break;
  2955. case HDLC_PREAMBLE_PATTERN_01: val = 0x55; break;
  2956. case HDLC_PREAMBLE_PATTERN_ONES: val = 0xff; break;
  2957. }
  2958. write_reg(info, CHA + PRE, val);
  2959. /* CCR4
  2960. *
  2961. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  2962. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  2963. * 05 TST1 Test Pin, 0=normal operation
  2964. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  2965. * 03..02 Reserved, must be 0
  2966. * 01..00 RFT[1..0] RxFIFO Threshold 00=32 bytes
  2967. *
  2968. * 0101 0000
  2969. */
  2970. val = 0x50;
  2971. write_reg(info, CHA + CCR4, val);
  2972. if (info->params.flags & HDLC_FLAG_RXC_DPLL)
  2973. mgslpc_set_rate(info, CHA, info->params.clock_speed * 16);
  2974. else
  2975. mgslpc_set_rate(info, CHA, info->params.clock_speed);
  2976. /* RLCR Receive length check register
  2977. *
  2978. * 7 1=enable receive length check
  2979. * 6..0 Max frame length = (RL + 1) * 32
  2980. */
  2981. write_reg(info, CHA + RLCR, 0);
  2982. /* XBCH Transmit Byte Count High
  2983. *
  2984. * 07 DMA mode, 0 = interrupt driven
  2985. * 06 NRM, 0=ABM (ignored)
  2986. * 05 CAS Carrier Auto Start
  2987. * 04 XC Transmit Continuously (ignored)
  2988. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  2989. *
  2990. * 0000 0000
  2991. */
  2992. val = 0x00;
  2993. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  2994. val |= BIT5;
  2995. write_reg(info, CHA + XBCH, val);
  2996. enable_auxclk(info);
  2997. if (info->params.loopback || info->testing_irq)
  2998. loopback_enable(info);
  2999. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3000. {
  3001. irq_enable(info, CHB, IRQ_CTS);
  3002. /* PVR[3] 1=AUTO CTS active */
  3003. set_reg_bits(info, CHA + PVR, BIT3);
  3004. } else
  3005. clear_reg_bits(info, CHA + PVR, BIT3);
  3006. irq_enable(info, CHA,
  3007. IRQ_RXEOM + IRQ_RXFIFO + IRQ_ALLSENT +
  3008. IRQ_UNDERRUN + IRQ_TXFIFO);
  3009. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3010. wait_command_complete(info, CHA);
  3011. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3012. /* Master clock mode enabled above to allow reset commands
  3013. * to complete even if no data clocks are present.
  3014. *
  3015. * Disable master clock mode for normal communications because
  3016. * V3.2 of the ESCC2 has a bug that prevents the transmit all sent
  3017. * IRQ when in master clock mode.
  3018. *
  3019. * Leave master clock mode enabled for IRQ test because the
  3020. * timer IRQ used by the test can only happen in master clock mode.
  3021. */
  3022. if (!info->testing_irq)
  3023. clear_reg_bits(info, CHA + CCR0, BIT6);
  3024. tx_set_idle(info);
  3025. tx_stop(info);
  3026. rx_stop(info);
  3027. }
  3028. void rx_stop(MGSLPC_INFO *info)
  3029. {
  3030. if (debug_level >= DEBUG_LEVEL_ISR)
  3031. printk("%s(%d):rx_stop(%s)\n",
  3032. __FILE__,__LINE__, info->device_name );
  3033. /* MODE:03 RAC Receiver Active, 0=inactive */
  3034. clear_reg_bits(info, CHA + MODE, BIT3);
  3035. info->rx_enabled = 0;
  3036. info->rx_overflow = 0;
  3037. }
  3038. void rx_start(MGSLPC_INFO *info)
  3039. {
  3040. if (debug_level >= DEBUG_LEVEL_ISR)
  3041. printk("%s(%d):rx_start(%s)\n",
  3042. __FILE__,__LINE__, info->device_name );
  3043. rx_reset_buffers(info);
  3044. info->rx_enabled = 0;
  3045. info->rx_overflow = 0;
  3046. /* MODE:03 RAC Receiver Active, 1=active */
  3047. set_reg_bits(info, CHA + MODE, BIT3);
  3048. info->rx_enabled = 1;
  3049. }
  3050. void tx_start(MGSLPC_INFO *info)
  3051. {
  3052. if (debug_level >= DEBUG_LEVEL_ISR)
  3053. printk("%s(%d):tx_start(%s)\n",
  3054. __FILE__,__LINE__, info->device_name );
  3055. if (info->tx_count) {
  3056. /* If auto RTS enabled and RTS is inactive, then assert */
  3057. /* RTS and set a flag indicating that the driver should */
  3058. /* negate RTS when the transmission completes. */
  3059. info->drop_rts_on_tx_done = 0;
  3060. if (info->params.flags & HDLC_FLAG_AUTO_RTS) {
  3061. get_signals(info);
  3062. if (!(info->serial_signals & SerialSignal_RTS)) {
  3063. info->serial_signals |= SerialSignal_RTS;
  3064. set_signals(info);
  3065. info->drop_rts_on_tx_done = 1;
  3066. }
  3067. }
  3068. if (info->params.mode == MGSL_MODE_ASYNC) {
  3069. if (!info->tx_active) {
  3070. info->tx_active = 1;
  3071. tx_ready(info);
  3072. }
  3073. } else {
  3074. info->tx_active = 1;
  3075. tx_ready(info);
  3076. info->tx_timer.expires = jiffies + msecs_to_jiffies(5000);
  3077. add_timer(&info->tx_timer);
  3078. }
  3079. }
  3080. if (!info->tx_enabled)
  3081. info->tx_enabled = 1;
  3082. }
  3083. void tx_stop(MGSLPC_INFO *info)
  3084. {
  3085. if (debug_level >= DEBUG_LEVEL_ISR)
  3086. printk("%s(%d):tx_stop(%s)\n",
  3087. __FILE__,__LINE__, info->device_name );
  3088. del_timer(&info->tx_timer);
  3089. info->tx_enabled = 0;
  3090. info->tx_active = 0;
  3091. }
  3092. /* Reset the adapter to a known state and prepare it for further use.
  3093. */
  3094. void reset_device(MGSLPC_INFO *info)
  3095. {
  3096. /* power up both channels (set BIT7) */
  3097. write_reg(info, CHA + CCR0, 0x80);
  3098. write_reg(info, CHB + CCR0, 0x80);
  3099. write_reg(info, CHA + MODE, 0);
  3100. write_reg(info, CHB + MODE, 0);
  3101. /* disable all interrupts */
  3102. irq_disable(info, CHA, 0xffff);
  3103. irq_disable(info, CHB, 0xffff);
  3104. port_irq_disable(info, 0xff);
  3105. /* PCR Port Configuration Register
  3106. *
  3107. * 07..04 DEC[3..0] Serial I/F select outputs
  3108. * 03 output, 1=AUTO CTS control enabled
  3109. * 02 RI Ring Indicator input 0=active
  3110. * 01 DSR input 0=active
  3111. * 00 DTR output 0=active
  3112. *
  3113. * 0000 0110
  3114. */
  3115. write_reg(info, PCR, 0x06);
  3116. /* PVR Port Value Register
  3117. *
  3118. * 07..04 DEC[3..0] Serial I/F select (0000=disabled)
  3119. * 03 AUTO CTS output 1=enabled
  3120. * 02 RI Ring Indicator input
  3121. * 01 DSR input
  3122. * 00 DTR output (1=inactive)
  3123. *
  3124. * 0000 0001
  3125. */
  3126. // write_reg(info, PVR, PVR_DTR);
  3127. /* IPC Interrupt Port Configuration
  3128. *
  3129. * 07 VIS 1=Masked interrupts visible
  3130. * 06..05 Reserved, 0
  3131. * 04..03 SLA Slave address, 00 ignored
  3132. * 02 CASM Cascading Mode, 1=daisy chain
  3133. * 01..00 IC[1..0] Interrupt Config, 01=push-pull output, active low
  3134. *
  3135. * 0000 0101
  3136. */
  3137. write_reg(info, IPC, 0x05);
  3138. }
  3139. void async_mode(MGSLPC_INFO *info)
  3140. {
  3141. unsigned char val;
  3142. /* disable all interrupts */
  3143. irq_disable(info, CHA, 0xffff);
  3144. irq_disable(info, CHB, 0xffff);
  3145. port_irq_disable(info, 0xff);
  3146. /* MODE
  3147. *
  3148. * 07 Reserved, 0
  3149. * 06 FRTS RTS State, 0=active
  3150. * 05 FCTS Flow Control on CTS
  3151. * 04 FLON Flow Control Enable
  3152. * 03 RAC Receiver Active, 0 = inactive
  3153. * 02 RTS 0=Auto RTS, 1=manual RTS
  3154. * 01 TRS Timer Resolution, 1=512
  3155. * 00 TLP Test Loop, 0 = no loop
  3156. *
  3157. * 0000 0110
  3158. */
  3159. val = 0x06;
  3160. if (info->params.loopback)
  3161. val |= BIT0;
  3162. /* preserve RTS state */
  3163. if (!(info->serial_signals & SerialSignal_RTS))
  3164. val |= BIT6;
  3165. write_reg(info, CHA + MODE, val);
  3166. /* CCR0
  3167. *
  3168. * 07 PU Power Up, 1=active, 0=power down
  3169. * 06 MCE Master Clock Enable, 1=enabled
  3170. * 05 Reserved, 0
  3171. * 04..02 SC[2..0] Encoding, 000=NRZ
  3172. * 01..00 SM[1..0] Serial Mode, 11=Async
  3173. *
  3174. * 1000 0011
  3175. */
  3176. write_reg(info, CHA + CCR0, 0x83);
  3177. /* CCR1
  3178. *
  3179. * 07..05 Reserved, 0
  3180. * 04 ODS Output Driver Select, 1=TxD is push-pull output
  3181. * 03 BCR Bit Clock Rate, 1=16x
  3182. * 02..00 CM[2..0] Clock Mode, 111=BRG
  3183. *
  3184. * 0001 1111
  3185. */
  3186. write_reg(info, CHA + CCR1, 0x1f);
  3187. /* CCR2 (channel A)
  3188. *
  3189. * 07..06 BGR[9..8] Baud rate bits 9..8
  3190. * 05 BDF Baud rate divisor factor, 0=1, 1=BGR value
  3191. * 04 SSEL Clock source select, 1=submode b
  3192. * 03 TOE 0=TxCLK is input, 0=TxCLK is input
  3193. * 02 RWX Read/Write Exchange 0=disabled
  3194. * 01 Reserved, 0
  3195. * 00 DIV, data inversion 0=disabled, 1=enabled
  3196. *
  3197. * 0001 0000
  3198. */
  3199. write_reg(info, CHA + CCR2, 0x10);
  3200. /* CCR3
  3201. *
  3202. * 07..01 Reserved, 0
  3203. * 00 PSD DPLL Phase Shift Disable
  3204. *
  3205. * 0000 0000
  3206. */
  3207. write_reg(info, CHA + CCR3, 0);
  3208. /* CCR4
  3209. *
  3210. * 07 MCK4 Master Clock Divide by 4, 1=enabled
  3211. * 06 EBRG Enhanced Baud Rate Generator Mode, 1=enabled
  3212. * 05 TST1 Test Pin, 0=normal operation
  3213. * 04 ICD Ivert Carrier Detect, 1=enabled (active low)
  3214. * 03..00 Reserved, must be 0
  3215. *
  3216. * 0101 0000
  3217. */
  3218. write_reg(info, CHA + CCR4, 0x50);
  3219. mgslpc_set_rate(info, CHA, info->params.data_rate * 16);
  3220. /* DAFO Data Format
  3221. *
  3222. * 07 Reserved, 0
  3223. * 06 XBRK transmit break, 0=normal operation
  3224. * 05 Stop bits (0=1, 1=2)
  3225. * 04..03 PAR[1..0] Parity (01=odd, 10=even)
  3226. * 02 PAREN Parity Enable
  3227. * 01..00 CHL[1..0] Character Length (00=8, 01=7)
  3228. *
  3229. */
  3230. val = 0x00;
  3231. if (info->params.data_bits != 8)
  3232. val |= BIT0; /* 7 bits */
  3233. if (info->params.stop_bits != 1)
  3234. val |= BIT5;
  3235. if (info->params.parity != ASYNC_PARITY_NONE)
  3236. {
  3237. val |= BIT2; /* Parity enable */
  3238. if (info->params.parity == ASYNC_PARITY_ODD)
  3239. val |= BIT3;
  3240. else
  3241. val |= BIT4;
  3242. }
  3243. write_reg(info, CHA + DAFO, val);
  3244. /* RFC Rx FIFO Control
  3245. *
  3246. * 07 Reserved, 0
  3247. * 06 DPS, 1=parity bit not stored in data byte
  3248. * 05 DXS, 0=all data stored in FIFO (including XON/XOFF)
  3249. * 04 RFDF Rx FIFO Data Format, 1=status byte stored in FIFO
  3250. * 03..02 RFTH[1..0], rx threshold, 11=16 status + 16 data byte
  3251. * 01 Reserved, 0
  3252. * 00 TCDE Terminate Char Detect Enable, 0=disabled
  3253. *
  3254. * 0101 1100
  3255. */
  3256. write_reg(info, CHA + RFC, 0x5c);
  3257. /* RLCR Receive length check register
  3258. *
  3259. * Max frame length = (RL + 1) * 32
  3260. */
  3261. write_reg(info, CHA + RLCR, 0);
  3262. /* XBCH Transmit Byte Count High
  3263. *
  3264. * 07 DMA mode, 0 = interrupt driven
  3265. * 06 NRM, 0=ABM (ignored)
  3266. * 05 CAS Carrier Auto Start
  3267. * 04 XC Transmit Continuously (ignored)
  3268. * 03..00 XBC[10..8] Transmit byte count bits 10..8
  3269. *
  3270. * 0000 0000
  3271. */
  3272. val = 0x00;
  3273. if (info->params.flags & HDLC_FLAG_AUTO_DCD)
  3274. val |= BIT5;
  3275. write_reg(info, CHA + XBCH, val);
  3276. if (info->params.flags & HDLC_FLAG_AUTO_CTS)
  3277. irq_enable(info, CHA, IRQ_CTS);
  3278. /* MODE:03 RAC Receiver Active, 1=active */
  3279. set_reg_bits(info, CHA + MODE, BIT3);
  3280. enable_auxclk(info);
  3281. if (info->params.flags & HDLC_FLAG_AUTO_CTS) {
  3282. irq_enable(info, CHB, IRQ_CTS);
  3283. /* PVR[3] 1=AUTO CTS active */
  3284. set_reg_bits(info, CHA + PVR, BIT3);
  3285. } else
  3286. clear_reg_bits(info, CHA + PVR, BIT3);
  3287. irq_enable(info, CHA,
  3288. IRQ_RXEOM + IRQ_RXFIFO + IRQ_BREAK_ON + IRQ_RXTIME +
  3289. IRQ_ALLSENT + IRQ_TXFIFO);
  3290. issue_command(info, CHA, CMD_TXRESET + CMD_RXRESET);
  3291. wait_command_complete(info, CHA);
  3292. read_reg16(info, CHA + ISR); /* clear pending IRQs */
  3293. }
  3294. /* Set the HDLC idle mode for the transmitter.
  3295. */
  3296. void tx_set_idle(MGSLPC_INFO *info)
  3297. {
  3298. /* Note: ESCC2 only supports flags and one idle modes */
  3299. if (info->idle_mode == HDLC_TXIDLE_FLAGS)
  3300. set_reg_bits(info, CHA + CCR1, BIT3);
  3301. else
  3302. clear_reg_bits(info, CHA + CCR1, BIT3);
  3303. }
  3304. /* get state of the V24 status (input) signals.
  3305. */
  3306. void get_signals(MGSLPC_INFO *info)
  3307. {
  3308. unsigned char status = 0;
  3309. /* preserve DTR and RTS */
  3310. info->serial_signals &= SerialSignal_DTR + SerialSignal_RTS;
  3311. if (read_reg(info, CHB + VSTR) & BIT7)
  3312. info->serial_signals |= SerialSignal_DCD;
  3313. if (read_reg(info, CHB + STAR) & BIT1)
  3314. info->serial_signals |= SerialSignal_CTS;
  3315. status = read_reg(info, CHA + PVR);
  3316. if (!(status & PVR_RI))
  3317. info->serial_signals |= SerialSignal_RI;
  3318. if (!(status & PVR_DSR))
  3319. info->serial_signals |= SerialSignal_DSR;
  3320. }
  3321. /* Set the state of DTR and RTS based on contents of
  3322. * serial_signals member of device extension.
  3323. */
  3324. void set_signals(MGSLPC_INFO *info)
  3325. {
  3326. unsigned char val;
  3327. val = read_reg(info, CHA + MODE);
  3328. if (info->params.mode == MGSL_MODE_ASYNC) {
  3329. if (info->serial_signals & SerialSignal_RTS)
  3330. val &= ~BIT6;
  3331. else
  3332. val |= BIT6;
  3333. } else {
  3334. if (info->serial_signals & SerialSignal_RTS)
  3335. val |= BIT2;
  3336. else
  3337. val &= ~BIT2;
  3338. }
  3339. write_reg(info, CHA + MODE, val);
  3340. if (info->serial_signals & SerialSignal_DTR)
  3341. clear_reg_bits(info, CHA + PVR, PVR_DTR);
  3342. else
  3343. set_reg_bits(info, CHA + PVR, PVR_DTR);
  3344. }
  3345. void rx_reset_buffers(MGSLPC_INFO *info)
  3346. {
  3347. RXBUF *buf;
  3348. int i;
  3349. info->rx_put = 0;
  3350. info->rx_get = 0;
  3351. info->rx_frame_count = 0;
  3352. for (i=0 ; i < info->rx_buf_count ; i++) {
  3353. buf = (RXBUF*)(info->rx_buf + (i * info->rx_buf_size));
  3354. buf->status = buf->count = 0;
  3355. }
  3356. }
  3357. /* Attempt to return a received HDLC frame
  3358. * Only frames received without errors are returned.
  3359. *
  3360. * Returns 1 if frame returned, otherwise 0
  3361. */
  3362. int rx_get_frame(MGSLPC_INFO *info)
  3363. {
  3364. unsigned short status;
  3365. RXBUF *buf;
  3366. unsigned int framesize = 0;
  3367. unsigned long flags;
  3368. struct tty_struct *tty = info->tty;
  3369. int return_frame = 0;
  3370. if (info->rx_frame_count == 0)
  3371. return 0;
  3372. buf = (RXBUF*)(info->rx_buf + (info->rx_get * info->rx_buf_size));
  3373. status = buf->status;
  3374. /* 07 VFR 1=valid frame
  3375. * 06 RDO 1=data overrun
  3376. * 05 CRC 1=OK, 0=error
  3377. * 04 RAB 1=frame aborted
  3378. */
  3379. if ((status & 0xf0) != 0xA0) {
  3380. if (!(status & BIT7) || (status & BIT4))
  3381. info->icount.rxabort++;
  3382. else if (status & BIT6)
  3383. info->icount.rxover++;
  3384. else if (!(status & BIT5)) {
  3385. info->icount.rxcrc++;
  3386. if (info->params.crc_type & HDLC_CRC_RETURN_EX)
  3387. return_frame = 1;
  3388. }
  3389. framesize = 0;
  3390. #ifdef CONFIG_HDLC
  3391. {
  3392. struct net_device_stats *stats = hdlc_stats(info->netdev);
  3393. stats->rx_errors++;
  3394. stats->rx_frame_errors++;
  3395. }
  3396. #endif
  3397. } else
  3398. return_frame = 1;
  3399. if (return_frame)
  3400. framesize = buf->count;
  3401. if (debug_level >= DEBUG_LEVEL_BH)
  3402. printk("%s(%d):rx_get_frame(%s) status=%04X size=%d\n",
  3403. __FILE__,__LINE__,info->device_name,status,framesize);
  3404. if (debug_level >= DEBUG_LEVEL_DATA)
  3405. trace_block(info, buf->data, framesize, 0);
  3406. if (framesize) {
  3407. if ((info->params.crc_type & HDLC_CRC_RETURN_EX &&
  3408. framesize+1 > info->max_frame_size) ||
  3409. framesize > info->max_frame_size)
  3410. info->icount.rxlong++;
  3411. else {
  3412. if (status & BIT5)
  3413. info->icount.rxok++;
  3414. if (info->params.crc_type & HDLC_CRC_RETURN_EX) {
  3415. *(buf->data + framesize) = status & BIT5 ? RX_OK:RX_CRC_ERROR;
  3416. ++framesize;
  3417. }
  3418. #ifdef CONFIG_HDLC
  3419. if (info->netcount)
  3420. hdlcdev_rx(info, buf->data, framesize);
  3421. else
  3422. #endif
  3423. ldisc_receive_buf(tty, buf->data, info->flag_buf, framesize);
  3424. }
  3425. }
  3426. spin_lock_irqsave(&info->lock,flags);
  3427. buf->status = buf->count = 0;
  3428. info->rx_frame_count--;
  3429. info->rx_get++;
  3430. if (info->rx_get >= info->rx_buf_count)
  3431. info->rx_get = 0;
  3432. spin_unlock_irqrestore(&info->lock,flags);
  3433. return 1;
  3434. }
  3435. BOOLEAN register_test(MGSLPC_INFO *info)
  3436. {
  3437. static unsigned char patterns[] =
  3438. { 0x00, 0xff, 0xaa, 0x55, 0x69, 0x96, 0x0f };
  3439. static unsigned int count = sizeof(patterns) / sizeof(patterns[0]);
  3440. unsigned int i;
  3441. BOOLEAN rc = TRUE;
  3442. unsigned long flags;
  3443. spin_lock_irqsave(&info->lock,flags);
  3444. reset_device(info);
  3445. for (i = 0; i < count; i++) {
  3446. write_reg(info, XAD1, patterns[i]);
  3447. write_reg(info, XAD2, patterns[(i + 1) % count]);
  3448. if ((read_reg(info, XAD1) != patterns[i]) ||
  3449. (read_reg(info, XAD2) != patterns[(i + 1) % count])) {
  3450. rc = FALSE;
  3451. break;
  3452. }
  3453. }
  3454. spin_unlock_irqrestore(&info->lock,flags);
  3455. return rc;
  3456. }
  3457. BOOLEAN irq_test(MGSLPC_INFO *info)
  3458. {
  3459. unsigned long end_time;
  3460. unsigned long flags;
  3461. spin_lock_irqsave(&info->lock,flags);
  3462. reset_device(info);
  3463. info->testing_irq = TRUE;
  3464. hdlc_mode(info);
  3465. info->irq_occurred = FALSE;
  3466. /* init hdlc mode */
  3467. irq_enable(info, CHA, IRQ_TIMER);
  3468. write_reg(info, CHA + TIMR, 0); /* 512 cycles */
  3469. issue_command(info, CHA, CMD_START_TIMER);
  3470. spin_unlock_irqrestore(&info->lock,flags);
  3471. end_time=100;
  3472. while(end_time-- && !info->irq_occurred) {
  3473. msleep_interruptible(10);
  3474. }
  3475. info->testing_irq = FALSE;
  3476. spin_lock_irqsave(&info->lock,flags);
  3477. reset_device(info);
  3478. spin_unlock_irqrestore(&info->lock,flags);
  3479. return info->irq_occurred ? TRUE : FALSE;
  3480. }
  3481. int adapter_test(MGSLPC_INFO *info)
  3482. {
  3483. if (!register_test(info)) {
  3484. info->init_error = DiagStatus_AddressFailure;
  3485. printk( "%s(%d):Register test failure for device %s Addr=%04X\n",
  3486. __FILE__,__LINE__,info->device_name, (unsigned short)(info->io_base) );
  3487. return -ENODEV;
  3488. }
  3489. if (!irq_test(info)) {
  3490. info->init_error = DiagStatus_IrqFailure;
  3491. printk( "%s(%d):Interrupt test failure for device %s IRQ=%d\n",
  3492. __FILE__,__LINE__,info->device_name, (unsigned short)(info->irq_level) );
  3493. return -ENODEV;
  3494. }
  3495. if (debug_level >= DEBUG_LEVEL_INFO)
  3496. printk("%s(%d):device %s passed diagnostics\n",
  3497. __FILE__,__LINE__,info->device_name);
  3498. return 0;
  3499. }
  3500. void trace_block(MGSLPC_INFO *info,const char* data, int count, int xmit)
  3501. {
  3502. int i;
  3503. int linecount;
  3504. if (xmit)
  3505. printk("%s tx data:\n",info->device_name);
  3506. else
  3507. printk("%s rx data:\n",info->device_name);
  3508. while(count) {
  3509. if (count > 16)
  3510. linecount = 16;
  3511. else
  3512. linecount = count;
  3513. for(i=0;i<linecount;i++)
  3514. printk("%02X ",(unsigned char)data[i]);
  3515. for(;i<17;i++)
  3516. printk(" ");
  3517. for(i=0;i<linecount;i++) {
  3518. if (data[i]>=040 && data[i]<=0176)
  3519. printk("%c",data[i]);
  3520. else
  3521. printk(".");
  3522. }
  3523. printk("\n");
  3524. data += linecount;
  3525. count -= linecount;
  3526. }
  3527. }
  3528. /* HDLC frame time out
  3529. * update stats and do tx completion processing
  3530. */
  3531. void tx_timeout(unsigned long context)
  3532. {
  3533. MGSLPC_INFO *info = (MGSLPC_INFO*)context;
  3534. unsigned long flags;
  3535. if ( debug_level >= DEBUG_LEVEL_INFO )
  3536. printk( "%s(%d):tx_timeout(%s)\n",
  3537. __FILE__,__LINE__,info->device_name);
  3538. if(info->tx_active &&
  3539. info->params.mode == MGSL_MODE_HDLC) {
  3540. info->icount.txtimeout++;
  3541. }
  3542. spin_lock_irqsave(&info->lock,flags);
  3543. info->tx_active = 0;
  3544. info->tx_count = info->tx_put = info->tx_get = 0;
  3545. spin_unlock_irqrestore(&info->lock,flags);
  3546. #ifdef CONFIG_HDLC
  3547. if (info->netcount)
  3548. hdlcdev_tx_done(info);
  3549. else
  3550. #endif
  3551. bh_transmit(info);
  3552. }
  3553. #ifdef CONFIG_HDLC
  3554. /**
  3555. * called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
  3556. * set encoding and frame check sequence (FCS) options
  3557. *
  3558. * dev pointer to network device structure
  3559. * encoding serial encoding setting
  3560. * parity FCS setting
  3561. *
  3562. * returns 0 if success, otherwise error code
  3563. */
  3564. static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
  3565. unsigned short parity)
  3566. {
  3567. MGSLPC_INFO *info = dev_to_port(dev);
  3568. unsigned char new_encoding;
  3569. unsigned short new_crctype;
  3570. /* return error if TTY interface open */
  3571. if (info->count)
  3572. return -EBUSY;
  3573. switch (encoding)
  3574. {
  3575. case ENCODING_NRZ: new_encoding = HDLC_ENCODING_NRZ; break;
  3576. case ENCODING_NRZI: new_encoding = HDLC_ENCODING_NRZI_SPACE; break;
  3577. case ENCODING_FM_MARK: new_encoding = HDLC_ENCODING_BIPHASE_MARK; break;
  3578. case ENCODING_FM_SPACE: new_encoding = HDLC_ENCODING_BIPHASE_SPACE; break;
  3579. case ENCODING_MANCHESTER: new_encoding = HDLC_ENCODING_BIPHASE_LEVEL; break;
  3580. default: return -EINVAL;
  3581. }
  3582. switch (parity)
  3583. {
  3584. case PARITY_NONE: new_crctype = HDLC_CRC_NONE; break;
  3585. case PARITY_CRC16_PR1_CCITT: new_crctype = HDLC_CRC_16_CCITT; break;
  3586. case PARITY_CRC32_PR1_CCITT: new_crctype = HDLC_CRC_32_CCITT; break;
  3587. default: return -EINVAL;
  3588. }
  3589. info->params.encoding = new_encoding;
  3590. info->params.crc_type = new_crctype;;
  3591. /* if network interface up, reprogram hardware */
  3592. if (info->netcount)
  3593. mgslpc_program_hw(info);
  3594. return 0;
  3595. }
  3596. /**
  3597. * called by generic HDLC layer to send frame
  3598. *
  3599. * skb socket buffer containing HDLC frame
  3600. * dev pointer to network device structure
  3601. *
  3602. * returns 0 if success, otherwise error code
  3603. */
  3604. static int hdlcdev_xmit(struct sk_buff *skb, struct net_device *dev)
  3605. {
  3606. MGSLPC_INFO *info = dev_to_port(dev);
  3607. struct net_device_stats *stats = hdlc_stats(dev);
  3608. unsigned long flags;
  3609. if (debug_level >= DEBUG_LEVEL_INFO)
  3610. printk(KERN_INFO "%s:hdlc_xmit(%s)\n",__FILE__,dev->name);
  3611. /* stop sending until this frame completes */
  3612. netif_stop_queue(dev);
  3613. /* copy data to device buffers */
  3614. memcpy(info->tx_buf, skb->data, skb->len);
  3615. info->tx_get = 0;
  3616. info->tx_put = info->tx_count = skb->len;
  3617. /* update network statistics */
  3618. stats->tx_packets++;
  3619. stats->tx_bytes += skb->len;
  3620. /* done with socket buffer, so free it */
  3621. dev_kfree_skb(skb);
  3622. /* save start time for transmit timeout detection */
  3623. dev->trans_start = jiffies;
  3624. /* start hardware transmitter if necessary */
  3625. spin_lock_irqsave(&info->lock,flags);
  3626. if (!info->tx_active)
  3627. tx_start(info);
  3628. spin_unlock_irqrestore(&info->lock,flags);
  3629. return 0;
  3630. }
  3631. /**
  3632. * called by network layer when interface enabled
  3633. * claim resources and initialize hardware
  3634. *
  3635. * dev pointer to network device structure
  3636. *
  3637. * returns 0 if success, otherwise error code
  3638. */
  3639. static int hdlcdev_open(struct net_device *dev)
  3640. {
  3641. MGSLPC_INFO *info = dev_to_port(dev);
  3642. int rc;
  3643. unsigned long flags;
  3644. if (debug_level >= DEBUG_LEVEL_INFO)
  3645. printk("%s:hdlcdev_open(%s)\n",__FILE__,dev->name);
  3646. /* generic HDLC layer open processing */
  3647. if ((rc = hdlc_open(dev)))
  3648. return rc;
  3649. /* arbitrate between network and tty opens */
  3650. spin_lock_irqsave(&info->netlock, flags);
  3651. if (info->count != 0 || info->netcount != 0) {
  3652. printk(KERN_WARNING "%s: hdlc_open returning busy\n", dev->name);
  3653. spin_unlock_irqrestore(&info->netlock, flags);
  3654. return -EBUSY;
  3655. }
  3656. info->netcount=1;
  3657. spin_unlock_irqrestore(&info->netlock, flags);
  3658. /* claim resources and init adapter */
  3659. if ((rc = startup(info)) != 0) {
  3660. spin_lock_irqsave(&info->netlock, flags);
  3661. info->netcount=0;
  3662. spin_unlock_irqrestore(&info->netlock, flags);
  3663. return rc;
  3664. }
  3665. /* assert DTR and RTS, apply hardware settings */
  3666. info->serial_signals |= SerialSignal_RTS + SerialSignal_DTR;
  3667. mgslpc_program_hw(info);
  3668. /* enable network layer transmit */
  3669. dev->trans_start = jiffies;
  3670. netif_start_queue(dev);
  3671. /* inform generic HDLC layer of current DCD status */
  3672. spin_lock_irqsave(&info->lock, flags);
  3673. get_signals(info);
  3674. spin_unlock_irqrestore(&info->lock, flags);
  3675. hdlc_set_carrier(info->serial_signals & SerialSignal_DCD, dev);
  3676. return 0;
  3677. }
  3678. /**
  3679. * called by network layer when interface is disabled
  3680. * shutdown hardware and release resources
  3681. *
  3682. * dev pointer to network device structure
  3683. *
  3684. * returns 0 if success, otherwise error code
  3685. */
  3686. static int hdlcdev_close(struct net_device *dev)
  3687. {
  3688. MGSLPC_INFO *info = dev_to_port(dev);
  3689. unsigned long flags;
  3690. if (debug_level >= DEBUG_LEVEL_INFO)
  3691. printk("%s:hdlcdev_close(%s)\n",__FILE__,dev->name);
  3692. netif_stop_queue(dev);
  3693. /* shutdown adapter and release resources */
  3694. shutdown(info);
  3695. hdlc_close(dev);
  3696. spin_lock_irqsave(&info->netlock, flags);
  3697. info->netcount=0;
  3698. spin_unlock_irqrestore(&info->netlock, flags);
  3699. return 0;
  3700. }
  3701. /**
  3702. * called by network layer to process IOCTL call to network device
  3703. *
  3704. * dev pointer to network device structure
  3705. * ifr pointer to network interface request structure
  3706. * cmd IOCTL command code
  3707. *
  3708. * returns 0 if success, otherwise error code
  3709. */
  3710. static int hdlcdev_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  3711. {
  3712. const size_t size = sizeof(sync_serial_settings);
  3713. sync_serial_settings new_line;
  3714. sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
  3715. MGSLPC_INFO *info = dev_to_port(dev);
  3716. unsigned int flags;
  3717. if (debug_level >= DEBUG_LEVEL_INFO)
  3718. printk("%s:hdlcdev_ioctl(%s)\n",__FILE__,dev->name);
  3719. /* return error if TTY interface open */
  3720. if (info->count)
  3721. return -EBUSY;
  3722. if (cmd != SIOCWANDEV)
  3723. return hdlc_ioctl(dev, ifr, cmd);
  3724. switch(ifr->ifr_settings.type) {
  3725. case IF_GET_IFACE: /* return current sync_serial_settings */
  3726. ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
  3727. if (ifr->ifr_settings.size < size) {
  3728. ifr->ifr_settings.size = size; /* data size wanted */
  3729. return -ENOBUFS;
  3730. }
  3731. flags = info->params.flags & (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3732. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3733. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3734. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3735. switch (flags){
  3736. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN): new_line.clock_type = CLOCK_EXT; break;
  3737. case (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_INT; break;
  3738. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG): new_line.clock_type = CLOCK_TXINT; break;
  3739. case (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN): new_line.clock_type = CLOCK_TXFROMRX; break;
  3740. default: new_line.clock_type = CLOCK_DEFAULT;
  3741. }
  3742. new_line.clock_rate = info->params.clock_speed;
  3743. new_line.loopback = info->params.loopback ? 1:0;
  3744. if (copy_to_user(line, &new_line, size))
  3745. return -EFAULT;
  3746. return 0;
  3747. case IF_IFACE_SYNC_SERIAL: /* set sync_serial_settings */
  3748. if(!capable(CAP_NET_ADMIN))
  3749. return -EPERM;
  3750. if (copy_from_user(&new_line, line, size))
  3751. return -EFAULT;
  3752. switch (new_line.clock_type)
  3753. {
  3754. case CLOCK_EXT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_TXCPIN; break;
  3755. case CLOCK_TXFROMRX: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_RXCPIN; break;
  3756. case CLOCK_INT: flags = HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG; break;
  3757. case CLOCK_TXINT: flags = HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_TXC_BRG; break;
  3758. case CLOCK_DEFAULT: flags = info->params.flags &
  3759. (HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3760. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3761. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3762. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN); break;
  3763. default: return -EINVAL;
  3764. }
  3765. if (new_line.loopback != 0 && new_line.loopback != 1)
  3766. return -EINVAL;
  3767. info->params.flags &= ~(HDLC_FLAG_RXC_RXCPIN | HDLC_FLAG_RXC_DPLL |
  3768. HDLC_FLAG_RXC_BRG | HDLC_FLAG_RXC_TXCPIN |
  3769. HDLC_FLAG_TXC_TXCPIN | HDLC_FLAG_TXC_DPLL |
  3770. HDLC_FLAG_TXC_BRG | HDLC_FLAG_TXC_RXCPIN);
  3771. info->params.flags |= flags;
  3772. info->params.loopback = new_line.loopback;
  3773. if (flags & (HDLC_FLAG_RXC_BRG | HDLC_FLAG_TXC_BRG))
  3774. info->params.clock_speed = new_line.clock_rate;
  3775. else
  3776. info->params.clock_speed = 0;
  3777. /* if network interface up, reprogram hardware */
  3778. if (info->netcount)
  3779. mgslpc_program_hw(info);
  3780. return 0;
  3781. default:
  3782. return hdlc_ioctl(dev, ifr, cmd);
  3783. }
  3784. }
  3785. /**
  3786. * called by network layer when transmit timeout is detected
  3787. *
  3788. * dev pointer to network device structure
  3789. */
  3790. static void hdlcdev_tx_timeout(struct net_device *dev)
  3791. {
  3792. MGSLPC_INFO *info = dev_to_port(dev);
  3793. struct net_device_stats *stats = hdlc_stats(dev);
  3794. unsigned long flags;
  3795. if (debug_level >= DEBUG_LEVEL_INFO)
  3796. printk("hdlcdev_tx_timeout(%s)\n",dev->name);
  3797. stats->tx_errors++;
  3798. stats->tx_aborted_errors++;
  3799. spin_lock_irqsave(&info->lock,flags);
  3800. tx_stop(info);
  3801. spin_unlock_irqrestore(&info->lock,flags);
  3802. netif_wake_queue(dev);
  3803. }
  3804. /**
  3805. * called by device driver when transmit completes
  3806. * reenable network layer transmit if stopped
  3807. *
  3808. * info pointer to device instance information
  3809. */
  3810. static void hdlcdev_tx_done(MGSLPC_INFO *info)
  3811. {
  3812. if (netif_queue_stopped(info->netdev))
  3813. netif_wake_queue(info->netdev);
  3814. }
  3815. /**
  3816. * called by device driver when frame received
  3817. * pass frame to network layer
  3818. *
  3819. * info pointer to device instance information
  3820. * buf pointer to buffer contianing frame data
  3821. * size count of data bytes in buf
  3822. */
  3823. static void hdlcdev_rx(MGSLPC_INFO *info, char *buf, int size)
  3824. {
  3825. struct sk_buff *skb = dev_alloc_skb(size);
  3826. struct net_device *dev = info->netdev;
  3827. struct net_device_stats *stats = hdlc_stats(dev);
  3828. if (debug_level >= DEBUG_LEVEL_INFO)
  3829. printk("hdlcdev_rx(%s)\n",dev->name);
  3830. if (skb == NULL) {
  3831. printk(KERN_NOTICE "%s: can't alloc skb, dropping packet\n", dev->name);
  3832. stats->rx_dropped++;
  3833. return;
  3834. }
  3835. memcpy(skb_put(skb, size),buf,size);
  3836. skb->protocol = hdlc_type_trans(skb, info->netdev);
  3837. stats->rx_packets++;
  3838. stats->rx_bytes += size;
  3839. netif_rx(skb);
  3840. info->netdev->last_rx = jiffies;
  3841. }
  3842. /**
  3843. * called by device driver when adding device instance
  3844. * do generic HDLC initialization
  3845. *
  3846. * info pointer to device instance information
  3847. *
  3848. * returns 0 if success, otherwise error code
  3849. */
  3850. static int hdlcdev_init(MGSLPC_INFO *info)
  3851. {
  3852. int rc;
  3853. struct net_device *dev;
  3854. hdlc_device *hdlc;
  3855. /* allocate and initialize network and HDLC layer objects */
  3856. if (!(dev = alloc_hdlcdev(info))) {
  3857. printk(KERN_ERR "%s:hdlc device allocation failure\n",__FILE__);
  3858. return -ENOMEM;
  3859. }
  3860. /* for network layer reporting purposes only */
  3861. dev->base_addr = info->io_base;
  3862. dev->irq = info->irq_level;
  3863. /* network layer callbacks and settings */
  3864. dev->do_ioctl = hdlcdev_ioctl;
  3865. dev->open = hdlcdev_open;
  3866. dev->stop = hdlcdev_close;
  3867. dev->tx_timeout = hdlcdev_tx_timeout;
  3868. dev->watchdog_timeo = 10*HZ;
  3869. dev->tx_queue_len = 50;
  3870. /* generic HDLC layer callbacks and settings */
  3871. hdlc = dev_to_hdlc(dev);
  3872. hdlc->attach = hdlcdev_attach;
  3873. hdlc->xmit = hdlcdev_xmit;
  3874. /* register objects with HDLC layer */
  3875. if ((rc = register_hdlc_device(dev))) {
  3876. printk(KERN_WARNING "%s:unable to register hdlc device\n",__FILE__);
  3877. free_netdev(dev);
  3878. return rc;
  3879. }
  3880. info->netdev = dev;
  3881. return 0;
  3882. }
  3883. /**
  3884. * called by device driver when removing device instance
  3885. * do generic HDLC cleanup
  3886. *
  3887. * info pointer to device instance information
  3888. */
  3889. static void hdlcdev_exit(MGSLPC_INFO *info)
  3890. {
  3891. unregister_hdlc_device(info->netdev);
  3892. free_netdev(info->netdev);
  3893. info->netdev = NULL;
  3894. }
  3895. #endif /* CONFIG_HDLC */