mmtimer.c 18 KB

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  1. /*
  2. * Intel Multimedia Timer device implementation for SGI SN platforms.
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * Copyright (c) 2001-2004 Silicon Graphics, Inc. All rights reserved.
  9. *
  10. * This driver exports an API that should be supportable by any HPET or IA-PC
  11. * multimedia timer. The code below is currently specific to the SGI Altix
  12. * SHub RTC, however.
  13. *
  14. * 11/01/01 - jbarnes - initial revision
  15. * 9/10/04 - Christoph Lameter - remove interrupt support for kernel inclusion
  16. * 10/1/04 - Christoph Lameter - provide posix clock CLOCK_SGI_CYCLE
  17. * 10/13/04 - Christoph Lameter, Dimitri Sivanich - provide timer interrupt
  18. * support via the posix timer interface
  19. */
  20. #include <linux/types.h>
  21. #include <linux/kernel.h>
  22. #include <linux/ioctl.h>
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/errno.h>
  26. #include <linux/mm.h>
  27. #include <linux/devfs_fs_kernel.h>
  28. #include <linux/mmtimer.h>
  29. #include <linux/miscdevice.h>
  30. #include <linux/posix-timers.h>
  31. #include <linux/interrupt.h>
  32. #include <asm/uaccess.h>
  33. #include <asm/sn/addrs.h>
  34. #include <asm/sn/intr.h>
  35. #include <asm/sn/shub_mmr.h>
  36. #include <asm/sn/nodepda.h>
  37. #include <asm/sn/shubio.h>
  38. MODULE_AUTHOR("Jesse Barnes <jbarnes@sgi.com>");
  39. MODULE_DESCRIPTION("SGI Altix RTC Timer");
  40. MODULE_LICENSE("GPL");
  41. /* name of the device, usually in /dev */
  42. #define MMTIMER_NAME "mmtimer"
  43. #define MMTIMER_DESC "SGI Altix RTC Timer"
  44. #define MMTIMER_VERSION "2.0"
  45. #define RTC_BITS 55 /* 55 bits for this implementation */
  46. extern unsigned long sn_rtc_cycles_per_second;
  47. #define RTC_COUNTER_ADDR ((long *)LOCAL_MMR_ADDR(SH_RTC))
  48. #define rtc_time() (*RTC_COUNTER_ADDR)
  49. static int mmtimer_ioctl(struct inode *inode, struct file *file,
  50. unsigned int cmd, unsigned long arg);
  51. static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma);
  52. /*
  53. * Period in femtoseconds (10^-15 s)
  54. */
  55. static unsigned long mmtimer_femtoperiod = 0;
  56. static struct file_operations mmtimer_fops = {
  57. .owner = THIS_MODULE,
  58. .mmap = mmtimer_mmap,
  59. .ioctl = mmtimer_ioctl,
  60. };
  61. /*
  62. * We only have comparison registers RTC1-4 currently available per
  63. * node. RTC0 is used by SAL.
  64. */
  65. #define NUM_COMPARATORS 3
  66. /* Check for an RTC interrupt pending */
  67. static int inline mmtimer_int_pending(int comparator)
  68. {
  69. if (HUB_L((unsigned long *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED)) &
  70. SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator)
  71. return 1;
  72. else
  73. return 0;
  74. }
  75. /* Clear the RTC interrupt pending bit */
  76. static void inline mmtimer_clr_int_pending(int comparator)
  77. {
  78. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS),
  79. SH_EVENT_OCCURRED_RTC1_INT_MASK << comparator);
  80. }
  81. /* Setup timer on comparator RTC1 */
  82. static void inline mmtimer_setup_int_0(u64 expires)
  83. {
  84. u64 val;
  85. /* Disable interrupt */
  86. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 0UL);
  87. /* Initialize comparator value */
  88. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), -1L);
  89. /* Clear pending bit */
  90. mmtimer_clr_int_pending(0);
  91. val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC1_INT_CONFIG_IDX_SHFT) |
  92. ((u64)cpu_physical_id(smp_processor_id()) <<
  93. SH_RTC1_INT_CONFIG_PID_SHFT);
  94. /* Set configuration */
  95. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_CONFIG), val);
  96. /* Enable RTC interrupts */
  97. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE), 1UL);
  98. /* Initialize comparator value */
  99. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPB), expires);
  100. }
  101. /* Setup timer on comparator RTC2 */
  102. static void inline mmtimer_setup_int_1(u64 expires)
  103. {
  104. u64 val;
  105. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 0UL);
  106. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), -1L);
  107. mmtimer_clr_int_pending(1);
  108. val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC2_INT_CONFIG_IDX_SHFT) |
  109. ((u64)cpu_physical_id(smp_processor_id()) <<
  110. SH_RTC2_INT_CONFIG_PID_SHFT);
  111. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_CONFIG), val);
  112. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE), 1UL);
  113. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPC), expires);
  114. }
  115. /* Setup timer on comparator RTC3 */
  116. static void inline mmtimer_setup_int_2(u64 expires)
  117. {
  118. u64 val;
  119. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 0UL);
  120. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), -1L);
  121. mmtimer_clr_int_pending(2);
  122. val = ((u64)SGI_MMTIMER_VECTOR << SH_RTC3_INT_CONFIG_IDX_SHFT) |
  123. ((u64)cpu_physical_id(smp_processor_id()) <<
  124. SH_RTC3_INT_CONFIG_PID_SHFT);
  125. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_CONFIG), val);
  126. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE), 1UL);
  127. HUB_S((u64 *)LOCAL_MMR_ADDR(SH_INT_CMPD), expires);
  128. }
  129. /*
  130. * This function must be called with interrupts disabled and preemption off
  131. * in order to insure that the setup succeeds in a deterministic time frame.
  132. * It will check if the interrupt setup succeeded.
  133. */
  134. static int inline mmtimer_setup(int comparator, unsigned long expires)
  135. {
  136. switch (comparator) {
  137. case 0:
  138. mmtimer_setup_int_0(expires);
  139. break;
  140. case 1:
  141. mmtimer_setup_int_1(expires);
  142. break;
  143. case 2:
  144. mmtimer_setup_int_2(expires);
  145. break;
  146. }
  147. /* We might've missed our expiration time */
  148. if (rtc_time() < expires)
  149. return 1;
  150. /*
  151. * If an interrupt is already pending then its okay
  152. * if not then we failed
  153. */
  154. return mmtimer_int_pending(comparator);
  155. }
  156. static int inline mmtimer_disable_int(long nasid, int comparator)
  157. {
  158. switch (comparator) {
  159. case 0:
  160. nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC1_INT_ENABLE),
  161. 0UL) : REMOTE_HUB_S(nasid, SH_RTC1_INT_ENABLE, 0UL);
  162. break;
  163. case 1:
  164. nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC2_INT_ENABLE),
  165. 0UL) : REMOTE_HUB_S(nasid, SH_RTC2_INT_ENABLE, 0UL);
  166. break;
  167. case 2:
  168. nasid == -1 ? HUB_S((u64 *)LOCAL_MMR_ADDR(SH_RTC3_INT_ENABLE),
  169. 0UL) : REMOTE_HUB_S(nasid, SH_RTC3_INT_ENABLE, 0UL);
  170. break;
  171. default:
  172. return -EFAULT;
  173. }
  174. return 0;
  175. }
  176. #define TIMER_OFF 0xbadcabLL
  177. /* There is one of these for each comparator */
  178. typedef struct mmtimer {
  179. spinlock_t lock ____cacheline_aligned;
  180. struct k_itimer *timer;
  181. int i;
  182. int cpu;
  183. struct tasklet_struct tasklet;
  184. } mmtimer_t;
  185. /*
  186. * Total number of comparators is comparators/node * MAX nodes/running kernel
  187. */
  188. static mmtimer_t timers[NUM_COMPARATORS*MAX_COMPACT_NODES];
  189. /**
  190. * mmtimer_ioctl - ioctl interface for /dev/mmtimer
  191. * @inode: inode of the device
  192. * @file: file structure for the device
  193. * @cmd: command to execute
  194. * @arg: optional argument to command
  195. *
  196. * Executes the command specified by @cmd. Returns 0 for success, < 0 for
  197. * failure.
  198. *
  199. * Valid commands:
  200. *
  201. * %MMTIMER_GETOFFSET - Should return the offset (relative to the start
  202. * of the page where the registers are mapped) for the counter in question.
  203. *
  204. * %MMTIMER_GETRES - Returns the resolution of the clock in femto (10^-15)
  205. * seconds
  206. *
  207. * %MMTIMER_GETFREQ - Copies the frequency of the clock in Hz to the address
  208. * specified by @arg
  209. *
  210. * %MMTIMER_GETBITS - Returns the number of bits in the clock's counter
  211. *
  212. * %MMTIMER_MMAPAVAIL - Returns 1 if the registers can be mmap'd into userspace
  213. *
  214. * %MMTIMER_GETCOUNTER - Gets the current value in the counter and places it
  215. * in the address specified by @arg.
  216. */
  217. static int mmtimer_ioctl(struct inode *inode, struct file *file,
  218. unsigned int cmd, unsigned long arg)
  219. {
  220. int ret = 0;
  221. switch (cmd) {
  222. case MMTIMER_GETOFFSET: /* offset of the counter */
  223. /*
  224. * SN RTC registers are on their own 64k page
  225. */
  226. if(PAGE_SIZE <= (1 << 16))
  227. ret = (((long)RTC_COUNTER_ADDR) & (PAGE_SIZE-1)) / 8;
  228. else
  229. ret = -ENOSYS;
  230. break;
  231. case MMTIMER_GETRES: /* resolution of the clock in 10^-15 s */
  232. if(copy_to_user((unsigned long __user *)arg,
  233. &mmtimer_femtoperiod, sizeof(unsigned long)))
  234. return -EFAULT;
  235. break;
  236. case MMTIMER_GETFREQ: /* frequency in Hz */
  237. if(copy_to_user((unsigned long __user *)arg,
  238. &sn_rtc_cycles_per_second,
  239. sizeof(unsigned long)))
  240. return -EFAULT;
  241. ret = 0;
  242. break;
  243. case MMTIMER_GETBITS: /* number of bits in the clock */
  244. ret = RTC_BITS;
  245. break;
  246. case MMTIMER_MMAPAVAIL: /* can we mmap the clock into userspace? */
  247. ret = (PAGE_SIZE <= (1 << 16)) ? 1 : 0;
  248. break;
  249. case MMTIMER_GETCOUNTER:
  250. if(copy_to_user((unsigned long __user *)arg,
  251. RTC_COUNTER_ADDR, sizeof(unsigned long)))
  252. return -EFAULT;
  253. break;
  254. default:
  255. ret = -ENOSYS;
  256. break;
  257. }
  258. return ret;
  259. }
  260. /**
  261. * mmtimer_mmap - maps the clock's registers into userspace
  262. * @file: file structure for the device
  263. * @vma: VMA to map the registers into
  264. *
  265. * Calls remap_pfn_range() to map the clock's registers into
  266. * the calling process' address space.
  267. */
  268. static int mmtimer_mmap(struct file *file, struct vm_area_struct *vma)
  269. {
  270. unsigned long mmtimer_addr;
  271. if (vma->vm_end - vma->vm_start != PAGE_SIZE)
  272. return -EINVAL;
  273. if (vma->vm_flags & VM_WRITE)
  274. return -EPERM;
  275. if (PAGE_SIZE > (1 << 16))
  276. return -ENOSYS;
  277. vma->vm_flags |= (VM_IO | VM_SHM | VM_LOCKED );
  278. vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
  279. mmtimer_addr = __pa(RTC_COUNTER_ADDR);
  280. mmtimer_addr &= ~(PAGE_SIZE - 1);
  281. mmtimer_addr &= 0xfffffffffffffffUL;
  282. if (remap_pfn_range(vma, vma->vm_start, mmtimer_addr >> PAGE_SHIFT,
  283. PAGE_SIZE, vma->vm_page_prot)) {
  284. printk(KERN_ERR "remap_pfn_range failed in mmtimer.c\n");
  285. return -EAGAIN;
  286. }
  287. return 0;
  288. }
  289. static struct miscdevice mmtimer_miscdev = {
  290. SGI_MMTIMER,
  291. MMTIMER_NAME,
  292. &mmtimer_fops
  293. };
  294. static struct timespec sgi_clock_offset;
  295. static int sgi_clock_period;
  296. /*
  297. * Posix Timer Interface
  298. */
  299. static struct timespec sgi_clock_offset;
  300. static int sgi_clock_period;
  301. static int sgi_clock_get(clockid_t clockid, struct timespec *tp)
  302. {
  303. u64 nsec;
  304. nsec = rtc_time() * sgi_clock_period
  305. + sgi_clock_offset.tv_nsec;
  306. tp->tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &tp->tv_nsec)
  307. + sgi_clock_offset.tv_sec;
  308. return 0;
  309. };
  310. static int sgi_clock_set(clockid_t clockid, struct timespec *tp)
  311. {
  312. u64 nsec;
  313. u64 rem;
  314. nsec = rtc_time() * sgi_clock_period;
  315. sgi_clock_offset.tv_sec = tp->tv_sec - div_long_long_rem(nsec, NSEC_PER_SEC, &rem);
  316. if (rem <= tp->tv_nsec)
  317. sgi_clock_offset.tv_nsec = tp->tv_sec - rem;
  318. else {
  319. sgi_clock_offset.tv_nsec = tp->tv_sec + NSEC_PER_SEC - rem;
  320. sgi_clock_offset.tv_sec--;
  321. }
  322. return 0;
  323. }
  324. /*
  325. * Schedule the next periodic interrupt. This function will attempt
  326. * to schedule a periodic interrupt later if necessary. If the scheduling
  327. * of an interrupt fails then the time to skip is lengthened
  328. * exponentially in order to ensure that the next interrupt
  329. * can be properly scheduled..
  330. */
  331. static int inline reschedule_periodic_timer(mmtimer_t *x)
  332. {
  333. int n;
  334. struct k_itimer *t = x->timer;
  335. t->it.mmtimer.clock = x->i;
  336. t->it_overrun--;
  337. n = 0;
  338. do {
  339. t->it.mmtimer.expires += t->it.mmtimer.incr << n;
  340. t->it_overrun += 1 << n;
  341. n++;
  342. if (n > 20)
  343. return 1;
  344. } while (!mmtimer_setup(x->i, t->it.mmtimer.expires));
  345. return 0;
  346. }
  347. /**
  348. * mmtimer_interrupt - timer interrupt handler
  349. * @irq: irq received
  350. * @dev_id: device the irq came from
  351. * @regs: register state upon receipt of the interrupt
  352. *
  353. * Called when one of the comarators matches the counter, This
  354. * routine will send signals to processes that have requested
  355. * them.
  356. *
  357. * This interrupt is run in an interrupt context
  358. * by the SHUB. It is therefore safe to locally access SHub
  359. * registers.
  360. */
  361. static irqreturn_t
  362. mmtimer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
  363. {
  364. int i;
  365. mmtimer_t *base = timers + cpuid_to_cnodeid(smp_processor_id()) *
  366. NUM_COMPARATORS;
  367. unsigned long expires = 0;
  368. int result = IRQ_NONE;
  369. /*
  370. * Do this once for each comparison register
  371. */
  372. for (i = 0; i < NUM_COMPARATORS; i++) {
  373. /* Make sure this doesn't get reused before tasklet_sched */
  374. spin_lock(&base[i].lock);
  375. if (base[i].cpu == smp_processor_id()) {
  376. if (base[i].timer)
  377. expires = base[i].timer->it.mmtimer.expires;
  378. /* expires test won't work with shared irqs */
  379. if ((mmtimer_int_pending(i) > 0) ||
  380. (expires && (expires < rtc_time()))) {
  381. mmtimer_clr_int_pending(i);
  382. tasklet_schedule(&base[i].tasklet);
  383. result = IRQ_HANDLED;
  384. }
  385. }
  386. spin_unlock(&base[i].lock);
  387. expires = 0;
  388. }
  389. return result;
  390. }
  391. void mmtimer_tasklet(unsigned long data) {
  392. mmtimer_t *x = (mmtimer_t *)data;
  393. struct k_itimer *t = x->timer;
  394. unsigned long flags;
  395. if (t == NULL)
  396. return;
  397. /* Send signal and deal with periodic signals */
  398. spin_lock_irqsave(&t->it_lock, flags);
  399. spin_lock(&x->lock);
  400. /* If timer was deleted between interrupt and here, leave */
  401. if (t != x->timer)
  402. goto out;
  403. t->it_overrun = 0;
  404. if (posix_timer_event(t, 0) != 0) {
  405. // printk(KERN_WARNING "mmtimer: cannot deliver signal.\n");
  406. t->it_overrun++;
  407. }
  408. if(t->it.mmtimer.incr) {
  409. /* Periodic timer */
  410. if (reschedule_periodic_timer(x)) {
  411. printk(KERN_WARNING "mmtimer: unable to reschedule\n");
  412. x->timer = NULL;
  413. }
  414. } else {
  415. /* Ensure we don't false trigger in mmtimer_interrupt */
  416. t->it.mmtimer.expires = 0;
  417. }
  418. t->it_overrun_last = t->it_overrun;
  419. out:
  420. spin_unlock(&x->lock);
  421. spin_unlock_irqrestore(&t->it_lock, flags);
  422. }
  423. static int sgi_timer_create(struct k_itimer *timer)
  424. {
  425. /* Insure that a newly created timer is off */
  426. timer->it.mmtimer.clock = TIMER_OFF;
  427. return 0;
  428. }
  429. /* This does not really delete a timer. It just insures
  430. * that the timer is not active
  431. *
  432. * Assumption: it_lock is already held with irq's disabled
  433. */
  434. static int sgi_timer_del(struct k_itimer *timr)
  435. {
  436. int i = timr->it.mmtimer.clock;
  437. cnodeid_t nodeid = timr->it.mmtimer.node;
  438. mmtimer_t *t = timers + nodeid * NUM_COMPARATORS +i;
  439. unsigned long irqflags;
  440. if (i != TIMER_OFF) {
  441. spin_lock_irqsave(&t->lock, irqflags);
  442. mmtimer_disable_int(cnodeid_to_nasid(nodeid),i);
  443. t->timer = NULL;
  444. timr->it.mmtimer.clock = TIMER_OFF;
  445. timr->it.mmtimer.expires = 0;
  446. spin_unlock_irqrestore(&t->lock, irqflags);
  447. }
  448. return 0;
  449. }
  450. #define timespec_to_ns(x) ((x).tv_nsec + (x).tv_sec * NSEC_PER_SEC)
  451. #define ns_to_timespec(ts, nsec) (ts).tv_sec = div_long_long_rem(nsec, NSEC_PER_SEC, &(ts).tv_nsec)
  452. /* Assumption: it_lock is already held with irq's disabled */
  453. static void sgi_timer_get(struct k_itimer *timr, struct itimerspec *cur_setting)
  454. {
  455. if (timr->it.mmtimer.clock == TIMER_OFF) {
  456. cur_setting->it_interval.tv_nsec = 0;
  457. cur_setting->it_interval.tv_sec = 0;
  458. cur_setting->it_value.tv_nsec = 0;
  459. cur_setting->it_value.tv_sec =0;
  460. return;
  461. }
  462. ns_to_timespec(cur_setting->it_interval, timr->it.mmtimer.incr * sgi_clock_period);
  463. ns_to_timespec(cur_setting->it_value, (timr->it.mmtimer.expires - rtc_time())* sgi_clock_period);
  464. return;
  465. }
  466. static int sgi_timer_set(struct k_itimer *timr, int flags,
  467. struct itimerspec * new_setting,
  468. struct itimerspec * old_setting)
  469. {
  470. int i;
  471. unsigned long when, period, irqflags;
  472. int err = 0;
  473. cnodeid_t nodeid;
  474. mmtimer_t *base;
  475. if (old_setting)
  476. sgi_timer_get(timr, old_setting);
  477. sgi_timer_del(timr);
  478. when = timespec_to_ns(new_setting->it_value);
  479. period = timespec_to_ns(new_setting->it_interval);
  480. if (when == 0)
  481. /* Clear timer */
  482. return 0;
  483. if (flags & TIMER_ABSTIME) {
  484. struct timespec n;
  485. unsigned long now;
  486. getnstimeofday(&n);
  487. now = timespec_to_ns(n);
  488. if (when > now)
  489. when -= now;
  490. else
  491. /* Fire the timer immediately */
  492. when = 0;
  493. }
  494. /*
  495. * Convert to sgi clock period. Need to keep rtc_time() as near as possible
  496. * to getnstimeofday() in order to be as faithful as possible to the time
  497. * specified.
  498. */
  499. when = (when + sgi_clock_period - 1) / sgi_clock_period + rtc_time();
  500. period = (period + sgi_clock_period - 1) / sgi_clock_period;
  501. /*
  502. * We are allocating a local SHub comparator. If we would be moved to another
  503. * cpu then another SHub may be local to us. Prohibit that by switching off
  504. * preemption.
  505. */
  506. preempt_disable();
  507. nodeid = cpuid_to_cnodeid(smp_processor_id());
  508. base = timers + nodeid * NUM_COMPARATORS;
  509. retry:
  510. /* Don't use an allocated timer, or a deleted one that's pending */
  511. for(i = 0; i< NUM_COMPARATORS; i++) {
  512. if (!base[i].timer && !base[i].tasklet.state) {
  513. break;
  514. }
  515. }
  516. if (i == NUM_COMPARATORS) {
  517. preempt_enable();
  518. return -EBUSY;
  519. }
  520. spin_lock_irqsave(&base[i].lock, irqflags);
  521. if (base[i].timer || base[i].tasklet.state != 0) {
  522. spin_unlock_irqrestore(&base[i].lock, irqflags);
  523. goto retry;
  524. }
  525. base[i].timer = timr;
  526. base[i].cpu = smp_processor_id();
  527. timr->it.mmtimer.clock = i;
  528. timr->it.mmtimer.node = nodeid;
  529. timr->it.mmtimer.incr = period;
  530. timr->it.mmtimer.expires = when;
  531. if (period == 0) {
  532. if (!mmtimer_setup(i, when)) {
  533. mmtimer_disable_int(-1, i);
  534. posix_timer_event(timr, 0);
  535. timr->it.mmtimer.expires = 0;
  536. }
  537. } else {
  538. timr->it.mmtimer.expires -= period;
  539. if (reschedule_periodic_timer(base+i))
  540. err = -EINVAL;
  541. }
  542. spin_unlock_irqrestore(&base[i].lock, irqflags);
  543. preempt_enable();
  544. return err;
  545. }
  546. static struct k_clock sgi_clock = {
  547. .res = 0,
  548. .clock_set = sgi_clock_set,
  549. .clock_get = sgi_clock_get,
  550. .timer_create = sgi_timer_create,
  551. .nsleep = do_posix_clock_nonanosleep,
  552. .timer_set = sgi_timer_set,
  553. .timer_del = sgi_timer_del,
  554. .timer_get = sgi_timer_get
  555. };
  556. /**
  557. * mmtimer_init - device initialization routine
  558. *
  559. * Does initial setup for the mmtimer device.
  560. */
  561. static int __init mmtimer_init(void)
  562. {
  563. unsigned i;
  564. if (!ia64_platform_is("sn2"))
  565. return -1;
  566. /*
  567. * Sanity check the cycles/sec variable
  568. */
  569. if (sn_rtc_cycles_per_second < 100000) {
  570. printk(KERN_ERR "%s: unable to determine clock frequency\n",
  571. MMTIMER_NAME);
  572. return -1;
  573. }
  574. mmtimer_femtoperiod = ((unsigned long)1E15 + sn_rtc_cycles_per_second /
  575. 2) / sn_rtc_cycles_per_second;
  576. for (i=0; i< NUM_COMPARATORS*MAX_COMPACT_NODES; i++) {
  577. spin_lock_init(&timers[i].lock);
  578. timers[i].timer = NULL;
  579. timers[i].cpu = 0;
  580. timers[i].i = i % NUM_COMPARATORS;
  581. tasklet_init(&timers[i].tasklet, mmtimer_tasklet, (unsigned long) (timers+i));
  582. }
  583. if (request_irq(SGI_MMTIMER_VECTOR, mmtimer_interrupt, SA_PERCPU_IRQ, MMTIMER_NAME, NULL)) {
  584. printk(KERN_WARNING "%s: unable to allocate interrupt.",
  585. MMTIMER_NAME);
  586. return -1;
  587. }
  588. strcpy(mmtimer_miscdev.devfs_name, MMTIMER_NAME);
  589. if (misc_register(&mmtimer_miscdev)) {
  590. printk(KERN_ERR "%s: failed to register device\n",
  591. MMTIMER_NAME);
  592. return -1;
  593. }
  594. sgi_clock_period = sgi_clock.res = NSEC_PER_SEC / sn_rtc_cycles_per_second;
  595. register_posix_clock(CLOCK_SGI_CYCLE, &sgi_clock);
  596. printk(KERN_INFO "%s: v%s, %ld MHz\n", MMTIMER_DESC, MMTIMER_VERSION,
  597. sn_rtc_cycles_per_second/(unsigned long)1E6);
  598. return 0;
  599. }
  600. module_init(mmtimer_init);