hpsa.c 114 KB

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  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #include <linux/module.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/types.h>
  24. #include <linux/pci.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/delay.h>
  28. #include <linux/fs.h>
  29. #include <linux/timer.h>
  30. #include <linux/seq_file.h>
  31. #include <linux/init.h>
  32. #include <linux/spinlock.h>
  33. #include <linux/compat.h>
  34. #include <linux/blktrace_api.h>
  35. #include <linux/uaccess.h>
  36. #include <linux/io.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/completion.h>
  39. #include <linux/moduleparam.h>
  40. #include <scsi/scsi.h>
  41. #include <scsi/scsi_cmnd.h>
  42. #include <scsi/scsi_device.h>
  43. #include <scsi/scsi_host.h>
  44. #include <scsi/scsi_tcq.h>
  45. #include <linux/cciss_ioctl.h>
  46. #include <linux/string.h>
  47. #include <linux/bitmap.h>
  48. #include <asm/atomic.h>
  49. #include <linux/kthread.h>
  50. #include "hpsa_cmd.h"
  51. #include "hpsa.h"
  52. /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
  53. #define HPSA_DRIVER_VERSION "2.0.2-1"
  54. #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
  55. /* How long to wait (in milliseconds) for board to go into simple mode */
  56. #define MAX_CONFIG_WAIT 30000
  57. #define MAX_IOCTL_CONFIG_WAIT 1000
  58. /*define how many times we will try a command because of bus resets */
  59. #define MAX_CMD_RETRIES 3
  60. /* Embedded module documentation macros - see modules.h */
  61. MODULE_AUTHOR("Hewlett-Packard Company");
  62. MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
  63. HPSA_DRIVER_VERSION);
  64. MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
  65. MODULE_VERSION(HPSA_DRIVER_VERSION);
  66. MODULE_LICENSE("GPL");
  67. static int hpsa_allow_any;
  68. module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
  69. MODULE_PARM_DESC(hpsa_allow_any,
  70. "Allow hpsa driver to access unknown HP Smart Array hardware");
  71. static int hpsa_simple_mode;
  72. module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
  73. MODULE_PARM_DESC(hpsa_simple_mode,
  74. "Use 'simple mode' rather than 'performant mode'");
  75. /* define the PCI info for the cards we can control */
  76. static const struct pci_device_id hpsa_pci_device_id[] = {
  77. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241},
  78. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243},
  79. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245},
  80. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247},
  81. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
  82. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a},
  83. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b},
  84. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233},
  85. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3250},
  86. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3251},
  87. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3252},
  88. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3253},
  89. {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3254},
  90. {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
  91. PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
  92. {0,}
  93. };
  94. MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
  95. /* board_id = Subsystem Device ID & Vendor ID
  96. * product = Marketing Name for the board
  97. * access = Address of the struct of function pointers
  98. */
  99. static struct board_type products[] = {
  100. {0x3241103C, "Smart Array P212", &SA5_access},
  101. {0x3243103C, "Smart Array P410", &SA5_access},
  102. {0x3245103C, "Smart Array P410i", &SA5_access},
  103. {0x3247103C, "Smart Array P411", &SA5_access},
  104. {0x3249103C, "Smart Array P812", &SA5_access},
  105. {0x324a103C, "Smart Array P712m", &SA5_access},
  106. {0x324b103C, "Smart Array P711m", &SA5_access},
  107. {0x3250103C, "Smart Array", &SA5_access},
  108. {0x3250113C, "Smart Array", &SA5_access},
  109. {0x3250123C, "Smart Array", &SA5_access},
  110. {0x3250133C, "Smart Array", &SA5_access},
  111. {0x3250143C, "Smart Array", &SA5_access},
  112. {0xFFFF103C, "Unknown Smart Array", &SA5_access},
  113. };
  114. static int number_of_controllers;
  115. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
  116. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
  117. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
  118. static void start_io(struct ctlr_info *h);
  119. #ifdef CONFIG_COMPAT
  120. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
  121. #endif
  122. static void cmd_free(struct ctlr_info *h, struct CommandList *c);
  123. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
  124. static struct CommandList *cmd_alloc(struct ctlr_info *h);
  125. static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
  126. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  127. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  128. int cmd_type);
  129. static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
  130. static void hpsa_scan_start(struct Scsi_Host *);
  131. static int hpsa_scan_finished(struct Scsi_Host *sh,
  132. unsigned long elapsed_time);
  133. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  134. int qdepth, int reason);
  135. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
  136. static int hpsa_slave_alloc(struct scsi_device *sdev);
  137. static void hpsa_slave_destroy(struct scsi_device *sdev);
  138. static ssize_t raid_level_show(struct device *dev,
  139. struct device_attribute *attr, char *buf);
  140. static ssize_t lunid_show(struct device *dev,
  141. struct device_attribute *attr, char *buf);
  142. static ssize_t unique_id_show(struct device *dev,
  143. struct device_attribute *attr, char *buf);
  144. static ssize_t host_show_firmware_revision(struct device *dev,
  145. struct device_attribute *attr, char *buf);
  146. static ssize_t host_show_commands_outstanding(struct device *dev,
  147. struct device_attribute *attr, char *buf);
  148. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
  149. static ssize_t host_store_rescan(struct device *dev,
  150. struct device_attribute *attr, const char *buf, size_t count);
  151. static int check_for_unit_attention(struct ctlr_info *h,
  152. struct CommandList *c);
  153. static void check_ioctl_unit_attention(struct ctlr_info *h,
  154. struct CommandList *c);
  155. /* performant mode helper functions */
  156. static void calc_bucket_map(int *bucket, int num_buckets,
  157. int nsgs, int *bucket_map);
  158. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
  159. static inline u32 next_command(struct ctlr_info *h);
  160. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  161. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  162. u64 *cfg_offset);
  163. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  164. unsigned long *memory_bar);
  165. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
  166. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  167. void __iomem *vaddr, int wait_for_ready);
  168. #define BOARD_NOT_READY 0
  169. #define BOARD_READY 1
  170. static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
  171. static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
  172. static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
  173. static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
  174. static DEVICE_ATTR(firmware_revision, S_IRUGO,
  175. host_show_firmware_revision, NULL);
  176. static DEVICE_ATTR(commands_outstanding, S_IRUGO,
  177. host_show_commands_outstanding, NULL);
  178. static struct device_attribute *hpsa_sdev_attrs[] = {
  179. &dev_attr_raid_level,
  180. &dev_attr_lunid,
  181. &dev_attr_unique_id,
  182. NULL,
  183. };
  184. static struct device_attribute *hpsa_shost_attrs[] = {
  185. &dev_attr_rescan,
  186. &dev_attr_firmware_revision,
  187. &dev_attr_commands_outstanding,
  188. NULL,
  189. };
  190. static struct scsi_host_template hpsa_driver_template = {
  191. .module = THIS_MODULE,
  192. .name = "hpsa",
  193. .proc_name = "hpsa",
  194. .queuecommand = hpsa_scsi_queue_command,
  195. .scan_start = hpsa_scan_start,
  196. .scan_finished = hpsa_scan_finished,
  197. .change_queue_depth = hpsa_change_queue_depth,
  198. .this_id = -1,
  199. .use_clustering = ENABLE_CLUSTERING,
  200. .eh_device_reset_handler = hpsa_eh_device_reset_handler,
  201. .ioctl = hpsa_ioctl,
  202. .slave_alloc = hpsa_slave_alloc,
  203. .slave_destroy = hpsa_slave_destroy,
  204. #ifdef CONFIG_COMPAT
  205. .compat_ioctl = hpsa_compat_ioctl,
  206. #endif
  207. .sdev_attrs = hpsa_sdev_attrs,
  208. .shost_attrs = hpsa_shost_attrs,
  209. };
  210. static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
  211. {
  212. unsigned long *priv = shost_priv(sdev->host);
  213. return (struct ctlr_info *) *priv;
  214. }
  215. static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
  216. {
  217. unsigned long *priv = shost_priv(sh);
  218. return (struct ctlr_info *) *priv;
  219. }
  220. static int check_for_unit_attention(struct ctlr_info *h,
  221. struct CommandList *c)
  222. {
  223. if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
  224. return 0;
  225. switch (c->err_info->SenseInfo[12]) {
  226. case STATE_CHANGED:
  227. dev_warn(&h->pdev->dev, "hpsa%d: a state change "
  228. "detected, command retried\n", h->ctlr);
  229. break;
  230. case LUN_FAILED:
  231. dev_warn(&h->pdev->dev, "hpsa%d: LUN failure "
  232. "detected, action required\n", h->ctlr);
  233. break;
  234. case REPORT_LUNS_CHANGED:
  235. dev_warn(&h->pdev->dev, "hpsa%d: report LUN data "
  236. "changed, action required\n", h->ctlr);
  237. /*
  238. * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
  239. */
  240. break;
  241. case POWER_OR_RESET:
  242. dev_warn(&h->pdev->dev, "hpsa%d: a power on "
  243. "or device reset detected\n", h->ctlr);
  244. break;
  245. case UNIT_ATTENTION_CLEARED:
  246. dev_warn(&h->pdev->dev, "hpsa%d: unit attention "
  247. "cleared by another initiator\n", h->ctlr);
  248. break;
  249. default:
  250. dev_warn(&h->pdev->dev, "hpsa%d: unknown "
  251. "unit attention detected\n", h->ctlr);
  252. break;
  253. }
  254. return 1;
  255. }
  256. static ssize_t host_store_rescan(struct device *dev,
  257. struct device_attribute *attr,
  258. const char *buf, size_t count)
  259. {
  260. struct ctlr_info *h;
  261. struct Scsi_Host *shost = class_to_shost(dev);
  262. h = shost_to_hba(shost);
  263. hpsa_scan_start(h->scsi_host);
  264. return count;
  265. }
  266. static ssize_t host_show_firmware_revision(struct device *dev,
  267. struct device_attribute *attr, char *buf)
  268. {
  269. struct ctlr_info *h;
  270. struct Scsi_Host *shost = class_to_shost(dev);
  271. unsigned char *fwrev;
  272. h = shost_to_hba(shost);
  273. if (!h->hba_inquiry_data)
  274. return 0;
  275. fwrev = &h->hba_inquiry_data[32];
  276. return snprintf(buf, 20, "%c%c%c%c\n",
  277. fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
  278. }
  279. static ssize_t host_show_commands_outstanding(struct device *dev,
  280. struct device_attribute *attr, char *buf)
  281. {
  282. struct Scsi_Host *shost = class_to_shost(dev);
  283. struct ctlr_info *h = shost_to_hba(shost);
  284. return snprintf(buf, 20, "%d\n", h->commands_outstanding);
  285. }
  286. /* Enqueuing and dequeuing functions for cmdlists. */
  287. static inline void addQ(struct hlist_head *list, struct CommandList *c)
  288. {
  289. hlist_add_head(&c->list, list);
  290. }
  291. static inline u32 next_command(struct ctlr_info *h)
  292. {
  293. u32 a;
  294. if (unlikely(h->transMethod != CFGTBL_Trans_Performant))
  295. return h->access.command_completed(h);
  296. if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
  297. a = *(h->reply_pool_head); /* Next cmd in ring buffer */
  298. (h->reply_pool_head)++;
  299. h->commands_outstanding--;
  300. } else {
  301. a = FIFO_EMPTY;
  302. }
  303. /* Check for wraparound */
  304. if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
  305. h->reply_pool_head = h->reply_pool;
  306. h->reply_pool_wraparound ^= 1;
  307. }
  308. return a;
  309. }
  310. /* set_performant_mode: Modify the tag for cciss performant
  311. * set bit 0 for pull model, bits 3-1 for block fetch
  312. * register number
  313. */
  314. static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
  315. {
  316. if (likely(h->transMethod == CFGTBL_Trans_Performant))
  317. c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
  318. }
  319. static void enqueue_cmd_and_start_io(struct ctlr_info *h,
  320. struct CommandList *c)
  321. {
  322. unsigned long flags;
  323. set_performant_mode(h, c);
  324. spin_lock_irqsave(&h->lock, flags);
  325. addQ(&h->reqQ, c);
  326. h->Qdepth++;
  327. start_io(h);
  328. spin_unlock_irqrestore(&h->lock, flags);
  329. }
  330. static inline void removeQ(struct CommandList *c)
  331. {
  332. if (WARN_ON(hlist_unhashed(&c->list)))
  333. return;
  334. hlist_del_init(&c->list);
  335. }
  336. static inline int is_hba_lunid(unsigned char scsi3addr[])
  337. {
  338. return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
  339. }
  340. static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
  341. {
  342. return (scsi3addr[3] & 0xC0) == 0x40;
  343. }
  344. static inline int is_scsi_rev_5(struct ctlr_info *h)
  345. {
  346. if (!h->hba_inquiry_data)
  347. return 0;
  348. if ((h->hba_inquiry_data[2] & 0x07) == 5)
  349. return 1;
  350. return 0;
  351. }
  352. static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
  353. "UNKNOWN"
  354. };
  355. #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
  356. static ssize_t raid_level_show(struct device *dev,
  357. struct device_attribute *attr, char *buf)
  358. {
  359. ssize_t l = 0;
  360. unsigned char rlevel;
  361. struct ctlr_info *h;
  362. struct scsi_device *sdev;
  363. struct hpsa_scsi_dev_t *hdev;
  364. unsigned long flags;
  365. sdev = to_scsi_device(dev);
  366. h = sdev_to_hba(sdev);
  367. spin_lock_irqsave(&h->lock, flags);
  368. hdev = sdev->hostdata;
  369. if (!hdev) {
  370. spin_unlock_irqrestore(&h->lock, flags);
  371. return -ENODEV;
  372. }
  373. /* Is this even a logical drive? */
  374. if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
  375. spin_unlock_irqrestore(&h->lock, flags);
  376. l = snprintf(buf, PAGE_SIZE, "N/A\n");
  377. return l;
  378. }
  379. rlevel = hdev->raid_level;
  380. spin_unlock_irqrestore(&h->lock, flags);
  381. if (rlevel > RAID_UNKNOWN)
  382. rlevel = RAID_UNKNOWN;
  383. l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
  384. return l;
  385. }
  386. static ssize_t lunid_show(struct device *dev,
  387. struct device_attribute *attr, char *buf)
  388. {
  389. struct ctlr_info *h;
  390. struct scsi_device *sdev;
  391. struct hpsa_scsi_dev_t *hdev;
  392. unsigned long flags;
  393. unsigned char lunid[8];
  394. sdev = to_scsi_device(dev);
  395. h = sdev_to_hba(sdev);
  396. spin_lock_irqsave(&h->lock, flags);
  397. hdev = sdev->hostdata;
  398. if (!hdev) {
  399. spin_unlock_irqrestore(&h->lock, flags);
  400. return -ENODEV;
  401. }
  402. memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
  403. spin_unlock_irqrestore(&h->lock, flags);
  404. return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
  405. lunid[0], lunid[1], lunid[2], lunid[3],
  406. lunid[4], lunid[5], lunid[6], lunid[7]);
  407. }
  408. static ssize_t unique_id_show(struct device *dev,
  409. struct device_attribute *attr, char *buf)
  410. {
  411. struct ctlr_info *h;
  412. struct scsi_device *sdev;
  413. struct hpsa_scsi_dev_t *hdev;
  414. unsigned long flags;
  415. unsigned char sn[16];
  416. sdev = to_scsi_device(dev);
  417. h = sdev_to_hba(sdev);
  418. spin_lock_irqsave(&h->lock, flags);
  419. hdev = sdev->hostdata;
  420. if (!hdev) {
  421. spin_unlock_irqrestore(&h->lock, flags);
  422. return -ENODEV;
  423. }
  424. memcpy(sn, hdev->device_id, sizeof(sn));
  425. spin_unlock_irqrestore(&h->lock, flags);
  426. return snprintf(buf, 16 * 2 + 2,
  427. "%02X%02X%02X%02X%02X%02X%02X%02X"
  428. "%02X%02X%02X%02X%02X%02X%02X%02X\n",
  429. sn[0], sn[1], sn[2], sn[3],
  430. sn[4], sn[5], sn[6], sn[7],
  431. sn[8], sn[9], sn[10], sn[11],
  432. sn[12], sn[13], sn[14], sn[15]);
  433. }
  434. static int hpsa_find_target_lun(struct ctlr_info *h,
  435. unsigned char scsi3addr[], int bus, int *target, int *lun)
  436. {
  437. /* finds an unused bus, target, lun for a new physical device
  438. * assumes h->devlock is held
  439. */
  440. int i, found = 0;
  441. DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA);
  442. memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3);
  443. for (i = 0; i < h->ndevices; i++) {
  444. if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
  445. set_bit(h->dev[i]->target, lun_taken);
  446. }
  447. for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) {
  448. if (!test_bit(i, lun_taken)) {
  449. /* *bus = 1; */
  450. *target = i;
  451. *lun = 0;
  452. found = 1;
  453. break;
  454. }
  455. }
  456. return !found;
  457. }
  458. /* Add an entry into h->dev[] array. */
  459. static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
  460. struct hpsa_scsi_dev_t *device,
  461. struct hpsa_scsi_dev_t *added[], int *nadded)
  462. {
  463. /* assumes h->devlock is held */
  464. int n = h->ndevices;
  465. int i;
  466. unsigned char addr1[8], addr2[8];
  467. struct hpsa_scsi_dev_t *sd;
  468. if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) {
  469. dev_err(&h->pdev->dev, "too many devices, some will be "
  470. "inaccessible.\n");
  471. return -1;
  472. }
  473. /* physical devices do not have lun or target assigned until now. */
  474. if (device->lun != -1)
  475. /* Logical device, lun is already assigned. */
  476. goto lun_assigned;
  477. /* If this device a non-zero lun of a multi-lun device
  478. * byte 4 of the 8-byte LUN addr will contain the logical
  479. * unit no, zero otherise.
  480. */
  481. if (device->scsi3addr[4] == 0) {
  482. /* This is not a non-zero lun of a multi-lun device */
  483. if (hpsa_find_target_lun(h, device->scsi3addr,
  484. device->bus, &device->target, &device->lun) != 0)
  485. return -1;
  486. goto lun_assigned;
  487. }
  488. /* This is a non-zero lun of a multi-lun device.
  489. * Search through our list and find the device which
  490. * has the same 8 byte LUN address, excepting byte 4.
  491. * Assign the same bus and target for this new LUN.
  492. * Use the logical unit number from the firmware.
  493. */
  494. memcpy(addr1, device->scsi3addr, 8);
  495. addr1[4] = 0;
  496. for (i = 0; i < n; i++) {
  497. sd = h->dev[i];
  498. memcpy(addr2, sd->scsi3addr, 8);
  499. addr2[4] = 0;
  500. /* differ only in byte 4? */
  501. if (memcmp(addr1, addr2, 8) == 0) {
  502. device->bus = sd->bus;
  503. device->target = sd->target;
  504. device->lun = device->scsi3addr[4];
  505. break;
  506. }
  507. }
  508. if (device->lun == -1) {
  509. dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
  510. " suspect firmware bug or unsupported hardware "
  511. "configuration.\n");
  512. return -1;
  513. }
  514. lun_assigned:
  515. h->dev[n] = device;
  516. h->ndevices++;
  517. added[*nadded] = device;
  518. (*nadded)++;
  519. /* initially, (before registering with scsi layer) we don't
  520. * know our hostno and we don't want to print anything first
  521. * time anyway (the scsi layer's inquiries will show that info)
  522. */
  523. /* if (hostno != -1) */
  524. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
  525. scsi_device_type(device->devtype), hostno,
  526. device->bus, device->target, device->lun);
  527. return 0;
  528. }
  529. /* Replace an entry from h->dev[] array. */
  530. static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
  531. int entry, struct hpsa_scsi_dev_t *new_entry,
  532. struct hpsa_scsi_dev_t *added[], int *nadded,
  533. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  534. {
  535. /* assumes h->devlock is held */
  536. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  537. removed[*nremoved] = h->dev[entry];
  538. (*nremoved)++;
  539. h->dev[entry] = new_entry;
  540. added[*nadded] = new_entry;
  541. (*nadded)++;
  542. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
  543. scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
  544. new_entry->target, new_entry->lun);
  545. }
  546. /* Remove an entry from h->dev[] array. */
  547. static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
  548. struct hpsa_scsi_dev_t *removed[], int *nremoved)
  549. {
  550. /* assumes h->devlock is held */
  551. int i;
  552. struct hpsa_scsi_dev_t *sd;
  553. BUG_ON(entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA);
  554. sd = h->dev[entry];
  555. removed[*nremoved] = h->dev[entry];
  556. (*nremoved)++;
  557. for (i = entry; i < h->ndevices-1; i++)
  558. h->dev[i] = h->dev[i+1];
  559. h->ndevices--;
  560. dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
  561. scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
  562. sd->lun);
  563. }
  564. #define SCSI3ADDR_EQ(a, b) ( \
  565. (a)[7] == (b)[7] && \
  566. (a)[6] == (b)[6] && \
  567. (a)[5] == (b)[5] && \
  568. (a)[4] == (b)[4] && \
  569. (a)[3] == (b)[3] && \
  570. (a)[2] == (b)[2] && \
  571. (a)[1] == (b)[1] && \
  572. (a)[0] == (b)[0])
  573. static void fixup_botched_add(struct ctlr_info *h,
  574. struct hpsa_scsi_dev_t *added)
  575. {
  576. /* called when scsi_add_device fails in order to re-adjust
  577. * h->dev[] to match the mid layer's view.
  578. */
  579. unsigned long flags;
  580. int i, j;
  581. spin_lock_irqsave(&h->lock, flags);
  582. for (i = 0; i < h->ndevices; i++) {
  583. if (h->dev[i] == added) {
  584. for (j = i; j < h->ndevices-1; j++)
  585. h->dev[j] = h->dev[j+1];
  586. h->ndevices--;
  587. break;
  588. }
  589. }
  590. spin_unlock_irqrestore(&h->lock, flags);
  591. kfree(added);
  592. }
  593. static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
  594. struct hpsa_scsi_dev_t *dev2)
  595. {
  596. /* we compare everything except lun and target as these
  597. * are not yet assigned. Compare parts likely
  598. * to differ first
  599. */
  600. if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
  601. sizeof(dev1->scsi3addr)) != 0)
  602. return 0;
  603. if (memcmp(dev1->device_id, dev2->device_id,
  604. sizeof(dev1->device_id)) != 0)
  605. return 0;
  606. if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
  607. return 0;
  608. if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
  609. return 0;
  610. if (dev1->devtype != dev2->devtype)
  611. return 0;
  612. if (dev1->bus != dev2->bus)
  613. return 0;
  614. return 1;
  615. }
  616. /* Find needle in haystack. If exact match found, return DEVICE_SAME,
  617. * and return needle location in *index. If scsi3addr matches, but not
  618. * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
  619. * location in *index. If needle not found, return DEVICE_NOT_FOUND.
  620. */
  621. static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
  622. struct hpsa_scsi_dev_t *haystack[], int haystack_size,
  623. int *index)
  624. {
  625. int i;
  626. #define DEVICE_NOT_FOUND 0
  627. #define DEVICE_CHANGED 1
  628. #define DEVICE_SAME 2
  629. for (i = 0; i < haystack_size; i++) {
  630. if (haystack[i] == NULL) /* previously removed. */
  631. continue;
  632. if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
  633. *index = i;
  634. if (device_is_the_same(needle, haystack[i]))
  635. return DEVICE_SAME;
  636. else
  637. return DEVICE_CHANGED;
  638. }
  639. }
  640. *index = -1;
  641. return DEVICE_NOT_FOUND;
  642. }
  643. static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
  644. struct hpsa_scsi_dev_t *sd[], int nsds)
  645. {
  646. /* sd contains scsi3 addresses and devtypes, and inquiry
  647. * data. This function takes what's in sd to be the current
  648. * reality and updates h->dev[] to reflect that reality.
  649. */
  650. int i, entry, device_change, changes = 0;
  651. struct hpsa_scsi_dev_t *csd;
  652. unsigned long flags;
  653. struct hpsa_scsi_dev_t **added, **removed;
  654. int nadded, nremoved;
  655. struct Scsi_Host *sh = NULL;
  656. added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  657. GFP_KERNEL);
  658. removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  659. GFP_KERNEL);
  660. if (!added || !removed) {
  661. dev_warn(&h->pdev->dev, "out of memory in "
  662. "adjust_hpsa_scsi_table\n");
  663. goto free_and_out;
  664. }
  665. spin_lock_irqsave(&h->devlock, flags);
  666. /* find any devices in h->dev[] that are not in
  667. * sd[] and remove them from h->dev[], and for any
  668. * devices which have changed, remove the old device
  669. * info and add the new device info.
  670. */
  671. i = 0;
  672. nremoved = 0;
  673. nadded = 0;
  674. while (i < h->ndevices) {
  675. csd = h->dev[i];
  676. device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
  677. if (device_change == DEVICE_NOT_FOUND) {
  678. changes++;
  679. hpsa_scsi_remove_entry(h, hostno, i,
  680. removed, &nremoved);
  681. continue; /* remove ^^^, hence i not incremented */
  682. } else if (device_change == DEVICE_CHANGED) {
  683. changes++;
  684. hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
  685. added, &nadded, removed, &nremoved);
  686. /* Set it to NULL to prevent it from being freed
  687. * at the bottom of hpsa_update_scsi_devices()
  688. */
  689. sd[entry] = NULL;
  690. }
  691. i++;
  692. }
  693. /* Now, make sure every device listed in sd[] is also
  694. * listed in h->dev[], adding them if they aren't found
  695. */
  696. for (i = 0; i < nsds; i++) {
  697. if (!sd[i]) /* if already added above. */
  698. continue;
  699. device_change = hpsa_scsi_find_entry(sd[i], h->dev,
  700. h->ndevices, &entry);
  701. if (device_change == DEVICE_NOT_FOUND) {
  702. changes++;
  703. if (hpsa_scsi_add_entry(h, hostno, sd[i],
  704. added, &nadded) != 0)
  705. break;
  706. sd[i] = NULL; /* prevent from being freed later. */
  707. } else if (device_change == DEVICE_CHANGED) {
  708. /* should never happen... */
  709. changes++;
  710. dev_warn(&h->pdev->dev,
  711. "device unexpectedly changed.\n");
  712. /* but if it does happen, we just ignore that device */
  713. }
  714. }
  715. spin_unlock_irqrestore(&h->devlock, flags);
  716. /* Don't notify scsi mid layer of any changes the first time through
  717. * (or if there are no changes) scsi_scan_host will do it later the
  718. * first time through.
  719. */
  720. if (hostno == -1 || !changes)
  721. goto free_and_out;
  722. sh = h->scsi_host;
  723. /* Notify scsi mid layer of any removed devices */
  724. for (i = 0; i < nremoved; i++) {
  725. struct scsi_device *sdev =
  726. scsi_device_lookup(sh, removed[i]->bus,
  727. removed[i]->target, removed[i]->lun);
  728. if (sdev != NULL) {
  729. scsi_remove_device(sdev);
  730. scsi_device_put(sdev);
  731. } else {
  732. /* We don't expect to get here.
  733. * future cmds to this device will get selection
  734. * timeout as if the device was gone.
  735. */
  736. dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
  737. " for removal.", hostno, removed[i]->bus,
  738. removed[i]->target, removed[i]->lun);
  739. }
  740. kfree(removed[i]);
  741. removed[i] = NULL;
  742. }
  743. /* Notify scsi mid layer of any added devices */
  744. for (i = 0; i < nadded; i++) {
  745. if (scsi_add_device(sh, added[i]->bus,
  746. added[i]->target, added[i]->lun) == 0)
  747. continue;
  748. dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
  749. "device not added.\n", hostno, added[i]->bus,
  750. added[i]->target, added[i]->lun);
  751. /* now we have to remove it from h->dev,
  752. * since it didn't get added to scsi mid layer
  753. */
  754. fixup_botched_add(h, added[i]);
  755. }
  756. free_and_out:
  757. kfree(added);
  758. kfree(removed);
  759. }
  760. /*
  761. * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
  762. * Assume's h->devlock is held.
  763. */
  764. static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
  765. int bus, int target, int lun)
  766. {
  767. int i;
  768. struct hpsa_scsi_dev_t *sd;
  769. for (i = 0; i < h->ndevices; i++) {
  770. sd = h->dev[i];
  771. if (sd->bus == bus && sd->target == target && sd->lun == lun)
  772. return sd;
  773. }
  774. return NULL;
  775. }
  776. /* link sdev->hostdata to our per-device structure. */
  777. static int hpsa_slave_alloc(struct scsi_device *sdev)
  778. {
  779. struct hpsa_scsi_dev_t *sd;
  780. unsigned long flags;
  781. struct ctlr_info *h;
  782. h = sdev_to_hba(sdev);
  783. spin_lock_irqsave(&h->devlock, flags);
  784. sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
  785. sdev_id(sdev), sdev->lun);
  786. if (sd != NULL)
  787. sdev->hostdata = sd;
  788. spin_unlock_irqrestore(&h->devlock, flags);
  789. return 0;
  790. }
  791. static void hpsa_slave_destroy(struct scsi_device *sdev)
  792. {
  793. /* nothing to do. */
  794. }
  795. static void hpsa_scsi_setup(struct ctlr_info *h)
  796. {
  797. h->ndevices = 0;
  798. h->scsi_host = NULL;
  799. spin_lock_init(&h->devlock);
  800. }
  801. static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
  802. {
  803. int i;
  804. if (!h->cmd_sg_list)
  805. return;
  806. for (i = 0; i < h->nr_cmds; i++) {
  807. kfree(h->cmd_sg_list[i]);
  808. h->cmd_sg_list[i] = NULL;
  809. }
  810. kfree(h->cmd_sg_list);
  811. h->cmd_sg_list = NULL;
  812. }
  813. static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
  814. {
  815. int i;
  816. if (h->chainsize <= 0)
  817. return 0;
  818. h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
  819. GFP_KERNEL);
  820. if (!h->cmd_sg_list)
  821. return -ENOMEM;
  822. for (i = 0; i < h->nr_cmds; i++) {
  823. h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
  824. h->chainsize, GFP_KERNEL);
  825. if (!h->cmd_sg_list[i])
  826. goto clean;
  827. }
  828. return 0;
  829. clean:
  830. hpsa_free_sg_chain_blocks(h);
  831. return -ENOMEM;
  832. }
  833. static void hpsa_map_sg_chain_block(struct ctlr_info *h,
  834. struct CommandList *c)
  835. {
  836. struct SGDescriptor *chain_sg, *chain_block;
  837. u64 temp64;
  838. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  839. chain_block = h->cmd_sg_list[c->cmdindex];
  840. chain_sg->Ext = HPSA_SG_CHAIN;
  841. chain_sg->Len = sizeof(*chain_sg) *
  842. (c->Header.SGTotal - h->max_cmd_sg_entries);
  843. temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
  844. PCI_DMA_TODEVICE);
  845. chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
  846. chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
  847. }
  848. static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
  849. struct CommandList *c)
  850. {
  851. struct SGDescriptor *chain_sg;
  852. union u64bit temp64;
  853. if (c->Header.SGTotal <= h->max_cmd_sg_entries)
  854. return;
  855. chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
  856. temp64.val32.lower = chain_sg->Addr.lower;
  857. temp64.val32.upper = chain_sg->Addr.upper;
  858. pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
  859. }
  860. static void complete_scsi_command(struct CommandList *cp,
  861. int timeout, u32 tag)
  862. {
  863. struct scsi_cmnd *cmd;
  864. struct ctlr_info *h;
  865. struct ErrorInfo *ei;
  866. unsigned char sense_key;
  867. unsigned char asc; /* additional sense code */
  868. unsigned char ascq; /* additional sense code qualifier */
  869. ei = cp->err_info;
  870. cmd = (struct scsi_cmnd *) cp->scsi_cmd;
  871. h = cp->h;
  872. scsi_dma_unmap(cmd); /* undo the DMA mappings */
  873. if (cp->Header.SGTotal > h->max_cmd_sg_entries)
  874. hpsa_unmap_sg_chain_block(h, cp);
  875. cmd->result = (DID_OK << 16); /* host byte */
  876. cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */
  877. cmd->result |= ei->ScsiStatus;
  878. /* copy the sense data whether we need to or not. */
  879. memcpy(cmd->sense_buffer, ei->SenseInfo,
  880. ei->SenseLen > SCSI_SENSE_BUFFERSIZE ?
  881. SCSI_SENSE_BUFFERSIZE :
  882. ei->SenseLen);
  883. scsi_set_resid(cmd, ei->ResidualCnt);
  884. if (ei->CommandStatus == 0) {
  885. cmd->scsi_done(cmd);
  886. cmd_free(h, cp);
  887. return;
  888. }
  889. /* an error has occurred */
  890. switch (ei->CommandStatus) {
  891. case CMD_TARGET_STATUS:
  892. if (ei->ScsiStatus) {
  893. /* Get sense key */
  894. sense_key = 0xf & ei->SenseInfo[2];
  895. /* Get additional sense code */
  896. asc = ei->SenseInfo[12];
  897. /* Get addition sense code qualifier */
  898. ascq = ei->SenseInfo[13];
  899. }
  900. if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
  901. if (check_for_unit_attention(h, cp)) {
  902. cmd->result = DID_SOFT_ERROR << 16;
  903. break;
  904. }
  905. if (sense_key == ILLEGAL_REQUEST) {
  906. /*
  907. * SCSI REPORT_LUNS is commonly unsupported on
  908. * Smart Array. Suppress noisy complaint.
  909. */
  910. if (cp->Request.CDB[0] == REPORT_LUNS)
  911. break;
  912. /* If ASC/ASCQ indicate Logical Unit
  913. * Not Supported condition,
  914. */
  915. if ((asc == 0x25) && (ascq == 0x0)) {
  916. dev_warn(&h->pdev->dev, "cp %p "
  917. "has check condition\n", cp);
  918. break;
  919. }
  920. }
  921. if (sense_key == NOT_READY) {
  922. /* If Sense is Not Ready, Logical Unit
  923. * Not ready, Manual Intervention
  924. * required
  925. */
  926. if ((asc == 0x04) && (ascq == 0x03)) {
  927. dev_warn(&h->pdev->dev, "cp %p "
  928. "has check condition: unit "
  929. "not ready, manual "
  930. "intervention required\n", cp);
  931. break;
  932. }
  933. }
  934. if (sense_key == ABORTED_COMMAND) {
  935. /* Aborted command is retryable */
  936. dev_warn(&h->pdev->dev, "cp %p "
  937. "has check condition: aborted command: "
  938. "ASC: 0x%x, ASCQ: 0x%x\n",
  939. cp, asc, ascq);
  940. cmd->result = DID_SOFT_ERROR << 16;
  941. break;
  942. }
  943. /* Must be some other type of check condition */
  944. dev_warn(&h->pdev->dev, "cp %p has check condition: "
  945. "unknown type: "
  946. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  947. "Returning result: 0x%x, "
  948. "cmd=[%02x %02x %02x %02x %02x "
  949. "%02x %02x %02x %02x %02x %02x "
  950. "%02x %02x %02x %02x %02x]\n",
  951. cp, sense_key, asc, ascq,
  952. cmd->result,
  953. cmd->cmnd[0], cmd->cmnd[1],
  954. cmd->cmnd[2], cmd->cmnd[3],
  955. cmd->cmnd[4], cmd->cmnd[5],
  956. cmd->cmnd[6], cmd->cmnd[7],
  957. cmd->cmnd[8], cmd->cmnd[9],
  958. cmd->cmnd[10], cmd->cmnd[11],
  959. cmd->cmnd[12], cmd->cmnd[13],
  960. cmd->cmnd[14], cmd->cmnd[15]);
  961. break;
  962. }
  963. /* Problem was not a check condition
  964. * Pass it up to the upper layers...
  965. */
  966. if (ei->ScsiStatus) {
  967. dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
  968. "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
  969. "Returning result: 0x%x\n",
  970. cp, ei->ScsiStatus,
  971. sense_key, asc, ascq,
  972. cmd->result);
  973. } else { /* scsi status is zero??? How??? */
  974. dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
  975. "Returning no connection.\n", cp),
  976. /* Ordinarily, this case should never happen,
  977. * but there is a bug in some released firmware
  978. * revisions that allows it to happen if, for
  979. * example, a 4100 backplane loses power and
  980. * the tape drive is in it. We assume that
  981. * it's a fatal error of some kind because we
  982. * can't show that it wasn't. We will make it
  983. * look like selection timeout since that is
  984. * the most common reason for this to occur,
  985. * and it's severe enough.
  986. */
  987. cmd->result = DID_NO_CONNECT << 16;
  988. }
  989. break;
  990. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  991. break;
  992. case CMD_DATA_OVERRUN:
  993. dev_warn(&h->pdev->dev, "cp %p has"
  994. " completed with data overrun "
  995. "reported\n", cp);
  996. break;
  997. case CMD_INVALID: {
  998. /* print_bytes(cp, sizeof(*cp), 1, 0);
  999. print_cmd(cp); */
  1000. /* We get CMD_INVALID if you address a non-existent device
  1001. * instead of a selection timeout (no response). You will
  1002. * see this if you yank out a drive, then try to access it.
  1003. * This is kind of a shame because it means that any other
  1004. * CMD_INVALID (e.g. driver bug) will get interpreted as a
  1005. * missing target. */
  1006. cmd->result = DID_NO_CONNECT << 16;
  1007. }
  1008. break;
  1009. case CMD_PROTOCOL_ERR:
  1010. dev_warn(&h->pdev->dev, "cp %p has "
  1011. "protocol error \n", cp);
  1012. break;
  1013. case CMD_HARDWARE_ERR:
  1014. cmd->result = DID_ERROR << 16;
  1015. dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp);
  1016. break;
  1017. case CMD_CONNECTION_LOST:
  1018. cmd->result = DID_ERROR << 16;
  1019. dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
  1020. break;
  1021. case CMD_ABORTED:
  1022. cmd->result = DID_ABORT << 16;
  1023. dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
  1024. cp, ei->ScsiStatus);
  1025. break;
  1026. case CMD_ABORT_FAILED:
  1027. cmd->result = DID_ERROR << 16;
  1028. dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
  1029. break;
  1030. case CMD_UNSOLICITED_ABORT:
  1031. cmd->result = DID_RESET << 16;
  1032. dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited "
  1033. "abort\n", cp);
  1034. break;
  1035. case CMD_TIMEOUT:
  1036. cmd->result = DID_TIME_OUT << 16;
  1037. dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
  1038. break;
  1039. case CMD_UNABORTABLE:
  1040. cmd->result = DID_ERROR << 16;
  1041. dev_warn(&h->pdev->dev, "Command unabortable\n");
  1042. break;
  1043. default:
  1044. cmd->result = DID_ERROR << 16;
  1045. dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
  1046. cp, ei->CommandStatus);
  1047. }
  1048. cmd->scsi_done(cmd);
  1049. cmd_free(h, cp);
  1050. }
  1051. static int hpsa_scsi_detect(struct ctlr_info *h)
  1052. {
  1053. struct Scsi_Host *sh;
  1054. int error;
  1055. sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
  1056. if (sh == NULL)
  1057. goto fail;
  1058. sh->io_port = 0;
  1059. sh->n_io_port = 0;
  1060. sh->this_id = -1;
  1061. sh->max_channel = 3;
  1062. sh->max_cmd_len = MAX_COMMAND_SIZE;
  1063. sh->max_lun = HPSA_MAX_LUN;
  1064. sh->max_id = HPSA_MAX_LUN;
  1065. sh->can_queue = h->nr_cmds;
  1066. sh->cmd_per_lun = h->nr_cmds;
  1067. sh->sg_tablesize = h->maxsgentries;
  1068. h->scsi_host = sh;
  1069. sh->hostdata[0] = (unsigned long) h;
  1070. sh->irq = h->intr[PERF_MODE_INT];
  1071. sh->unique_id = sh->irq;
  1072. error = scsi_add_host(sh, &h->pdev->dev);
  1073. if (error)
  1074. goto fail_host_put;
  1075. scsi_scan_host(sh);
  1076. return 0;
  1077. fail_host_put:
  1078. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host"
  1079. " failed for controller %d\n", h->ctlr);
  1080. scsi_host_put(sh);
  1081. return error;
  1082. fail:
  1083. dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc"
  1084. " failed for controller %d\n", h->ctlr);
  1085. return -ENOMEM;
  1086. }
  1087. static void hpsa_pci_unmap(struct pci_dev *pdev,
  1088. struct CommandList *c, int sg_used, int data_direction)
  1089. {
  1090. int i;
  1091. union u64bit addr64;
  1092. for (i = 0; i < sg_used; i++) {
  1093. addr64.val32.lower = c->SG[i].Addr.lower;
  1094. addr64.val32.upper = c->SG[i].Addr.upper;
  1095. pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
  1096. data_direction);
  1097. }
  1098. }
  1099. static void hpsa_map_one(struct pci_dev *pdev,
  1100. struct CommandList *cp,
  1101. unsigned char *buf,
  1102. size_t buflen,
  1103. int data_direction)
  1104. {
  1105. u64 addr64;
  1106. if (buflen == 0 || data_direction == PCI_DMA_NONE) {
  1107. cp->Header.SGList = 0;
  1108. cp->Header.SGTotal = 0;
  1109. return;
  1110. }
  1111. addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
  1112. cp->SG[0].Addr.lower =
  1113. (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
  1114. cp->SG[0].Addr.upper =
  1115. (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
  1116. cp->SG[0].Len = buflen;
  1117. cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */
  1118. cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
  1119. }
  1120. static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
  1121. struct CommandList *c)
  1122. {
  1123. DECLARE_COMPLETION_ONSTACK(wait);
  1124. c->waiting = &wait;
  1125. enqueue_cmd_and_start_io(h, c);
  1126. wait_for_completion(&wait);
  1127. }
  1128. static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
  1129. struct CommandList *c, int data_direction)
  1130. {
  1131. int retry_count = 0;
  1132. do {
  1133. memset(c->err_info, 0, sizeof(c->err_info));
  1134. hpsa_scsi_do_simple_cmd_core(h, c);
  1135. retry_count++;
  1136. } while (check_for_unit_attention(h, c) && retry_count <= 3);
  1137. hpsa_pci_unmap(h->pdev, c, 1, data_direction);
  1138. }
  1139. static void hpsa_scsi_interpret_error(struct CommandList *cp)
  1140. {
  1141. struct ErrorInfo *ei;
  1142. struct device *d = &cp->h->pdev->dev;
  1143. ei = cp->err_info;
  1144. switch (ei->CommandStatus) {
  1145. case CMD_TARGET_STATUS:
  1146. dev_warn(d, "cmd %p has completed with errors\n", cp);
  1147. dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
  1148. ei->ScsiStatus);
  1149. if (ei->ScsiStatus == 0)
  1150. dev_warn(d, "SCSI status is abnormally zero. "
  1151. "(probably indicates selection timeout "
  1152. "reported incorrectly due to a known "
  1153. "firmware bug, circa July, 2001.)\n");
  1154. break;
  1155. case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
  1156. dev_info(d, "UNDERRUN\n");
  1157. break;
  1158. case CMD_DATA_OVERRUN:
  1159. dev_warn(d, "cp %p has completed with data overrun\n", cp);
  1160. break;
  1161. case CMD_INVALID: {
  1162. /* controller unfortunately reports SCSI passthru's
  1163. * to non-existent targets as invalid commands.
  1164. */
  1165. dev_warn(d, "cp %p is reported invalid (probably means "
  1166. "target device no longer present)\n", cp);
  1167. /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
  1168. print_cmd(cp); */
  1169. }
  1170. break;
  1171. case CMD_PROTOCOL_ERR:
  1172. dev_warn(d, "cp %p has protocol error \n", cp);
  1173. break;
  1174. case CMD_HARDWARE_ERR:
  1175. /* cmd->result = DID_ERROR << 16; */
  1176. dev_warn(d, "cp %p had hardware error\n", cp);
  1177. break;
  1178. case CMD_CONNECTION_LOST:
  1179. dev_warn(d, "cp %p had connection lost\n", cp);
  1180. break;
  1181. case CMD_ABORTED:
  1182. dev_warn(d, "cp %p was aborted\n", cp);
  1183. break;
  1184. case CMD_ABORT_FAILED:
  1185. dev_warn(d, "cp %p reports abort failed\n", cp);
  1186. break;
  1187. case CMD_UNSOLICITED_ABORT:
  1188. dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
  1189. break;
  1190. case CMD_TIMEOUT:
  1191. dev_warn(d, "cp %p timed out\n", cp);
  1192. break;
  1193. case CMD_UNABORTABLE:
  1194. dev_warn(d, "Command unabortable\n");
  1195. break;
  1196. default:
  1197. dev_warn(d, "cp %p returned unknown status %x\n", cp,
  1198. ei->CommandStatus);
  1199. }
  1200. }
  1201. static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
  1202. unsigned char page, unsigned char *buf,
  1203. unsigned char bufsize)
  1204. {
  1205. int rc = IO_OK;
  1206. struct CommandList *c;
  1207. struct ErrorInfo *ei;
  1208. c = cmd_special_alloc(h);
  1209. if (c == NULL) { /* trouble... */
  1210. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1211. return -ENOMEM;
  1212. }
  1213. fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
  1214. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1215. ei = c->err_info;
  1216. if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1217. hpsa_scsi_interpret_error(c);
  1218. rc = -1;
  1219. }
  1220. cmd_special_free(h, c);
  1221. return rc;
  1222. }
  1223. static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
  1224. {
  1225. int rc = IO_OK;
  1226. struct CommandList *c;
  1227. struct ErrorInfo *ei;
  1228. c = cmd_special_alloc(h);
  1229. if (c == NULL) { /* trouble... */
  1230. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1231. return -ENOMEM;
  1232. }
  1233. fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
  1234. hpsa_scsi_do_simple_cmd_core(h, c);
  1235. /* no unmap needed here because no data xfer. */
  1236. ei = c->err_info;
  1237. if (ei->CommandStatus != 0) {
  1238. hpsa_scsi_interpret_error(c);
  1239. rc = -1;
  1240. }
  1241. cmd_special_free(h, c);
  1242. return rc;
  1243. }
  1244. static void hpsa_get_raid_level(struct ctlr_info *h,
  1245. unsigned char *scsi3addr, unsigned char *raid_level)
  1246. {
  1247. int rc;
  1248. unsigned char *buf;
  1249. *raid_level = RAID_UNKNOWN;
  1250. buf = kzalloc(64, GFP_KERNEL);
  1251. if (!buf)
  1252. return;
  1253. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
  1254. if (rc == 0)
  1255. *raid_level = buf[8];
  1256. if (*raid_level > RAID_UNKNOWN)
  1257. *raid_level = RAID_UNKNOWN;
  1258. kfree(buf);
  1259. return;
  1260. }
  1261. /* Get the device id from inquiry page 0x83 */
  1262. static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
  1263. unsigned char *device_id, int buflen)
  1264. {
  1265. int rc;
  1266. unsigned char *buf;
  1267. if (buflen > 16)
  1268. buflen = 16;
  1269. buf = kzalloc(64, GFP_KERNEL);
  1270. if (!buf)
  1271. return -1;
  1272. rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
  1273. if (rc == 0)
  1274. memcpy(device_id, &buf[8], buflen);
  1275. kfree(buf);
  1276. return rc != 0;
  1277. }
  1278. static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
  1279. struct ReportLUNdata *buf, int bufsize,
  1280. int extended_response)
  1281. {
  1282. int rc = IO_OK;
  1283. struct CommandList *c;
  1284. unsigned char scsi3addr[8];
  1285. struct ErrorInfo *ei;
  1286. c = cmd_special_alloc(h);
  1287. if (c == NULL) { /* trouble... */
  1288. dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  1289. return -1;
  1290. }
  1291. /* address the controller */
  1292. memset(scsi3addr, 0, sizeof(scsi3addr));
  1293. fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
  1294. buf, bufsize, 0, scsi3addr, TYPE_CMD);
  1295. if (extended_response)
  1296. c->Request.CDB[1] = extended_response;
  1297. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
  1298. ei = c->err_info;
  1299. if (ei->CommandStatus != 0 &&
  1300. ei->CommandStatus != CMD_DATA_UNDERRUN) {
  1301. hpsa_scsi_interpret_error(c);
  1302. rc = -1;
  1303. }
  1304. cmd_special_free(h, c);
  1305. return rc;
  1306. }
  1307. static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
  1308. struct ReportLUNdata *buf,
  1309. int bufsize, int extended_response)
  1310. {
  1311. return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
  1312. }
  1313. static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
  1314. struct ReportLUNdata *buf, int bufsize)
  1315. {
  1316. return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
  1317. }
  1318. static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
  1319. int bus, int target, int lun)
  1320. {
  1321. device->bus = bus;
  1322. device->target = target;
  1323. device->lun = lun;
  1324. }
  1325. static int hpsa_update_device_info(struct ctlr_info *h,
  1326. unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device)
  1327. {
  1328. #define OBDR_TAPE_INQ_SIZE 49
  1329. unsigned char *inq_buff;
  1330. inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1331. if (!inq_buff)
  1332. goto bail_out;
  1333. /* Do an inquiry to the device to see what it is. */
  1334. if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
  1335. (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
  1336. /* Inquiry failed (msg printed already) */
  1337. dev_err(&h->pdev->dev,
  1338. "hpsa_update_device_info: inquiry failed\n");
  1339. goto bail_out;
  1340. }
  1341. this_device->devtype = (inq_buff[0] & 0x1f);
  1342. memcpy(this_device->scsi3addr, scsi3addr, 8);
  1343. memcpy(this_device->vendor, &inq_buff[8],
  1344. sizeof(this_device->vendor));
  1345. memcpy(this_device->model, &inq_buff[16],
  1346. sizeof(this_device->model));
  1347. memset(this_device->device_id, 0,
  1348. sizeof(this_device->device_id));
  1349. hpsa_get_device_id(h, scsi3addr, this_device->device_id,
  1350. sizeof(this_device->device_id));
  1351. if (this_device->devtype == TYPE_DISK &&
  1352. is_logical_dev_addr_mode(scsi3addr))
  1353. hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
  1354. else
  1355. this_device->raid_level = RAID_UNKNOWN;
  1356. kfree(inq_buff);
  1357. return 0;
  1358. bail_out:
  1359. kfree(inq_buff);
  1360. return 1;
  1361. }
  1362. static unsigned char *msa2xxx_model[] = {
  1363. "MSA2012",
  1364. "MSA2024",
  1365. "MSA2312",
  1366. "MSA2324",
  1367. NULL,
  1368. };
  1369. static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
  1370. {
  1371. int i;
  1372. for (i = 0; msa2xxx_model[i]; i++)
  1373. if (strncmp(device->model, msa2xxx_model[i],
  1374. strlen(msa2xxx_model[i])) == 0)
  1375. return 1;
  1376. return 0;
  1377. }
  1378. /* Helper function to assign bus, target, lun mapping of devices.
  1379. * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical
  1380. * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
  1381. * Logical drive target and lun are assigned at this time, but
  1382. * physical device lun and target assignment are deferred (assigned
  1383. * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
  1384. */
  1385. static void figure_bus_target_lun(struct ctlr_info *h,
  1386. u8 *lunaddrbytes, int *bus, int *target, int *lun,
  1387. struct hpsa_scsi_dev_t *device)
  1388. {
  1389. u32 lunid;
  1390. if (is_logical_dev_addr_mode(lunaddrbytes)) {
  1391. /* logical device */
  1392. if (unlikely(is_scsi_rev_5(h))) {
  1393. /* p1210m, logical drives lun assignments
  1394. * match SCSI REPORT LUNS data.
  1395. */
  1396. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1397. *bus = 0;
  1398. *target = 0;
  1399. *lun = (lunid & 0x3fff) + 1;
  1400. } else {
  1401. /* not p1210m... */
  1402. lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
  1403. if (is_msa2xxx(h, device)) {
  1404. /* msa2xxx way, put logicals on bus 1
  1405. * and match target/lun numbers box
  1406. * reports.
  1407. */
  1408. *bus = 1;
  1409. *target = (lunid >> 16) & 0x3fff;
  1410. *lun = lunid & 0x00ff;
  1411. } else {
  1412. /* Traditional smart array way. */
  1413. *bus = 0;
  1414. *lun = 0;
  1415. *target = lunid & 0x3fff;
  1416. }
  1417. }
  1418. } else {
  1419. /* physical device */
  1420. if (is_hba_lunid(lunaddrbytes))
  1421. if (unlikely(is_scsi_rev_5(h))) {
  1422. *bus = 0; /* put p1210m ctlr at 0,0,0 */
  1423. *target = 0;
  1424. *lun = 0;
  1425. return;
  1426. } else
  1427. *bus = 3; /* traditional smartarray */
  1428. else
  1429. *bus = 2; /* physical disk */
  1430. *target = -1;
  1431. *lun = -1; /* we will fill these in later. */
  1432. }
  1433. }
  1434. /*
  1435. * If there is no lun 0 on a target, linux won't find any devices.
  1436. * For the MSA2xxx boxes, we have to manually detect the enclosure
  1437. * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
  1438. * it for some reason. *tmpdevice is the target we're adding,
  1439. * this_device is a pointer into the current element of currentsd[]
  1440. * that we're building up in update_scsi_devices(), below.
  1441. * lunzerobits is a bitmap that tracks which targets already have a
  1442. * lun 0 assigned.
  1443. * Returns 1 if an enclosure was added, 0 if not.
  1444. */
  1445. static int add_msa2xxx_enclosure_device(struct ctlr_info *h,
  1446. struct hpsa_scsi_dev_t *tmpdevice,
  1447. struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
  1448. int bus, int target, int lun, unsigned long lunzerobits[],
  1449. int *nmsa2xxx_enclosures)
  1450. {
  1451. unsigned char scsi3addr[8];
  1452. if (test_bit(target, lunzerobits))
  1453. return 0; /* There is already a lun 0 on this target. */
  1454. if (!is_logical_dev_addr_mode(lunaddrbytes))
  1455. return 0; /* It's the logical targets that may lack lun 0. */
  1456. if (!is_msa2xxx(h, tmpdevice))
  1457. return 0; /* It's only the MSA2xxx that have this problem. */
  1458. if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */
  1459. return 0;
  1460. memset(scsi3addr, 0, 8);
  1461. scsi3addr[3] = target;
  1462. if (is_hba_lunid(scsi3addr))
  1463. return 0; /* Don't add the RAID controller here. */
  1464. if (is_scsi_rev_5(h))
  1465. return 0; /* p1210m doesn't need to do this. */
  1466. #define MAX_MSA2XXX_ENCLOSURES 32
  1467. if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) {
  1468. dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX "
  1469. "enclosures exceeded. Check your hardware "
  1470. "configuration.");
  1471. return 0;
  1472. }
  1473. if (hpsa_update_device_info(h, scsi3addr, this_device))
  1474. return 0;
  1475. (*nmsa2xxx_enclosures)++;
  1476. hpsa_set_bus_target_lun(this_device, bus, target, 0);
  1477. set_bit(target, lunzerobits);
  1478. return 1;
  1479. }
  1480. /*
  1481. * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev,
  1482. * logdev. The number of luns in physdev and logdev are returned in
  1483. * *nphysicals and *nlogicals, respectively.
  1484. * Returns 0 on success, -1 otherwise.
  1485. */
  1486. static int hpsa_gather_lun_info(struct ctlr_info *h,
  1487. int reportlunsize,
  1488. struct ReportLUNdata *physdev, u32 *nphysicals,
  1489. struct ReportLUNdata *logdev, u32 *nlogicals)
  1490. {
  1491. if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
  1492. dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
  1493. return -1;
  1494. }
  1495. *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
  1496. if (*nphysicals > HPSA_MAX_PHYS_LUN) {
  1497. dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
  1498. " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1499. *nphysicals - HPSA_MAX_PHYS_LUN);
  1500. *nphysicals = HPSA_MAX_PHYS_LUN;
  1501. }
  1502. if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
  1503. dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
  1504. return -1;
  1505. }
  1506. *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
  1507. /* Reject Logicals in excess of our max capability. */
  1508. if (*nlogicals > HPSA_MAX_LUN) {
  1509. dev_warn(&h->pdev->dev,
  1510. "maximum logical LUNs (%d) exceeded. "
  1511. "%d LUNs ignored.\n", HPSA_MAX_LUN,
  1512. *nlogicals - HPSA_MAX_LUN);
  1513. *nlogicals = HPSA_MAX_LUN;
  1514. }
  1515. if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
  1516. dev_warn(&h->pdev->dev,
  1517. "maximum logical + physical LUNs (%d) exceeded. "
  1518. "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
  1519. *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
  1520. *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
  1521. }
  1522. return 0;
  1523. }
  1524. u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
  1525. int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
  1526. struct ReportLUNdata *logdev_list)
  1527. {
  1528. /* Helper function, figure out where the LUN ID info is coming from
  1529. * given index i, lists of physical and logical devices, where in
  1530. * the list the raid controller is supposed to appear (first or last)
  1531. */
  1532. int logicals_start = nphysicals + (raid_ctlr_position == 0);
  1533. int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
  1534. if (i == raid_ctlr_position)
  1535. return RAID_CTLR_LUNID;
  1536. if (i < logicals_start)
  1537. return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
  1538. if (i < last_device)
  1539. return &logdev_list->LUN[i - nphysicals -
  1540. (raid_ctlr_position == 0)][0];
  1541. BUG();
  1542. return NULL;
  1543. }
  1544. static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
  1545. {
  1546. /* the idea here is we could get notified
  1547. * that some devices have changed, so we do a report
  1548. * physical luns and report logical luns cmd, and adjust
  1549. * our list of devices accordingly.
  1550. *
  1551. * The scsi3addr's of devices won't change so long as the
  1552. * adapter is not reset. That means we can rescan and
  1553. * tell which devices we already know about, vs. new
  1554. * devices, vs. disappearing devices.
  1555. */
  1556. struct ReportLUNdata *physdev_list = NULL;
  1557. struct ReportLUNdata *logdev_list = NULL;
  1558. unsigned char *inq_buff = NULL;
  1559. u32 nphysicals = 0;
  1560. u32 nlogicals = 0;
  1561. u32 ndev_allocated = 0;
  1562. struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
  1563. int ncurrent = 0;
  1564. int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
  1565. int i, nmsa2xxx_enclosures, ndevs_to_allocate;
  1566. int bus, target, lun;
  1567. int raid_ctlr_position;
  1568. DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR);
  1569. currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA,
  1570. GFP_KERNEL);
  1571. physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1572. logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
  1573. inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
  1574. tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
  1575. if (!currentsd || !physdev_list || !logdev_list ||
  1576. !inq_buff || !tmpdevice) {
  1577. dev_err(&h->pdev->dev, "out of memory\n");
  1578. goto out;
  1579. }
  1580. memset(lunzerobits, 0, sizeof(lunzerobits));
  1581. if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
  1582. logdev_list, &nlogicals))
  1583. goto out;
  1584. /* We might see up to 32 MSA2xxx enclosures, actually 8 of them
  1585. * but each of them 4 times through different paths. The plus 1
  1586. * is for the RAID controller.
  1587. */
  1588. ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1;
  1589. /* Allocate the per device structures */
  1590. for (i = 0; i < ndevs_to_allocate; i++) {
  1591. currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
  1592. if (!currentsd[i]) {
  1593. dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
  1594. __FILE__, __LINE__);
  1595. goto out;
  1596. }
  1597. ndev_allocated++;
  1598. }
  1599. if (unlikely(is_scsi_rev_5(h)))
  1600. raid_ctlr_position = 0;
  1601. else
  1602. raid_ctlr_position = nphysicals + nlogicals;
  1603. /* adjust our table of devices */
  1604. nmsa2xxx_enclosures = 0;
  1605. for (i = 0; i < nphysicals + nlogicals + 1; i++) {
  1606. u8 *lunaddrbytes;
  1607. /* Figure out where the LUN ID info is coming from */
  1608. lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
  1609. i, nphysicals, nlogicals, physdev_list, logdev_list);
  1610. /* skip masked physical devices. */
  1611. if (lunaddrbytes[3] & 0xC0 &&
  1612. i < nphysicals + (raid_ctlr_position == 0))
  1613. continue;
  1614. /* Get device type, vendor, model, device id */
  1615. if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice))
  1616. continue; /* skip it if we can't talk to it. */
  1617. figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun,
  1618. tmpdevice);
  1619. this_device = currentsd[ncurrent];
  1620. /*
  1621. * For the msa2xxx boxes, we have to insert a LUN 0 which
  1622. * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
  1623. * is nonetheless an enclosure device there. We have to
  1624. * present that otherwise linux won't find anything if
  1625. * there is no lun 0.
  1626. */
  1627. if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device,
  1628. lunaddrbytes, bus, target, lun, lunzerobits,
  1629. &nmsa2xxx_enclosures)) {
  1630. ncurrent++;
  1631. this_device = currentsd[ncurrent];
  1632. }
  1633. *this_device = *tmpdevice;
  1634. hpsa_set_bus_target_lun(this_device, bus, target, lun);
  1635. switch (this_device->devtype) {
  1636. case TYPE_ROM: {
  1637. /* We don't *really* support actual CD-ROM devices,
  1638. * just "One Button Disaster Recovery" tape drive
  1639. * which temporarily pretends to be a CD-ROM drive.
  1640. * So we check that the device is really an OBDR tape
  1641. * device by checking for "$DR-10" in bytes 43-48 of
  1642. * the inquiry data.
  1643. */
  1644. char obdr_sig[7];
  1645. #define OBDR_TAPE_SIG "$DR-10"
  1646. strncpy(obdr_sig, &inq_buff[43], 6);
  1647. obdr_sig[6] = '\0';
  1648. if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0)
  1649. /* Not OBDR device, ignore it. */
  1650. break;
  1651. }
  1652. ncurrent++;
  1653. break;
  1654. case TYPE_DISK:
  1655. if (i < nphysicals)
  1656. break;
  1657. ncurrent++;
  1658. break;
  1659. case TYPE_TAPE:
  1660. case TYPE_MEDIUM_CHANGER:
  1661. ncurrent++;
  1662. break;
  1663. case TYPE_RAID:
  1664. /* Only present the Smartarray HBA as a RAID controller.
  1665. * If it's a RAID controller other than the HBA itself
  1666. * (an external RAID controller, MSA500 or similar)
  1667. * don't present it.
  1668. */
  1669. if (!is_hba_lunid(lunaddrbytes))
  1670. break;
  1671. ncurrent++;
  1672. break;
  1673. default:
  1674. break;
  1675. }
  1676. if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA)
  1677. break;
  1678. }
  1679. adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
  1680. out:
  1681. kfree(tmpdevice);
  1682. for (i = 0; i < ndev_allocated; i++)
  1683. kfree(currentsd[i]);
  1684. kfree(currentsd);
  1685. kfree(inq_buff);
  1686. kfree(physdev_list);
  1687. kfree(logdev_list);
  1688. }
  1689. /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
  1690. * dma mapping and fills in the scatter gather entries of the
  1691. * hpsa command, cp.
  1692. */
  1693. static int hpsa_scatter_gather(struct ctlr_info *h,
  1694. struct CommandList *cp,
  1695. struct scsi_cmnd *cmd)
  1696. {
  1697. unsigned int len;
  1698. struct scatterlist *sg;
  1699. u64 addr64;
  1700. int use_sg, i, sg_index, chained;
  1701. struct SGDescriptor *curr_sg;
  1702. BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
  1703. use_sg = scsi_dma_map(cmd);
  1704. if (use_sg < 0)
  1705. return use_sg;
  1706. if (!use_sg)
  1707. goto sglist_finished;
  1708. curr_sg = cp->SG;
  1709. chained = 0;
  1710. sg_index = 0;
  1711. scsi_for_each_sg(cmd, sg, use_sg, i) {
  1712. if (i == h->max_cmd_sg_entries - 1 &&
  1713. use_sg > h->max_cmd_sg_entries) {
  1714. chained = 1;
  1715. curr_sg = h->cmd_sg_list[cp->cmdindex];
  1716. sg_index = 0;
  1717. }
  1718. addr64 = (u64) sg_dma_address(sg);
  1719. len = sg_dma_len(sg);
  1720. curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
  1721. curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
  1722. curr_sg->Len = len;
  1723. curr_sg->Ext = 0; /* we are not chaining */
  1724. curr_sg++;
  1725. }
  1726. if (use_sg + chained > h->maxSG)
  1727. h->maxSG = use_sg + chained;
  1728. if (chained) {
  1729. cp->Header.SGList = h->max_cmd_sg_entries;
  1730. cp->Header.SGTotal = (u16) (use_sg + 1);
  1731. hpsa_map_sg_chain_block(h, cp);
  1732. return 0;
  1733. }
  1734. sglist_finished:
  1735. cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */
  1736. cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
  1737. return 0;
  1738. }
  1739. static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
  1740. void (*done)(struct scsi_cmnd *))
  1741. {
  1742. struct ctlr_info *h;
  1743. struct hpsa_scsi_dev_t *dev;
  1744. unsigned char scsi3addr[8];
  1745. struct CommandList *c;
  1746. unsigned long flags;
  1747. /* Get the ptr to our adapter structure out of cmd->host. */
  1748. h = sdev_to_hba(cmd->device);
  1749. dev = cmd->device->hostdata;
  1750. if (!dev) {
  1751. cmd->result = DID_NO_CONNECT << 16;
  1752. done(cmd);
  1753. return 0;
  1754. }
  1755. memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
  1756. /* Need a lock as this is being allocated from the pool */
  1757. spin_lock_irqsave(&h->lock, flags);
  1758. c = cmd_alloc(h);
  1759. spin_unlock_irqrestore(&h->lock, flags);
  1760. if (c == NULL) { /* trouble... */
  1761. dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
  1762. return SCSI_MLQUEUE_HOST_BUSY;
  1763. }
  1764. /* Fill in the command list header */
  1765. cmd->scsi_done = done; /* save this for use by completion code */
  1766. /* save c in case we have to abort it */
  1767. cmd->host_scribble = (unsigned char *) c;
  1768. c->cmd_type = CMD_SCSI;
  1769. c->scsi_cmd = cmd;
  1770. c->Header.ReplyQueue = 0; /* unused in simple mode */
  1771. memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
  1772. c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
  1773. c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
  1774. /* Fill in the request block... */
  1775. c->Request.Timeout = 0;
  1776. memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
  1777. BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
  1778. c->Request.CDBLen = cmd->cmd_len;
  1779. memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
  1780. c->Request.Type.Type = TYPE_CMD;
  1781. c->Request.Type.Attribute = ATTR_SIMPLE;
  1782. switch (cmd->sc_data_direction) {
  1783. case DMA_TO_DEVICE:
  1784. c->Request.Type.Direction = XFER_WRITE;
  1785. break;
  1786. case DMA_FROM_DEVICE:
  1787. c->Request.Type.Direction = XFER_READ;
  1788. break;
  1789. case DMA_NONE:
  1790. c->Request.Type.Direction = XFER_NONE;
  1791. break;
  1792. case DMA_BIDIRECTIONAL:
  1793. /* This can happen if a buggy application does a scsi passthru
  1794. * and sets both inlen and outlen to non-zero. ( see
  1795. * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
  1796. */
  1797. c->Request.Type.Direction = XFER_RSVD;
  1798. /* This is technically wrong, and hpsa controllers should
  1799. * reject it with CMD_INVALID, which is the most correct
  1800. * response, but non-fibre backends appear to let it
  1801. * slide by, and give the same results as if this field
  1802. * were set correctly. Either way is acceptable for
  1803. * our purposes here.
  1804. */
  1805. break;
  1806. default:
  1807. dev_err(&h->pdev->dev, "unknown data direction: %d\n",
  1808. cmd->sc_data_direction);
  1809. BUG();
  1810. break;
  1811. }
  1812. if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
  1813. cmd_free(h, c);
  1814. return SCSI_MLQUEUE_HOST_BUSY;
  1815. }
  1816. enqueue_cmd_and_start_io(h, c);
  1817. /* the cmd'll come back via intr handler in complete_scsi_command() */
  1818. return 0;
  1819. }
  1820. static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
  1821. static void hpsa_scan_start(struct Scsi_Host *sh)
  1822. {
  1823. struct ctlr_info *h = shost_to_hba(sh);
  1824. unsigned long flags;
  1825. /* wait until any scan already in progress is finished. */
  1826. while (1) {
  1827. spin_lock_irqsave(&h->scan_lock, flags);
  1828. if (h->scan_finished)
  1829. break;
  1830. spin_unlock_irqrestore(&h->scan_lock, flags);
  1831. wait_event(h->scan_wait_queue, h->scan_finished);
  1832. /* Note: We don't need to worry about a race between this
  1833. * thread and driver unload because the midlayer will
  1834. * have incremented the reference count, so unload won't
  1835. * happen if we're in here.
  1836. */
  1837. }
  1838. h->scan_finished = 0; /* mark scan as in progress */
  1839. spin_unlock_irqrestore(&h->scan_lock, flags);
  1840. hpsa_update_scsi_devices(h, h->scsi_host->host_no);
  1841. spin_lock_irqsave(&h->scan_lock, flags);
  1842. h->scan_finished = 1; /* mark scan as finished. */
  1843. wake_up_all(&h->scan_wait_queue);
  1844. spin_unlock_irqrestore(&h->scan_lock, flags);
  1845. }
  1846. static int hpsa_scan_finished(struct Scsi_Host *sh,
  1847. unsigned long elapsed_time)
  1848. {
  1849. struct ctlr_info *h = shost_to_hba(sh);
  1850. unsigned long flags;
  1851. int finished;
  1852. spin_lock_irqsave(&h->scan_lock, flags);
  1853. finished = h->scan_finished;
  1854. spin_unlock_irqrestore(&h->scan_lock, flags);
  1855. return finished;
  1856. }
  1857. static int hpsa_change_queue_depth(struct scsi_device *sdev,
  1858. int qdepth, int reason)
  1859. {
  1860. struct ctlr_info *h = sdev_to_hba(sdev);
  1861. if (reason != SCSI_QDEPTH_DEFAULT)
  1862. return -ENOTSUPP;
  1863. if (qdepth < 1)
  1864. qdepth = 1;
  1865. else
  1866. if (qdepth > h->nr_cmds)
  1867. qdepth = h->nr_cmds;
  1868. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1869. return sdev->queue_depth;
  1870. }
  1871. static void hpsa_unregister_scsi(struct ctlr_info *h)
  1872. {
  1873. /* we are being forcibly unloaded, and may not refuse. */
  1874. scsi_remove_host(h->scsi_host);
  1875. scsi_host_put(h->scsi_host);
  1876. h->scsi_host = NULL;
  1877. }
  1878. static int hpsa_register_scsi(struct ctlr_info *h)
  1879. {
  1880. int rc;
  1881. rc = hpsa_scsi_detect(h);
  1882. if (rc != 0)
  1883. dev_err(&h->pdev->dev, "hpsa_register_scsi: failed"
  1884. " hpsa_scsi_detect(), rc is %d\n", rc);
  1885. return rc;
  1886. }
  1887. static int wait_for_device_to_become_ready(struct ctlr_info *h,
  1888. unsigned char lunaddr[])
  1889. {
  1890. int rc = 0;
  1891. int count = 0;
  1892. int waittime = 1; /* seconds */
  1893. struct CommandList *c;
  1894. c = cmd_special_alloc(h);
  1895. if (!c) {
  1896. dev_warn(&h->pdev->dev, "out of memory in "
  1897. "wait_for_device_to_become_ready.\n");
  1898. return IO_ERROR;
  1899. }
  1900. /* Send test unit ready until device ready, or give up. */
  1901. while (count < HPSA_TUR_RETRY_LIMIT) {
  1902. /* Wait for a bit. do this first, because if we send
  1903. * the TUR right away, the reset will just abort it.
  1904. */
  1905. msleep(1000 * waittime);
  1906. count++;
  1907. /* Increase wait time with each try, up to a point. */
  1908. if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
  1909. waittime = waittime * 2;
  1910. /* Send the Test Unit Ready */
  1911. fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
  1912. hpsa_scsi_do_simple_cmd_core(h, c);
  1913. /* no unmap needed here because no data xfer. */
  1914. if (c->err_info->CommandStatus == CMD_SUCCESS)
  1915. break;
  1916. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  1917. c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
  1918. (c->err_info->SenseInfo[2] == NO_SENSE ||
  1919. c->err_info->SenseInfo[2] == UNIT_ATTENTION))
  1920. break;
  1921. dev_warn(&h->pdev->dev, "waiting %d secs "
  1922. "for device to become ready.\n", waittime);
  1923. rc = 1; /* device not ready. */
  1924. }
  1925. if (rc)
  1926. dev_warn(&h->pdev->dev, "giving up on device.\n");
  1927. else
  1928. dev_warn(&h->pdev->dev, "device is ready.\n");
  1929. cmd_special_free(h, c);
  1930. return rc;
  1931. }
  1932. /* Need at least one of these error handlers to keep ../scsi/hosts.c from
  1933. * complaining. Doing a host- or bus-reset can't do anything good here.
  1934. */
  1935. static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
  1936. {
  1937. int rc;
  1938. struct ctlr_info *h;
  1939. struct hpsa_scsi_dev_t *dev;
  1940. /* find the controller to which the command to be aborted was sent */
  1941. h = sdev_to_hba(scsicmd->device);
  1942. if (h == NULL) /* paranoia */
  1943. return FAILED;
  1944. dev = scsicmd->device->hostdata;
  1945. if (!dev) {
  1946. dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
  1947. "device lookup failed.\n");
  1948. return FAILED;
  1949. }
  1950. dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
  1951. h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
  1952. /* send a reset to the SCSI LUN which the command was sent to */
  1953. rc = hpsa_send_reset(h, dev->scsi3addr);
  1954. if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
  1955. return SUCCESS;
  1956. dev_warn(&h->pdev->dev, "resetting device failed.\n");
  1957. return FAILED;
  1958. }
  1959. /*
  1960. * For operations that cannot sleep, a command block is allocated at init,
  1961. * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
  1962. * which ones are free or in use. Lock must be held when calling this.
  1963. * cmd_free() is the complement.
  1964. */
  1965. static struct CommandList *cmd_alloc(struct ctlr_info *h)
  1966. {
  1967. struct CommandList *c;
  1968. int i;
  1969. union u64bit temp64;
  1970. dma_addr_t cmd_dma_handle, err_dma_handle;
  1971. do {
  1972. i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
  1973. if (i == h->nr_cmds)
  1974. return NULL;
  1975. } while (test_and_set_bit
  1976. (i & (BITS_PER_LONG - 1),
  1977. h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
  1978. c = h->cmd_pool + i;
  1979. memset(c, 0, sizeof(*c));
  1980. cmd_dma_handle = h->cmd_pool_dhandle
  1981. + i * sizeof(*c);
  1982. c->err_info = h->errinfo_pool + i;
  1983. memset(c->err_info, 0, sizeof(*c->err_info));
  1984. err_dma_handle = h->errinfo_pool_dhandle
  1985. + i * sizeof(*c->err_info);
  1986. h->nr_allocs++;
  1987. c->cmdindex = i;
  1988. INIT_HLIST_NODE(&c->list);
  1989. c->busaddr = (u32) cmd_dma_handle;
  1990. temp64.val = (u64) err_dma_handle;
  1991. c->ErrDesc.Addr.lower = temp64.val32.lower;
  1992. c->ErrDesc.Addr.upper = temp64.val32.upper;
  1993. c->ErrDesc.Len = sizeof(*c->err_info);
  1994. c->h = h;
  1995. return c;
  1996. }
  1997. /* For operations that can wait for kmalloc to possibly sleep,
  1998. * this routine can be called. Lock need not be held to call
  1999. * cmd_special_alloc. cmd_special_free() is the complement.
  2000. */
  2001. static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
  2002. {
  2003. struct CommandList *c;
  2004. union u64bit temp64;
  2005. dma_addr_t cmd_dma_handle, err_dma_handle;
  2006. c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
  2007. if (c == NULL)
  2008. return NULL;
  2009. memset(c, 0, sizeof(*c));
  2010. c->cmdindex = -1;
  2011. c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
  2012. &err_dma_handle);
  2013. if (c->err_info == NULL) {
  2014. pci_free_consistent(h->pdev,
  2015. sizeof(*c), c, cmd_dma_handle);
  2016. return NULL;
  2017. }
  2018. memset(c->err_info, 0, sizeof(*c->err_info));
  2019. INIT_HLIST_NODE(&c->list);
  2020. c->busaddr = (u32) cmd_dma_handle;
  2021. temp64.val = (u64) err_dma_handle;
  2022. c->ErrDesc.Addr.lower = temp64.val32.lower;
  2023. c->ErrDesc.Addr.upper = temp64.val32.upper;
  2024. c->ErrDesc.Len = sizeof(*c->err_info);
  2025. c->h = h;
  2026. return c;
  2027. }
  2028. static void cmd_free(struct ctlr_info *h, struct CommandList *c)
  2029. {
  2030. int i;
  2031. i = c - h->cmd_pool;
  2032. clear_bit(i & (BITS_PER_LONG - 1),
  2033. h->cmd_pool_bits + (i / BITS_PER_LONG));
  2034. h->nr_frees++;
  2035. }
  2036. static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
  2037. {
  2038. union u64bit temp64;
  2039. temp64.val32.lower = c->ErrDesc.Addr.lower;
  2040. temp64.val32.upper = c->ErrDesc.Addr.upper;
  2041. pci_free_consistent(h->pdev, sizeof(*c->err_info),
  2042. c->err_info, (dma_addr_t) temp64.val);
  2043. pci_free_consistent(h->pdev, sizeof(*c),
  2044. c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
  2045. }
  2046. #ifdef CONFIG_COMPAT
  2047. static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
  2048. {
  2049. IOCTL32_Command_struct __user *arg32 =
  2050. (IOCTL32_Command_struct __user *) arg;
  2051. IOCTL_Command_struct arg64;
  2052. IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
  2053. int err;
  2054. u32 cp;
  2055. memset(&arg64, 0, sizeof(arg64));
  2056. err = 0;
  2057. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2058. sizeof(arg64.LUN_info));
  2059. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2060. sizeof(arg64.Request));
  2061. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2062. sizeof(arg64.error_info));
  2063. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2064. err |= get_user(cp, &arg32->buf);
  2065. arg64.buf = compat_ptr(cp);
  2066. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2067. if (err)
  2068. return -EFAULT;
  2069. err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
  2070. if (err)
  2071. return err;
  2072. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2073. sizeof(arg32->error_info));
  2074. if (err)
  2075. return -EFAULT;
  2076. return err;
  2077. }
  2078. static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
  2079. int cmd, void *arg)
  2080. {
  2081. BIG_IOCTL32_Command_struct __user *arg32 =
  2082. (BIG_IOCTL32_Command_struct __user *) arg;
  2083. BIG_IOCTL_Command_struct arg64;
  2084. BIG_IOCTL_Command_struct __user *p =
  2085. compat_alloc_user_space(sizeof(arg64));
  2086. int err;
  2087. u32 cp;
  2088. memset(&arg64, 0, sizeof(arg64));
  2089. err = 0;
  2090. err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
  2091. sizeof(arg64.LUN_info));
  2092. err |= copy_from_user(&arg64.Request, &arg32->Request,
  2093. sizeof(arg64.Request));
  2094. err |= copy_from_user(&arg64.error_info, &arg32->error_info,
  2095. sizeof(arg64.error_info));
  2096. err |= get_user(arg64.buf_size, &arg32->buf_size);
  2097. err |= get_user(arg64.malloc_size, &arg32->malloc_size);
  2098. err |= get_user(cp, &arg32->buf);
  2099. arg64.buf = compat_ptr(cp);
  2100. err |= copy_to_user(p, &arg64, sizeof(arg64));
  2101. if (err)
  2102. return -EFAULT;
  2103. err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
  2104. if (err)
  2105. return err;
  2106. err |= copy_in_user(&arg32->error_info, &p->error_info,
  2107. sizeof(arg32->error_info));
  2108. if (err)
  2109. return -EFAULT;
  2110. return err;
  2111. }
  2112. static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2113. {
  2114. switch (cmd) {
  2115. case CCISS_GETPCIINFO:
  2116. case CCISS_GETINTINFO:
  2117. case CCISS_SETINTINFO:
  2118. case CCISS_GETNODENAME:
  2119. case CCISS_SETNODENAME:
  2120. case CCISS_GETHEARTBEAT:
  2121. case CCISS_GETBUSTYPES:
  2122. case CCISS_GETFIRMVER:
  2123. case CCISS_GETDRIVVER:
  2124. case CCISS_REVALIDVOLS:
  2125. case CCISS_DEREGDISK:
  2126. case CCISS_REGNEWDISK:
  2127. case CCISS_REGNEWD:
  2128. case CCISS_RESCANDISK:
  2129. case CCISS_GETLUNINFO:
  2130. return hpsa_ioctl(dev, cmd, arg);
  2131. case CCISS_PASSTHRU32:
  2132. return hpsa_ioctl32_passthru(dev, cmd, arg);
  2133. case CCISS_BIG_PASSTHRU32:
  2134. return hpsa_ioctl32_big_passthru(dev, cmd, arg);
  2135. default:
  2136. return -ENOIOCTLCMD;
  2137. }
  2138. }
  2139. #endif
  2140. static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
  2141. {
  2142. struct hpsa_pci_info pciinfo;
  2143. if (!argp)
  2144. return -EINVAL;
  2145. pciinfo.domain = pci_domain_nr(h->pdev->bus);
  2146. pciinfo.bus = h->pdev->bus->number;
  2147. pciinfo.dev_fn = h->pdev->devfn;
  2148. pciinfo.board_id = h->board_id;
  2149. if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
  2150. return -EFAULT;
  2151. return 0;
  2152. }
  2153. static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
  2154. {
  2155. DriverVer_type DriverVer;
  2156. unsigned char vmaj, vmin, vsubmin;
  2157. int rc;
  2158. rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
  2159. &vmaj, &vmin, &vsubmin);
  2160. if (rc != 3) {
  2161. dev_info(&h->pdev->dev, "driver version string '%s' "
  2162. "unrecognized.", HPSA_DRIVER_VERSION);
  2163. vmaj = 0;
  2164. vmin = 0;
  2165. vsubmin = 0;
  2166. }
  2167. DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
  2168. if (!argp)
  2169. return -EINVAL;
  2170. if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
  2171. return -EFAULT;
  2172. return 0;
  2173. }
  2174. static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2175. {
  2176. IOCTL_Command_struct iocommand;
  2177. struct CommandList *c;
  2178. char *buff = NULL;
  2179. union u64bit temp64;
  2180. if (!argp)
  2181. return -EINVAL;
  2182. if (!capable(CAP_SYS_RAWIO))
  2183. return -EPERM;
  2184. if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
  2185. return -EFAULT;
  2186. if ((iocommand.buf_size < 1) &&
  2187. (iocommand.Request.Type.Direction != XFER_NONE)) {
  2188. return -EINVAL;
  2189. }
  2190. if (iocommand.buf_size > 0) {
  2191. buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
  2192. if (buff == NULL)
  2193. return -EFAULT;
  2194. if (iocommand.Request.Type.Direction == XFER_WRITE) {
  2195. /* Copy the data into the buffer we created */
  2196. if (copy_from_user(buff, iocommand.buf,
  2197. iocommand.buf_size)) {
  2198. kfree(buff);
  2199. return -EFAULT;
  2200. }
  2201. } else {
  2202. memset(buff, 0, iocommand.buf_size);
  2203. }
  2204. }
  2205. c = cmd_special_alloc(h);
  2206. if (c == NULL) {
  2207. kfree(buff);
  2208. return -ENOMEM;
  2209. }
  2210. /* Fill in the command type */
  2211. c->cmd_type = CMD_IOCTL_PEND;
  2212. /* Fill in Command Header */
  2213. c->Header.ReplyQueue = 0; /* unused in simple mode */
  2214. if (iocommand.buf_size > 0) { /* buffer to fill */
  2215. c->Header.SGList = 1;
  2216. c->Header.SGTotal = 1;
  2217. } else { /* no buffers to fill */
  2218. c->Header.SGList = 0;
  2219. c->Header.SGTotal = 0;
  2220. }
  2221. memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
  2222. /* use the kernel address the cmd block for tag */
  2223. c->Header.Tag.lower = c->busaddr;
  2224. /* Fill in Request block */
  2225. memcpy(&c->Request, &iocommand.Request,
  2226. sizeof(c->Request));
  2227. /* Fill in the scatter gather information */
  2228. if (iocommand.buf_size > 0) {
  2229. temp64.val = pci_map_single(h->pdev, buff,
  2230. iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
  2231. c->SG[0].Addr.lower = temp64.val32.lower;
  2232. c->SG[0].Addr.upper = temp64.val32.upper;
  2233. c->SG[0].Len = iocommand.buf_size;
  2234. c->SG[0].Ext = 0; /* we are not chaining*/
  2235. }
  2236. hpsa_scsi_do_simple_cmd_core(h, c);
  2237. hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
  2238. check_ioctl_unit_attention(h, c);
  2239. /* Copy the error information out */
  2240. memcpy(&iocommand.error_info, c->err_info,
  2241. sizeof(iocommand.error_info));
  2242. if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
  2243. kfree(buff);
  2244. cmd_special_free(h, c);
  2245. return -EFAULT;
  2246. }
  2247. if (iocommand.Request.Type.Direction == XFER_READ &&
  2248. iocommand.buf_size > 0) {
  2249. /* Copy the data out of the buffer we created */
  2250. if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
  2251. kfree(buff);
  2252. cmd_special_free(h, c);
  2253. return -EFAULT;
  2254. }
  2255. }
  2256. kfree(buff);
  2257. cmd_special_free(h, c);
  2258. return 0;
  2259. }
  2260. static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
  2261. {
  2262. BIG_IOCTL_Command_struct *ioc;
  2263. struct CommandList *c;
  2264. unsigned char **buff = NULL;
  2265. int *buff_size = NULL;
  2266. union u64bit temp64;
  2267. BYTE sg_used = 0;
  2268. int status = 0;
  2269. int i;
  2270. u32 left;
  2271. u32 sz;
  2272. BYTE __user *data_ptr;
  2273. if (!argp)
  2274. return -EINVAL;
  2275. if (!capable(CAP_SYS_RAWIO))
  2276. return -EPERM;
  2277. ioc = (BIG_IOCTL_Command_struct *)
  2278. kmalloc(sizeof(*ioc), GFP_KERNEL);
  2279. if (!ioc) {
  2280. status = -ENOMEM;
  2281. goto cleanup1;
  2282. }
  2283. if (copy_from_user(ioc, argp, sizeof(*ioc))) {
  2284. status = -EFAULT;
  2285. goto cleanup1;
  2286. }
  2287. if ((ioc->buf_size < 1) &&
  2288. (ioc->Request.Type.Direction != XFER_NONE)) {
  2289. status = -EINVAL;
  2290. goto cleanup1;
  2291. }
  2292. /* Check kmalloc limits using all SGs */
  2293. if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
  2294. status = -EINVAL;
  2295. goto cleanup1;
  2296. }
  2297. if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
  2298. status = -EINVAL;
  2299. goto cleanup1;
  2300. }
  2301. buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
  2302. if (!buff) {
  2303. status = -ENOMEM;
  2304. goto cleanup1;
  2305. }
  2306. buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
  2307. if (!buff_size) {
  2308. status = -ENOMEM;
  2309. goto cleanup1;
  2310. }
  2311. left = ioc->buf_size;
  2312. data_ptr = ioc->buf;
  2313. while (left) {
  2314. sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
  2315. buff_size[sg_used] = sz;
  2316. buff[sg_used] = kmalloc(sz, GFP_KERNEL);
  2317. if (buff[sg_used] == NULL) {
  2318. status = -ENOMEM;
  2319. goto cleanup1;
  2320. }
  2321. if (ioc->Request.Type.Direction == XFER_WRITE) {
  2322. if (copy_from_user(buff[sg_used], data_ptr, sz)) {
  2323. status = -ENOMEM;
  2324. goto cleanup1;
  2325. }
  2326. } else
  2327. memset(buff[sg_used], 0, sz);
  2328. left -= sz;
  2329. data_ptr += sz;
  2330. sg_used++;
  2331. }
  2332. c = cmd_special_alloc(h);
  2333. if (c == NULL) {
  2334. status = -ENOMEM;
  2335. goto cleanup1;
  2336. }
  2337. c->cmd_type = CMD_IOCTL_PEND;
  2338. c->Header.ReplyQueue = 0;
  2339. c->Header.SGList = c->Header.SGTotal = sg_used;
  2340. memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
  2341. c->Header.Tag.lower = c->busaddr;
  2342. memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
  2343. if (ioc->buf_size > 0) {
  2344. int i;
  2345. for (i = 0; i < sg_used; i++) {
  2346. temp64.val = pci_map_single(h->pdev, buff[i],
  2347. buff_size[i], PCI_DMA_BIDIRECTIONAL);
  2348. c->SG[i].Addr.lower = temp64.val32.lower;
  2349. c->SG[i].Addr.upper = temp64.val32.upper;
  2350. c->SG[i].Len = buff_size[i];
  2351. /* we are not chaining */
  2352. c->SG[i].Ext = 0;
  2353. }
  2354. }
  2355. hpsa_scsi_do_simple_cmd_core(h, c);
  2356. if (sg_used)
  2357. hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
  2358. check_ioctl_unit_attention(h, c);
  2359. /* Copy the error information out */
  2360. memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
  2361. if (copy_to_user(argp, ioc, sizeof(*ioc))) {
  2362. cmd_special_free(h, c);
  2363. status = -EFAULT;
  2364. goto cleanup1;
  2365. }
  2366. if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
  2367. /* Copy the data out of the buffer we created */
  2368. BYTE __user *ptr = ioc->buf;
  2369. for (i = 0; i < sg_used; i++) {
  2370. if (copy_to_user(ptr, buff[i], buff_size[i])) {
  2371. cmd_special_free(h, c);
  2372. status = -EFAULT;
  2373. goto cleanup1;
  2374. }
  2375. ptr += buff_size[i];
  2376. }
  2377. }
  2378. cmd_special_free(h, c);
  2379. status = 0;
  2380. cleanup1:
  2381. if (buff) {
  2382. for (i = 0; i < sg_used; i++)
  2383. kfree(buff[i]);
  2384. kfree(buff);
  2385. }
  2386. kfree(buff_size);
  2387. kfree(ioc);
  2388. return status;
  2389. }
  2390. static void check_ioctl_unit_attention(struct ctlr_info *h,
  2391. struct CommandList *c)
  2392. {
  2393. if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
  2394. c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
  2395. (void) check_for_unit_attention(h, c);
  2396. }
  2397. /*
  2398. * ioctl
  2399. */
  2400. static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
  2401. {
  2402. struct ctlr_info *h;
  2403. void __user *argp = (void __user *)arg;
  2404. h = sdev_to_hba(dev);
  2405. switch (cmd) {
  2406. case CCISS_DEREGDISK:
  2407. case CCISS_REGNEWDISK:
  2408. case CCISS_REGNEWD:
  2409. hpsa_scan_start(h->scsi_host);
  2410. return 0;
  2411. case CCISS_GETPCIINFO:
  2412. return hpsa_getpciinfo_ioctl(h, argp);
  2413. case CCISS_GETDRIVVER:
  2414. return hpsa_getdrivver_ioctl(h, argp);
  2415. case CCISS_PASSTHRU:
  2416. return hpsa_passthru_ioctl(h, argp);
  2417. case CCISS_BIG_PASSTHRU:
  2418. return hpsa_big_passthru_ioctl(h, argp);
  2419. default:
  2420. return -ENOTTY;
  2421. }
  2422. }
  2423. static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
  2424. void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
  2425. int cmd_type)
  2426. {
  2427. int pci_dir = XFER_NONE;
  2428. c->cmd_type = CMD_IOCTL_PEND;
  2429. c->Header.ReplyQueue = 0;
  2430. if (buff != NULL && size > 0) {
  2431. c->Header.SGList = 1;
  2432. c->Header.SGTotal = 1;
  2433. } else {
  2434. c->Header.SGList = 0;
  2435. c->Header.SGTotal = 0;
  2436. }
  2437. c->Header.Tag.lower = c->busaddr;
  2438. memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
  2439. c->Request.Type.Type = cmd_type;
  2440. if (cmd_type == TYPE_CMD) {
  2441. switch (cmd) {
  2442. case HPSA_INQUIRY:
  2443. /* are we trying to read a vital product page */
  2444. if (page_code != 0) {
  2445. c->Request.CDB[1] = 0x01;
  2446. c->Request.CDB[2] = page_code;
  2447. }
  2448. c->Request.CDBLen = 6;
  2449. c->Request.Type.Attribute = ATTR_SIMPLE;
  2450. c->Request.Type.Direction = XFER_READ;
  2451. c->Request.Timeout = 0;
  2452. c->Request.CDB[0] = HPSA_INQUIRY;
  2453. c->Request.CDB[4] = size & 0xFF;
  2454. break;
  2455. case HPSA_REPORT_LOG:
  2456. case HPSA_REPORT_PHYS:
  2457. /* Talking to controller so It's a physical command
  2458. mode = 00 target = 0. Nothing to write.
  2459. */
  2460. c->Request.CDBLen = 12;
  2461. c->Request.Type.Attribute = ATTR_SIMPLE;
  2462. c->Request.Type.Direction = XFER_READ;
  2463. c->Request.Timeout = 0;
  2464. c->Request.CDB[0] = cmd;
  2465. c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
  2466. c->Request.CDB[7] = (size >> 16) & 0xFF;
  2467. c->Request.CDB[8] = (size >> 8) & 0xFF;
  2468. c->Request.CDB[9] = size & 0xFF;
  2469. break;
  2470. case HPSA_CACHE_FLUSH:
  2471. c->Request.CDBLen = 12;
  2472. c->Request.Type.Attribute = ATTR_SIMPLE;
  2473. c->Request.Type.Direction = XFER_WRITE;
  2474. c->Request.Timeout = 0;
  2475. c->Request.CDB[0] = BMIC_WRITE;
  2476. c->Request.CDB[6] = BMIC_CACHE_FLUSH;
  2477. break;
  2478. case TEST_UNIT_READY:
  2479. c->Request.CDBLen = 6;
  2480. c->Request.Type.Attribute = ATTR_SIMPLE;
  2481. c->Request.Type.Direction = XFER_NONE;
  2482. c->Request.Timeout = 0;
  2483. break;
  2484. default:
  2485. dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
  2486. BUG();
  2487. return;
  2488. }
  2489. } else if (cmd_type == TYPE_MSG) {
  2490. switch (cmd) {
  2491. case HPSA_DEVICE_RESET_MSG:
  2492. c->Request.CDBLen = 16;
  2493. c->Request.Type.Type = 1; /* It is a MSG not a CMD */
  2494. c->Request.Type.Attribute = ATTR_SIMPLE;
  2495. c->Request.Type.Direction = XFER_NONE;
  2496. c->Request.Timeout = 0; /* Don't time out */
  2497. c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */
  2498. c->Request.CDB[1] = 0x03; /* Reset target above */
  2499. /* If bytes 4-7 are zero, it means reset the */
  2500. /* LunID device */
  2501. c->Request.CDB[4] = 0x00;
  2502. c->Request.CDB[5] = 0x00;
  2503. c->Request.CDB[6] = 0x00;
  2504. c->Request.CDB[7] = 0x00;
  2505. break;
  2506. default:
  2507. dev_warn(&h->pdev->dev, "unknown message type %d\n",
  2508. cmd);
  2509. BUG();
  2510. }
  2511. } else {
  2512. dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
  2513. BUG();
  2514. }
  2515. switch (c->Request.Type.Direction) {
  2516. case XFER_READ:
  2517. pci_dir = PCI_DMA_FROMDEVICE;
  2518. break;
  2519. case XFER_WRITE:
  2520. pci_dir = PCI_DMA_TODEVICE;
  2521. break;
  2522. case XFER_NONE:
  2523. pci_dir = PCI_DMA_NONE;
  2524. break;
  2525. default:
  2526. pci_dir = PCI_DMA_BIDIRECTIONAL;
  2527. }
  2528. hpsa_map_one(h->pdev, c, buff, size, pci_dir);
  2529. return;
  2530. }
  2531. /*
  2532. * Map (physical) PCI mem into (virtual) kernel space
  2533. */
  2534. static void __iomem *remap_pci_mem(ulong base, ulong size)
  2535. {
  2536. ulong page_base = ((ulong) base) & PAGE_MASK;
  2537. ulong page_offs = ((ulong) base) - page_base;
  2538. void __iomem *page_remapped = ioremap(page_base, page_offs + size);
  2539. return page_remapped ? (page_remapped + page_offs) : NULL;
  2540. }
  2541. /* Takes cmds off the submission queue and sends them to the hardware,
  2542. * then puts them on the queue of cmds waiting for completion.
  2543. */
  2544. static void start_io(struct ctlr_info *h)
  2545. {
  2546. struct CommandList *c;
  2547. while (!hlist_empty(&h->reqQ)) {
  2548. c = hlist_entry(h->reqQ.first, struct CommandList, list);
  2549. /* can't do anything if fifo is full */
  2550. if ((h->access.fifo_full(h))) {
  2551. dev_warn(&h->pdev->dev, "fifo full\n");
  2552. break;
  2553. }
  2554. /* Get the first entry from the Request Q */
  2555. removeQ(c);
  2556. h->Qdepth--;
  2557. /* Tell the controller execute command */
  2558. h->access.submit_command(h, c);
  2559. /* Put job onto the completed Q */
  2560. addQ(&h->cmpQ, c);
  2561. }
  2562. }
  2563. static inline unsigned long get_next_completion(struct ctlr_info *h)
  2564. {
  2565. return h->access.command_completed(h);
  2566. }
  2567. static inline bool interrupt_pending(struct ctlr_info *h)
  2568. {
  2569. return h->access.intr_pending(h);
  2570. }
  2571. static inline long interrupt_not_for_us(struct ctlr_info *h)
  2572. {
  2573. return (h->access.intr_pending(h) == 0) ||
  2574. (h->interrupts_enabled == 0);
  2575. }
  2576. static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
  2577. u32 raw_tag)
  2578. {
  2579. if (unlikely(tag_index >= h->nr_cmds)) {
  2580. dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
  2581. return 1;
  2582. }
  2583. return 0;
  2584. }
  2585. static inline void finish_cmd(struct CommandList *c, u32 raw_tag)
  2586. {
  2587. removeQ(c);
  2588. if (likely(c->cmd_type == CMD_SCSI))
  2589. complete_scsi_command(c, 0, raw_tag);
  2590. else if (c->cmd_type == CMD_IOCTL_PEND)
  2591. complete(c->waiting);
  2592. }
  2593. static inline u32 hpsa_tag_contains_index(u32 tag)
  2594. {
  2595. return tag & DIRECT_LOOKUP_BIT;
  2596. }
  2597. static inline u32 hpsa_tag_to_index(u32 tag)
  2598. {
  2599. return tag >> DIRECT_LOOKUP_SHIFT;
  2600. }
  2601. static inline u32 hpsa_tag_discard_error_bits(u32 tag)
  2602. {
  2603. #define HPSA_ERROR_BITS 0x03
  2604. return tag & ~HPSA_ERROR_BITS;
  2605. }
  2606. /* process completion of an indexed ("direct lookup") command */
  2607. static inline u32 process_indexed_cmd(struct ctlr_info *h,
  2608. u32 raw_tag)
  2609. {
  2610. u32 tag_index;
  2611. struct CommandList *c;
  2612. tag_index = hpsa_tag_to_index(raw_tag);
  2613. if (bad_tag(h, tag_index, raw_tag))
  2614. return next_command(h);
  2615. c = h->cmd_pool + tag_index;
  2616. finish_cmd(c, raw_tag);
  2617. return next_command(h);
  2618. }
  2619. /* process completion of a non-indexed command */
  2620. static inline u32 process_nonindexed_cmd(struct ctlr_info *h,
  2621. u32 raw_tag)
  2622. {
  2623. u32 tag;
  2624. struct CommandList *c = NULL;
  2625. struct hlist_node *tmp;
  2626. tag = hpsa_tag_discard_error_bits(raw_tag);
  2627. hlist_for_each_entry(c, tmp, &h->cmpQ, list) {
  2628. if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
  2629. finish_cmd(c, raw_tag);
  2630. return next_command(h);
  2631. }
  2632. }
  2633. bad_tag(h, h->nr_cmds + 1, raw_tag);
  2634. return next_command(h);
  2635. }
  2636. static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id)
  2637. {
  2638. struct ctlr_info *h = dev_id;
  2639. unsigned long flags;
  2640. u32 raw_tag;
  2641. if (interrupt_not_for_us(h))
  2642. return IRQ_NONE;
  2643. spin_lock_irqsave(&h->lock, flags);
  2644. while (interrupt_pending(h)) {
  2645. raw_tag = get_next_completion(h);
  2646. while (raw_tag != FIFO_EMPTY) {
  2647. if (hpsa_tag_contains_index(raw_tag))
  2648. raw_tag = process_indexed_cmd(h, raw_tag);
  2649. else
  2650. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2651. }
  2652. }
  2653. spin_unlock_irqrestore(&h->lock, flags);
  2654. return IRQ_HANDLED;
  2655. }
  2656. static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id)
  2657. {
  2658. struct ctlr_info *h = dev_id;
  2659. unsigned long flags;
  2660. u32 raw_tag;
  2661. spin_lock_irqsave(&h->lock, flags);
  2662. raw_tag = get_next_completion(h);
  2663. while (raw_tag != FIFO_EMPTY) {
  2664. if (hpsa_tag_contains_index(raw_tag))
  2665. raw_tag = process_indexed_cmd(h, raw_tag);
  2666. else
  2667. raw_tag = process_nonindexed_cmd(h, raw_tag);
  2668. }
  2669. spin_unlock_irqrestore(&h->lock, flags);
  2670. return IRQ_HANDLED;
  2671. }
  2672. /* Send a message CDB to the firmware. */
  2673. static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
  2674. unsigned char type)
  2675. {
  2676. struct Command {
  2677. struct CommandListHeader CommandHeader;
  2678. struct RequestBlock Request;
  2679. struct ErrDescriptor ErrorDescriptor;
  2680. };
  2681. struct Command *cmd;
  2682. static const size_t cmd_sz = sizeof(*cmd) +
  2683. sizeof(cmd->ErrorDescriptor);
  2684. dma_addr_t paddr64;
  2685. uint32_t paddr32, tag;
  2686. void __iomem *vaddr;
  2687. int i, err;
  2688. vaddr = pci_ioremap_bar(pdev, 0);
  2689. if (vaddr == NULL)
  2690. return -ENOMEM;
  2691. /* The Inbound Post Queue only accepts 32-bit physical addresses for the
  2692. * CCISS commands, so they must be allocated from the lower 4GiB of
  2693. * memory.
  2694. */
  2695. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  2696. if (err) {
  2697. iounmap(vaddr);
  2698. return -ENOMEM;
  2699. }
  2700. cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
  2701. if (cmd == NULL) {
  2702. iounmap(vaddr);
  2703. return -ENOMEM;
  2704. }
  2705. /* This must fit, because of the 32-bit consistent DMA mask. Also,
  2706. * although there's no guarantee, we assume that the address is at
  2707. * least 4-byte aligned (most likely, it's page-aligned).
  2708. */
  2709. paddr32 = paddr64;
  2710. cmd->CommandHeader.ReplyQueue = 0;
  2711. cmd->CommandHeader.SGList = 0;
  2712. cmd->CommandHeader.SGTotal = 0;
  2713. cmd->CommandHeader.Tag.lower = paddr32;
  2714. cmd->CommandHeader.Tag.upper = 0;
  2715. memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
  2716. cmd->Request.CDBLen = 16;
  2717. cmd->Request.Type.Type = TYPE_MSG;
  2718. cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
  2719. cmd->Request.Type.Direction = XFER_NONE;
  2720. cmd->Request.Timeout = 0; /* Don't time out */
  2721. cmd->Request.CDB[0] = opcode;
  2722. cmd->Request.CDB[1] = type;
  2723. memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
  2724. cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
  2725. cmd->ErrorDescriptor.Addr.upper = 0;
  2726. cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
  2727. writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
  2728. for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
  2729. tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
  2730. if (hpsa_tag_discard_error_bits(tag) == paddr32)
  2731. break;
  2732. msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
  2733. }
  2734. iounmap(vaddr);
  2735. /* we leak the DMA buffer here ... no choice since the controller could
  2736. * still complete the command.
  2737. */
  2738. if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
  2739. dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
  2740. opcode, type);
  2741. return -ETIMEDOUT;
  2742. }
  2743. pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
  2744. if (tag & HPSA_ERROR_BIT) {
  2745. dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
  2746. opcode, type);
  2747. return -EIO;
  2748. }
  2749. dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
  2750. opcode, type);
  2751. return 0;
  2752. }
  2753. #define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0)
  2754. #define hpsa_noop(p) hpsa_message(p, 3, 0)
  2755. static int hpsa_controller_hard_reset(struct pci_dev *pdev,
  2756. void * __iomem vaddr, bool use_doorbell)
  2757. {
  2758. u16 pmcsr;
  2759. int pos;
  2760. if (use_doorbell) {
  2761. /* For everything after the P600, the PCI power state method
  2762. * of resetting the controller doesn't work, so we have this
  2763. * other way using the doorbell register.
  2764. */
  2765. dev_info(&pdev->dev, "using doorbell to reset controller\n");
  2766. writel(DOORBELL_CTLR_RESET, vaddr + SA5_DOORBELL);
  2767. msleep(1000);
  2768. } else { /* Try to do it the PCI power state way */
  2769. /* Quoting from the Open CISS Specification: "The Power
  2770. * Management Control/Status Register (CSR) controls the power
  2771. * state of the device. The normal operating state is D0,
  2772. * CSR=00h. The software off state is D3, CSR=03h. To reset
  2773. * the controller, place the interface device in D3 then to D0,
  2774. * this causes a secondary PCI reset which will reset the
  2775. * controller." */
  2776. pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
  2777. if (pos == 0) {
  2778. dev_err(&pdev->dev,
  2779. "hpsa_reset_controller: "
  2780. "PCI PM not supported\n");
  2781. return -ENODEV;
  2782. }
  2783. dev_info(&pdev->dev, "using PCI PM to reset controller\n");
  2784. /* enter the D3hot power management state */
  2785. pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
  2786. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2787. pmcsr |= PCI_D3hot;
  2788. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2789. msleep(500);
  2790. /* enter the D0 power management state */
  2791. pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
  2792. pmcsr |= PCI_D0;
  2793. pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
  2794. msleep(500);
  2795. }
  2796. return 0;
  2797. }
  2798. /* This does a hard reset of the controller using PCI power management
  2799. * states or the using the doorbell register.
  2800. */
  2801. static __devinit int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
  2802. {
  2803. u64 cfg_offset;
  2804. u32 cfg_base_addr;
  2805. u64 cfg_base_addr_index;
  2806. void __iomem *vaddr;
  2807. unsigned long paddr;
  2808. u32 misc_fw_support, active_transport;
  2809. int rc;
  2810. struct CfgTable __iomem *cfgtable;
  2811. bool use_doorbell;
  2812. u32 board_id;
  2813. u16 command_register;
  2814. /* For controllers as old as the P600, this is very nearly
  2815. * the same thing as
  2816. *
  2817. * pci_save_state(pci_dev);
  2818. * pci_set_power_state(pci_dev, PCI_D3hot);
  2819. * pci_set_power_state(pci_dev, PCI_D0);
  2820. * pci_restore_state(pci_dev);
  2821. *
  2822. * For controllers newer than the P600, the pci power state
  2823. * method of resetting doesn't work so we have another way
  2824. * using the doorbell register.
  2825. */
  2826. /* Exclude 640x boards. These are two pci devices in one slot
  2827. * which share a battery backed cache module. One controls the
  2828. * cache, the other accesses the cache through the one that controls
  2829. * it. If we reset the one controlling the cache, the other will
  2830. * likely not be happy. Just forbid resetting this conjoined mess.
  2831. * The 640x isn't really supported by hpsa anyway.
  2832. */
  2833. rc = hpsa_lookup_board_id(pdev, &board_id);
  2834. if (rc < 0) {
  2835. dev_warn(&pdev->dev, "Not resetting device.\n");
  2836. return -ENODEV;
  2837. }
  2838. if (board_id == 0x409C0E11 || board_id == 0x409D0E11)
  2839. return -ENOTSUPP;
  2840. /* Save the PCI command register */
  2841. pci_read_config_word(pdev, 4, &command_register);
  2842. /* Turn the board off. This is so that later pci_restore_state()
  2843. * won't turn the board on before the rest of config space is ready.
  2844. */
  2845. pci_disable_device(pdev);
  2846. pci_save_state(pdev);
  2847. /* find the first memory BAR, so we can find the cfg table */
  2848. rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
  2849. if (rc)
  2850. return rc;
  2851. vaddr = remap_pci_mem(paddr, 0x250);
  2852. if (!vaddr)
  2853. return -ENOMEM;
  2854. /* find cfgtable in order to check if reset via doorbell is supported */
  2855. rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
  2856. &cfg_base_addr_index, &cfg_offset);
  2857. if (rc)
  2858. goto unmap_vaddr;
  2859. cfgtable = remap_pci_mem(pci_resource_start(pdev,
  2860. cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
  2861. if (!cfgtable) {
  2862. rc = -ENOMEM;
  2863. goto unmap_vaddr;
  2864. }
  2865. /* If reset via doorbell register is supported, use that. */
  2866. misc_fw_support = readl(&cfgtable->misc_fw_support);
  2867. use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
  2868. rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
  2869. if (rc)
  2870. goto unmap_cfgtable;
  2871. pci_restore_state(pdev);
  2872. rc = pci_enable_device(pdev);
  2873. if (rc) {
  2874. dev_warn(&pdev->dev, "failed to enable device.\n");
  2875. goto unmap_cfgtable;
  2876. }
  2877. pci_write_config_word(pdev, 4, command_register);
  2878. /* Some devices (notably the HP Smart Array 5i Controller)
  2879. need a little pause here */
  2880. msleep(HPSA_POST_RESET_PAUSE_MSECS);
  2881. /* Wait for board to become not ready, then ready. */
  2882. dev_info(&pdev->dev, "Waiting for board to become ready.\n");
  2883. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
  2884. if (rc)
  2885. dev_warn(&pdev->dev,
  2886. "failed waiting for board to become not ready\n");
  2887. rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
  2888. if (rc) {
  2889. dev_warn(&pdev->dev,
  2890. "failed waiting for board to become ready\n");
  2891. goto unmap_cfgtable;
  2892. }
  2893. dev_info(&pdev->dev, "board ready.\n");
  2894. /* Controller should be in simple mode at this point. If it's not,
  2895. * It means we're on one of those controllers which doesn't support
  2896. * the doorbell reset method and on which the PCI power management reset
  2897. * method doesn't work (P800, for example.)
  2898. * In those cases, pretend the reset worked and hope for the best.
  2899. */
  2900. active_transport = readl(&cfgtable->TransportActive);
  2901. if (active_transport & PERFORMANT_MODE) {
  2902. dev_warn(&pdev->dev, "Unable to successfully reset controller,"
  2903. " proceeding anyway.\n");
  2904. rc = -ENOTSUPP;
  2905. }
  2906. unmap_cfgtable:
  2907. iounmap(cfgtable);
  2908. unmap_vaddr:
  2909. iounmap(vaddr);
  2910. return rc;
  2911. }
  2912. /*
  2913. * We cannot read the structure directly, for portability we must use
  2914. * the io functions.
  2915. * This is for debug only.
  2916. */
  2917. static void print_cfg_table(struct device *dev, struct CfgTable *tb)
  2918. {
  2919. #ifdef HPSA_DEBUG
  2920. int i;
  2921. char temp_name[17];
  2922. dev_info(dev, "Controller Configuration information\n");
  2923. dev_info(dev, "------------------------------------\n");
  2924. for (i = 0; i < 4; i++)
  2925. temp_name[i] = readb(&(tb->Signature[i]));
  2926. temp_name[4] = '\0';
  2927. dev_info(dev, " Signature = %s\n", temp_name);
  2928. dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence)));
  2929. dev_info(dev, " Transport methods supported = 0x%x\n",
  2930. readl(&(tb->TransportSupport)));
  2931. dev_info(dev, " Transport methods active = 0x%x\n",
  2932. readl(&(tb->TransportActive)));
  2933. dev_info(dev, " Requested transport Method = 0x%x\n",
  2934. readl(&(tb->HostWrite.TransportRequest)));
  2935. dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n",
  2936. readl(&(tb->HostWrite.CoalIntDelay)));
  2937. dev_info(dev, " Coalesce Interrupt Count = 0x%x\n",
  2938. readl(&(tb->HostWrite.CoalIntCount)));
  2939. dev_info(dev, " Max outstanding commands = 0x%d\n",
  2940. readl(&(tb->CmdsOutMax)));
  2941. dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
  2942. for (i = 0; i < 16; i++)
  2943. temp_name[i] = readb(&(tb->ServerName[i]));
  2944. temp_name[16] = '\0';
  2945. dev_info(dev, " Server Name = %s\n", temp_name);
  2946. dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n",
  2947. readl(&(tb->HeartBeat)));
  2948. #endif /* HPSA_DEBUG */
  2949. }
  2950. static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
  2951. {
  2952. int i, offset, mem_type, bar_type;
  2953. if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
  2954. return 0;
  2955. offset = 0;
  2956. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
  2957. bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
  2958. if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
  2959. offset += 4;
  2960. else {
  2961. mem_type = pci_resource_flags(pdev, i) &
  2962. PCI_BASE_ADDRESS_MEM_TYPE_MASK;
  2963. switch (mem_type) {
  2964. case PCI_BASE_ADDRESS_MEM_TYPE_32:
  2965. case PCI_BASE_ADDRESS_MEM_TYPE_1M:
  2966. offset += 4; /* 32 bit */
  2967. break;
  2968. case PCI_BASE_ADDRESS_MEM_TYPE_64:
  2969. offset += 8;
  2970. break;
  2971. default: /* reserved in PCI 2.2 */
  2972. dev_warn(&pdev->dev,
  2973. "base address is invalid\n");
  2974. return -1;
  2975. break;
  2976. }
  2977. }
  2978. if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
  2979. return i + 1;
  2980. }
  2981. return -1;
  2982. }
  2983. /* If MSI/MSI-X is supported by the kernel we will try to enable it on
  2984. * controllers that are capable. If not, we use IO-APIC mode.
  2985. */
  2986. static void __devinit hpsa_interrupt_mode(struct ctlr_info *h)
  2987. {
  2988. #ifdef CONFIG_PCI_MSI
  2989. int err;
  2990. struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1},
  2991. {0, 2}, {0, 3}
  2992. };
  2993. /* Some boards advertise MSI but don't really support it */
  2994. if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
  2995. (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
  2996. goto default_int_mode;
  2997. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
  2998. dev_info(&h->pdev->dev, "MSIX\n");
  2999. err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4);
  3000. if (!err) {
  3001. h->intr[0] = hpsa_msix_entries[0].vector;
  3002. h->intr[1] = hpsa_msix_entries[1].vector;
  3003. h->intr[2] = hpsa_msix_entries[2].vector;
  3004. h->intr[3] = hpsa_msix_entries[3].vector;
  3005. h->msix_vector = 1;
  3006. return;
  3007. }
  3008. if (err > 0) {
  3009. dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
  3010. "available\n", err);
  3011. goto default_int_mode;
  3012. } else {
  3013. dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
  3014. err);
  3015. goto default_int_mode;
  3016. }
  3017. }
  3018. if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
  3019. dev_info(&h->pdev->dev, "MSI\n");
  3020. if (!pci_enable_msi(h->pdev))
  3021. h->msi_vector = 1;
  3022. else
  3023. dev_warn(&h->pdev->dev, "MSI init failed\n");
  3024. }
  3025. default_int_mode:
  3026. #endif /* CONFIG_PCI_MSI */
  3027. /* if we get here we're going to use the default interrupt mode */
  3028. h->intr[PERF_MODE_INT] = h->pdev->irq;
  3029. }
  3030. static int __devinit hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
  3031. {
  3032. int i;
  3033. u32 subsystem_vendor_id, subsystem_device_id;
  3034. subsystem_vendor_id = pdev->subsystem_vendor;
  3035. subsystem_device_id = pdev->subsystem_device;
  3036. *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
  3037. subsystem_vendor_id;
  3038. for (i = 0; i < ARRAY_SIZE(products); i++)
  3039. if (*board_id == products[i].board_id)
  3040. return i;
  3041. if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
  3042. subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
  3043. !hpsa_allow_any) {
  3044. dev_warn(&pdev->dev, "unrecognized board ID: "
  3045. "0x%08x, ignoring.\n", *board_id);
  3046. return -ENODEV;
  3047. }
  3048. return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
  3049. }
  3050. static inline bool hpsa_board_disabled(struct pci_dev *pdev)
  3051. {
  3052. u16 command;
  3053. (void) pci_read_config_word(pdev, PCI_COMMAND, &command);
  3054. return ((command & PCI_COMMAND_MEMORY) == 0);
  3055. }
  3056. static int __devinit hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
  3057. unsigned long *memory_bar)
  3058. {
  3059. int i;
  3060. for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
  3061. if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
  3062. /* addressing mode bits already removed */
  3063. *memory_bar = pci_resource_start(pdev, i);
  3064. dev_dbg(&pdev->dev, "memory BAR = %lx\n",
  3065. *memory_bar);
  3066. return 0;
  3067. }
  3068. dev_warn(&pdev->dev, "no memory BAR found\n");
  3069. return -ENODEV;
  3070. }
  3071. static int __devinit hpsa_wait_for_board_state(struct pci_dev *pdev,
  3072. void __iomem *vaddr, int wait_for_ready)
  3073. {
  3074. int i, iterations;
  3075. u32 scratchpad;
  3076. if (wait_for_ready)
  3077. iterations = HPSA_BOARD_READY_ITERATIONS;
  3078. else
  3079. iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
  3080. for (i = 0; i < iterations; i++) {
  3081. scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
  3082. if (wait_for_ready) {
  3083. if (scratchpad == HPSA_FIRMWARE_READY)
  3084. return 0;
  3085. } else {
  3086. if (scratchpad != HPSA_FIRMWARE_READY)
  3087. return 0;
  3088. }
  3089. msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
  3090. }
  3091. dev_warn(&pdev->dev, "board not ready, timed out.\n");
  3092. return -ENODEV;
  3093. }
  3094. static int __devinit hpsa_find_cfg_addrs(struct pci_dev *pdev,
  3095. void __iomem *vaddr, u32 *cfg_base_addr, u64 *cfg_base_addr_index,
  3096. u64 *cfg_offset)
  3097. {
  3098. *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
  3099. *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
  3100. *cfg_base_addr &= (u32) 0x0000ffff;
  3101. *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
  3102. if (*cfg_base_addr_index == -1) {
  3103. dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
  3104. return -ENODEV;
  3105. }
  3106. return 0;
  3107. }
  3108. static int __devinit hpsa_find_cfgtables(struct ctlr_info *h)
  3109. {
  3110. u64 cfg_offset;
  3111. u32 cfg_base_addr;
  3112. u64 cfg_base_addr_index;
  3113. u32 trans_offset;
  3114. int rc;
  3115. rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
  3116. &cfg_base_addr_index, &cfg_offset);
  3117. if (rc)
  3118. return rc;
  3119. h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
  3120. cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
  3121. if (!h->cfgtable)
  3122. return -ENOMEM;
  3123. /* Find performant mode table. */
  3124. trans_offset = readl(&h->cfgtable->TransMethodOffset);
  3125. h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
  3126. cfg_base_addr_index)+cfg_offset+trans_offset,
  3127. sizeof(*h->transtable));
  3128. if (!h->transtable)
  3129. return -ENOMEM;
  3130. return 0;
  3131. }
  3132. static void __devinit hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
  3133. {
  3134. h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
  3135. /* Limit commands in memory limited kdump scenario. */
  3136. if (reset_devices && h->max_commands > 32)
  3137. h->max_commands = 32;
  3138. if (h->max_commands < 16) {
  3139. dev_warn(&h->pdev->dev, "Controller reports "
  3140. "max supported commands of %d, an obvious lie. "
  3141. "Using 16. Ensure that firmware is up to date.\n",
  3142. h->max_commands);
  3143. h->max_commands = 16;
  3144. }
  3145. }
  3146. /* Interrogate the hardware for some limits:
  3147. * max commands, max SG elements without chaining, and with chaining,
  3148. * SG chain block size, etc.
  3149. */
  3150. static void __devinit hpsa_find_board_params(struct ctlr_info *h)
  3151. {
  3152. hpsa_get_max_perf_mode_cmds(h);
  3153. h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
  3154. h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
  3155. /*
  3156. * Limit in-command s/g elements to 32 save dma'able memory.
  3157. * Howvever spec says if 0, use 31
  3158. */
  3159. h->max_cmd_sg_entries = 31;
  3160. if (h->maxsgentries > 512) {
  3161. h->max_cmd_sg_entries = 32;
  3162. h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
  3163. h->maxsgentries--; /* save one for chain pointer */
  3164. } else {
  3165. h->maxsgentries = 31; /* default to traditional values */
  3166. h->chainsize = 0;
  3167. }
  3168. }
  3169. static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
  3170. {
  3171. if ((readb(&h->cfgtable->Signature[0]) != 'C') ||
  3172. (readb(&h->cfgtable->Signature[1]) != 'I') ||
  3173. (readb(&h->cfgtable->Signature[2]) != 'S') ||
  3174. (readb(&h->cfgtable->Signature[3]) != 'S')) {
  3175. dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
  3176. return false;
  3177. }
  3178. return true;
  3179. }
  3180. /* Need to enable prefetch in the SCSI core for 6400 in x86 */
  3181. static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
  3182. {
  3183. #ifdef CONFIG_X86
  3184. u32 prefetch;
  3185. prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
  3186. prefetch |= 0x100;
  3187. writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
  3188. #endif
  3189. }
  3190. /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
  3191. * in a prefetch beyond physical memory.
  3192. */
  3193. static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
  3194. {
  3195. u32 dma_prefetch;
  3196. if (h->board_id != 0x3225103C)
  3197. return;
  3198. dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
  3199. dma_prefetch |= 0x8000;
  3200. writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
  3201. }
  3202. static void __devinit hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
  3203. {
  3204. int i;
  3205. u32 doorbell_value;
  3206. unsigned long flags;
  3207. /* under certain very rare conditions, this can take awhile.
  3208. * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
  3209. * as we enter this code.)
  3210. */
  3211. for (i = 0; i < MAX_CONFIG_WAIT; i++) {
  3212. spin_lock_irqsave(&h->lock, flags);
  3213. doorbell_value = readl(h->vaddr + SA5_DOORBELL);
  3214. spin_unlock_irqrestore(&h->lock, flags);
  3215. if (!doorbell_value & CFGTBL_ChangeReq)
  3216. break;
  3217. /* delay and try again */
  3218. usleep_range(10000, 20000);
  3219. }
  3220. }
  3221. static int __devinit hpsa_enter_simple_mode(struct ctlr_info *h)
  3222. {
  3223. u32 trans_support;
  3224. trans_support = readl(&(h->cfgtable->TransportSupport));
  3225. if (!(trans_support & SIMPLE_MODE))
  3226. return -ENOTSUPP;
  3227. h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
  3228. /* Update the field, and then ring the doorbell */
  3229. writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
  3230. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3231. hpsa_wait_for_mode_change_ack(h);
  3232. print_cfg_table(&h->pdev->dev, h->cfgtable);
  3233. if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
  3234. dev_warn(&h->pdev->dev,
  3235. "unable to get board into simple mode\n");
  3236. return -ENODEV;
  3237. }
  3238. return 0;
  3239. }
  3240. static int __devinit hpsa_pci_init(struct ctlr_info *h)
  3241. {
  3242. int prod_index, err;
  3243. prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
  3244. if (prod_index < 0)
  3245. return -ENODEV;
  3246. h->product_name = products[prod_index].product_name;
  3247. h->access = *(products[prod_index].access);
  3248. if (hpsa_board_disabled(h->pdev)) {
  3249. dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
  3250. return -ENODEV;
  3251. }
  3252. err = pci_enable_device(h->pdev);
  3253. if (err) {
  3254. dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
  3255. return err;
  3256. }
  3257. err = pci_request_regions(h->pdev, "hpsa");
  3258. if (err) {
  3259. dev_err(&h->pdev->dev,
  3260. "cannot obtain PCI resources, aborting\n");
  3261. return err;
  3262. }
  3263. hpsa_interrupt_mode(h);
  3264. err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
  3265. if (err)
  3266. goto err_out_free_res;
  3267. h->vaddr = remap_pci_mem(h->paddr, 0x250);
  3268. if (!h->vaddr) {
  3269. err = -ENOMEM;
  3270. goto err_out_free_res;
  3271. }
  3272. err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
  3273. if (err)
  3274. goto err_out_free_res;
  3275. err = hpsa_find_cfgtables(h);
  3276. if (err)
  3277. goto err_out_free_res;
  3278. hpsa_find_board_params(h);
  3279. if (!hpsa_CISS_signature_present(h)) {
  3280. err = -ENODEV;
  3281. goto err_out_free_res;
  3282. }
  3283. hpsa_enable_scsi_prefetch(h);
  3284. hpsa_p600_dma_prefetch_quirk(h);
  3285. err = hpsa_enter_simple_mode(h);
  3286. if (err)
  3287. goto err_out_free_res;
  3288. return 0;
  3289. err_out_free_res:
  3290. if (h->transtable)
  3291. iounmap(h->transtable);
  3292. if (h->cfgtable)
  3293. iounmap(h->cfgtable);
  3294. if (h->vaddr)
  3295. iounmap(h->vaddr);
  3296. /*
  3297. * Deliberately omit pci_disable_device(): it does something nasty to
  3298. * Smart Array controllers that pci_enable_device does not undo
  3299. */
  3300. pci_release_regions(h->pdev);
  3301. return err;
  3302. }
  3303. static void __devinit hpsa_hba_inquiry(struct ctlr_info *h)
  3304. {
  3305. int rc;
  3306. #define HBA_INQUIRY_BYTE_COUNT 64
  3307. h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
  3308. if (!h->hba_inquiry_data)
  3309. return;
  3310. rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
  3311. h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
  3312. if (rc != 0) {
  3313. kfree(h->hba_inquiry_data);
  3314. h->hba_inquiry_data = NULL;
  3315. }
  3316. }
  3317. static __devinit int hpsa_init_reset_devices(struct pci_dev *pdev)
  3318. {
  3319. int rc, i;
  3320. if (!reset_devices)
  3321. return 0;
  3322. /* Reset the controller with a PCI power-cycle or via doorbell */
  3323. rc = hpsa_kdump_hard_reset_controller(pdev);
  3324. /* -ENOTSUPP here means we cannot reset the controller
  3325. * but it's already (and still) up and running in
  3326. * "performant mode". Or, it might be 640x, which can't reset
  3327. * due to concerns about shared bbwc between 6402/6404 pair.
  3328. */
  3329. if (rc == -ENOTSUPP)
  3330. return 0; /* just try to do the kdump anyhow. */
  3331. if (rc)
  3332. return -ENODEV;
  3333. /* Now try to get the controller to respond to a no-op */
  3334. for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
  3335. if (hpsa_noop(pdev) == 0)
  3336. break;
  3337. else
  3338. dev_warn(&pdev->dev, "no-op failed%s\n",
  3339. (i < 11 ? "; re-trying" : ""));
  3340. }
  3341. return 0;
  3342. }
  3343. static int __devinit hpsa_init_one(struct pci_dev *pdev,
  3344. const struct pci_device_id *ent)
  3345. {
  3346. int dac, rc;
  3347. struct ctlr_info *h;
  3348. if (number_of_controllers == 0)
  3349. printk(KERN_INFO DRIVER_NAME "\n");
  3350. rc = hpsa_init_reset_devices(pdev);
  3351. if (rc)
  3352. return rc;
  3353. /* Command structures must be aligned on a 32-byte boundary because
  3354. * the 5 lower bits of the address are used by the hardware. and by
  3355. * the driver. See comments in hpsa.h for more info.
  3356. */
  3357. #define COMMANDLIST_ALIGNMENT 32
  3358. BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
  3359. h = kzalloc(sizeof(*h), GFP_KERNEL);
  3360. if (!h)
  3361. return -ENOMEM;
  3362. h->pdev = pdev;
  3363. h->busy_initializing = 1;
  3364. INIT_HLIST_HEAD(&h->cmpQ);
  3365. INIT_HLIST_HEAD(&h->reqQ);
  3366. spin_lock_init(&h->lock);
  3367. spin_lock_init(&h->scan_lock);
  3368. rc = hpsa_pci_init(h);
  3369. if (rc != 0)
  3370. goto clean1;
  3371. sprintf(h->devname, "hpsa%d", number_of_controllers);
  3372. h->ctlr = number_of_controllers;
  3373. number_of_controllers++;
  3374. /* configure PCI DMA stuff */
  3375. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  3376. if (rc == 0) {
  3377. dac = 1;
  3378. } else {
  3379. rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3380. if (rc == 0) {
  3381. dac = 0;
  3382. } else {
  3383. dev_err(&pdev->dev, "no suitable DMA available\n");
  3384. goto clean1;
  3385. }
  3386. }
  3387. /* make sure the board interrupts are off */
  3388. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3389. if (h->msix_vector || h->msi_vector)
  3390. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_msi,
  3391. IRQF_DISABLED, h->devname, h);
  3392. else
  3393. rc = request_irq(h->intr[PERF_MODE_INT], do_hpsa_intr_intx,
  3394. IRQF_DISABLED, h->devname, h);
  3395. if (rc) {
  3396. dev_err(&pdev->dev, "unable to get irq %d for %s\n",
  3397. h->intr[PERF_MODE_INT], h->devname);
  3398. goto clean2;
  3399. }
  3400. dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
  3401. h->devname, pdev->device,
  3402. h->intr[PERF_MODE_INT], dac ? "" : " not");
  3403. h->cmd_pool_bits =
  3404. kmalloc(((h->nr_cmds + BITS_PER_LONG -
  3405. 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL);
  3406. h->cmd_pool = pci_alloc_consistent(h->pdev,
  3407. h->nr_cmds * sizeof(*h->cmd_pool),
  3408. &(h->cmd_pool_dhandle));
  3409. h->errinfo_pool = pci_alloc_consistent(h->pdev,
  3410. h->nr_cmds * sizeof(*h->errinfo_pool),
  3411. &(h->errinfo_pool_dhandle));
  3412. if ((h->cmd_pool_bits == NULL)
  3413. || (h->cmd_pool == NULL)
  3414. || (h->errinfo_pool == NULL)) {
  3415. dev_err(&pdev->dev, "out of memory");
  3416. rc = -ENOMEM;
  3417. goto clean4;
  3418. }
  3419. if (hpsa_allocate_sg_chain_blocks(h))
  3420. goto clean4;
  3421. init_waitqueue_head(&h->scan_wait_queue);
  3422. h->scan_finished = 1; /* no scan currently in progress */
  3423. pci_set_drvdata(pdev, h);
  3424. memset(h->cmd_pool_bits, 0,
  3425. ((h->nr_cmds + BITS_PER_LONG -
  3426. 1) / BITS_PER_LONG) * sizeof(unsigned long));
  3427. hpsa_scsi_setup(h);
  3428. /* Turn the interrupts on so we can service requests */
  3429. h->access.set_intr_mask(h, HPSA_INTR_ON);
  3430. hpsa_put_ctlr_into_performant_mode(h);
  3431. hpsa_hba_inquiry(h);
  3432. hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */
  3433. h->busy_initializing = 0;
  3434. return 1;
  3435. clean4:
  3436. hpsa_free_sg_chain_blocks(h);
  3437. kfree(h->cmd_pool_bits);
  3438. if (h->cmd_pool)
  3439. pci_free_consistent(h->pdev,
  3440. h->nr_cmds * sizeof(struct CommandList),
  3441. h->cmd_pool, h->cmd_pool_dhandle);
  3442. if (h->errinfo_pool)
  3443. pci_free_consistent(h->pdev,
  3444. h->nr_cmds * sizeof(struct ErrorInfo),
  3445. h->errinfo_pool,
  3446. h->errinfo_pool_dhandle);
  3447. free_irq(h->intr[PERF_MODE_INT], h);
  3448. clean2:
  3449. clean1:
  3450. h->busy_initializing = 0;
  3451. kfree(h);
  3452. return rc;
  3453. }
  3454. static void hpsa_flush_cache(struct ctlr_info *h)
  3455. {
  3456. char *flush_buf;
  3457. struct CommandList *c;
  3458. flush_buf = kzalloc(4, GFP_KERNEL);
  3459. if (!flush_buf)
  3460. return;
  3461. c = cmd_special_alloc(h);
  3462. if (!c) {
  3463. dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
  3464. goto out_of_memory;
  3465. }
  3466. fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
  3467. RAID_CTLR_LUNID, TYPE_CMD);
  3468. hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
  3469. if (c->err_info->CommandStatus != 0)
  3470. dev_warn(&h->pdev->dev,
  3471. "error flushing cache on controller\n");
  3472. cmd_special_free(h, c);
  3473. out_of_memory:
  3474. kfree(flush_buf);
  3475. }
  3476. static void hpsa_shutdown(struct pci_dev *pdev)
  3477. {
  3478. struct ctlr_info *h;
  3479. h = pci_get_drvdata(pdev);
  3480. /* Turn board interrupts off and send the flush cache command
  3481. * sendcmd will turn off interrupt, and send the flush...
  3482. * To write all data in the battery backed cache to disks
  3483. */
  3484. hpsa_flush_cache(h);
  3485. h->access.set_intr_mask(h, HPSA_INTR_OFF);
  3486. free_irq(h->intr[PERF_MODE_INT], h);
  3487. #ifdef CONFIG_PCI_MSI
  3488. if (h->msix_vector)
  3489. pci_disable_msix(h->pdev);
  3490. else if (h->msi_vector)
  3491. pci_disable_msi(h->pdev);
  3492. #endif /* CONFIG_PCI_MSI */
  3493. }
  3494. static void __devexit hpsa_remove_one(struct pci_dev *pdev)
  3495. {
  3496. struct ctlr_info *h;
  3497. if (pci_get_drvdata(pdev) == NULL) {
  3498. dev_err(&pdev->dev, "unable to remove device \n");
  3499. return;
  3500. }
  3501. h = pci_get_drvdata(pdev);
  3502. hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */
  3503. hpsa_shutdown(pdev);
  3504. iounmap(h->vaddr);
  3505. iounmap(h->transtable);
  3506. iounmap(h->cfgtable);
  3507. hpsa_free_sg_chain_blocks(h);
  3508. pci_free_consistent(h->pdev,
  3509. h->nr_cmds * sizeof(struct CommandList),
  3510. h->cmd_pool, h->cmd_pool_dhandle);
  3511. pci_free_consistent(h->pdev,
  3512. h->nr_cmds * sizeof(struct ErrorInfo),
  3513. h->errinfo_pool, h->errinfo_pool_dhandle);
  3514. pci_free_consistent(h->pdev, h->reply_pool_size,
  3515. h->reply_pool, h->reply_pool_dhandle);
  3516. kfree(h->cmd_pool_bits);
  3517. kfree(h->blockFetchTable);
  3518. kfree(h->hba_inquiry_data);
  3519. /*
  3520. * Deliberately omit pci_disable_device(): it does something nasty to
  3521. * Smart Array controllers that pci_enable_device does not undo
  3522. */
  3523. pci_release_regions(pdev);
  3524. pci_set_drvdata(pdev, NULL);
  3525. kfree(h);
  3526. }
  3527. static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
  3528. __attribute__((unused)) pm_message_t state)
  3529. {
  3530. return -ENOSYS;
  3531. }
  3532. static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
  3533. {
  3534. return -ENOSYS;
  3535. }
  3536. static struct pci_driver hpsa_pci_driver = {
  3537. .name = "hpsa",
  3538. .probe = hpsa_init_one,
  3539. .remove = __devexit_p(hpsa_remove_one),
  3540. .id_table = hpsa_pci_device_id, /* id_table */
  3541. .shutdown = hpsa_shutdown,
  3542. .suspend = hpsa_suspend,
  3543. .resume = hpsa_resume,
  3544. };
  3545. /* Fill in bucket_map[], given nsgs (the max number of
  3546. * scatter gather elements supported) and bucket[],
  3547. * which is an array of 8 integers. The bucket[] array
  3548. * contains 8 different DMA transfer sizes (in 16
  3549. * byte increments) which the controller uses to fetch
  3550. * commands. This function fills in bucket_map[], which
  3551. * maps a given number of scatter gather elements to one of
  3552. * the 8 DMA transfer sizes. The point of it is to allow the
  3553. * controller to only do as much DMA as needed to fetch the
  3554. * command, with the DMA transfer size encoded in the lower
  3555. * bits of the command address.
  3556. */
  3557. static void calc_bucket_map(int bucket[], int num_buckets,
  3558. int nsgs, int *bucket_map)
  3559. {
  3560. int i, j, b, size;
  3561. /* even a command with 0 SGs requires 4 blocks */
  3562. #define MINIMUM_TRANSFER_BLOCKS 4
  3563. #define NUM_BUCKETS 8
  3564. /* Note, bucket_map must have nsgs+1 entries. */
  3565. for (i = 0; i <= nsgs; i++) {
  3566. /* Compute size of a command with i SG entries */
  3567. size = i + MINIMUM_TRANSFER_BLOCKS;
  3568. b = num_buckets; /* Assume the biggest bucket */
  3569. /* Find the bucket that is just big enough */
  3570. for (j = 0; j < 8; j++) {
  3571. if (bucket[j] >= size) {
  3572. b = j;
  3573. break;
  3574. }
  3575. }
  3576. /* for a command with i SG entries, use bucket b. */
  3577. bucket_map[i] = b;
  3578. }
  3579. }
  3580. static __devinit void hpsa_enter_performant_mode(struct ctlr_info *h)
  3581. {
  3582. int i;
  3583. unsigned long register_value;
  3584. /* This is a bit complicated. There are 8 registers on
  3585. * the controller which we write to to tell it 8 different
  3586. * sizes of commands which there may be. It's a way of
  3587. * reducing the DMA done to fetch each command. Encoded into
  3588. * each command's tag are 3 bits which communicate to the controller
  3589. * which of the eight sizes that command fits within. The size of
  3590. * each command depends on how many scatter gather entries there are.
  3591. * Each SG entry requires 16 bytes. The eight registers are programmed
  3592. * with the number of 16-byte blocks a command of that size requires.
  3593. * The smallest command possible requires 5 such 16 byte blocks.
  3594. * the largest command possible requires MAXSGENTRIES + 4 16-byte
  3595. * blocks. Note, this only extends to the SG entries contained
  3596. * within the command block, and does not extend to chained blocks
  3597. * of SG elements. bft[] contains the eight values we write to
  3598. * the registers. They are not evenly distributed, but have more
  3599. * sizes for small commands, and fewer sizes for larger commands.
  3600. */
  3601. int bft[8] = {5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
  3602. BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
  3603. /* 5 = 1 s/g entry or 4k
  3604. * 6 = 2 s/g entry or 8k
  3605. * 8 = 4 s/g entry or 16k
  3606. * 10 = 6 s/g entry or 24k
  3607. */
  3608. h->reply_pool_wraparound = 1; /* spec: init to 1 */
  3609. /* Controller spec: zero out this buffer. */
  3610. memset(h->reply_pool, 0, h->reply_pool_size);
  3611. h->reply_pool_head = h->reply_pool;
  3612. bft[7] = h->max_sg_entries + 4;
  3613. calc_bucket_map(bft, ARRAY_SIZE(bft), 32, h->blockFetchTable);
  3614. for (i = 0; i < 8; i++)
  3615. writel(bft[i], &h->transtable->BlockFetch[i]);
  3616. /* size of controller ring buffer */
  3617. writel(h->max_commands, &h->transtable->RepQSize);
  3618. writel(1, &h->transtable->RepQCount);
  3619. writel(0, &h->transtable->RepQCtrAddrLow32);
  3620. writel(0, &h->transtable->RepQCtrAddrHigh32);
  3621. writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
  3622. writel(0, &h->transtable->RepQAddr0High32);
  3623. writel(CFGTBL_Trans_Performant,
  3624. &(h->cfgtable->HostWrite.TransportRequest));
  3625. writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
  3626. hpsa_wait_for_mode_change_ack(h);
  3627. register_value = readl(&(h->cfgtable->TransportActive));
  3628. if (!(register_value & CFGTBL_Trans_Performant)) {
  3629. dev_warn(&h->pdev->dev, "unable to get board into"
  3630. " performant mode\n");
  3631. return;
  3632. }
  3633. }
  3634. static __devinit void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
  3635. {
  3636. u32 trans_support;
  3637. if (hpsa_simple_mode)
  3638. return;
  3639. trans_support = readl(&(h->cfgtable->TransportSupport));
  3640. if (!(trans_support & PERFORMANT_MODE))
  3641. return;
  3642. hpsa_get_max_perf_mode_cmds(h);
  3643. h->max_sg_entries = 32;
  3644. /* Performant mode ring buffer and supporting data structures */
  3645. h->reply_pool_size = h->max_commands * sizeof(u64);
  3646. h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
  3647. &(h->reply_pool_dhandle));
  3648. /* Need a block fetch table for performant mode */
  3649. h->blockFetchTable = kmalloc(((h->max_sg_entries+1) *
  3650. sizeof(u32)), GFP_KERNEL);
  3651. if ((h->reply_pool == NULL)
  3652. || (h->blockFetchTable == NULL))
  3653. goto clean_up;
  3654. hpsa_enter_performant_mode(h);
  3655. /* Change the access methods to the performant access methods */
  3656. h->access = SA5_performant_access;
  3657. h->transMethod = CFGTBL_Trans_Performant;
  3658. return;
  3659. clean_up:
  3660. if (h->reply_pool)
  3661. pci_free_consistent(h->pdev, h->reply_pool_size,
  3662. h->reply_pool, h->reply_pool_dhandle);
  3663. kfree(h->blockFetchTable);
  3664. }
  3665. /*
  3666. * This is it. Register the PCI driver information for the cards we control
  3667. * the OS will call our registered routines when it finds one of our cards.
  3668. */
  3669. static int __init hpsa_init(void)
  3670. {
  3671. return pci_register_driver(&hpsa_pci_driver);
  3672. }
  3673. static void __exit hpsa_cleanup(void)
  3674. {
  3675. pci_unregister_driver(&hpsa_pci_driver);
  3676. }
  3677. module_init(hpsa_init);
  3678. module_exit(hpsa_cleanup);