spear-cpufreq.c 6.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257
  1. /*
  2. * drivers/cpufreq/spear-cpufreq.c
  3. *
  4. * CPU Frequency Scaling for SPEAr platform
  5. *
  6. * Copyright (C) 2012 ST Microelectronics
  7. * Deepak Sikri <deepak.sikri@st.com>
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2. This program is licensed "as is" without any
  11. * warranty of any kind, whether express or implied.
  12. */
  13. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14. #include <linux/clk.h>
  15. #include <linux/cpufreq.h>
  16. #include <linux/err.h>
  17. #include <linux/init.h>
  18. #include <linux/module.h>
  19. #include <linux/of_device.h>
  20. #include <linux/slab.h>
  21. #include <linux/types.h>
  22. /* SPEAr CPUFreq driver data structure */
  23. static struct {
  24. struct clk *clk;
  25. unsigned int transition_latency;
  26. struct cpufreq_frequency_table *freq_tbl;
  27. u32 cnt;
  28. } spear_cpufreq;
  29. static unsigned int spear_cpufreq_get(unsigned int cpu)
  30. {
  31. return clk_get_rate(spear_cpufreq.clk) / 1000;
  32. }
  33. static struct clk *spear1340_cpu_get_possible_parent(unsigned long newfreq)
  34. {
  35. struct clk *sys_pclk;
  36. int pclk;
  37. /*
  38. * In SPEAr1340, cpu clk's parent sys clk can take input from
  39. * following sources
  40. */
  41. const char *sys_clk_src[] = {
  42. "sys_syn_clk",
  43. "pll1_clk",
  44. "pll2_clk",
  45. "pll3_clk",
  46. };
  47. /*
  48. * As sys clk can have multiple source with their own range
  49. * limitation so we choose possible sources accordingly
  50. */
  51. if (newfreq <= 300000000)
  52. pclk = 0; /* src is sys_syn_clk */
  53. else if (newfreq > 300000000 && newfreq <= 500000000)
  54. pclk = 3; /* src is pll3_clk */
  55. else if (newfreq == 600000000)
  56. pclk = 1; /* src is pll1_clk */
  57. else
  58. return ERR_PTR(-EINVAL);
  59. /* Get parent to sys clock */
  60. sys_pclk = clk_get(NULL, sys_clk_src[pclk]);
  61. if (IS_ERR(sys_pclk))
  62. pr_err("Failed to get %s clock\n", sys_clk_src[pclk]);
  63. return sys_pclk;
  64. }
  65. /*
  66. * In SPEAr1340, we cannot use newfreq directly because we need to actually
  67. * access a source clock (clk) which might not be ancestor of cpu at present.
  68. * Hence in SPEAr1340 we would operate on source clock directly before switching
  69. * cpu clock to it.
  70. */
  71. static int spear1340_set_cpu_rate(struct clk *sys_pclk, unsigned long newfreq)
  72. {
  73. struct clk *sys_clk;
  74. int ret = 0;
  75. sys_clk = clk_get_parent(spear_cpufreq.clk);
  76. if (IS_ERR(sys_clk)) {
  77. pr_err("failed to get cpu's parent (sys) clock\n");
  78. return PTR_ERR(sys_clk);
  79. }
  80. /* Set the rate of the source clock before changing the parent */
  81. ret = clk_set_rate(sys_pclk, newfreq);
  82. if (ret) {
  83. pr_err("Failed to set sys clk rate to %lu\n", newfreq);
  84. return ret;
  85. }
  86. ret = clk_set_parent(sys_clk, sys_pclk);
  87. if (ret) {
  88. pr_err("Failed to set sys clk parent\n");
  89. return ret;
  90. }
  91. return 0;
  92. }
  93. static int spear_cpufreq_target(struct cpufreq_policy *policy,
  94. unsigned int index)
  95. {
  96. struct cpufreq_freqs freqs;
  97. long newfreq;
  98. struct clk *srcclk;
  99. int ret, mult = 1;
  100. freqs.old = spear_cpufreq_get(0);
  101. newfreq = spear_cpufreq.freq_tbl[index].frequency * 1000;
  102. if (of_machine_is_compatible("st,spear1340")) {
  103. /*
  104. * SPEAr1340 is special in the sense that due to the possibility
  105. * of multiple clock sources for cpu clk's parent we can have
  106. * different clock source for different frequency of cpu clk.
  107. * Hence we need to choose one from amongst these possible clock
  108. * sources.
  109. */
  110. srcclk = spear1340_cpu_get_possible_parent(newfreq);
  111. if (IS_ERR(srcclk)) {
  112. pr_err("Failed to get src clk\n");
  113. return PTR_ERR(srcclk);
  114. }
  115. /* SPEAr1340: src clk is always 2 * intended cpu clk */
  116. mult = 2;
  117. } else {
  118. /*
  119. * src clock to be altered is ancestor of cpu clock. Hence we
  120. * can directly work on cpu clk
  121. */
  122. srcclk = spear_cpufreq.clk;
  123. }
  124. newfreq = clk_round_rate(srcclk, newfreq * mult);
  125. if (newfreq < 0) {
  126. pr_err("clk_round_rate failed for cpu src clock\n");
  127. return newfreq;
  128. }
  129. freqs.new = newfreq / 1000;
  130. freqs.new /= mult;
  131. cpufreq_notify_transition(policy, &freqs, CPUFREQ_PRECHANGE);
  132. if (mult == 2)
  133. ret = spear1340_set_cpu_rate(srcclk, newfreq);
  134. else
  135. ret = clk_set_rate(spear_cpufreq.clk, newfreq);
  136. /* Get current rate after clk_set_rate, in case of failure */
  137. if (ret) {
  138. pr_err("CPU Freq: cpu clk_set_rate failed: %d\n", ret);
  139. freqs.new = clk_get_rate(spear_cpufreq.clk) / 1000;
  140. }
  141. cpufreq_notify_transition(policy, &freqs, CPUFREQ_POSTCHANGE);
  142. return ret;
  143. }
  144. static int spear_cpufreq_init(struct cpufreq_policy *policy)
  145. {
  146. return cpufreq_generic_init(policy, spear_cpufreq.freq_tbl,
  147. spear_cpufreq.transition_latency);
  148. }
  149. static struct cpufreq_driver spear_cpufreq_driver = {
  150. .name = "cpufreq-spear",
  151. .flags = CPUFREQ_STICKY,
  152. .verify = cpufreq_generic_frequency_table_verify,
  153. .target_index = spear_cpufreq_target,
  154. .get = spear_cpufreq_get,
  155. .init = spear_cpufreq_init,
  156. .exit = cpufreq_generic_exit,
  157. .attr = cpufreq_generic_attr,
  158. };
  159. static int spear_cpufreq_driver_init(void)
  160. {
  161. struct device_node *np;
  162. const struct property *prop;
  163. struct cpufreq_frequency_table *freq_tbl;
  164. const __be32 *val;
  165. int cnt, i, ret;
  166. np = of_cpu_device_node_get(0);
  167. if (!np) {
  168. pr_err("No cpu node found");
  169. return -ENODEV;
  170. }
  171. if (of_property_read_u32(np, "clock-latency",
  172. &spear_cpufreq.transition_latency))
  173. spear_cpufreq.transition_latency = CPUFREQ_ETERNAL;
  174. prop = of_find_property(np, "cpufreq_tbl", NULL);
  175. if (!prop || !prop->value) {
  176. pr_err("Invalid cpufreq_tbl");
  177. ret = -ENODEV;
  178. goto out_put_node;
  179. }
  180. cnt = prop->length / sizeof(u32);
  181. val = prop->value;
  182. freq_tbl = kmalloc(sizeof(*freq_tbl) * (cnt + 1), GFP_KERNEL);
  183. if (!freq_tbl) {
  184. ret = -ENOMEM;
  185. goto out_put_node;
  186. }
  187. for (i = 0; i < cnt; i++) {
  188. freq_tbl[i].driver_data = i;
  189. freq_tbl[i].frequency = be32_to_cpup(val++);
  190. }
  191. freq_tbl[i].driver_data = i;
  192. freq_tbl[i].frequency = CPUFREQ_TABLE_END;
  193. spear_cpufreq.freq_tbl = freq_tbl;
  194. of_node_put(np);
  195. spear_cpufreq.clk = clk_get(NULL, "cpu_clk");
  196. if (IS_ERR(spear_cpufreq.clk)) {
  197. pr_err("Unable to get CPU clock\n");
  198. ret = PTR_ERR(spear_cpufreq.clk);
  199. goto out_put_mem;
  200. }
  201. ret = cpufreq_register_driver(&spear_cpufreq_driver);
  202. if (!ret)
  203. return 0;
  204. pr_err("failed register driver: %d\n", ret);
  205. clk_put(spear_cpufreq.clk);
  206. out_put_mem:
  207. kfree(freq_tbl);
  208. return ret;
  209. out_put_node:
  210. of_node_put(np);
  211. return ret;
  212. }
  213. late_initcall(spear_cpufreq_driver_init);
  214. MODULE_AUTHOR("Deepak Sikri <deepak.sikri@st.com>");
  215. MODULE_DESCRIPTION("SPEAr CPUFreq driver");
  216. MODULE_LICENSE("GPL");