apply.c 29 KB

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  1. /*
  2. * Copyright (C) 2011 Texas Instruments
  3. * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #define DSS_SUBSYS_NAME "APPLY"
  18. #include <linux/kernel.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/jiffies.h>
  22. #include <video/omapdss.h>
  23. #include "dss.h"
  24. #include "dss_features.h"
  25. /*
  26. * We have 4 levels of cache for the dispc settings. First two are in SW and
  27. * the latter two in HW.
  28. *
  29. * set_info()
  30. * v
  31. * +--------------------+
  32. * | user_info |
  33. * +--------------------+
  34. * v
  35. * apply()
  36. * v
  37. * +--------------------+
  38. * | info |
  39. * +--------------------+
  40. * v
  41. * write_regs()
  42. * v
  43. * +--------------------+
  44. * | shadow registers |
  45. * +--------------------+
  46. * v
  47. * VFP or lcd/digit_enable
  48. * v
  49. * +--------------------+
  50. * | registers |
  51. * +--------------------+
  52. */
  53. struct ovl_priv_data {
  54. bool user_info_dirty;
  55. struct omap_overlay_info user_info;
  56. bool info_dirty;
  57. struct omap_overlay_info info;
  58. bool shadow_info_dirty;
  59. bool extra_info_dirty;
  60. bool shadow_extra_info_dirty;
  61. bool enabled;
  62. enum omap_channel channel;
  63. u32 fifo_low, fifo_high;
  64. /*
  65. * True if overlay is to be enabled. Used to check and calculate configs
  66. * for the overlay before it is enabled in the HW.
  67. */
  68. bool enabling;
  69. };
  70. struct mgr_priv_data {
  71. bool user_info_dirty;
  72. struct omap_overlay_manager_info user_info;
  73. bool info_dirty;
  74. struct omap_overlay_manager_info info;
  75. bool shadow_info_dirty;
  76. /* If true, GO bit is up and shadow registers cannot be written.
  77. * Never true for manual update displays */
  78. bool busy;
  79. /* If true, dispc output is enabled */
  80. bool updating;
  81. /* If true, a display is enabled using this manager */
  82. bool enabled;
  83. bool extra_info_dirty;
  84. bool shadow_extra_info_dirty;
  85. struct omap_video_timings timings;
  86. struct dss_lcd_mgr_config lcd_config;
  87. };
  88. static struct {
  89. struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
  90. struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
  91. bool irq_enabled;
  92. } dss_data;
  93. /* protects dss_data */
  94. static spinlock_t data_lock;
  95. /* lock for blocking functions */
  96. static DEFINE_MUTEX(apply_lock);
  97. static DECLARE_COMPLETION(extra_updated_completion);
  98. static void dss_register_vsync_isr(void);
  99. static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
  100. {
  101. return &dss_data.ovl_priv_data_array[ovl->id];
  102. }
  103. static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
  104. {
  105. return &dss_data.mgr_priv_data_array[mgr->id];
  106. }
  107. void dss_apply_init(void)
  108. {
  109. const int num_ovls = dss_feat_get_num_ovls();
  110. struct mgr_priv_data *mp;
  111. int i;
  112. spin_lock_init(&data_lock);
  113. for (i = 0; i < num_ovls; ++i) {
  114. struct ovl_priv_data *op;
  115. op = &dss_data.ovl_priv_data_array[i];
  116. op->info.global_alpha = 255;
  117. switch (i) {
  118. case 0:
  119. op->info.zorder = 0;
  120. break;
  121. case 1:
  122. op->info.zorder =
  123. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 3 : 0;
  124. break;
  125. case 2:
  126. op->info.zorder =
  127. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 2 : 0;
  128. break;
  129. case 3:
  130. op->info.zorder =
  131. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 1 : 0;
  132. break;
  133. }
  134. op->user_info = op->info;
  135. }
  136. /*
  137. * Initialize some of the lcd_config fields for TV manager, this lets
  138. * us prevent checking if the manager is LCD or TV at some places
  139. */
  140. mp = &dss_data.mgr_priv_data_array[OMAP_DSS_CHANNEL_DIGIT];
  141. mp->lcd_config.video_port_width = 24;
  142. mp->lcd_config.clock_info.lck_div = 1;
  143. mp->lcd_config.clock_info.pck_div = 1;
  144. }
  145. /*
  146. * A LCD manager's stallmode decides whether it is in manual or auto update. TV
  147. * manager is always auto update, stallmode field for TV manager is false by
  148. * default
  149. */
  150. static bool ovl_manual_update(struct omap_overlay *ovl)
  151. {
  152. struct mgr_priv_data *mp = get_mgr_priv(ovl->manager);
  153. return mp->lcd_config.stallmode;
  154. }
  155. static bool mgr_manual_update(struct omap_overlay_manager *mgr)
  156. {
  157. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  158. return mp->lcd_config.stallmode;
  159. }
  160. static int dss_check_settings_low(struct omap_overlay_manager *mgr,
  161. bool applying)
  162. {
  163. struct omap_overlay_info *oi;
  164. struct omap_overlay_manager_info *mi;
  165. struct omap_overlay *ovl;
  166. struct omap_overlay_info *ois[MAX_DSS_OVERLAYS];
  167. struct ovl_priv_data *op;
  168. struct mgr_priv_data *mp;
  169. mp = get_mgr_priv(mgr);
  170. if (!mp->enabled)
  171. return 0;
  172. if (applying && mp->user_info_dirty)
  173. mi = &mp->user_info;
  174. else
  175. mi = &mp->info;
  176. /* collect the infos to be tested into the array */
  177. list_for_each_entry(ovl, &mgr->overlays, list) {
  178. op = get_ovl_priv(ovl);
  179. if (!op->enabled && !op->enabling)
  180. oi = NULL;
  181. else if (applying && op->user_info_dirty)
  182. oi = &op->user_info;
  183. else
  184. oi = &op->info;
  185. ois[ovl->id] = oi;
  186. }
  187. return dss_mgr_check(mgr, mi, &mp->timings, &mp->lcd_config, ois);
  188. }
  189. /*
  190. * check manager and overlay settings using overlay_info from data->info
  191. */
  192. static int dss_check_settings(struct omap_overlay_manager *mgr)
  193. {
  194. return dss_check_settings_low(mgr, false);
  195. }
  196. /*
  197. * check manager and overlay settings using overlay_info from ovl->info if
  198. * dirty and from data->info otherwise
  199. */
  200. static int dss_check_settings_apply(struct omap_overlay_manager *mgr)
  201. {
  202. return dss_check_settings_low(mgr, true);
  203. }
  204. static bool need_isr(void)
  205. {
  206. const int num_mgrs = dss_feat_get_num_mgrs();
  207. int i;
  208. for (i = 0; i < num_mgrs; ++i) {
  209. struct omap_overlay_manager *mgr;
  210. struct mgr_priv_data *mp;
  211. struct omap_overlay *ovl;
  212. mgr = omap_dss_get_overlay_manager(i);
  213. mp = get_mgr_priv(mgr);
  214. if (!mp->enabled)
  215. continue;
  216. if (mgr_manual_update(mgr)) {
  217. /* to catch FRAMEDONE */
  218. if (mp->updating)
  219. return true;
  220. } else {
  221. /* to catch GO bit going down */
  222. if (mp->busy)
  223. return true;
  224. /* to write new values to registers */
  225. if (mp->info_dirty)
  226. return true;
  227. /* to set GO bit */
  228. if (mp->shadow_info_dirty)
  229. return true;
  230. /*
  231. * NOTE: we don't check extra_info flags for disabled
  232. * managers, once the manager is enabled, the extra_info
  233. * related manager changes will be taken in by HW.
  234. */
  235. /* to write new values to registers */
  236. if (mp->extra_info_dirty)
  237. return true;
  238. /* to set GO bit */
  239. if (mp->shadow_extra_info_dirty)
  240. return true;
  241. list_for_each_entry(ovl, &mgr->overlays, list) {
  242. struct ovl_priv_data *op;
  243. op = get_ovl_priv(ovl);
  244. /*
  245. * NOTE: we check extra_info flags even for
  246. * disabled overlays, as extra_infos need to be
  247. * always written.
  248. */
  249. /* to write new values to registers */
  250. if (op->extra_info_dirty)
  251. return true;
  252. /* to set GO bit */
  253. if (op->shadow_extra_info_dirty)
  254. return true;
  255. if (!op->enabled)
  256. continue;
  257. /* to write new values to registers */
  258. if (op->info_dirty)
  259. return true;
  260. /* to set GO bit */
  261. if (op->shadow_info_dirty)
  262. return true;
  263. }
  264. }
  265. }
  266. return false;
  267. }
  268. static bool need_go(struct omap_overlay_manager *mgr)
  269. {
  270. struct omap_overlay *ovl;
  271. struct mgr_priv_data *mp;
  272. struct ovl_priv_data *op;
  273. mp = get_mgr_priv(mgr);
  274. if (mp->shadow_info_dirty || mp->shadow_extra_info_dirty)
  275. return true;
  276. list_for_each_entry(ovl, &mgr->overlays, list) {
  277. op = get_ovl_priv(ovl);
  278. if (op->shadow_info_dirty || op->shadow_extra_info_dirty)
  279. return true;
  280. }
  281. return false;
  282. }
  283. /* returns true if an extra_info field is currently being updated */
  284. static bool extra_info_update_ongoing(void)
  285. {
  286. const int num_mgrs = dss_feat_get_num_mgrs();
  287. int i;
  288. for (i = 0; i < num_mgrs; ++i) {
  289. struct omap_overlay_manager *mgr;
  290. struct omap_overlay *ovl;
  291. struct mgr_priv_data *mp;
  292. mgr = omap_dss_get_overlay_manager(i);
  293. mp = get_mgr_priv(mgr);
  294. if (!mp->enabled)
  295. continue;
  296. if (!mp->updating)
  297. continue;
  298. if (mp->extra_info_dirty || mp->shadow_extra_info_dirty)
  299. return true;
  300. list_for_each_entry(ovl, &mgr->overlays, list) {
  301. struct ovl_priv_data *op = get_ovl_priv(ovl);
  302. if (op->extra_info_dirty || op->shadow_extra_info_dirty)
  303. return true;
  304. }
  305. }
  306. return false;
  307. }
  308. /* wait until no extra_info updates are pending */
  309. static void wait_pending_extra_info_updates(void)
  310. {
  311. bool updating;
  312. unsigned long flags;
  313. unsigned long t;
  314. int r;
  315. spin_lock_irqsave(&data_lock, flags);
  316. updating = extra_info_update_ongoing();
  317. if (!updating) {
  318. spin_unlock_irqrestore(&data_lock, flags);
  319. return;
  320. }
  321. init_completion(&extra_updated_completion);
  322. spin_unlock_irqrestore(&data_lock, flags);
  323. t = msecs_to_jiffies(500);
  324. r = wait_for_completion_timeout(&extra_updated_completion, t);
  325. if (r == 0)
  326. DSSWARN("timeout in wait_pending_extra_info_updates\n");
  327. }
  328. int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
  329. {
  330. unsigned long timeout = msecs_to_jiffies(500);
  331. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  332. u32 irq;
  333. unsigned long flags;
  334. int r;
  335. int i;
  336. spin_lock_irqsave(&data_lock, flags);
  337. if (mgr_manual_update(mgr)) {
  338. spin_unlock_irqrestore(&data_lock, flags);
  339. return 0;
  340. }
  341. if (!mp->enabled) {
  342. spin_unlock_irqrestore(&data_lock, flags);
  343. return 0;
  344. }
  345. spin_unlock_irqrestore(&data_lock, flags);
  346. r = dispc_runtime_get();
  347. if (r)
  348. return r;
  349. irq = dispc_mgr_get_vsync_irq(mgr->id);
  350. i = 0;
  351. while (1) {
  352. bool shadow_dirty, dirty;
  353. spin_lock_irqsave(&data_lock, flags);
  354. dirty = mp->info_dirty;
  355. shadow_dirty = mp->shadow_info_dirty;
  356. spin_unlock_irqrestore(&data_lock, flags);
  357. if (!dirty && !shadow_dirty) {
  358. r = 0;
  359. break;
  360. }
  361. /* 4 iterations is the worst case:
  362. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  363. * 2 - first VSYNC, dirty = true
  364. * 3 - dirty = false, shadow_dirty = true
  365. * 4 - shadow_dirty = false */
  366. if (i++ == 3) {
  367. DSSERR("mgr(%d)->wait_for_go() not finishing\n",
  368. mgr->id);
  369. r = 0;
  370. break;
  371. }
  372. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  373. if (r == -ERESTARTSYS)
  374. break;
  375. if (r) {
  376. DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id);
  377. break;
  378. }
  379. }
  380. dispc_runtime_put();
  381. return r;
  382. }
  383. int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
  384. {
  385. unsigned long timeout = msecs_to_jiffies(500);
  386. struct ovl_priv_data *op;
  387. struct mgr_priv_data *mp;
  388. u32 irq;
  389. unsigned long flags;
  390. int r;
  391. int i;
  392. if (!ovl->manager)
  393. return 0;
  394. mp = get_mgr_priv(ovl->manager);
  395. spin_lock_irqsave(&data_lock, flags);
  396. if (ovl_manual_update(ovl)) {
  397. spin_unlock_irqrestore(&data_lock, flags);
  398. return 0;
  399. }
  400. if (!mp->enabled) {
  401. spin_unlock_irqrestore(&data_lock, flags);
  402. return 0;
  403. }
  404. spin_unlock_irqrestore(&data_lock, flags);
  405. r = dispc_runtime_get();
  406. if (r)
  407. return r;
  408. irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
  409. op = get_ovl_priv(ovl);
  410. i = 0;
  411. while (1) {
  412. bool shadow_dirty, dirty;
  413. spin_lock_irqsave(&data_lock, flags);
  414. dirty = op->info_dirty;
  415. shadow_dirty = op->shadow_info_dirty;
  416. spin_unlock_irqrestore(&data_lock, flags);
  417. if (!dirty && !shadow_dirty) {
  418. r = 0;
  419. break;
  420. }
  421. /* 4 iterations is the worst case:
  422. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  423. * 2 - first VSYNC, dirty = true
  424. * 3 - dirty = false, shadow_dirty = true
  425. * 4 - shadow_dirty = false */
  426. if (i++ == 3) {
  427. DSSERR("ovl(%d)->wait_for_go() not finishing\n",
  428. ovl->id);
  429. r = 0;
  430. break;
  431. }
  432. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  433. if (r == -ERESTARTSYS)
  434. break;
  435. if (r) {
  436. DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id);
  437. break;
  438. }
  439. }
  440. dispc_runtime_put();
  441. return r;
  442. }
  443. static void dss_ovl_write_regs(struct omap_overlay *ovl)
  444. {
  445. struct ovl_priv_data *op = get_ovl_priv(ovl);
  446. struct omap_overlay_info *oi;
  447. bool replication;
  448. struct mgr_priv_data *mp;
  449. int r;
  450. DSSDBG("writing ovl %d regs", ovl->id);
  451. if (!op->enabled || !op->info_dirty)
  452. return;
  453. oi = &op->info;
  454. mp = get_mgr_priv(ovl->manager);
  455. replication = dss_ovl_use_replication(mp->lcd_config, oi->color_mode);
  456. r = dispc_ovl_setup(ovl->id, oi, replication, &mp->timings, false);
  457. if (r) {
  458. /*
  459. * We can't do much here, as this function can be called from
  460. * vsync interrupt.
  461. */
  462. DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id);
  463. /* This will leave fifo configurations in a nonoptimal state */
  464. op->enabled = false;
  465. dispc_ovl_enable(ovl->id, false);
  466. return;
  467. }
  468. op->info_dirty = false;
  469. if (mp->updating)
  470. op->shadow_info_dirty = true;
  471. }
  472. static void dss_ovl_write_regs_extra(struct omap_overlay *ovl)
  473. {
  474. struct ovl_priv_data *op = get_ovl_priv(ovl);
  475. struct mgr_priv_data *mp;
  476. DSSDBG("writing ovl %d regs extra", ovl->id);
  477. if (!op->extra_info_dirty)
  478. return;
  479. /* note: write also when op->enabled == false, so that the ovl gets
  480. * disabled */
  481. dispc_ovl_enable(ovl->id, op->enabled);
  482. dispc_ovl_set_channel_out(ovl->id, op->channel);
  483. dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
  484. mp = get_mgr_priv(ovl->manager);
  485. op->extra_info_dirty = false;
  486. if (mp->updating)
  487. op->shadow_extra_info_dirty = true;
  488. }
  489. static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
  490. {
  491. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  492. struct omap_overlay *ovl;
  493. DSSDBG("writing mgr %d regs", mgr->id);
  494. if (!mp->enabled)
  495. return;
  496. WARN_ON(mp->busy);
  497. /* Commit overlay settings */
  498. list_for_each_entry(ovl, &mgr->overlays, list) {
  499. dss_ovl_write_regs(ovl);
  500. dss_ovl_write_regs_extra(ovl);
  501. }
  502. if (mp->info_dirty) {
  503. dispc_mgr_setup(mgr->id, &mp->info);
  504. mp->info_dirty = false;
  505. if (mp->updating)
  506. mp->shadow_info_dirty = true;
  507. }
  508. }
  509. static void dss_mgr_write_regs_extra(struct omap_overlay_manager *mgr)
  510. {
  511. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  512. DSSDBG("writing mgr %d regs extra", mgr->id);
  513. if (!mp->extra_info_dirty)
  514. return;
  515. dispc_mgr_set_timings(mgr->id, &mp->timings);
  516. /* lcd_config parameters */
  517. if (dss_mgr_is_lcd(mgr->id))
  518. dispc_mgr_set_lcd_config(mgr->id, &mp->lcd_config);
  519. mp->extra_info_dirty = false;
  520. if (mp->updating)
  521. mp->shadow_extra_info_dirty = true;
  522. }
  523. static void dss_write_regs(void)
  524. {
  525. const int num_mgrs = omap_dss_get_num_overlay_managers();
  526. int i;
  527. for (i = 0; i < num_mgrs; ++i) {
  528. struct omap_overlay_manager *mgr;
  529. struct mgr_priv_data *mp;
  530. int r;
  531. mgr = omap_dss_get_overlay_manager(i);
  532. mp = get_mgr_priv(mgr);
  533. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  534. continue;
  535. r = dss_check_settings(mgr);
  536. if (r) {
  537. DSSERR("cannot write registers for manager %s: "
  538. "illegal configuration\n", mgr->name);
  539. continue;
  540. }
  541. dss_mgr_write_regs(mgr);
  542. dss_mgr_write_regs_extra(mgr);
  543. }
  544. }
  545. static void dss_set_go_bits(void)
  546. {
  547. const int num_mgrs = omap_dss_get_num_overlay_managers();
  548. int i;
  549. for (i = 0; i < num_mgrs; ++i) {
  550. struct omap_overlay_manager *mgr;
  551. struct mgr_priv_data *mp;
  552. mgr = omap_dss_get_overlay_manager(i);
  553. mp = get_mgr_priv(mgr);
  554. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  555. continue;
  556. if (!need_go(mgr))
  557. continue;
  558. mp->busy = true;
  559. if (!dss_data.irq_enabled && need_isr())
  560. dss_register_vsync_isr();
  561. dispc_mgr_go(mgr->id);
  562. }
  563. }
  564. static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr)
  565. {
  566. struct omap_overlay *ovl;
  567. struct mgr_priv_data *mp;
  568. struct ovl_priv_data *op;
  569. mp = get_mgr_priv(mgr);
  570. mp->shadow_info_dirty = false;
  571. mp->shadow_extra_info_dirty = false;
  572. list_for_each_entry(ovl, &mgr->overlays, list) {
  573. op = get_ovl_priv(ovl);
  574. op->shadow_info_dirty = false;
  575. op->shadow_extra_info_dirty = false;
  576. }
  577. }
  578. void dss_mgr_start_update(struct omap_overlay_manager *mgr)
  579. {
  580. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  581. unsigned long flags;
  582. int r;
  583. spin_lock_irqsave(&data_lock, flags);
  584. WARN_ON(mp->updating);
  585. r = dss_check_settings(mgr);
  586. if (r) {
  587. DSSERR("cannot start manual update: illegal configuration\n");
  588. spin_unlock_irqrestore(&data_lock, flags);
  589. return;
  590. }
  591. dss_mgr_write_regs(mgr);
  592. dss_mgr_write_regs_extra(mgr);
  593. mp->updating = true;
  594. if (!dss_data.irq_enabled && need_isr())
  595. dss_register_vsync_isr();
  596. dispc_mgr_enable_sync(mgr->id);
  597. mgr_clear_shadow_dirty(mgr);
  598. spin_unlock_irqrestore(&data_lock, flags);
  599. }
  600. static void dss_apply_irq_handler(void *data, u32 mask);
  601. static void dss_register_vsync_isr(void)
  602. {
  603. const int num_mgrs = dss_feat_get_num_mgrs();
  604. u32 mask;
  605. int r, i;
  606. mask = 0;
  607. for (i = 0; i < num_mgrs; ++i)
  608. mask |= dispc_mgr_get_vsync_irq(i);
  609. for (i = 0; i < num_mgrs; ++i)
  610. mask |= dispc_mgr_get_framedone_irq(i);
  611. r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
  612. WARN_ON(r);
  613. dss_data.irq_enabled = true;
  614. }
  615. static void dss_unregister_vsync_isr(void)
  616. {
  617. const int num_mgrs = dss_feat_get_num_mgrs();
  618. u32 mask;
  619. int r, i;
  620. mask = 0;
  621. for (i = 0; i < num_mgrs; ++i)
  622. mask |= dispc_mgr_get_vsync_irq(i);
  623. for (i = 0; i < num_mgrs; ++i)
  624. mask |= dispc_mgr_get_framedone_irq(i);
  625. r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
  626. WARN_ON(r);
  627. dss_data.irq_enabled = false;
  628. }
  629. static void dss_apply_irq_handler(void *data, u32 mask)
  630. {
  631. const int num_mgrs = dss_feat_get_num_mgrs();
  632. int i;
  633. bool extra_updating;
  634. spin_lock(&data_lock);
  635. /* clear busy, updating flags, shadow_dirty flags */
  636. for (i = 0; i < num_mgrs; i++) {
  637. struct omap_overlay_manager *mgr;
  638. struct mgr_priv_data *mp;
  639. bool was_updating;
  640. mgr = omap_dss_get_overlay_manager(i);
  641. mp = get_mgr_priv(mgr);
  642. if (!mp->enabled)
  643. continue;
  644. was_updating = mp->updating;
  645. mp->updating = dispc_mgr_is_enabled(i);
  646. if (!mgr_manual_update(mgr)) {
  647. bool was_busy = mp->busy;
  648. mp->busy = dispc_mgr_go_busy(i);
  649. if (was_busy && !mp->busy)
  650. mgr_clear_shadow_dirty(mgr);
  651. }
  652. }
  653. dss_write_regs();
  654. dss_set_go_bits();
  655. extra_updating = extra_info_update_ongoing();
  656. if (!extra_updating)
  657. complete_all(&extra_updated_completion);
  658. if (!need_isr())
  659. dss_unregister_vsync_isr();
  660. spin_unlock(&data_lock);
  661. }
  662. static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
  663. {
  664. struct ovl_priv_data *op;
  665. op = get_ovl_priv(ovl);
  666. if (!op->user_info_dirty)
  667. return;
  668. op->user_info_dirty = false;
  669. op->info_dirty = true;
  670. op->info = op->user_info;
  671. }
  672. static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
  673. {
  674. struct mgr_priv_data *mp;
  675. mp = get_mgr_priv(mgr);
  676. if (!mp->user_info_dirty)
  677. return;
  678. mp->user_info_dirty = false;
  679. mp->info_dirty = true;
  680. mp->info = mp->user_info;
  681. }
  682. int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
  683. {
  684. unsigned long flags;
  685. struct omap_overlay *ovl;
  686. int r;
  687. DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name);
  688. spin_lock_irqsave(&data_lock, flags);
  689. r = dss_check_settings_apply(mgr);
  690. if (r) {
  691. spin_unlock_irqrestore(&data_lock, flags);
  692. DSSERR("failed to apply settings: illegal configuration.\n");
  693. return r;
  694. }
  695. /* Configure overlays */
  696. list_for_each_entry(ovl, &mgr->overlays, list)
  697. omap_dss_mgr_apply_ovl(ovl);
  698. /* Configure manager */
  699. omap_dss_mgr_apply_mgr(mgr);
  700. dss_write_regs();
  701. dss_set_go_bits();
  702. spin_unlock_irqrestore(&data_lock, flags);
  703. return 0;
  704. }
  705. static void dss_apply_ovl_enable(struct omap_overlay *ovl, bool enable)
  706. {
  707. struct ovl_priv_data *op;
  708. op = get_ovl_priv(ovl);
  709. if (op->enabled == enable)
  710. return;
  711. op->enabled = enable;
  712. op->extra_info_dirty = true;
  713. }
  714. static void dss_apply_ovl_fifo_thresholds(struct omap_overlay *ovl,
  715. u32 fifo_low, u32 fifo_high)
  716. {
  717. struct ovl_priv_data *op = get_ovl_priv(ovl);
  718. if (op->fifo_low == fifo_low && op->fifo_high == fifo_high)
  719. return;
  720. op->fifo_low = fifo_low;
  721. op->fifo_high = fifo_high;
  722. op->extra_info_dirty = true;
  723. }
  724. static void dss_ovl_setup_fifo(struct omap_overlay *ovl)
  725. {
  726. struct ovl_priv_data *op = get_ovl_priv(ovl);
  727. u32 fifo_low, fifo_high;
  728. bool use_fifo_merge = false;
  729. if (!op->enabled && !op->enabling)
  730. return;
  731. dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
  732. use_fifo_merge, ovl_manual_update(ovl));
  733. dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high);
  734. }
  735. static void dss_mgr_setup_fifos(struct omap_overlay_manager *mgr)
  736. {
  737. struct omap_overlay *ovl;
  738. struct mgr_priv_data *mp;
  739. mp = get_mgr_priv(mgr);
  740. if (!mp->enabled)
  741. return;
  742. list_for_each_entry(ovl, &mgr->overlays, list)
  743. dss_ovl_setup_fifo(ovl);
  744. }
  745. static void dss_setup_fifos(void)
  746. {
  747. const int num_mgrs = omap_dss_get_num_overlay_managers();
  748. struct omap_overlay_manager *mgr;
  749. int i;
  750. for (i = 0; i < num_mgrs; ++i) {
  751. mgr = omap_dss_get_overlay_manager(i);
  752. dss_mgr_setup_fifos(mgr);
  753. }
  754. }
  755. int dss_mgr_enable(struct omap_overlay_manager *mgr)
  756. {
  757. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  758. unsigned long flags;
  759. int r;
  760. mutex_lock(&apply_lock);
  761. if (mp->enabled)
  762. goto out;
  763. spin_lock_irqsave(&data_lock, flags);
  764. mp->enabled = true;
  765. r = dss_check_settings(mgr);
  766. if (r) {
  767. DSSERR("failed to enable manager %d: check_settings failed\n",
  768. mgr->id);
  769. goto err;
  770. }
  771. dss_setup_fifos();
  772. dss_write_regs();
  773. dss_set_go_bits();
  774. if (!mgr_manual_update(mgr))
  775. mp->updating = true;
  776. if (!dss_data.irq_enabled && need_isr())
  777. dss_register_vsync_isr();
  778. spin_unlock_irqrestore(&data_lock, flags);
  779. if (!mgr_manual_update(mgr))
  780. dispc_mgr_enable_sync(mgr->id);
  781. out:
  782. mutex_unlock(&apply_lock);
  783. return 0;
  784. err:
  785. mp->enabled = false;
  786. spin_unlock_irqrestore(&data_lock, flags);
  787. mutex_unlock(&apply_lock);
  788. return r;
  789. }
  790. void dss_mgr_disable(struct omap_overlay_manager *mgr)
  791. {
  792. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  793. unsigned long flags;
  794. mutex_lock(&apply_lock);
  795. if (!mp->enabled)
  796. goto out;
  797. if (!mgr_manual_update(mgr))
  798. dispc_mgr_disable_sync(mgr->id);
  799. spin_lock_irqsave(&data_lock, flags);
  800. mp->updating = false;
  801. mp->enabled = false;
  802. spin_unlock_irqrestore(&data_lock, flags);
  803. out:
  804. mutex_unlock(&apply_lock);
  805. }
  806. int dss_mgr_set_info(struct omap_overlay_manager *mgr,
  807. struct omap_overlay_manager_info *info)
  808. {
  809. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  810. unsigned long flags;
  811. int r;
  812. r = dss_mgr_simple_check(mgr, info);
  813. if (r)
  814. return r;
  815. spin_lock_irqsave(&data_lock, flags);
  816. mp->user_info = *info;
  817. mp->user_info_dirty = true;
  818. spin_unlock_irqrestore(&data_lock, flags);
  819. return 0;
  820. }
  821. void dss_mgr_get_info(struct omap_overlay_manager *mgr,
  822. struct omap_overlay_manager_info *info)
  823. {
  824. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  825. unsigned long flags;
  826. spin_lock_irqsave(&data_lock, flags);
  827. *info = mp->user_info;
  828. spin_unlock_irqrestore(&data_lock, flags);
  829. }
  830. int dss_mgr_set_output(struct omap_overlay_manager *mgr,
  831. struct omap_dss_output *output)
  832. {
  833. int r;
  834. mutex_lock(&apply_lock);
  835. if (mgr->output) {
  836. DSSERR("manager %s is already connected to an output\n",
  837. mgr->name);
  838. r = -EINVAL;
  839. goto err;
  840. }
  841. if ((mgr->supported_outputs & output->id) == 0) {
  842. DSSERR("output does not support manager %s\n",
  843. mgr->name);
  844. r = -EINVAL;
  845. goto err;
  846. }
  847. output->manager = mgr;
  848. mgr->output = output;
  849. mutex_unlock(&apply_lock);
  850. return 0;
  851. err:
  852. mutex_unlock(&apply_lock);
  853. return r;
  854. }
  855. int dss_mgr_unset_output(struct omap_overlay_manager *mgr)
  856. {
  857. int r;
  858. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  859. unsigned long flags;
  860. mutex_lock(&apply_lock);
  861. if (!mgr->output) {
  862. DSSERR("failed to unset output, output not set\n");
  863. r = -EINVAL;
  864. goto err;
  865. }
  866. spin_lock_irqsave(&data_lock, flags);
  867. if (mp->enabled) {
  868. DSSERR("output can't be unset when manager is enabled\n");
  869. r = -EINVAL;
  870. goto err1;
  871. }
  872. spin_unlock_irqrestore(&data_lock, flags);
  873. mgr->output->manager = NULL;
  874. mgr->output = NULL;
  875. mutex_unlock(&apply_lock);
  876. return 0;
  877. err1:
  878. spin_unlock_irqrestore(&data_lock, flags);
  879. err:
  880. mutex_unlock(&apply_lock);
  881. return r;
  882. }
  883. static void dss_apply_mgr_timings(struct omap_overlay_manager *mgr,
  884. const struct omap_video_timings *timings)
  885. {
  886. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  887. mp->timings = *timings;
  888. mp->extra_info_dirty = true;
  889. }
  890. void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
  891. const struct omap_video_timings *timings)
  892. {
  893. unsigned long flags;
  894. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  895. spin_lock_irqsave(&data_lock, flags);
  896. if (mp->updating) {
  897. DSSERR("cannot set timings for %s: manager needs to be disabled\n",
  898. mgr->name);
  899. goto out;
  900. }
  901. dss_apply_mgr_timings(mgr, timings);
  902. out:
  903. spin_unlock_irqrestore(&data_lock, flags);
  904. }
  905. static void dss_apply_mgr_lcd_config(struct omap_overlay_manager *mgr,
  906. const struct dss_lcd_mgr_config *config)
  907. {
  908. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  909. mp->lcd_config = *config;
  910. mp->extra_info_dirty = true;
  911. }
  912. void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
  913. const struct dss_lcd_mgr_config *config)
  914. {
  915. unsigned long flags;
  916. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  917. spin_lock_irqsave(&data_lock, flags);
  918. if (mp->enabled) {
  919. DSSERR("cannot apply lcd config for %s: manager needs to be disabled\n",
  920. mgr->name);
  921. goto out;
  922. }
  923. dss_apply_mgr_lcd_config(mgr, config);
  924. out:
  925. spin_unlock_irqrestore(&data_lock, flags);
  926. }
  927. int dss_ovl_set_info(struct omap_overlay *ovl,
  928. struct omap_overlay_info *info)
  929. {
  930. struct ovl_priv_data *op = get_ovl_priv(ovl);
  931. unsigned long flags;
  932. int r;
  933. r = dss_ovl_simple_check(ovl, info);
  934. if (r)
  935. return r;
  936. spin_lock_irqsave(&data_lock, flags);
  937. op->user_info = *info;
  938. op->user_info_dirty = true;
  939. spin_unlock_irqrestore(&data_lock, flags);
  940. return 0;
  941. }
  942. void dss_ovl_get_info(struct omap_overlay *ovl,
  943. struct omap_overlay_info *info)
  944. {
  945. struct ovl_priv_data *op = get_ovl_priv(ovl);
  946. unsigned long flags;
  947. spin_lock_irqsave(&data_lock, flags);
  948. *info = op->user_info;
  949. spin_unlock_irqrestore(&data_lock, flags);
  950. }
  951. int dss_ovl_set_manager(struct omap_overlay *ovl,
  952. struct omap_overlay_manager *mgr)
  953. {
  954. struct ovl_priv_data *op = get_ovl_priv(ovl);
  955. unsigned long flags;
  956. int r;
  957. if (!mgr)
  958. return -EINVAL;
  959. mutex_lock(&apply_lock);
  960. if (ovl->manager) {
  961. DSSERR("overlay '%s' already has a manager '%s'\n",
  962. ovl->name, ovl->manager->name);
  963. r = -EINVAL;
  964. goto err;
  965. }
  966. spin_lock_irqsave(&data_lock, flags);
  967. if (op->enabled) {
  968. spin_unlock_irqrestore(&data_lock, flags);
  969. DSSERR("overlay has to be disabled to change the manager\n");
  970. r = -EINVAL;
  971. goto err;
  972. }
  973. op->channel = mgr->id;
  974. op->extra_info_dirty = true;
  975. ovl->manager = mgr;
  976. list_add_tail(&ovl->list, &mgr->overlays);
  977. spin_unlock_irqrestore(&data_lock, flags);
  978. /* XXX: When there is an overlay on a DSI manual update display, and
  979. * the overlay is first disabled, then moved to tv, and enabled, we
  980. * seem to get SYNC_LOST_DIGIT error.
  981. *
  982. * Waiting doesn't seem to help, but updating the manual update display
  983. * after disabling the overlay seems to fix this. This hints that the
  984. * overlay is perhaps somehow tied to the LCD output until the output
  985. * is updated.
  986. *
  987. * Userspace workaround for this is to update the LCD after disabling
  988. * the overlay, but before moving the overlay to TV.
  989. */
  990. mutex_unlock(&apply_lock);
  991. return 0;
  992. err:
  993. mutex_unlock(&apply_lock);
  994. return r;
  995. }
  996. int dss_ovl_unset_manager(struct omap_overlay *ovl)
  997. {
  998. struct ovl_priv_data *op = get_ovl_priv(ovl);
  999. unsigned long flags;
  1000. int r;
  1001. mutex_lock(&apply_lock);
  1002. if (!ovl->manager) {
  1003. DSSERR("failed to detach overlay: manager not set\n");
  1004. r = -EINVAL;
  1005. goto err;
  1006. }
  1007. spin_lock_irqsave(&data_lock, flags);
  1008. if (op->enabled) {
  1009. spin_unlock_irqrestore(&data_lock, flags);
  1010. DSSERR("overlay has to be disabled to unset the manager\n");
  1011. r = -EINVAL;
  1012. goto err;
  1013. }
  1014. spin_unlock_irqrestore(&data_lock, flags);
  1015. /* wait for pending extra_info updates to ensure the ovl is disabled */
  1016. wait_pending_extra_info_updates();
  1017. spin_lock_irqsave(&data_lock, flags);
  1018. op->channel = -1;
  1019. ovl->manager = NULL;
  1020. list_del(&ovl->list);
  1021. spin_unlock_irqrestore(&data_lock, flags);
  1022. mutex_unlock(&apply_lock);
  1023. return 0;
  1024. err:
  1025. mutex_unlock(&apply_lock);
  1026. return r;
  1027. }
  1028. bool dss_ovl_is_enabled(struct omap_overlay *ovl)
  1029. {
  1030. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1031. unsigned long flags;
  1032. bool e;
  1033. spin_lock_irqsave(&data_lock, flags);
  1034. e = op->enabled;
  1035. spin_unlock_irqrestore(&data_lock, flags);
  1036. return e;
  1037. }
  1038. int dss_ovl_enable(struct omap_overlay *ovl)
  1039. {
  1040. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1041. unsigned long flags;
  1042. int r;
  1043. mutex_lock(&apply_lock);
  1044. if (op->enabled) {
  1045. r = 0;
  1046. goto err1;
  1047. }
  1048. if (ovl->manager == NULL || ovl->manager->output == NULL) {
  1049. r = -EINVAL;
  1050. goto err1;
  1051. }
  1052. spin_lock_irqsave(&data_lock, flags);
  1053. op->enabling = true;
  1054. r = dss_check_settings(ovl->manager);
  1055. if (r) {
  1056. DSSERR("failed to enable overlay %d: check_settings failed\n",
  1057. ovl->id);
  1058. goto err2;
  1059. }
  1060. dss_setup_fifos();
  1061. op->enabling = false;
  1062. dss_apply_ovl_enable(ovl, true);
  1063. dss_write_regs();
  1064. dss_set_go_bits();
  1065. spin_unlock_irqrestore(&data_lock, flags);
  1066. mutex_unlock(&apply_lock);
  1067. return 0;
  1068. err2:
  1069. op->enabling = false;
  1070. spin_unlock_irqrestore(&data_lock, flags);
  1071. err1:
  1072. mutex_unlock(&apply_lock);
  1073. return r;
  1074. }
  1075. int dss_ovl_disable(struct omap_overlay *ovl)
  1076. {
  1077. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1078. unsigned long flags;
  1079. int r;
  1080. mutex_lock(&apply_lock);
  1081. if (!op->enabled) {
  1082. r = 0;
  1083. goto err;
  1084. }
  1085. if (ovl->manager == NULL || ovl->manager->output == NULL) {
  1086. r = -EINVAL;
  1087. goto err;
  1088. }
  1089. spin_lock_irqsave(&data_lock, flags);
  1090. dss_apply_ovl_enable(ovl, false);
  1091. dss_write_regs();
  1092. dss_set_go_bits();
  1093. spin_unlock_irqrestore(&data_lock, flags);
  1094. mutex_unlock(&apply_lock);
  1095. return 0;
  1096. err:
  1097. mutex_unlock(&apply_lock);
  1098. return r;
  1099. }