dm9000.c 28 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219
  1. /*
  2. * dm9000.c: Version 1.2 03/18/2003
  3. *
  4. * A Davicom DM9000 ISA NIC fast Ethernet driver for Linux.
  5. * Copyright (C) 1997 Sten Wang
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version 2
  10. * of the License, or (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * (C)Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
  18. *
  19. * V0.11 06/20/2001 REG_0A bit3=1, default enable BP with DA match
  20. * 06/22/2001 Support DM9801 progrmming
  21. * E3: R25 = ((R24 + NF) & 0x00ff) | 0xf000
  22. * E4: R25 = ((R24 + NF) & 0x00ff) | 0xc200
  23. * R17 = (R17 & 0xfff0) | NF + 3
  24. * E5: R25 = ((R24 + NF - 3) & 0x00ff) | 0xc200
  25. * R17 = (R17 & 0xfff0) | NF
  26. *
  27. * v1.00 modify by simon 2001.9.5
  28. * change for kernel 2.4.x
  29. *
  30. * v1.1 11/09/2001 fix force mode bug
  31. *
  32. * v1.2 03/18/2003 Weilun Huang <weilun_huang@davicom.com.tw>:
  33. * Fixed phy reset.
  34. * Added tx/rx 32 bit mode.
  35. * Cleaned up for kernel merge.
  36. *
  37. * 03/03/2004 Sascha Hauer <s.hauer@pengutronix.de>
  38. * Port to 2.6 kernel
  39. *
  40. * 24-Sep-2004 Ben Dooks <ben@simtec.co.uk>
  41. * Cleanup of code to remove ifdefs
  42. * Allowed platform device data to influence access width
  43. * Reformatting areas of code
  44. *
  45. * 17-Mar-2005 Sascha Hauer <s.hauer@pengutronix.de>
  46. * * removed 2.4 style module parameters
  47. * * removed removed unused stat counter and fixed
  48. * net_device_stats
  49. * * introduced tx_timeout function
  50. * * reworked locking
  51. *
  52. * 01-Jul-2005 Ben Dooks <ben@simtec.co.uk>
  53. * * fixed spinlock call without pointer
  54. * * ensure spinlock is initialised
  55. */
  56. #include <linux/module.h>
  57. #include <linux/ioport.h>
  58. #include <linux/netdevice.h>
  59. #include <linux/etherdevice.h>
  60. #include <linux/init.h>
  61. #include <linux/skbuff.h>
  62. #include <linux/spinlock.h>
  63. #include <linux/crc32.h>
  64. #include <linux/mii.h>
  65. #include <linux/dm9000.h>
  66. #include <linux/delay.h>
  67. #include <linux/platform_device.h>
  68. #include <linux/irq.h>
  69. #include <asm/delay.h>
  70. #include <asm/irq.h>
  71. #include <asm/io.h>
  72. #include "dm9000.h"
  73. /* Board/System/Debug information/definition ---------------- */
  74. #define DM9000_PHY 0x40 /* PHY address 0x01 */
  75. #define CARDNAME "dm9000"
  76. #define PFX CARDNAME ": "
  77. #define DM9000_TIMER_WUT jiffies+(HZ*2) /* timer wakeup time : 2 second */
  78. #define DM9000_DEBUG 0
  79. #if DM9000_DEBUG > 2
  80. #define PRINTK3(args...) printk(CARDNAME ": " args)
  81. #else
  82. #define PRINTK3(args...) do { } while(0)
  83. #endif
  84. #if DM9000_DEBUG > 1
  85. #define PRINTK2(args...) printk(CARDNAME ": " args)
  86. #else
  87. #define PRINTK2(args...) do { } while(0)
  88. #endif
  89. #if DM9000_DEBUG > 0
  90. #define PRINTK1(args...) printk(CARDNAME ": " args)
  91. #define PRINTK(args...) printk(CARDNAME ": " args)
  92. #else
  93. #define PRINTK1(args...) do { } while(0)
  94. #define PRINTK(args...) printk(KERN_DEBUG args)
  95. #endif
  96. #ifdef CONFIG_BLACKFIN
  97. #define readsb insb
  98. #define readsw insw
  99. #define readsl insl
  100. #define writesb outsb
  101. #define writesw outsw
  102. #define writesl outsl
  103. #define DM9000_IRQ_FLAGS (IRQF_SHARED | IRQF_TRIGGER_HIGH)
  104. #else
  105. #define DM9000_IRQ_FLAGS (IRQF_SHARED | IRQT_RISING)
  106. #endif
  107. /*
  108. * Transmit timeout, default 5 seconds.
  109. */
  110. static int watchdog = 5000;
  111. module_param(watchdog, int, 0400);
  112. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  113. /* Structure/enum declaration ------------------------------- */
  114. typedef struct board_info {
  115. void __iomem *io_addr; /* Register I/O base address */
  116. void __iomem *io_data; /* Data I/O address */
  117. u16 irq; /* IRQ */
  118. u16 tx_pkt_cnt;
  119. u16 queue_pkt_len;
  120. u16 queue_start_addr;
  121. u16 dbug_cnt;
  122. u8 io_mode; /* 0:word, 2:byte */
  123. u8 phy_addr;
  124. void (*inblk)(void __iomem *port, void *data, int length);
  125. void (*outblk)(void __iomem *port, void *data, int length);
  126. void (*dumpblk)(void __iomem *port, int length);
  127. struct resource *addr_res; /* resources found */
  128. struct resource *data_res;
  129. struct resource *addr_req; /* resources requested */
  130. struct resource *data_req;
  131. struct resource *irq_res;
  132. struct timer_list timer;
  133. unsigned char srom[128];
  134. spinlock_t lock;
  135. struct mii_if_info mii;
  136. u32 msg_enable;
  137. } board_info_t;
  138. /* function declaration ------------------------------------- */
  139. static int dm9000_probe(struct platform_device *);
  140. static int dm9000_open(struct net_device *);
  141. static int dm9000_start_xmit(struct sk_buff *, struct net_device *);
  142. static int dm9000_stop(struct net_device *);
  143. static void dm9000_timer(unsigned long);
  144. static void dm9000_init_dm9000(struct net_device *);
  145. static irqreturn_t dm9000_interrupt(int, void *);
  146. static int dm9000_phy_read(struct net_device *dev, int phyaddr_unsused, int reg);
  147. static void dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg,
  148. int value);
  149. static u16 read_srom_word(board_info_t *, int);
  150. static void dm9000_rx(struct net_device *);
  151. static void dm9000_hash_table(struct net_device *);
  152. //#define DM9000_PROGRAM_EEPROM
  153. #ifdef DM9000_PROGRAM_EEPROM
  154. static void program_eeprom(board_info_t * db);
  155. #endif
  156. /* DM9000 network board routine ---------------------------- */
  157. static void
  158. dm9000_reset(board_info_t * db)
  159. {
  160. PRINTK1("dm9000x: resetting\n");
  161. /* RESET device */
  162. writeb(DM9000_NCR, db->io_addr);
  163. udelay(200);
  164. writeb(NCR_RST, db->io_data);
  165. udelay(200);
  166. }
  167. /*
  168. * Read a byte from I/O port
  169. */
  170. static u8
  171. ior(board_info_t * db, int reg)
  172. {
  173. writeb(reg, db->io_addr);
  174. return readb(db->io_data);
  175. }
  176. /*
  177. * Write a byte to I/O port
  178. */
  179. static void
  180. iow(board_info_t * db, int reg, int value)
  181. {
  182. writeb(reg, db->io_addr);
  183. writeb(value, db->io_data);
  184. }
  185. /* routines for sending block to chip */
  186. static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
  187. {
  188. writesb(reg, data, count);
  189. }
  190. static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
  191. {
  192. writesw(reg, data, (count+1) >> 1);
  193. }
  194. static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
  195. {
  196. writesl(reg, data, (count+3) >> 2);
  197. }
  198. /* input block from chip to memory */
  199. static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
  200. {
  201. readsb(reg, data, count);
  202. }
  203. static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
  204. {
  205. readsw(reg, data, (count+1) >> 1);
  206. }
  207. static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
  208. {
  209. readsl(reg, data, (count+3) >> 2);
  210. }
  211. /* dump block from chip to null */
  212. static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
  213. {
  214. int i;
  215. int tmp;
  216. for (i = 0; i < count; i++)
  217. tmp = readb(reg);
  218. }
  219. static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
  220. {
  221. int i;
  222. int tmp;
  223. count = (count + 1) >> 1;
  224. for (i = 0; i < count; i++)
  225. tmp = readw(reg);
  226. }
  227. static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
  228. {
  229. int i;
  230. int tmp;
  231. count = (count + 3) >> 2;
  232. for (i = 0; i < count; i++)
  233. tmp = readl(reg);
  234. }
  235. /* dm9000_set_io
  236. *
  237. * select the specified set of io routines to use with the
  238. * device
  239. */
  240. static void dm9000_set_io(struct board_info *db, int byte_width)
  241. {
  242. /* use the size of the data resource to work out what IO
  243. * routines we want to use
  244. */
  245. switch (byte_width) {
  246. case 1:
  247. db->dumpblk = dm9000_dumpblk_8bit;
  248. db->outblk = dm9000_outblk_8bit;
  249. db->inblk = dm9000_inblk_8bit;
  250. break;
  251. case 2:
  252. db->dumpblk = dm9000_dumpblk_16bit;
  253. db->outblk = dm9000_outblk_16bit;
  254. db->inblk = dm9000_inblk_16bit;
  255. break;
  256. case 3:
  257. printk(KERN_ERR PFX ": 3 byte IO, falling back to 16bit\n");
  258. db->dumpblk = dm9000_dumpblk_16bit;
  259. db->outblk = dm9000_outblk_16bit;
  260. db->inblk = dm9000_inblk_16bit;
  261. break;
  262. case 4:
  263. default:
  264. db->dumpblk = dm9000_dumpblk_32bit;
  265. db->outblk = dm9000_outblk_32bit;
  266. db->inblk = dm9000_inblk_32bit;
  267. break;
  268. }
  269. }
  270. /* Our watchdog timed out. Called by the networking layer */
  271. static void dm9000_timeout(struct net_device *dev)
  272. {
  273. board_info_t *db = (board_info_t *) dev->priv;
  274. u8 reg_save;
  275. unsigned long flags;
  276. /* Save previous register address */
  277. reg_save = readb(db->io_addr);
  278. spin_lock_irqsave(&db->lock,flags);
  279. netif_stop_queue(dev);
  280. dm9000_reset(db);
  281. dm9000_init_dm9000(dev);
  282. /* We can accept TX packets again */
  283. dev->trans_start = jiffies;
  284. netif_wake_queue(dev);
  285. /* Restore previous register address */
  286. writeb(reg_save, db->io_addr);
  287. spin_unlock_irqrestore(&db->lock,flags);
  288. }
  289. #ifdef CONFIG_NET_POLL_CONTROLLER
  290. /*
  291. *Used by netconsole
  292. */
  293. static void dm9000_poll_controller(struct net_device *dev)
  294. {
  295. disable_irq(dev->irq);
  296. dm9000_interrupt(dev->irq,dev);
  297. enable_irq(dev->irq);
  298. }
  299. #endif
  300. /* dm9000_release_board
  301. *
  302. * release a board, and any mapped resources
  303. */
  304. static void
  305. dm9000_release_board(struct platform_device *pdev, struct board_info *db)
  306. {
  307. if (db->data_res == NULL) {
  308. if (db->addr_res != NULL)
  309. release_mem_region((unsigned long)db->io_addr, 4);
  310. return;
  311. }
  312. /* unmap our resources */
  313. iounmap(db->io_addr);
  314. iounmap(db->io_data);
  315. /* release the resources */
  316. if (db->data_req != NULL) {
  317. release_resource(db->data_req);
  318. kfree(db->data_req);
  319. }
  320. if (db->addr_req != NULL) {
  321. release_resource(db->addr_req);
  322. kfree(db->addr_req);
  323. }
  324. }
  325. #define res_size(_r) (((_r)->end - (_r)->start) + 1)
  326. /*
  327. * Search DM9000 board, allocate space and register it
  328. */
  329. static int
  330. dm9000_probe(struct platform_device *pdev)
  331. {
  332. struct dm9000_plat_data *pdata = pdev->dev.platform_data;
  333. struct board_info *db; /* Point a board information structure */
  334. struct net_device *ndev;
  335. unsigned long base;
  336. int ret = 0;
  337. int iosize;
  338. int i;
  339. u32 id_val;
  340. /* Init network device */
  341. ndev = alloc_etherdev(sizeof (struct board_info));
  342. if (!ndev) {
  343. printk("%s: could not allocate device.\n", CARDNAME);
  344. return -ENOMEM;
  345. }
  346. SET_NETDEV_DEV(ndev, &pdev->dev);
  347. PRINTK2("dm9000_probe()");
  348. /* setup board info structure */
  349. db = (struct board_info *) ndev->priv;
  350. memset(db, 0, sizeof (*db));
  351. spin_lock_init(&db->lock);
  352. if (pdev->num_resources < 2) {
  353. ret = -ENODEV;
  354. goto out;
  355. } else if (pdev->num_resources == 2) {
  356. base = pdev->resource[0].start;
  357. if (!request_mem_region(base, 4, ndev->name)) {
  358. ret = -EBUSY;
  359. goto out;
  360. }
  361. ndev->base_addr = base;
  362. ndev->irq = pdev->resource[1].start;
  363. db->io_addr = (void __iomem *)base;
  364. db->io_data = (void __iomem *)(base + 4);
  365. /* ensure at least we have a default set of IO routines */
  366. dm9000_set_io(db, 2);
  367. } else {
  368. db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  369. db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
  370. db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
  371. if (db->addr_res == NULL || db->data_res == NULL ||
  372. db->irq_res == NULL) {
  373. printk(KERN_ERR PFX "insufficient resources\n");
  374. ret = -ENOENT;
  375. goto out;
  376. }
  377. i = res_size(db->addr_res);
  378. db->addr_req = request_mem_region(db->addr_res->start, i,
  379. pdev->name);
  380. if (db->addr_req == NULL) {
  381. printk(KERN_ERR PFX "cannot claim address reg area\n");
  382. ret = -EIO;
  383. goto out;
  384. }
  385. db->io_addr = ioremap(db->addr_res->start, i);
  386. if (db->io_addr == NULL) {
  387. printk(KERN_ERR "failed to ioremap address reg\n");
  388. ret = -EINVAL;
  389. goto out;
  390. }
  391. iosize = res_size(db->data_res);
  392. db->data_req = request_mem_region(db->data_res->start, iosize,
  393. pdev->name);
  394. if (db->data_req == NULL) {
  395. printk(KERN_ERR PFX "cannot claim data reg area\n");
  396. ret = -EIO;
  397. goto out;
  398. }
  399. db->io_data = ioremap(db->data_res->start, iosize);
  400. if (db->io_data == NULL) {
  401. printk(KERN_ERR "failed to ioremap data reg\n");
  402. ret = -EINVAL;
  403. goto out;
  404. }
  405. /* fill in parameters for net-dev structure */
  406. ndev->base_addr = (unsigned long)db->io_addr;
  407. ndev->irq = db->irq_res->start;
  408. /* ensure at least we have a default set of IO routines */
  409. dm9000_set_io(db, iosize);
  410. }
  411. /* check to see if anything is being over-ridden */
  412. if (pdata != NULL) {
  413. /* check to see if the driver wants to over-ride the
  414. * default IO width */
  415. if (pdata->flags & DM9000_PLATF_8BITONLY)
  416. dm9000_set_io(db, 1);
  417. if (pdata->flags & DM9000_PLATF_16BITONLY)
  418. dm9000_set_io(db, 2);
  419. if (pdata->flags & DM9000_PLATF_32BITONLY)
  420. dm9000_set_io(db, 4);
  421. /* check to see if there are any IO routine
  422. * over-rides */
  423. if (pdata->inblk != NULL)
  424. db->inblk = pdata->inblk;
  425. if (pdata->outblk != NULL)
  426. db->outblk = pdata->outblk;
  427. if (pdata->dumpblk != NULL)
  428. db->dumpblk = pdata->dumpblk;
  429. }
  430. dm9000_reset(db);
  431. /* try two times, DM9000 sometimes gets the first read wrong */
  432. for (i = 0; i < 2; i++) {
  433. id_val = ior(db, DM9000_VIDL);
  434. id_val |= (u32)ior(db, DM9000_VIDH) << 8;
  435. id_val |= (u32)ior(db, DM9000_PIDL) << 16;
  436. id_val |= (u32)ior(db, DM9000_PIDH) << 24;
  437. if (id_val == DM9000_ID)
  438. break;
  439. printk("%s: read wrong id 0x%08x\n", CARDNAME, id_val);
  440. }
  441. if (id_val != DM9000_ID) {
  442. printk("%s: wrong id: 0x%08x\n", CARDNAME, id_val);
  443. ret = -ENODEV;
  444. goto out;
  445. }
  446. /* from this point we assume that we have found a DM9000 */
  447. /* driver system function */
  448. ether_setup(ndev);
  449. ndev->open = &dm9000_open;
  450. ndev->hard_start_xmit = &dm9000_start_xmit;
  451. ndev->tx_timeout = &dm9000_timeout;
  452. ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
  453. ndev->stop = &dm9000_stop;
  454. ndev->set_multicast_list = &dm9000_hash_table;
  455. #ifdef CONFIG_NET_POLL_CONTROLLER
  456. ndev->poll_controller = &dm9000_poll_controller;
  457. #endif
  458. #ifdef DM9000_PROGRAM_EEPROM
  459. program_eeprom(db);
  460. #endif
  461. db->msg_enable = NETIF_MSG_LINK;
  462. db->mii.phy_id_mask = 0x1f;
  463. db->mii.reg_num_mask = 0x1f;
  464. db->mii.force_media = 0;
  465. db->mii.full_duplex = 0;
  466. db->mii.dev = ndev;
  467. db->mii.mdio_read = dm9000_phy_read;
  468. db->mii.mdio_write = dm9000_phy_write;
  469. /* Read SROM content */
  470. for (i = 0; i < 64; i++)
  471. ((u16 *) db->srom)[i] = read_srom_word(db, i);
  472. /* Set Node Address */
  473. for (i = 0; i < 6; i++)
  474. ndev->dev_addr[i] = db->srom[i];
  475. if (!is_valid_ether_addr(ndev->dev_addr)) {
  476. /* try reading from mac */
  477. for (i = 0; i < 6; i++)
  478. ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
  479. }
  480. if (!is_valid_ether_addr(ndev->dev_addr))
  481. printk("%s: Invalid ethernet MAC address. Please "
  482. "set using ifconfig\n", ndev->name);
  483. platform_set_drvdata(pdev, ndev);
  484. ret = register_netdev(ndev);
  485. if (ret == 0) {
  486. DECLARE_MAC_BUF(mac);
  487. printk("%s: dm9000 at %p,%p IRQ %d MAC: %s\n",
  488. ndev->name, db->io_addr, db->io_data, ndev->irq,
  489. print_mac(mac, ndev->dev_addr));
  490. }
  491. return 0;
  492. out:
  493. printk("%s: not found (%d).\n", CARDNAME, ret);
  494. dm9000_release_board(pdev, db);
  495. free_netdev(ndev);
  496. return ret;
  497. }
  498. /*
  499. * Open the interface.
  500. * The interface is opened whenever "ifconfig" actives it.
  501. */
  502. static int
  503. dm9000_open(struct net_device *dev)
  504. {
  505. board_info_t *db = (board_info_t *) dev->priv;
  506. PRINTK2("entering dm9000_open\n");
  507. if (request_irq(dev->irq, &dm9000_interrupt, DM9000_IRQ_FLAGS, dev->name, dev))
  508. return -EAGAIN;
  509. /* Initialize DM9000 board */
  510. dm9000_reset(db);
  511. dm9000_init_dm9000(dev);
  512. /* Init driver variable */
  513. db->dbug_cnt = 0;
  514. /* set and active a timer process */
  515. init_timer(&db->timer);
  516. db->timer.expires = DM9000_TIMER_WUT;
  517. db->timer.data = (unsigned long) dev;
  518. db->timer.function = &dm9000_timer;
  519. add_timer(&db->timer);
  520. mii_check_media(&db->mii, netif_msg_link(db), 1);
  521. netif_start_queue(dev);
  522. return 0;
  523. }
  524. /*
  525. * Initilize dm9000 board
  526. */
  527. static void
  528. dm9000_init_dm9000(struct net_device *dev)
  529. {
  530. board_info_t *db = (board_info_t *) dev->priv;
  531. PRINTK1("entering %s\n",__FUNCTION__);
  532. /* I/O mode */
  533. db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
  534. /* GPIO0 on pre-activate PHY */
  535. iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
  536. iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
  537. iow(db, DM9000_GPR, 0); /* Enable PHY */
  538. /* Program operating register */
  539. iow(db, DM9000_TCR, 0); /* TX Polling clear */
  540. iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
  541. iow(db, DM9000_FCR, 0xff); /* Flow Control */
  542. iow(db, DM9000_SMCR, 0); /* Special Mode */
  543. /* clear TX status */
  544. iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
  545. iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
  546. /* Set address filter table */
  547. dm9000_hash_table(dev);
  548. /* Activate DM9000 */
  549. iow(db, DM9000_RCR, RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN);
  550. /* Enable TX/RX interrupt mask */
  551. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  552. /* Init Driver variable */
  553. db->tx_pkt_cnt = 0;
  554. db->queue_pkt_len = 0;
  555. dev->trans_start = 0;
  556. }
  557. /*
  558. * Hardware start transmission.
  559. * Send a packet to media from the upper layer.
  560. */
  561. static int
  562. dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
  563. {
  564. unsigned long flags;
  565. board_info_t *db = (board_info_t *) dev->priv;
  566. PRINTK3("dm9000_start_xmit\n");
  567. if (db->tx_pkt_cnt > 1)
  568. return 1;
  569. spin_lock_irqsave(&db->lock, flags);
  570. /* Move data to DM9000 TX RAM */
  571. writeb(DM9000_MWCMD, db->io_addr);
  572. (db->outblk)(db->io_data, skb->data, skb->len);
  573. dev->stats.tx_bytes += skb->len;
  574. db->tx_pkt_cnt++;
  575. /* TX control: First packet immediately send, second packet queue */
  576. if (db->tx_pkt_cnt == 1) {
  577. /* Set TX length to DM9000 */
  578. iow(db, DM9000_TXPLL, skb->len & 0xff);
  579. iow(db, DM9000_TXPLH, (skb->len >> 8) & 0xff);
  580. /* Issue TX polling command */
  581. iow(db, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
  582. dev->trans_start = jiffies; /* save the time stamp */
  583. } else {
  584. /* Second packet */
  585. db->queue_pkt_len = skb->len;
  586. netif_stop_queue(dev);
  587. }
  588. spin_unlock_irqrestore(&db->lock, flags);
  589. /* free this SKB */
  590. dev_kfree_skb(skb);
  591. return 0;
  592. }
  593. static void
  594. dm9000_shutdown(struct net_device *dev)
  595. {
  596. board_info_t *db = (board_info_t *) dev->priv;
  597. /* RESET device */
  598. dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
  599. iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
  600. iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
  601. iow(db, DM9000_RCR, 0x00); /* Disable RX */
  602. }
  603. /*
  604. * Stop the interface.
  605. * The interface is stopped when it is brought.
  606. */
  607. static int
  608. dm9000_stop(struct net_device *ndev)
  609. {
  610. board_info_t *db = (board_info_t *) ndev->priv;
  611. PRINTK1("entering %s\n",__FUNCTION__);
  612. /* deleted timer */
  613. del_timer(&db->timer);
  614. netif_stop_queue(ndev);
  615. netif_carrier_off(ndev);
  616. /* free interrupt */
  617. free_irq(ndev->irq, ndev);
  618. dm9000_shutdown(ndev);
  619. return 0;
  620. }
  621. /*
  622. * DM9000 interrupt handler
  623. * receive the packet to upper layer, free the transmitted packet
  624. */
  625. static void
  626. dm9000_tx_done(struct net_device *dev, board_info_t * db)
  627. {
  628. int tx_status = ior(db, DM9000_NSR); /* Got TX status */
  629. if (tx_status & (NSR_TX2END | NSR_TX1END)) {
  630. /* One packet sent complete */
  631. db->tx_pkt_cnt--;
  632. dev->stats.tx_packets++;
  633. /* Queue packet check & send */
  634. if (db->tx_pkt_cnt > 0) {
  635. iow(db, DM9000_TXPLL, db->queue_pkt_len & 0xff);
  636. iow(db, DM9000_TXPLH, (db->queue_pkt_len >> 8) & 0xff);
  637. iow(db, DM9000_TCR, TCR_TXREQ);
  638. dev->trans_start = jiffies;
  639. }
  640. netif_wake_queue(dev);
  641. }
  642. }
  643. static irqreturn_t
  644. dm9000_interrupt(int irq, void *dev_id)
  645. {
  646. struct net_device *dev = dev_id;
  647. board_info_t *db;
  648. int int_status;
  649. u8 reg_save;
  650. PRINTK3("entering %s\n",__FUNCTION__);
  651. if (!dev) {
  652. PRINTK1("dm9000_interrupt() without DEVICE arg\n");
  653. return IRQ_HANDLED;
  654. }
  655. /* A real interrupt coming */
  656. db = (board_info_t *) dev->priv;
  657. spin_lock(&db->lock);
  658. /* Save previous register address */
  659. reg_save = readb(db->io_addr);
  660. /* Disable all interrupts */
  661. iow(db, DM9000_IMR, IMR_PAR);
  662. /* Got DM9000 interrupt status */
  663. int_status = ior(db, DM9000_ISR); /* Got ISR */
  664. iow(db, DM9000_ISR, int_status); /* Clear ISR status */
  665. /* Received the coming packet */
  666. if (int_status & ISR_PRS)
  667. dm9000_rx(dev);
  668. /* Trnasmit Interrupt check */
  669. if (int_status & ISR_PTS)
  670. dm9000_tx_done(dev, db);
  671. /* Re-enable interrupt mask */
  672. iow(db, DM9000_IMR, IMR_PAR | IMR_PTM | IMR_PRM);
  673. /* Restore previous register address */
  674. writeb(reg_save, db->io_addr);
  675. spin_unlock(&db->lock);
  676. return IRQ_HANDLED;
  677. }
  678. /*
  679. * A periodic timer routine
  680. * Dynamic media sense, allocated Rx buffer...
  681. */
  682. static void
  683. dm9000_timer(unsigned long data)
  684. {
  685. struct net_device *dev = (struct net_device *) data;
  686. board_info_t *db = (board_info_t *) dev->priv;
  687. PRINTK3("dm9000_timer()\n");
  688. mii_check_media(&db->mii, netif_msg_link(db), 0);
  689. /* Set timer again */
  690. db->timer.expires = DM9000_TIMER_WUT;
  691. add_timer(&db->timer);
  692. }
  693. struct dm9000_rxhdr {
  694. u8 RxPktReady;
  695. u8 RxStatus;
  696. u16 RxLen;
  697. } __attribute__((__packed__));
  698. /*
  699. * Received a packet and pass to upper layer
  700. */
  701. static void
  702. dm9000_rx(struct net_device *dev)
  703. {
  704. board_info_t *db = (board_info_t *) dev->priv;
  705. struct dm9000_rxhdr rxhdr;
  706. struct sk_buff *skb;
  707. u8 rxbyte, *rdptr;
  708. bool GoodPacket;
  709. int RxLen;
  710. /* Check packet ready or not */
  711. do {
  712. ior(db, DM9000_MRCMDX); /* Dummy read */
  713. /* Get most updated data */
  714. rxbyte = readb(db->io_data);
  715. /* Status check: this byte must be 0 or 1 */
  716. if (rxbyte > DM9000_PKT_RDY) {
  717. printk("status check failed: %d\n", rxbyte);
  718. iow(db, DM9000_RCR, 0x00); /* Stop Device */
  719. iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
  720. return;
  721. }
  722. if (rxbyte != DM9000_PKT_RDY)
  723. return;
  724. /* A packet ready now & Get status/length */
  725. GoodPacket = true;
  726. writeb(DM9000_MRCMD, db->io_addr);
  727. (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
  728. RxLen = le16_to_cpu(rxhdr.RxLen);
  729. /* Packet Status check */
  730. if (RxLen < 0x40) {
  731. GoodPacket = false;
  732. PRINTK1("Bad Packet received (runt)\n");
  733. }
  734. if (RxLen > DM9000_PKT_MAX) {
  735. PRINTK1("RST: RX Len:%x\n", RxLen);
  736. }
  737. if (rxhdr.RxStatus & 0xbf) {
  738. GoodPacket = false;
  739. if (rxhdr.RxStatus & 0x01) {
  740. PRINTK1("fifo error\n");
  741. dev->stats.rx_fifo_errors++;
  742. }
  743. if (rxhdr.RxStatus & 0x02) {
  744. PRINTK1("crc error\n");
  745. dev->stats.rx_crc_errors++;
  746. }
  747. if (rxhdr.RxStatus & 0x80) {
  748. PRINTK1("length error\n");
  749. dev->stats.rx_length_errors++;
  750. }
  751. }
  752. /* Move data from DM9000 */
  753. if (GoodPacket
  754. && ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
  755. skb_reserve(skb, 2);
  756. rdptr = (u8 *) skb_put(skb, RxLen - 4);
  757. /* Read received packet from RX SRAM */
  758. (db->inblk)(db->io_data, rdptr, RxLen);
  759. dev->stats.rx_bytes += RxLen;
  760. /* Pass to upper layer */
  761. skb->protocol = eth_type_trans(skb, dev);
  762. netif_rx(skb);
  763. dev->stats.rx_packets++;
  764. } else {
  765. /* need to dump the packet's data */
  766. (db->dumpblk)(db->io_data, RxLen);
  767. }
  768. } while (rxbyte == DM9000_PKT_RDY);
  769. }
  770. /*
  771. * Read a word data from SROM
  772. */
  773. static u16
  774. read_srom_word(board_info_t * db, int offset)
  775. {
  776. iow(db, DM9000_EPAR, offset);
  777. iow(db, DM9000_EPCR, EPCR_ERPRR);
  778. mdelay(8); /* according to the datasheet 200us should be enough,
  779. but it doesn't work */
  780. iow(db, DM9000_EPCR, 0x0);
  781. return (ior(db, DM9000_EPDRL) + (ior(db, DM9000_EPDRH) << 8));
  782. }
  783. #ifdef DM9000_PROGRAM_EEPROM
  784. /*
  785. * Write a word data to SROM
  786. */
  787. static void
  788. write_srom_word(board_info_t * db, int offset, u16 val)
  789. {
  790. iow(db, DM9000_EPAR, offset);
  791. iow(db, DM9000_EPDRH, ((val >> 8) & 0xff));
  792. iow(db, DM9000_EPDRL, (val & 0xff));
  793. iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
  794. mdelay(8); /* same shit */
  795. iow(db, DM9000_EPCR, 0);
  796. }
  797. /*
  798. * Only for development:
  799. * Here we write static data to the eeprom in case
  800. * we don't have valid content on a new board
  801. */
  802. static void
  803. program_eeprom(board_info_t * db)
  804. {
  805. u16 eeprom[] = { 0x0c00, 0x007f, 0x1300, /* MAC Address */
  806. 0x0000, /* Autoload: accept nothing */
  807. 0x0a46, 0x9000, /* Vendor / Product ID */
  808. 0x0000, /* pin control */
  809. 0x0000,
  810. }; /* Wake-up mode control */
  811. int i;
  812. for (i = 0; i < 8; i++)
  813. write_srom_word(db, i, eeprom[i]);
  814. }
  815. #endif
  816. /*
  817. * Calculate the CRC valude of the Rx packet
  818. * flag = 1 : return the reverse CRC (for the received packet CRC)
  819. * 0 : return the normal CRC (for Hash Table index)
  820. */
  821. static unsigned long
  822. cal_CRC(unsigned char *Data, unsigned int Len, u8 flag)
  823. {
  824. u32 crc = ether_crc_le(Len, Data);
  825. if (flag)
  826. return ~crc;
  827. return crc;
  828. }
  829. /*
  830. * Set DM9000 multicast address
  831. */
  832. static void
  833. dm9000_hash_table(struct net_device *dev)
  834. {
  835. board_info_t *db = (board_info_t *) dev->priv;
  836. struct dev_mc_list *mcptr = dev->mc_list;
  837. int mc_cnt = dev->mc_count;
  838. u32 hash_val;
  839. u16 i, oft, hash_table[4];
  840. unsigned long flags;
  841. PRINTK2("dm9000_hash_table()\n");
  842. spin_lock_irqsave(&db->lock,flags);
  843. for (i = 0, oft = 0x10; i < 6; i++, oft++)
  844. iow(db, oft, dev->dev_addr[i]);
  845. /* Clear Hash Table */
  846. for (i = 0; i < 4; i++)
  847. hash_table[i] = 0x0;
  848. /* broadcast address */
  849. hash_table[3] = 0x8000;
  850. /* the multicast address in Hash Table : 64 bits */
  851. for (i = 0; i < mc_cnt; i++, mcptr = mcptr->next) {
  852. hash_val = cal_CRC((char *) mcptr->dmi_addr, 6, 0) & 0x3f;
  853. hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
  854. }
  855. /* Write the hash table to MAC MD table */
  856. for (i = 0, oft = 0x16; i < 4; i++) {
  857. iow(db, oft++, hash_table[i] & 0xff);
  858. iow(db, oft++, (hash_table[i] >> 8) & 0xff);
  859. }
  860. spin_unlock_irqrestore(&db->lock,flags);
  861. }
  862. /*
  863. * Read a word from phyxcer
  864. */
  865. static int
  866. dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
  867. {
  868. board_info_t *db = (board_info_t *) dev->priv;
  869. unsigned long flags;
  870. unsigned int reg_save;
  871. int ret;
  872. spin_lock_irqsave(&db->lock,flags);
  873. /* Save previous register address */
  874. reg_save = readb(db->io_addr);
  875. /* Fill the phyxcer register into REG_0C */
  876. iow(db, DM9000_EPAR, DM9000_PHY | reg);
  877. iow(db, DM9000_EPCR, 0xc); /* Issue phyxcer read command */
  878. udelay(100); /* Wait read complete */
  879. iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
  880. /* The read data keeps on REG_0D & REG_0E */
  881. ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
  882. /* restore the previous address */
  883. writeb(reg_save, db->io_addr);
  884. spin_unlock_irqrestore(&db->lock,flags);
  885. return ret;
  886. }
  887. /*
  888. * Write a word to phyxcer
  889. */
  890. static void
  891. dm9000_phy_write(struct net_device *dev, int phyaddr_unused, int reg, int value)
  892. {
  893. board_info_t *db = (board_info_t *) dev->priv;
  894. unsigned long flags;
  895. unsigned long reg_save;
  896. spin_lock_irqsave(&db->lock,flags);
  897. /* Save previous register address */
  898. reg_save = readb(db->io_addr);
  899. /* Fill the phyxcer register into REG_0C */
  900. iow(db, DM9000_EPAR, DM9000_PHY | reg);
  901. /* Fill the written data into REG_0D & REG_0E */
  902. iow(db, DM9000_EPDRL, (value & 0xff));
  903. iow(db, DM9000_EPDRH, ((value >> 8) & 0xff));
  904. iow(db, DM9000_EPCR, 0xa); /* Issue phyxcer write command */
  905. udelay(500); /* Wait write complete */
  906. iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
  907. /* restore the previous address */
  908. writeb(reg_save, db->io_addr);
  909. spin_unlock_irqrestore(&db->lock,flags);
  910. }
  911. static int
  912. dm9000_drv_suspend(struct platform_device *dev, pm_message_t state)
  913. {
  914. struct net_device *ndev = platform_get_drvdata(dev);
  915. if (ndev) {
  916. if (netif_running(ndev)) {
  917. netif_device_detach(ndev);
  918. dm9000_shutdown(ndev);
  919. }
  920. }
  921. return 0;
  922. }
  923. static int
  924. dm9000_drv_resume(struct platform_device *dev)
  925. {
  926. struct net_device *ndev = platform_get_drvdata(dev);
  927. board_info_t *db = (board_info_t *) ndev->priv;
  928. if (ndev) {
  929. if (netif_running(ndev)) {
  930. dm9000_reset(db);
  931. dm9000_init_dm9000(ndev);
  932. netif_device_attach(ndev);
  933. }
  934. }
  935. return 0;
  936. }
  937. static int
  938. dm9000_drv_remove(struct platform_device *pdev)
  939. {
  940. struct net_device *ndev = platform_get_drvdata(pdev);
  941. platform_set_drvdata(pdev, NULL);
  942. unregister_netdev(ndev);
  943. dm9000_release_board(pdev, (board_info_t *) ndev->priv);
  944. free_netdev(ndev); /* free device structure */
  945. PRINTK1("clean_module() exit\n");
  946. return 0;
  947. }
  948. static struct platform_driver dm9000_driver = {
  949. .driver = {
  950. .name = "dm9000",
  951. .owner = THIS_MODULE,
  952. },
  953. .probe = dm9000_probe,
  954. .remove = dm9000_drv_remove,
  955. .suspend = dm9000_drv_suspend,
  956. .resume = dm9000_drv_resume,
  957. };
  958. static int __init
  959. dm9000_init(void)
  960. {
  961. printk(KERN_INFO "%s Ethernet Driver\n", CARDNAME);
  962. return platform_driver_register(&dm9000_driver); /* search board and register */
  963. }
  964. static void __exit
  965. dm9000_cleanup(void)
  966. {
  967. platform_driver_unregister(&dm9000_driver);
  968. }
  969. module_init(dm9000_init);
  970. module_exit(dm9000_cleanup);
  971. MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
  972. MODULE_DESCRIPTION("Davicom DM9000 network driver");
  973. MODULE_LICENSE("GPL");