ice1724.c 72 KB

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  1. /*
  2. * ALSA driver for VT1724 ICEnsemble ICE1724 / VIA VT1724 (Envy24HT)
  3. * VIA VT1720 (Envy24PT)
  4. *
  5. * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
  6. * 2002 James Stafford <jstafford@ampltd.com>
  7. * 2003 Takashi Iwai <tiwai@suse.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. */
  24. #include <linux/io.h>
  25. #include <linux/delay.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/init.h>
  28. #include <linux/pci.h>
  29. #include <linux/slab.h>
  30. #include <linux/moduleparam.h>
  31. #include <linux/mutex.h>
  32. #include <sound/core.h>
  33. #include <sound/info.h>
  34. #include <sound/rawmidi.h>
  35. #include <sound/initval.h>
  36. #include <sound/asoundef.h>
  37. #include "ice1712.h"
  38. #include "envy24ht.h"
  39. /* lowlevel routines */
  40. #include "amp.h"
  41. #include "revo.h"
  42. #include "aureon.h"
  43. #include "vt1720_mobo.h"
  44. #include "pontis.h"
  45. #include "prodigy192.h"
  46. #include "prodigy_hifi.h"
  47. #include "juli.h"
  48. #include "phase.h"
  49. #include "wtm.h"
  50. #include "se.h"
  51. MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
  52. MODULE_DESCRIPTION("VIA ICEnsemble ICE1724/1720 (Envy24HT/PT)");
  53. MODULE_LICENSE("GPL");
  54. MODULE_SUPPORTED_DEVICE("{"
  55. REVO_DEVICE_DESC
  56. AMP_AUDIO2000_DEVICE_DESC
  57. AUREON_DEVICE_DESC
  58. VT1720_MOBO_DEVICE_DESC
  59. PONTIS_DEVICE_DESC
  60. PRODIGY192_DEVICE_DESC
  61. PRODIGY_HIFI_DEVICE_DESC
  62. JULI_DEVICE_DESC
  63. PHASE_DEVICE_DESC
  64. WTM_DEVICE_DESC
  65. SE_DEVICE_DESC
  66. "{VIA,VT1720},"
  67. "{VIA,VT1724},"
  68. "{ICEnsemble,Generic ICE1724},"
  69. "{ICEnsemble,Generic Envy24HT}"
  70. "{ICEnsemble,Generic Envy24PT}}");
  71. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
  72. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
  73. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
  74. static char *model[SNDRV_CARDS];
  75. module_param_array(index, int, NULL, 0444);
  76. MODULE_PARM_DESC(index, "Index value for ICE1724 soundcard.");
  77. module_param_array(id, charp, NULL, 0444);
  78. MODULE_PARM_DESC(id, "ID string for ICE1724 soundcard.");
  79. module_param_array(enable, bool, NULL, 0444);
  80. MODULE_PARM_DESC(enable, "Enable ICE1724 soundcard.");
  81. module_param_array(model, charp, NULL, 0444);
  82. MODULE_PARM_DESC(model, "Use the given board model.");
  83. /* Both VT1720 and VT1724 have the same PCI IDs */
  84. static const struct pci_device_id snd_vt1724_ids[] = {
  85. { PCI_VENDOR_ID_ICE, PCI_DEVICE_ID_VT1724, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  86. { 0, }
  87. };
  88. MODULE_DEVICE_TABLE(pci, snd_vt1724_ids);
  89. static int PRO_RATE_LOCKED;
  90. static int PRO_RATE_RESET = 1;
  91. static unsigned int PRO_RATE_DEFAULT = 44100;
  92. /*
  93. * Basic I/O
  94. */
  95. /*
  96. * default rates, default clock routines
  97. */
  98. /* check whether the clock mode is spdif-in */
  99. static inline int stdclock_is_spdif_master(struct snd_ice1712 *ice)
  100. {
  101. return (inb(ICEMT1724(ice, RATE)) & VT1724_SPDIF_MASTER) ? 1 : 0;
  102. }
  103. static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
  104. {
  105. return ice->is_spdif_master(ice) || PRO_RATE_LOCKED;
  106. }
  107. /*
  108. * ac97 section
  109. */
  110. static unsigned char snd_vt1724_ac97_ready(struct snd_ice1712 *ice)
  111. {
  112. unsigned char old_cmd;
  113. int tm;
  114. for (tm = 0; tm < 0x10000; tm++) {
  115. old_cmd = inb(ICEMT1724(ice, AC97_CMD));
  116. if (old_cmd & (VT1724_AC97_WRITE | VT1724_AC97_READ))
  117. continue;
  118. if (!(old_cmd & VT1724_AC97_READY))
  119. continue;
  120. return old_cmd;
  121. }
  122. snd_printd(KERN_ERR "snd_vt1724_ac97_ready: timeout\n");
  123. return old_cmd;
  124. }
  125. static int snd_vt1724_ac97_wait_bit(struct snd_ice1712 *ice, unsigned char bit)
  126. {
  127. int tm;
  128. for (tm = 0; tm < 0x10000; tm++)
  129. if ((inb(ICEMT1724(ice, AC97_CMD)) & bit) == 0)
  130. return 0;
  131. snd_printd(KERN_ERR "snd_vt1724_ac97_wait_bit: timeout\n");
  132. return -EIO;
  133. }
  134. static void snd_vt1724_ac97_write(struct snd_ac97 *ac97,
  135. unsigned short reg,
  136. unsigned short val)
  137. {
  138. struct snd_ice1712 *ice = ac97->private_data;
  139. unsigned char old_cmd;
  140. old_cmd = snd_vt1724_ac97_ready(ice);
  141. old_cmd &= ~VT1724_AC97_ID_MASK;
  142. old_cmd |= ac97->num;
  143. outb(reg, ICEMT1724(ice, AC97_INDEX));
  144. outw(val, ICEMT1724(ice, AC97_DATA));
  145. outb(old_cmd | VT1724_AC97_WRITE, ICEMT1724(ice, AC97_CMD));
  146. snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_WRITE);
  147. }
  148. static unsigned short snd_vt1724_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
  149. {
  150. struct snd_ice1712 *ice = ac97->private_data;
  151. unsigned char old_cmd;
  152. old_cmd = snd_vt1724_ac97_ready(ice);
  153. old_cmd &= ~VT1724_AC97_ID_MASK;
  154. old_cmd |= ac97->num;
  155. outb(reg, ICEMT1724(ice, AC97_INDEX));
  156. outb(old_cmd | VT1724_AC97_READ, ICEMT1724(ice, AC97_CMD));
  157. if (snd_vt1724_ac97_wait_bit(ice, VT1724_AC97_READ) < 0)
  158. return ~0;
  159. return inw(ICEMT1724(ice, AC97_DATA));
  160. }
  161. /*
  162. * GPIO operations
  163. */
  164. /* set gpio direction 0 = read, 1 = write */
  165. static void snd_vt1724_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
  166. {
  167. outl(data, ICEREG1724(ice, GPIO_DIRECTION));
  168. inw(ICEREG1724(ice, GPIO_DIRECTION)); /* dummy read for pci-posting */
  169. }
  170. /* set the gpio mask (0 = writable) */
  171. static void snd_vt1724_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
  172. {
  173. outw(data, ICEREG1724(ice, GPIO_WRITE_MASK));
  174. if (!ice->vt1720) /* VT1720 supports only 16 GPIO bits */
  175. outb((data >> 16) & 0xff, ICEREG1724(ice, GPIO_WRITE_MASK_22));
  176. inw(ICEREG1724(ice, GPIO_WRITE_MASK)); /* dummy read for pci-posting */
  177. }
  178. static void snd_vt1724_set_gpio_data(struct snd_ice1712 *ice, unsigned int data)
  179. {
  180. outw(data, ICEREG1724(ice, GPIO_DATA));
  181. if (!ice->vt1720)
  182. outb(data >> 16, ICEREG1724(ice, GPIO_DATA_22));
  183. inw(ICEREG1724(ice, GPIO_DATA)); /* dummy read for pci-posting */
  184. }
  185. static unsigned int snd_vt1724_get_gpio_data(struct snd_ice1712 *ice)
  186. {
  187. unsigned int data;
  188. if (!ice->vt1720)
  189. data = (unsigned int)inb(ICEREG1724(ice, GPIO_DATA_22));
  190. else
  191. data = 0;
  192. data = (data << 16) | inw(ICEREG1724(ice, GPIO_DATA));
  193. return data;
  194. }
  195. /*
  196. * MIDI
  197. */
  198. static void vt1724_midi_clear_rx(struct snd_ice1712 *ice)
  199. {
  200. unsigned int count;
  201. for (count = inb(ICEREG1724(ice, MPU_RXFIFO)); count > 0; --count)
  202. inb(ICEREG1724(ice, MPU_DATA));
  203. }
  204. static inline struct snd_rawmidi_substream *
  205. get_rawmidi_substream(struct snd_ice1712 *ice, unsigned int stream)
  206. {
  207. return list_first_entry(&ice->rmidi[0]->streams[stream].substreams,
  208. struct snd_rawmidi_substream, list);
  209. }
  210. static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable);
  211. static void vt1724_midi_write(struct snd_ice1712 *ice)
  212. {
  213. struct snd_rawmidi_substream *s;
  214. int count, i;
  215. u8 buffer[32];
  216. s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_OUTPUT);
  217. count = 31 - inb(ICEREG1724(ice, MPU_TXFIFO));
  218. if (count > 0) {
  219. count = snd_rawmidi_transmit(s, buffer, count);
  220. for (i = 0; i < count; ++i)
  221. outb(buffer[i], ICEREG1724(ice, MPU_DATA));
  222. }
  223. /* mask irq when all bytes have been transmitted.
  224. * enabled again in output_trigger when the new data comes in.
  225. */
  226. enable_midi_irq(ice, VT1724_IRQ_MPU_TX,
  227. !snd_rawmidi_transmit_empty(s));
  228. }
  229. static void vt1724_midi_read(struct snd_ice1712 *ice)
  230. {
  231. struct snd_rawmidi_substream *s;
  232. int count, i;
  233. u8 buffer[32];
  234. s = get_rawmidi_substream(ice, SNDRV_RAWMIDI_STREAM_INPUT);
  235. count = inb(ICEREG1724(ice, MPU_RXFIFO));
  236. if (count > 0) {
  237. count = min(count, 32);
  238. for (i = 0; i < count; ++i)
  239. buffer[i] = inb(ICEREG1724(ice, MPU_DATA));
  240. snd_rawmidi_receive(s, buffer, count);
  241. }
  242. }
  243. /* call with ice->reg_lock */
  244. static void enable_midi_irq(struct snd_ice1712 *ice, u8 flag, int enable)
  245. {
  246. u8 mask = inb(ICEREG1724(ice, IRQMASK));
  247. if (enable)
  248. mask &= ~flag;
  249. else
  250. mask |= flag;
  251. outb(mask, ICEREG1724(ice, IRQMASK));
  252. }
  253. static void vt1724_enable_midi_irq(struct snd_rawmidi_substream *substream,
  254. u8 flag, int enable)
  255. {
  256. struct snd_ice1712 *ice = substream->rmidi->private_data;
  257. spin_lock_irq(&ice->reg_lock);
  258. enable_midi_irq(ice, flag, enable);
  259. spin_unlock_irq(&ice->reg_lock);
  260. }
  261. static int vt1724_midi_output_open(struct snd_rawmidi_substream *s)
  262. {
  263. return 0;
  264. }
  265. static int vt1724_midi_output_close(struct snd_rawmidi_substream *s)
  266. {
  267. return 0;
  268. }
  269. static void vt1724_midi_output_trigger(struct snd_rawmidi_substream *s, int up)
  270. {
  271. struct snd_ice1712 *ice = s->rmidi->private_data;
  272. unsigned long flags;
  273. spin_lock_irqsave(&ice->reg_lock, flags);
  274. if (up) {
  275. ice->midi_output = 1;
  276. vt1724_midi_write(ice);
  277. } else {
  278. ice->midi_output = 0;
  279. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  280. }
  281. spin_unlock_irqrestore(&ice->reg_lock, flags);
  282. }
  283. static void vt1724_midi_output_drain(struct snd_rawmidi_substream *s)
  284. {
  285. struct snd_ice1712 *ice = s->rmidi->private_data;
  286. unsigned long timeout;
  287. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_TX, 0);
  288. /* 32 bytes should be transmitted in less than about 12 ms */
  289. timeout = jiffies + msecs_to_jiffies(15);
  290. do {
  291. if (inb(ICEREG1724(ice, MPU_CTRL)) & VT1724_MPU_TX_EMPTY)
  292. break;
  293. schedule_timeout_uninterruptible(1);
  294. } while (time_after(timeout, jiffies));
  295. }
  296. static struct snd_rawmidi_ops vt1724_midi_output_ops = {
  297. .open = vt1724_midi_output_open,
  298. .close = vt1724_midi_output_close,
  299. .trigger = vt1724_midi_output_trigger,
  300. .drain = vt1724_midi_output_drain,
  301. };
  302. static int vt1724_midi_input_open(struct snd_rawmidi_substream *s)
  303. {
  304. vt1724_midi_clear_rx(s->rmidi->private_data);
  305. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 1);
  306. return 0;
  307. }
  308. static int vt1724_midi_input_close(struct snd_rawmidi_substream *s)
  309. {
  310. vt1724_enable_midi_irq(s, VT1724_IRQ_MPU_RX, 0);
  311. return 0;
  312. }
  313. static void vt1724_midi_input_trigger(struct snd_rawmidi_substream *s, int up)
  314. {
  315. struct snd_ice1712 *ice = s->rmidi->private_data;
  316. unsigned long flags;
  317. spin_lock_irqsave(&ice->reg_lock, flags);
  318. if (up) {
  319. ice->midi_input = 1;
  320. vt1724_midi_read(ice);
  321. } else {
  322. ice->midi_input = 0;
  323. }
  324. spin_unlock_irqrestore(&ice->reg_lock, flags);
  325. }
  326. static struct snd_rawmidi_ops vt1724_midi_input_ops = {
  327. .open = vt1724_midi_input_open,
  328. .close = vt1724_midi_input_close,
  329. .trigger = vt1724_midi_input_trigger,
  330. };
  331. /*
  332. * Interrupt handler
  333. */
  334. static irqreturn_t snd_vt1724_interrupt(int irq, void *dev_id)
  335. {
  336. struct snd_ice1712 *ice = dev_id;
  337. unsigned char status;
  338. unsigned char status_mask =
  339. VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX | VT1724_IRQ_MTPCM;
  340. int handled = 0;
  341. int timeout = 0;
  342. while (1) {
  343. status = inb(ICEREG1724(ice, IRQSTAT));
  344. status &= status_mask;
  345. if (status == 0)
  346. break;
  347. spin_lock(&ice->reg_lock);
  348. if (++timeout > 10) {
  349. status = inb(ICEREG1724(ice, IRQSTAT));
  350. printk(KERN_ERR "ice1724: Too long irq loop, "
  351. "status = 0x%x\n", status);
  352. if (status & VT1724_IRQ_MPU_TX) {
  353. printk(KERN_ERR "ice1724: Disabling MPU_TX\n");
  354. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  355. }
  356. spin_unlock(&ice->reg_lock);
  357. break;
  358. }
  359. handled = 1;
  360. if (status & VT1724_IRQ_MPU_TX) {
  361. if (ice->midi_output)
  362. vt1724_midi_write(ice);
  363. else
  364. enable_midi_irq(ice, VT1724_IRQ_MPU_TX, 0);
  365. /* Due to mysterical reasons, MPU_TX is always
  366. * generated (and can't be cleared) when a PCM
  367. * playback is going. So let's ignore at the
  368. * next loop.
  369. */
  370. status_mask &= ~VT1724_IRQ_MPU_TX;
  371. }
  372. if (status & VT1724_IRQ_MPU_RX) {
  373. if (ice->midi_input)
  374. vt1724_midi_read(ice);
  375. else
  376. vt1724_midi_clear_rx(ice);
  377. }
  378. /* ack MPU irq */
  379. outb(status, ICEREG1724(ice, IRQSTAT));
  380. spin_unlock(&ice->reg_lock);
  381. if (status & VT1724_IRQ_MTPCM) {
  382. /*
  383. * Multi-track PCM
  384. * PCM assignment are:
  385. * Playback DMA0 (M/C) = playback_pro_substream
  386. * Playback DMA1 = playback_con_substream_ds[0]
  387. * Playback DMA2 = playback_con_substream_ds[1]
  388. * Playback DMA3 = playback_con_substream_ds[2]
  389. * Playback DMA4 (SPDIF) = playback_con_substream
  390. * Record DMA0 = capture_pro_substream
  391. * Record DMA1 = capture_con_substream
  392. */
  393. unsigned char mtstat = inb(ICEMT1724(ice, IRQ));
  394. if (mtstat & VT1724_MULTI_PDMA0) {
  395. if (ice->playback_pro_substream)
  396. snd_pcm_period_elapsed(ice->playback_pro_substream);
  397. }
  398. if (mtstat & VT1724_MULTI_RDMA0) {
  399. if (ice->capture_pro_substream)
  400. snd_pcm_period_elapsed(ice->capture_pro_substream);
  401. }
  402. if (mtstat & VT1724_MULTI_PDMA1) {
  403. if (ice->playback_con_substream_ds[0])
  404. snd_pcm_period_elapsed(ice->playback_con_substream_ds[0]);
  405. }
  406. if (mtstat & VT1724_MULTI_PDMA2) {
  407. if (ice->playback_con_substream_ds[1])
  408. snd_pcm_period_elapsed(ice->playback_con_substream_ds[1]);
  409. }
  410. if (mtstat & VT1724_MULTI_PDMA3) {
  411. if (ice->playback_con_substream_ds[2])
  412. snd_pcm_period_elapsed(ice->playback_con_substream_ds[2]);
  413. }
  414. if (mtstat & VT1724_MULTI_PDMA4) {
  415. if (ice->playback_con_substream)
  416. snd_pcm_period_elapsed(ice->playback_con_substream);
  417. }
  418. if (mtstat & VT1724_MULTI_RDMA1) {
  419. if (ice->capture_con_substream)
  420. snd_pcm_period_elapsed(ice->capture_con_substream);
  421. }
  422. /* ack anyway to avoid freeze */
  423. outb(mtstat, ICEMT1724(ice, IRQ));
  424. /* ought to really handle this properly */
  425. if (mtstat & VT1724_MULTI_FIFO_ERR) {
  426. unsigned char fstat = inb(ICEMT1724(ice, DMA_FIFO_ERR));
  427. outb(fstat, ICEMT1724(ice, DMA_FIFO_ERR));
  428. outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
  429. /* If I don't do this, I get machine lockup due to continual interrupts */
  430. }
  431. }
  432. }
  433. return IRQ_RETVAL(handled);
  434. }
  435. /*
  436. * PCM code - professional part (multitrack)
  437. */
  438. static unsigned int rates[] = {
  439. 8000, 9600, 11025, 12000, 16000, 22050, 24000,
  440. 32000, 44100, 48000, 64000, 88200, 96000,
  441. 176400, 192000,
  442. };
  443. static struct snd_pcm_hw_constraint_list hw_constraints_rates_96 = {
  444. .count = ARRAY_SIZE(rates) - 2, /* up to 96000 */
  445. .list = rates,
  446. .mask = 0,
  447. };
  448. static struct snd_pcm_hw_constraint_list hw_constraints_rates_48 = {
  449. .count = ARRAY_SIZE(rates) - 5, /* up to 48000 */
  450. .list = rates,
  451. .mask = 0,
  452. };
  453. static struct snd_pcm_hw_constraint_list hw_constraints_rates_192 = {
  454. .count = ARRAY_SIZE(rates),
  455. .list = rates,
  456. .mask = 0,
  457. };
  458. struct vt1724_pcm_reg {
  459. unsigned int addr; /* ADDR register offset */
  460. unsigned int size; /* SIZE register offset */
  461. unsigned int count; /* COUNT register offset */
  462. unsigned int start; /* start & pause bit */
  463. };
  464. static int snd_vt1724_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
  465. {
  466. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  467. unsigned char what;
  468. unsigned char old;
  469. struct snd_pcm_substream *s;
  470. what = 0;
  471. snd_pcm_group_for_each_entry(s, substream) {
  472. if (snd_pcm_substream_chip(s) == ice) {
  473. const struct vt1724_pcm_reg *reg;
  474. reg = s->runtime->private_data;
  475. what |= reg->start;
  476. snd_pcm_trigger_done(s, substream);
  477. }
  478. }
  479. switch (cmd) {
  480. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  481. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  482. spin_lock(&ice->reg_lock);
  483. old = inb(ICEMT1724(ice, DMA_PAUSE));
  484. if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
  485. old |= what;
  486. else
  487. old &= ~what;
  488. outb(old, ICEMT1724(ice, DMA_PAUSE));
  489. spin_unlock(&ice->reg_lock);
  490. break;
  491. case SNDRV_PCM_TRIGGER_START:
  492. case SNDRV_PCM_TRIGGER_STOP:
  493. spin_lock(&ice->reg_lock);
  494. old = inb(ICEMT1724(ice, DMA_CONTROL));
  495. if (cmd == SNDRV_PCM_TRIGGER_START)
  496. old |= what;
  497. else
  498. old &= ~what;
  499. outb(old, ICEMT1724(ice, DMA_CONTROL));
  500. spin_unlock(&ice->reg_lock);
  501. break;
  502. default:
  503. return -EINVAL;
  504. }
  505. return 0;
  506. }
  507. /*
  508. */
  509. #define DMA_STARTS (VT1724_RDMA0_START|VT1724_PDMA0_START|VT1724_RDMA1_START|\
  510. VT1724_PDMA1_START|VT1724_PDMA2_START|VT1724_PDMA3_START|VT1724_PDMA4_START)
  511. #define DMA_PAUSES (VT1724_RDMA0_PAUSE|VT1724_PDMA0_PAUSE|VT1724_RDMA1_PAUSE|\
  512. VT1724_PDMA1_PAUSE|VT1724_PDMA2_PAUSE|VT1724_PDMA3_PAUSE|VT1724_PDMA4_PAUSE)
  513. static const unsigned int stdclock_rate_list[16] = {
  514. 48000, 24000, 12000, 9600, 32000, 16000, 8000, 96000, 44100,
  515. 22050, 11025, 88200, 176400, 0, 192000, 64000
  516. };
  517. static unsigned int stdclock_get_rate(struct snd_ice1712 *ice)
  518. {
  519. unsigned int rate;
  520. rate = stdclock_rate_list[inb(ICEMT1724(ice, RATE)) & 15];
  521. return rate;
  522. }
  523. static void stdclock_set_rate(struct snd_ice1712 *ice, unsigned int rate)
  524. {
  525. int i;
  526. for (i = 0; i < ARRAY_SIZE(stdclock_rate_list); i++) {
  527. if (stdclock_rate_list[i] == rate) {
  528. outb(i, ICEMT1724(ice, RATE));
  529. return;
  530. }
  531. }
  532. }
  533. static unsigned char stdclock_set_mclk(struct snd_ice1712 *ice,
  534. unsigned int rate)
  535. {
  536. unsigned char val, old;
  537. /* check MT02 */
  538. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  539. val = old = inb(ICEMT1724(ice, I2S_FORMAT));
  540. if (rate > 96000)
  541. val |= VT1724_MT_I2S_MCLK_128X; /* 128x MCLK */
  542. else
  543. val &= ~VT1724_MT_I2S_MCLK_128X; /* 256x MCLK */
  544. if (val != old) {
  545. outb(val, ICEMT1724(ice, I2S_FORMAT));
  546. /* master clock changed */
  547. return 1;
  548. }
  549. }
  550. /* no change in master clock */
  551. return 0;
  552. }
  553. static int snd_vt1724_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate,
  554. int force)
  555. {
  556. unsigned long flags;
  557. unsigned char mclk_change;
  558. unsigned int i, old_rate;
  559. if (rate > ice->hw_rates->list[ice->hw_rates->count - 1])
  560. return -EINVAL;
  561. spin_lock_irqsave(&ice->reg_lock, flags);
  562. if ((inb(ICEMT1724(ice, DMA_CONTROL)) & DMA_STARTS) ||
  563. (inb(ICEMT1724(ice, DMA_PAUSE)) & DMA_PAUSES)) {
  564. /* running? we cannot change the rate now... */
  565. spin_unlock_irqrestore(&ice->reg_lock, flags);
  566. return -EBUSY;
  567. }
  568. if (!force && is_pro_rate_locked(ice)) {
  569. spin_unlock_irqrestore(&ice->reg_lock, flags);
  570. return (rate == ice->cur_rate) ? 0 : -EBUSY;
  571. }
  572. old_rate = ice->get_rate(ice);
  573. if (force || (old_rate != rate))
  574. ice->set_rate(ice, rate);
  575. else if (rate == ice->cur_rate) {
  576. spin_unlock_irqrestore(&ice->reg_lock, flags);
  577. return 0;
  578. }
  579. ice->cur_rate = rate;
  580. /* setting master clock */
  581. mclk_change = ice->set_mclk(ice, rate);
  582. spin_unlock_irqrestore(&ice->reg_lock, flags);
  583. if (mclk_change && ice->gpio.i2s_mclk_changed)
  584. ice->gpio.i2s_mclk_changed(ice);
  585. if (ice->gpio.set_pro_rate)
  586. ice->gpio.set_pro_rate(ice, rate);
  587. /* set up codecs */
  588. for (i = 0; i < ice->akm_codecs; i++) {
  589. if (ice->akm[i].ops.set_rate_val)
  590. ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
  591. }
  592. if (ice->spdif.ops.setup_rate)
  593. ice->spdif.ops.setup_rate(ice, rate);
  594. return 0;
  595. }
  596. static int snd_vt1724_pcm_hw_params(struct snd_pcm_substream *substream,
  597. struct snd_pcm_hw_params *hw_params)
  598. {
  599. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  600. int i, chs, err;
  601. chs = params_channels(hw_params);
  602. mutex_lock(&ice->open_mutex);
  603. /* mark surround channels */
  604. if (substream == ice->playback_pro_substream) {
  605. /* PDMA0 can be multi-channel up to 8 */
  606. chs = chs / 2 - 1;
  607. for (i = 0; i < chs; i++) {
  608. if (ice->pcm_reserved[i] &&
  609. ice->pcm_reserved[i] != substream) {
  610. mutex_unlock(&ice->open_mutex);
  611. return -EBUSY;
  612. }
  613. ice->pcm_reserved[i] = substream;
  614. }
  615. for (; i < 3; i++) {
  616. if (ice->pcm_reserved[i] == substream)
  617. ice->pcm_reserved[i] = NULL;
  618. }
  619. } else {
  620. for (i = 0; i < 3; i++) {
  621. /* check individual playback stream */
  622. if (ice->playback_con_substream_ds[i] == substream) {
  623. if (ice->pcm_reserved[i] &&
  624. ice->pcm_reserved[i] != substream) {
  625. mutex_unlock(&ice->open_mutex);
  626. return -EBUSY;
  627. }
  628. ice->pcm_reserved[i] = substream;
  629. break;
  630. }
  631. }
  632. }
  633. mutex_unlock(&ice->open_mutex);
  634. err = snd_vt1724_set_pro_rate(ice, params_rate(hw_params), 0);
  635. if (err < 0)
  636. return err;
  637. return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
  638. }
  639. static int snd_vt1724_pcm_hw_free(struct snd_pcm_substream *substream)
  640. {
  641. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  642. int i;
  643. mutex_lock(&ice->open_mutex);
  644. /* unmark surround channels */
  645. for (i = 0; i < 3; i++)
  646. if (ice->pcm_reserved[i] == substream)
  647. ice->pcm_reserved[i] = NULL;
  648. mutex_unlock(&ice->open_mutex);
  649. return snd_pcm_lib_free_pages(substream);
  650. }
  651. static int snd_vt1724_playback_pro_prepare(struct snd_pcm_substream *substream)
  652. {
  653. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  654. unsigned char val;
  655. unsigned int size;
  656. spin_lock_irq(&ice->reg_lock);
  657. val = (8 - substream->runtime->channels) >> 1;
  658. outb(val, ICEMT1724(ice, BURST));
  659. outl(substream->runtime->dma_addr, ICEMT1724(ice, PLAYBACK_ADDR));
  660. size = (snd_pcm_lib_buffer_bytes(substream) >> 2) - 1;
  661. /* outl(size, ICEMT1724(ice, PLAYBACK_SIZE)); */
  662. outw(size, ICEMT1724(ice, PLAYBACK_SIZE));
  663. outb(size >> 16, ICEMT1724(ice, PLAYBACK_SIZE) + 2);
  664. size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
  665. /* outl(size, ICEMT1724(ice, PLAYBACK_COUNT)); */
  666. outw(size, ICEMT1724(ice, PLAYBACK_COUNT));
  667. outb(size >> 16, ICEMT1724(ice, PLAYBACK_COUNT) + 2);
  668. spin_unlock_irq(&ice->reg_lock);
  669. /*
  670. printk(KERN_DEBUG "pro prepare: ch = %d, addr = 0x%x, "
  671. "buffer = 0x%x, period = 0x%x\n",
  672. substream->runtime->channels,
  673. (unsigned int)substream->runtime->dma_addr,
  674. snd_pcm_lib_buffer_bytes(substream),
  675. snd_pcm_lib_period_bytes(substream));
  676. */
  677. return 0;
  678. }
  679. static snd_pcm_uframes_t snd_vt1724_playback_pro_pointer(struct snd_pcm_substream *substream)
  680. {
  681. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  682. size_t ptr;
  683. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & VT1724_PDMA0_START))
  684. return 0;
  685. #if 0 /* read PLAYBACK_ADDR */
  686. ptr = inl(ICEMT1724(ice, PLAYBACK_ADDR));
  687. if (ptr < substream->runtime->dma_addr) {
  688. snd_printd("ice1724: invalid negative ptr\n");
  689. return 0;
  690. }
  691. ptr -= substream->runtime->dma_addr;
  692. ptr = bytes_to_frames(substream->runtime, ptr);
  693. if (ptr >= substream->runtime->buffer_size) {
  694. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  695. (int)ptr, (int)substream->runtime->period_size);
  696. return 0;
  697. }
  698. #else /* read PLAYBACK_SIZE */
  699. ptr = inl(ICEMT1724(ice, PLAYBACK_SIZE)) & 0xffffff;
  700. ptr = (ptr + 1) << 2;
  701. ptr = bytes_to_frames(substream->runtime, ptr);
  702. if (!ptr)
  703. ;
  704. else if (ptr <= substream->runtime->buffer_size)
  705. ptr = substream->runtime->buffer_size - ptr;
  706. else {
  707. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  708. (int)ptr, (int)substream->runtime->buffer_size);
  709. ptr = 0;
  710. }
  711. #endif
  712. return ptr;
  713. }
  714. static int snd_vt1724_pcm_prepare(struct snd_pcm_substream *substream)
  715. {
  716. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  717. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  718. spin_lock_irq(&ice->reg_lock);
  719. outl(substream->runtime->dma_addr, ice->profi_port + reg->addr);
  720. outw((snd_pcm_lib_buffer_bytes(substream) >> 2) - 1,
  721. ice->profi_port + reg->size);
  722. outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1,
  723. ice->profi_port + reg->count);
  724. spin_unlock_irq(&ice->reg_lock);
  725. return 0;
  726. }
  727. static snd_pcm_uframes_t snd_vt1724_pcm_pointer(struct snd_pcm_substream *substream)
  728. {
  729. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  730. const struct vt1724_pcm_reg *reg = substream->runtime->private_data;
  731. size_t ptr;
  732. if (!(inl(ICEMT1724(ice, DMA_CONTROL)) & reg->start))
  733. return 0;
  734. #if 0 /* use ADDR register */
  735. ptr = inl(ice->profi_port + reg->addr);
  736. ptr -= substream->runtime->dma_addr;
  737. return bytes_to_frames(substream->runtime, ptr);
  738. #else /* use SIZE register */
  739. ptr = inw(ice->profi_port + reg->size);
  740. ptr = (ptr + 1) << 2;
  741. ptr = bytes_to_frames(substream->runtime, ptr);
  742. if (!ptr)
  743. ;
  744. else if (ptr <= substream->runtime->buffer_size)
  745. ptr = substream->runtime->buffer_size - ptr;
  746. else {
  747. snd_printd("ice1724: invalid ptr %d (size=%d)\n",
  748. (int)ptr, (int)substream->runtime->buffer_size);
  749. ptr = 0;
  750. }
  751. return ptr;
  752. #endif
  753. }
  754. static const struct vt1724_pcm_reg vt1724_playback_pro_reg = {
  755. .addr = VT1724_MT_PLAYBACK_ADDR,
  756. .size = VT1724_MT_PLAYBACK_SIZE,
  757. .count = VT1724_MT_PLAYBACK_COUNT,
  758. .start = VT1724_PDMA0_START,
  759. };
  760. static const struct vt1724_pcm_reg vt1724_capture_pro_reg = {
  761. .addr = VT1724_MT_CAPTURE_ADDR,
  762. .size = VT1724_MT_CAPTURE_SIZE,
  763. .count = VT1724_MT_CAPTURE_COUNT,
  764. .start = VT1724_RDMA0_START,
  765. };
  766. static const struct snd_pcm_hardware snd_vt1724_playback_pro = {
  767. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  768. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  769. SNDRV_PCM_INFO_MMAP_VALID |
  770. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  771. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  772. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  773. .rate_min = 8000,
  774. .rate_max = 192000,
  775. .channels_min = 2,
  776. .channels_max = 8,
  777. .buffer_bytes_max = (1UL << 21), /* 19bits dword */
  778. .period_bytes_min = 8 * 4 * 2, /* FIXME: constraints needed */
  779. .period_bytes_max = (1UL << 21),
  780. .periods_min = 2,
  781. .periods_max = 1024,
  782. };
  783. static const struct snd_pcm_hardware snd_vt1724_spdif = {
  784. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  785. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  786. SNDRV_PCM_INFO_MMAP_VALID |
  787. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  788. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  789. .rates = (SNDRV_PCM_RATE_32000|SNDRV_PCM_RATE_44100|
  790. SNDRV_PCM_RATE_48000|SNDRV_PCM_RATE_88200|
  791. SNDRV_PCM_RATE_96000|SNDRV_PCM_RATE_176400|
  792. SNDRV_PCM_RATE_192000),
  793. .rate_min = 32000,
  794. .rate_max = 192000,
  795. .channels_min = 2,
  796. .channels_max = 2,
  797. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  798. .period_bytes_min = 2 * 4 * 2,
  799. .period_bytes_max = (1UL << 18),
  800. .periods_min = 2,
  801. .periods_max = 1024,
  802. };
  803. static const struct snd_pcm_hardware snd_vt1724_2ch_stereo = {
  804. .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
  805. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  806. SNDRV_PCM_INFO_MMAP_VALID |
  807. SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
  808. .formats = SNDRV_PCM_FMTBIT_S32_LE,
  809. .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_192000,
  810. .rate_min = 8000,
  811. .rate_max = 192000,
  812. .channels_min = 2,
  813. .channels_max = 2,
  814. .buffer_bytes_max = (1UL << 18), /* 16bits dword */
  815. .period_bytes_min = 2 * 4 * 2,
  816. .period_bytes_max = (1UL << 18),
  817. .periods_min = 2,
  818. .periods_max = 1024,
  819. };
  820. /*
  821. * set rate constraints
  822. */
  823. static void set_std_hw_rates(struct snd_ice1712 *ice)
  824. {
  825. if (ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S) {
  826. /* I2S */
  827. /* VT1720 doesn't support more than 96kHz */
  828. if ((ice->eeprom.data[ICE_EEP2_I2S] & 0x08) && !ice->vt1720)
  829. ice->hw_rates = &hw_constraints_rates_192;
  830. else
  831. ice->hw_rates = &hw_constraints_rates_96;
  832. } else {
  833. /* ACLINK */
  834. ice->hw_rates = &hw_constraints_rates_48;
  835. }
  836. }
  837. static int set_rate_constraints(struct snd_ice1712 *ice,
  838. struct snd_pcm_substream *substream)
  839. {
  840. struct snd_pcm_runtime *runtime = substream->runtime;
  841. runtime->hw.rate_min = ice->hw_rates->list[0];
  842. runtime->hw.rate_max = ice->hw_rates->list[ice->hw_rates->count - 1];
  843. runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
  844. return snd_pcm_hw_constraint_list(runtime, 0,
  845. SNDRV_PCM_HW_PARAM_RATE,
  846. ice->hw_rates);
  847. }
  848. /* multi-channel playback needs alignment 8x32bit regardless of the channels
  849. * actually used
  850. */
  851. #define VT1724_BUFFER_ALIGN 0x20
  852. static int snd_vt1724_playback_pro_open(struct snd_pcm_substream *substream)
  853. {
  854. struct snd_pcm_runtime *runtime = substream->runtime;
  855. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  856. int chs, num_indeps;
  857. runtime->private_data = (void *)&vt1724_playback_pro_reg;
  858. ice->playback_pro_substream = substream;
  859. runtime->hw = snd_vt1724_playback_pro;
  860. snd_pcm_set_sync(substream);
  861. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  862. set_rate_constraints(ice, substream);
  863. mutex_lock(&ice->open_mutex);
  864. /* calculate the currently available channels */
  865. num_indeps = ice->num_total_dacs / 2 - 1;
  866. for (chs = 0; chs < num_indeps; chs++) {
  867. if (ice->pcm_reserved[chs])
  868. break;
  869. }
  870. chs = (chs + 1) * 2;
  871. runtime->hw.channels_max = chs;
  872. if (chs > 2) /* channels must be even */
  873. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  874. mutex_unlock(&ice->open_mutex);
  875. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  876. VT1724_BUFFER_ALIGN);
  877. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  878. VT1724_BUFFER_ALIGN);
  879. return 0;
  880. }
  881. static int snd_vt1724_capture_pro_open(struct snd_pcm_substream *substream)
  882. {
  883. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  884. struct snd_pcm_runtime *runtime = substream->runtime;
  885. runtime->private_data = (void *)&vt1724_capture_pro_reg;
  886. ice->capture_pro_substream = substream;
  887. runtime->hw = snd_vt1724_2ch_stereo;
  888. snd_pcm_set_sync(substream);
  889. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  890. set_rate_constraints(ice, substream);
  891. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  892. VT1724_BUFFER_ALIGN);
  893. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  894. VT1724_BUFFER_ALIGN);
  895. return 0;
  896. }
  897. static int snd_vt1724_playback_pro_close(struct snd_pcm_substream *substream)
  898. {
  899. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  900. if (PRO_RATE_RESET)
  901. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  902. ice->playback_pro_substream = NULL;
  903. return 0;
  904. }
  905. static int snd_vt1724_capture_pro_close(struct snd_pcm_substream *substream)
  906. {
  907. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  908. if (PRO_RATE_RESET)
  909. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  910. ice->capture_pro_substream = NULL;
  911. return 0;
  912. }
  913. static struct snd_pcm_ops snd_vt1724_playback_pro_ops = {
  914. .open = snd_vt1724_playback_pro_open,
  915. .close = snd_vt1724_playback_pro_close,
  916. .ioctl = snd_pcm_lib_ioctl,
  917. .hw_params = snd_vt1724_pcm_hw_params,
  918. .hw_free = snd_vt1724_pcm_hw_free,
  919. .prepare = snd_vt1724_playback_pro_prepare,
  920. .trigger = snd_vt1724_pcm_trigger,
  921. .pointer = snd_vt1724_playback_pro_pointer,
  922. };
  923. static struct snd_pcm_ops snd_vt1724_capture_pro_ops = {
  924. .open = snd_vt1724_capture_pro_open,
  925. .close = snd_vt1724_capture_pro_close,
  926. .ioctl = snd_pcm_lib_ioctl,
  927. .hw_params = snd_vt1724_pcm_hw_params,
  928. .hw_free = snd_vt1724_pcm_hw_free,
  929. .prepare = snd_vt1724_pcm_prepare,
  930. .trigger = snd_vt1724_pcm_trigger,
  931. .pointer = snd_vt1724_pcm_pointer,
  932. };
  933. static int __devinit snd_vt1724_pcm_profi(struct snd_ice1712 *ice, int device)
  934. {
  935. struct snd_pcm *pcm;
  936. int err;
  937. err = snd_pcm_new(ice->card, "ICE1724", device, 1, 1, &pcm);
  938. if (err < 0)
  939. return err;
  940. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_vt1724_playback_pro_ops);
  941. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_vt1724_capture_pro_ops);
  942. pcm->private_data = ice;
  943. pcm->info_flags = 0;
  944. strcpy(pcm->name, "ICE1724");
  945. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  946. snd_dma_pci_data(ice->pci),
  947. 256*1024, 256*1024);
  948. ice->pcm_pro = pcm;
  949. return 0;
  950. }
  951. /*
  952. * SPDIF PCM
  953. */
  954. static const struct vt1724_pcm_reg vt1724_playback_spdif_reg = {
  955. .addr = VT1724_MT_PDMA4_ADDR,
  956. .size = VT1724_MT_PDMA4_SIZE,
  957. .count = VT1724_MT_PDMA4_COUNT,
  958. .start = VT1724_PDMA4_START,
  959. };
  960. static const struct vt1724_pcm_reg vt1724_capture_spdif_reg = {
  961. .addr = VT1724_MT_RDMA1_ADDR,
  962. .size = VT1724_MT_RDMA1_SIZE,
  963. .count = VT1724_MT_RDMA1_COUNT,
  964. .start = VT1724_RDMA1_START,
  965. };
  966. /* update spdif control bits; call with reg_lock */
  967. static void update_spdif_bits(struct snd_ice1712 *ice, unsigned int val)
  968. {
  969. unsigned char cbit, disabled;
  970. cbit = inb(ICEREG1724(ice, SPDIF_CFG));
  971. disabled = cbit & ~VT1724_CFG_SPDIF_OUT_EN;
  972. if (cbit != disabled)
  973. outb(disabled, ICEREG1724(ice, SPDIF_CFG));
  974. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  975. if (cbit != disabled)
  976. outb(cbit, ICEREG1724(ice, SPDIF_CFG));
  977. outw(val, ICEMT1724(ice, SPDIF_CTRL));
  978. }
  979. /* update SPDIF control bits according to the given rate */
  980. static void update_spdif_rate(struct snd_ice1712 *ice, unsigned int rate)
  981. {
  982. unsigned int val, nval;
  983. unsigned long flags;
  984. spin_lock_irqsave(&ice->reg_lock, flags);
  985. nval = val = inw(ICEMT1724(ice, SPDIF_CTRL));
  986. nval &= ~(7 << 12);
  987. switch (rate) {
  988. case 44100: break;
  989. case 48000: nval |= 2 << 12; break;
  990. case 32000: nval |= 3 << 12; break;
  991. case 88200: nval |= 4 << 12; break;
  992. case 96000: nval |= 5 << 12; break;
  993. case 192000: nval |= 6 << 12; break;
  994. case 176400: nval |= 7 << 12; break;
  995. }
  996. if (val != nval)
  997. update_spdif_bits(ice, nval);
  998. spin_unlock_irqrestore(&ice->reg_lock, flags);
  999. }
  1000. static int snd_vt1724_playback_spdif_prepare(struct snd_pcm_substream *substream)
  1001. {
  1002. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1003. if (!ice->force_pdma4)
  1004. update_spdif_rate(ice, substream->runtime->rate);
  1005. return snd_vt1724_pcm_prepare(substream);
  1006. }
  1007. static int snd_vt1724_playback_spdif_open(struct snd_pcm_substream *substream)
  1008. {
  1009. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1010. struct snd_pcm_runtime *runtime = substream->runtime;
  1011. runtime->private_data = (void *)&vt1724_playback_spdif_reg;
  1012. ice->playback_con_substream = substream;
  1013. if (ice->force_pdma4) {
  1014. runtime->hw = snd_vt1724_2ch_stereo;
  1015. set_rate_constraints(ice, substream);
  1016. } else
  1017. runtime->hw = snd_vt1724_spdif;
  1018. snd_pcm_set_sync(substream);
  1019. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1020. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  1021. VT1724_BUFFER_ALIGN);
  1022. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  1023. VT1724_BUFFER_ALIGN);
  1024. if (ice->spdif.ops.open)
  1025. ice->spdif.ops.open(ice, substream);
  1026. return 0;
  1027. }
  1028. static int snd_vt1724_playback_spdif_close(struct snd_pcm_substream *substream)
  1029. {
  1030. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1031. if (PRO_RATE_RESET)
  1032. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1033. ice->playback_con_substream = NULL;
  1034. if (ice->spdif.ops.close)
  1035. ice->spdif.ops.close(ice, substream);
  1036. return 0;
  1037. }
  1038. static int snd_vt1724_capture_spdif_open(struct snd_pcm_substream *substream)
  1039. {
  1040. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1041. struct snd_pcm_runtime *runtime = substream->runtime;
  1042. runtime->private_data = (void *)&vt1724_capture_spdif_reg;
  1043. ice->capture_con_substream = substream;
  1044. if (ice->force_rdma1) {
  1045. runtime->hw = snd_vt1724_2ch_stereo;
  1046. set_rate_constraints(ice, substream);
  1047. } else
  1048. runtime->hw = snd_vt1724_spdif;
  1049. snd_pcm_set_sync(substream);
  1050. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1051. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES,
  1052. VT1724_BUFFER_ALIGN);
  1053. snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES,
  1054. VT1724_BUFFER_ALIGN);
  1055. if (ice->spdif.ops.open)
  1056. ice->spdif.ops.open(ice, substream);
  1057. return 0;
  1058. }
  1059. static int snd_vt1724_capture_spdif_close(struct snd_pcm_substream *substream)
  1060. {
  1061. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1062. if (PRO_RATE_RESET)
  1063. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1064. ice->capture_con_substream = NULL;
  1065. if (ice->spdif.ops.close)
  1066. ice->spdif.ops.close(ice, substream);
  1067. return 0;
  1068. }
  1069. static struct snd_pcm_ops snd_vt1724_playback_spdif_ops = {
  1070. .open = snd_vt1724_playback_spdif_open,
  1071. .close = snd_vt1724_playback_spdif_close,
  1072. .ioctl = snd_pcm_lib_ioctl,
  1073. .hw_params = snd_vt1724_pcm_hw_params,
  1074. .hw_free = snd_vt1724_pcm_hw_free,
  1075. .prepare = snd_vt1724_playback_spdif_prepare,
  1076. .trigger = snd_vt1724_pcm_trigger,
  1077. .pointer = snd_vt1724_pcm_pointer,
  1078. };
  1079. static struct snd_pcm_ops snd_vt1724_capture_spdif_ops = {
  1080. .open = snd_vt1724_capture_spdif_open,
  1081. .close = snd_vt1724_capture_spdif_close,
  1082. .ioctl = snd_pcm_lib_ioctl,
  1083. .hw_params = snd_vt1724_pcm_hw_params,
  1084. .hw_free = snd_vt1724_pcm_hw_free,
  1085. .prepare = snd_vt1724_pcm_prepare,
  1086. .trigger = snd_vt1724_pcm_trigger,
  1087. .pointer = snd_vt1724_pcm_pointer,
  1088. };
  1089. static int __devinit snd_vt1724_pcm_spdif(struct snd_ice1712 *ice, int device)
  1090. {
  1091. char *name;
  1092. struct snd_pcm *pcm;
  1093. int play, capt;
  1094. int err;
  1095. if (ice->force_pdma4 ||
  1096. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_OUT_INT)) {
  1097. play = 1;
  1098. ice->has_spdif = 1;
  1099. } else
  1100. play = 0;
  1101. if (ice->force_rdma1 ||
  1102. (ice->eeprom.data[ICE_EEP2_SPDIF] & VT1724_CFG_SPDIF_IN)) {
  1103. capt = 1;
  1104. ice->has_spdif = 1;
  1105. } else
  1106. capt = 0;
  1107. if (!play && !capt)
  1108. return 0; /* no spdif device */
  1109. if (ice->force_pdma4 || ice->force_rdma1)
  1110. name = "ICE1724 Secondary";
  1111. else
  1112. name = "ICE1724 IEC958";
  1113. err = snd_pcm_new(ice->card, name, device, play, capt, &pcm);
  1114. if (err < 0)
  1115. return err;
  1116. if (play)
  1117. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1118. &snd_vt1724_playback_spdif_ops);
  1119. if (capt)
  1120. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
  1121. &snd_vt1724_capture_spdif_ops);
  1122. pcm->private_data = ice;
  1123. pcm->info_flags = 0;
  1124. strcpy(pcm->name, name);
  1125. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1126. snd_dma_pci_data(ice->pci),
  1127. 64*1024, 64*1024);
  1128. ice->pcm = pcm;
  1129. return 0;
  1130. }
  1131. /*
  1132. * independent surround PCMs
  1133. */
  1134. static const struct vt1724_pcm_reg vt1724_playback_dma_regs[3] = {
  1135. {
  1136. .addr = VT1724_MT_PDMA1_ADDR,
  1137. .size = VT1724_MT_PDMA1_SIZE,
  1138. .count = VT1724_MT_PDMA1_COUNT,
  1139. .start = VT1724_PDMA1_START,
  1140. },
  1141. {
  1142. .addr = VT1724_MT_PDMA2_ADDR,
  1143. .size = VT1724_MT_PDMA2_SIZE,
  1144. .count = VT1724_MT_PDMA2_COUNT,
  1145. .start = VT1724_PDMA2_START,
  1146. },
  1147. {
  1148. .addr = VT1724_MT_PDMA3_ADDR,
  1149. .size = VT1724_MT_PDMA3_SIZE,
  1150. .count = VT1724_MT_PDMA3_COUNT,
  1151. .start = VT1724_PDMA3_START,
  1152. },
  1153. };
  1154. static int snd_vt1724_playback_indep_prepare(struct snd_pcm_substream *substream)
  1155. {
  1156. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1157. unsigned char val;
  1158. spin_lock_irq(&ice->reg_lock);
  1159. val = 3 - substream->number;
  1160. if (inb(ICEMT1724(ice, BURST)) < val)
  1161. outb(val, ICEMT1724(ice, BURST));
  1162. spin_unlock_irq(&ice->reg_lock);
  1163. return snd_vt1724_pcm_prepare(substream);
  1164. }
  1165. static int snd_vt1724_playback_indep_open(struct snd_pcm_substream *substream)
  1166. {
  1167. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1168. struct snd_pcm_runtime *runtime = substream->runtime;
  1169. mutex_lock(&ice->open_mutex);
  1170. /* already used by PDMA0? */
  1171. if (ice->pcm_reserved[substream->number]) {
  1172. mutex_unlock(&ice->open_mutex);
  1173. return -EBUSY; /* FIXME: should handle blocking mode properly */
  1174. }
  1175. mutex_unlock(&ice->open_mutex);
  1176. runtime->private_data = (void *)&vt1724_playback_dma_regs[substream->number];
  1177. ice->playback_con_substream_ds[substream->number] = substream;
  1178. runtime->hw = snd_vt1724_2ch_stereo;
  1179. snd_pcm_set_sync(substream);
  1180. snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
  1181. set_rate_constraints(ice, substream);
  1182. return 0;
  1183. }
  1184. static int snd_vt1724_playback_indep_close(struct snd_pcm_substream *substream)
  1185. {
  1186. struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
  1187. if (PRO_RATE_RESET)
  1188. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 0);
  1189. ice->playback_con_substream_ds[substream->number] = NULL;
  1190. ice->pcm_reserved[substream->number] = NULL;
  1191. return 0;
  1192. }
  1193. static struct snd_pcm_ops snd_vt1724_playback_indep_ops = {
  1194. .open = snd_vt1724_playback_indep_open,
  1195. .close = snd_vt1724_playback_indep_close,
  1196. .ioctl = snd_pcm_lib_ioctl,
  1197. .hw_params = snd_vt1724_pcm_hw_params,
  1198. .hw_free = snd_vt1724_pcm_hw_free,
  1199. .prepare = snd_vt1724_playback_indep_prepare,
  1200. .trigger = snd_vt1724_pcm_trigger,
  1201. .pointer = snd_vt1724_pcm_pointer,
  1202. };
  1203. static int __devinit snd_vt1724_pcm_indep(struct snd_ice1712 *ice, int device)
  1204. {
  1205. struct snd_pcm *pcm;
  1206. int play;
  1207. int err;
  1208. play = ice->num_total_dacs / 2 - 1;
  1209. if (play <= 0)
  1210. return 0;
  1211. err = snd_pcm_new(ice->card, "ICE1724 Surrounds", device, play, 0, &pcm);
  1212. if (err < 0)
  1213. return err;
  1214. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
  1215. &snd_vt1724_playback_indep_ops);
  1216. pcm->private_data = ice;
  1217. pcm->info_flags = 0;
  1218. strcpy(pcm->name, "ICE1724 Surround PCM");
  1219. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  1220. snd_dma_pci_data(ice->pci),
  1221. 64*1024, 64*1024);
  1222. ice->pcm_ds = pcm;
  1223. return 0;
  1224. }
  1225. /*
  1226. * Mixer section
  1227. */
  1228. static int __devinit snd_vt1724_ac97_mixer(struct snd_ice1712 *ice)
  1229. {
  1230. int err;
  1231. if (!(ice->eeprom.data[ICE_EEP2_ACLINK] & VT1724_CFG_PRO_I2S)) {
  1232. struct snd_ac97_bus *pbus;
  1233. struct snd_ac97_template ac97;
  1234. static struct snd_ac97_bus_ops ops = {
  1235. .write = snd_vt1724_ac97_write,
  1236. .read = snd_vt1724_ac97_read,
  1237. };
  1238. /* cold reset */
  1239. outb(inb(ICEMT1724(ice, AC97_CMD)) | 0x80, ICEMT1724(ice, AC97_CMD));
  1240. mdelay(5); /* FIXME */
  1241. outb(inb(ICEMT1724(ice, AC97_CMD)) & ~0x80, ICEMT1724(ice, AC97_CMD));
  1242. err = snd_ac97_bus(ice->card, 0, &ops, NULL, &pbus);
  1243. if (err < 0)
  1244. return err;
  1245. memset(&ac97, 0, sizeof(ac97));
  1246. ac97.private_data = ice;
  1247. err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
  1248. if (err < 0)
  1249. printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
  1250. else
  1251. return 0;
  1252. }
  1253. /* I2S mixer only */
  1254. strcat(ice->card->mixername, "ICE1724 - multitrack");
  1255. return 0;
  1256. }
  1257. /*
  1258. *
  1259. */
  1260. static inline unsigned int eeprom_triple(struct snd_ice1712 *ice, int idx)
  1261. {
  1262. return (unsigned int)ice->eeprom.data[idx] | \
  1263. ((unsigned int)ice->eeprom.data[idx + 1] << 8) | \
  1264. ((unsigned int)ice->eeprom.data[idx + 2] << 16);
  1265. }
  1266. static void snd_vt1724_proc_read(struct snd_info_entry *entry,
  1267. struct snd_info_buffer *buffer)
  1268. {
  1269. struct snd_ice1712 *ice = entry->private_data;
  1270. unsigned int idx;
  1271. snd_iprintf(buffer, "%s\n\n", ice->card->longname);
  1272. snd_iprintf(buffer, "EEPROM:\n");
  1273. snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
  1274. snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
  1275. snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
  1276. snd_iprintf(buffer, " System Config : 0x%x\n",
  1277. ice->eeprom.data[ICE_EEP2_SYSCONF]);
  1278. snd_iprintf(buffer, " ACLink : 0x%x\n",
  1279. ice->eeprom.data[ICE_EEP2_ACLINK]);
  1280. snd_iprintf(buffer, " I2S : 0x%x\n",
  1281. ice->eeprom.data[ICE_EEP2_I2S]);
  1282. snd_iprintf(buffer, " S/PDIF : 0x%x\n",
  1283. ice->eeprom.data[ICE_EEP2_SPDIF]);
  1284. snd_iprintf(buffer, " GPIO direction : 0x%x\n",
  1285. ice->eeprom.gpiodir);
  1286. snd_iprintf(buffer, " GPIO mask : 0x%x\n",
  1287. ice->eeprom.gpiomask);
  1288. snd_iprintf(buffer, " GPIO state : 0x%x\n",
  1289. ice->eeprom.gpiostate);
  1290. for (idx = 0x12; idx < ice->eeprom.size; idx++)
  1291. snd_iprintf(buffer, " Extra #%02i : 0x%x\n",
  1292. idx, ice->eeprom.data[idx]);
  1293. snd_iprintf(buffer, "\nRegisters:\n");
  1294. snd_iprintf(buffer, " PSDOUT03 : 0x%08x\n",
  1295. (unsigned)inl(ICEMT1724(ice, ROUTE_PLAYBACK)));
  1296. for (idx = 0x0; idx < 0x20 ; idx++)
  1297. snd_iprintf(buffer, " CCS%02x : 0x%02x\n",
  1298. idx, inb(ice->port+idx));
  1299. for (idx = 0x0; idx < 0x30 ; idx++)
  1300. snd_iprintf(buffer, " MT%02x : 0x%02x\n",
  1301. idx, inb(ice->profi_port+idx));
  1302. }
  1303. static void __devinit snd_vt1724_proc_init(struct snd_ice1712 *ice)
  1304. {
  1305. struct snd_info_entry *entry;
  1306. if (!snd_card_proc_new(ice->card, "ice1724", &entry))
  1307. snd_info_set_text_ops(entry, ice, snd_vt1724_proc_read);
  1308. }
  1309. /*
  1310. *
  1311. */
  1312. static int snd_vt1724_eeprom_info(struct snd_kcontrol *kcontrol,
  1313. struct snd_ctl_elem_info *uinfo)
  1314. {
  1315. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1316. uinfo->count = sizeof(struct snd_ice1712_eeprom);
  1317. return 0;
  1318. }
  1319. static int snd_vt1724_eeprom_get(struct snd_kcontrol *kcontrol,
  1320. struct snd_ctl_elem_value *ucontrol)
  1321. {
  1322. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1323. memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
  1324. return 0;
  1325. }
  1326. static struct snd_kcontrol_new snd_vt1724_eeprom __devinitdata = {
  1327. .iface = SNDRV_CTL_ELEM_IFACE_CARD,
  1328. .name = "ICE1724 EEPROM",
  1329. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1330. .info = snd_vt1724_eeprom_info,
  1331. .get = snd_vt1724_eeprom_get
  1332. };
  1333. /*
  1334. */
  1335. static int snd_vt1724_spdif_info(struct snd_kcontrol *kcontrol,
  1336. struct snd_ctl_elem_info *uinfo)
  1337. {
  1338. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1339. uinfo->count = 1;
  1340. return 0;
  1341. }
  1342. static unsigned int encode_spdif_bits(struct snd_aes_iec958 *diga)
  1343. {
  1344. unsigned int val, rbits;
  1345. val = diga->status[0] & 0x03; /* professional, non-audio */
  1346. if (val & 0x01) {
  1347. /* professional */
  1348. if ((diga->status[0] & IEC958_AES0_PRO_EMPHASIS) ==
  1349. IEC958_AES0_PRO_EMPHASIS_5015)
  1350. val |= 1U << 3;
  1351. rbits = (diga->status[4] >> 3) & 0x0f;
  1352. if (rbits) {
  1353. switch (rbits) {
  1354. case 2: val |= 5 << 12; break; /* 96k */
  1355. case 3: val |= 6 << 12; break; /* 192k */
  1356. case 10: val |= 4 << 12; break; /* 88.2k */
  1357. case 11: val |= 7 << 12; break; /* 176.4k */
  1358. }
  1359. } else {
  1360. switch (diga->status[0] & IEC958_AES0_PRO_FS) {
  1361. case IEC958_AES0_PRO_FS_44100:
  1362. break;
  1363. case IEC958_AES0_PRO_FS_32000:
  1364. val |= 3U << 12;
  1365. break;
  1366. default:
  1367. val |= 2U << 12;
  1368. break;
  1369. }
  1370. }
  1371. } else {
  1372. /* consumer */
  1373. val |= diga->status[1] & 0x04; /* copyright */
  1374. if ((diga->status[0] & IEC958_AES0_CON_EMPHASIS) ==
  1375. IEC958_AES0_CON_EMPHASIS_5015)
  1376. val |= 1U << 3;
  1377. val |= (unsigned int)(diga->status[1] & 0x3f) << 4; /* category */
  1378. val |= (unsigned int)(diga->status[3] & IEC958_AES3_CON_FS) << 12; /* fs */
  1379. }
  1380. return val;
  1381. }
  1382. static void decode_spdif_bits(struct snd_aes_iec958 *diga, unsigned int val)
  1383. {
  1384. memset(diga->status, 0, sizeof(diga->status));
  1385. diga->status[0] = val & 0x03; /* professional, non-audio */
  1386. if (val & 0x01) {
  1387. /* professional */
  1388. if (val & (1U << 3))
  1389. diga->status[0] |= IEC958_AES0_PRO_EMPHASIS_5015;
  1390. switch ((val >> 12) & 0x7) {
  1391. case 0:
  1392. break;
  1393. case 2:
  1394. diga->status[0] |= IEC958_AES0_PRO_FS_32000;
  1395. break;
  1396. default:
  1397. diga->status[0] |= IEC958_AES0_PRO_FS_48000;
  1398. break;
  1399. }
  1400. } else {
  1401. /* consumer */
  1402. diga->status[0] |= val & (1U << 2); /* copyright */
  1403. if (val & (1U << 3))
  1404. diga->status[0] |= IEC958_AES0_CON_EMPHASIS_5015;
  1405. diga->status[1] |= (val >> 4) & 0x3f; /* category */
  1406. diga->status[3] |= (val >> 12) & 0x07; /* fs */
  1407. }
  1408. }
  1409. static int snd_vt1724_spdif_default_get(struct snd_kcontrol *kcontrol,
  1410. struct snd_ctl_elem_value *ucontrol)
  1411. {
  1412. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1413. unsigned int val;
  1414. val = inw(ICEMT1724(ice, SPDIF_CTRL));
  1415. decode_spdif_bits(&ucontrol->value.iec958, val);
  1416. return 0;
  1417. }
  1418. static int snd_vt1724_spdif_default_put(struct snd_kcontrol *kcontrol,
  1419. struct snd_ctl_elem_value *ucontrol)
  1420. {
  1421. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1422. unsigned int val, old;
  1423. val = encode_spdif_bits(&ucontrol->value.iec958);
  1424. spin_lock_irq(&ice->reg_lock);
  1425. old = inw(ICEMT1724(ice, SPDIF_CTRL));
  1426. if (val != old)
  1427. update_spdif_bits(ice, val);
  1428. spin_unlock_irq(&ice->reg_lock);
  1429. return val != old;
  1430. }
  1431. static struct snd_kcontrol_new snd_vt1724_spdif_default __devinitdata =
  1432. {
  1433. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1434. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
  1435. .info = snd_vt1724_spdif_info,
  1436. .get = snd_vt1724_spdif_default_get,
  1437. .put = snd_vt1724_spdif_default_put
  1438. };
  1439. static int snd_vt1724_spdif_maskc_get(struct snd_kcontrol *kcontrol,
  1440. struct snd_ctl_elem_value *ucontrol)
  1441. {
  1442. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1443. IEC958_AES0_PROFESSIONAL |
  1444. IEC958_AES0_CON_NOT_COPYRIGHT |
  1445. IEC958_AES0_CON_EMPHASIS;
  1446. ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
  1447. IEC958_AES1_CON_CATEGORY;
  1448. ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
  1449. return 0;
  1450. }
  1451. static int snd_vt1724_spdif_maskp_get(struct snd_kcontrol *kcontrol,
  1452. struct snd_ctl_elem_value *ucontrol)
  1453. {
  1454. ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
  1455. IEC958_AES0_PROFESSIONAL |
  1456. IEC958_AES0_PRO_FS |
  1457. IEC958_AES0_PRO_EMPHASIS;
  1458. return 0;
  1459. }
  1460. static struct snd_kcontrol_new snd_vt1724_spdif_maskc __devinitdata =
  1461. {
  1462. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1463. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1464. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
  1465. .info = snd_vt1724_spdif_info,
  1466. .get = snd_vt1724_spdif_maskc_get,
  1467. };
  1468. static struct snd_kcontrol_new snd_vt1724_spdif_maskp __devinitdata =
  1469. {
  1470. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1471. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1472. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
  1473. .info = snd_vt1724_spdif_info,
  1474. .get = snd_vt1724_spdif_maskp_get,
  1475. };
  1476. #define snd_vt1724_spdif_sw_info snd_ctl_boolean_mono_info
  1477. static int snd_vt1724_spdif_sw_get(struct snd_kcontrol *kcontrol,
  1478. struct snd_ctl_elem_value *ucontrol)
  1479. {
  1480. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1481. ucontrol->value.integer.value[0] = inb(ICEREG1724(ice, SPDIF_CFG)) &
  1482. VT1724_CFG_SPDIF_OUT_EN ? 1 : 0;
  1483. return 0;
  1484. }
  1485. static int snd_vt1724_spdif_sw_put(struct snd_kcontrol *kcontrol,
  1486. struct snd_ctl_elem_value *ucontrol)
  1487. {
  1488. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1489. unsigned char old, val;
  1490. spin_lock_irq(&ice->reg_lock);
  1491. old = val = inb(ICEREG1724(ice, SPDIF_CFG));
  1492. val &= ~VT1724_CFG_SPDIF_OUT_EN;
  1493. if (ucontrol->value.integer.value[0])
  1494. val |= VT1724_CFG_SPDIF_OUT_EN;
  1495. if (old != val)
  1496. outb(val, ICEREG1724(ice, SPDIF_CFG));
  1497. spin_unlock_irq(&ice->reg_lock);
  1498. return old != val;
  1499. }
  1500. static struct snd_kcontrol_new snd_vt1724_spdif_switch __devinitdata =
  1501. {
  1502. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1503. /* FIXME: the following conflict with IEC958 Playback Route */
  1504. /* .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, SWITCH), */
  1505. .name = SNDRV_CTL_NAME_IEC958("Output ", NONE, SWITCH),
  1506. .info = snd_vt1724_spdif_sw_info,
  1507. .get = snd_vt1724_spdif_sw_get,
  1508. .put = snd_vt1724_spdif_sw_put
  1509. };
  1510. #if 0 /* NOT USED YET */
  1511. /*
  1512. * GPIO access from extern
  1513. */
  1514. #define snd_vt1724_gpio_info snd_ctl_boolean_mono_info
  1515. int snd_vt1724_gpio_get(struct snd_kcontrol *kcontrol,
  1516. struct snd_ctl_elem_value *ucontrol)
  1517. {
  1518. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1519. int shift = kcontrol->private_value & 0xff;
  1520. int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
  1521. snd_ice1712_save_gpio_status(ice);
  1522. ucontrol->value.integer.value[0] =
  1523. (snd_ice1712_gpio_read(ice) & (1 << shift) ? 1 : 0) ^ invert;
  1524. snd_ice1712_restore_gpio_status(ice);
  1525. return 0;
  1526. }
  1527. int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
  1528. struct snd_ctl_elem_value *ucontrol)
  1529. {
  1530. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1531. int shift = kcontrol->private_value & 0xff;
  1532. int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
  1533. unsigned int val, nval;
  1534. if (kcontrol->private_value & (1 << 31))
  1535. return -EPERM;
  1536. nval = (ucontrol->value.integer.value[0] ? (1 << shift) : 0) ^ invert;
  1537. snd_ice1712_save_gpio_status(ice);
  1538. val = snd_ice1712_gpio_read(ice);
  1539. nval |= val & ~(1 << shift);
  1540. if (val != nval)
  1541. snd_ice1712_gpio_write(ice, nval);
  1542. snd_ice1712_restore_gpio_status(ice);
  1543. return val != nval;
  1544. }
  1545. #endif /* NOT USED YET */
  1546. /*
  1547. * rate
  1548. */
  1549. static int snd_vt1724_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
  1550. struct snd_ctl_elem_info *uinfo)
  1551. {
  1552. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1553. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1554. uinfo->count = 1;
  1555. uinfo->value.enumerated.items = ice->hw_rates->count + 1;
  1556. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1557. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1558. if (uinfo->value.enumerated.item == uinfo->value.enumerated.items - 1)
  1559. strcpy(uinfo->value.enumerated.name, "IEC958 Input");
  1560. else
  1561. sprintf(uinfo->value.enumerated.name, "%d",
  1562. ice->hw_rates->list[uinfo->value.enumerated.item]);
  1563. return 0;
  1564. }
  1565. static int snd_vt1724_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
  1566. struct snd_ctl_elem_value *ucontrol)
  1567. {
  1568. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1569. unsigned int i, rate;
  1570. spin_lock_irq(&ice->reg_lock);
  1571. if (ice->is_spdif_master(ice)) {
  1572. ucontrol->value.enumerated.item[0] = ice->hw_rates->count;
  1573. } else {
  1574. rate = ice->get_rate(ice);
  1575. ucontrol->value.enumerated.item[0] = 0;
  1576. for (i = 0; i < ice->hw_rates->count; i++) {
  1577. if (ice->hw_rates->list[i] == rate) {
  1578. ucontrol->value.enumerated.item[0] = i;
  1579. break;
  1580. }
  1581. }
  1582. }
  1583. spin_unlock_irq(&ice->reg_lock);
  1584. return 0;
  1585. }
  1586. /* setting clock to external - SPDIF */
  1587. static void stdclock_set_spdif_clock(struct snd_ice1712 *ice)
  1588. {
  1589. unsigned char oval;
  1590. unsigned char i2s_oval;
  1591. oval = inb(ICEMT1724(ice, RATE));
  1592. outb(oval | VT1724_SPDIF_MASTER, ICEMT1724(ice, RATE));
  1593. /* setting 256fs */
  1594. i2s_oval = inb(ICEMT1724(ice, I2S_FORMAT));
  1595. outb(i2s_oval & ~VT1724_MT_I2S_MCLK_128X, ICEMT1724(ice, I2S_FORMAT));
  1596. }
  1597. static int snd_vt1724_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
  1598. struct snd_ctl_elem_value *ucontrol)
  1599. {
  1600. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1601. unsigned int old_rate, new_rate;
  1602. unsigned int item = ucontrol->value.enumerated.item[0];
  1603. unsigned int spdif = ice->hw_rates->count;
  1604. if (item > spdif)
  1605. return -EINVAL;
  1606. spin_lock_irq(&ice->reg_lock);
  1607. if (ice->is_spdif_master(ice))
  1608. old_rate = 0;
  1609. else
  1610. old_rate = ice->get_rate(ice);
  1611. if (item == spdif) {
  1612. /* switching to external clock via SPDIF */
  1613. ice->set_spdif_clock(ice);
  1614. new_rate = 0;
  1615. } else {
  1616. /* internal on-card clock */
  1617. new_rate = ice->hw_rates->list[item];
  1618. ice->pro_rate_default = new_rate;
  1619. spin_unlock_irq(&ice->reg_lock);
  1620. snd_vt1724_set_pro_rate(ice, ice->pro_rate_default, 1);
  1621. spin_lock_irq(&ice->reg_lock);
  1622. }
  1623. spin_unlock_irq(&ice->reg_lock);
  1624. /* the first reset to the SPDIF master mode? */
  1625. if (old_rate != new_rate && !new_rate) {
  1626. /* notify akm chips as well */
  1627. unsigned int i;
  1628. if (ice->gpio.set_pro_rate)
  1629. ice->gpio.set_pro_rate(ice, 0);
  1630. for (i = 0; i < ice->akm_codecs; i++) {
  1631. if (ice->akm[i].ops.set_rate_val)
  1632. ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
  1633. }
  1634. }
  1635. return old_rate != new_rate;
  1636. }
  1637. static struct snd_kcontrol_new snd_vt1724_pro_internal_clock __devinitdata = {
  1638. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1639. .name = "Multi Track Internal Clock",
  1640. .info = snd_vt1724_pro_internal_clock_info,
  1641. .get = snd_vt1724_pro_internal_clock_get,
  1642. .put = snd_vt1724_pro_internal_clock_put
  1643. };
  1644. #define snd_vt1724_pro_rate_locking_info snd_ctl_boolean_mono_info
  1645. static int snd_vt1724_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
  1646. struct snd_ctl_elem_value *ucontrol)
  1647. {
  1648. ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
  1649. return 0;
  1650. }
  1651. static int snd_vt1724_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
  1652. struct snd_ctl_elem_value *ucontrol)
  1653. {
  1654. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1655. int change = 0, nval;
  1656. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1657. spin_lock_irq(&ice->reg_lock);
  1658. change = PRO_RATE_LOCKED != nval;
  1659. PRO_RATE_LOCKED = nval;
  1660. spin_unlock_irq(&ice->reg_lock);
  1661. return change;
  1662. }
  1663. static struct snd_kcontrol_new snd_vt1724_pro_rate_locking __devinitdata = {
  1664. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1665. .name = "Multi Track Rate Locking",
  1666. .info = snd_vt1724_pro_rate_locking_info,
  1667. .get = snd_vt1724_pro_rate_locking_get,
  1668. .put = snd_vt1724_pro_rate_locking_put
  1669. };
  1670. #define snd_vt1724_pro_rate_reset_info snd_ctl_boolean_mono_info
  1671. static int snd_vt1724_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
  1672. struct snd_ctl_elem_value *ucontrol)
  1673. {
  1674. ucontrol->value.integer.value[0] = PRO_RATE_RESET ? 1 : 0;
  1675. return 0;
  1676. }
  1677. static int snd_vt1724_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
  1678. struct snd_ctl_elem_value *ucontrol)
  1679. {
  1680. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1681. int change = 0, nval;
  1682. nval = ucontrol->value.integer.value[0] ? 1 : 0;
  1683. spin_lock_irq(&ice->reg_lock);
  1684. change = PRO_RATE_RESET != nval;
  1685. PRO_RATE_RESET = nval;
  1686. spin_unlock_irq(&ice->reg_lock);
  1687. return change;
  1688. }
  1689. static struct snd_kcontrol_new snd_vt1724_pro_rate_reset __devinitdata = {
  1690. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1691. .name = "Multi Track Rate Reset",
  1692. .info = snd_vt1724_pro_rate_reset_info,
  1693. .get = snd_vt1724_pro_rate_reset_get,
  1694. .put = snd_vt1724_pro_rate_reset_put
  1695. };
  1696. /*
  1697. * routing
  1698. */
  1699. static int snd_vt1724_pro_route_info(struct snd_kcontrol *kcontrol,
  1700. struct snd_ctl_elem_info *uinfo)
  1701. {
  1702. static char *texts[] = {
  1703. "PCM Out", /* 0 */
  1704. "H/W In 0", "H/W In 1", /* 1-2 */
  1705. "IEC958 In L", "IEC958 In R", /* 3-4 */
  1706. };
  1707. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1708. uinfo->count = 1;
  1709. uinfo->value.enumerated.items = 5;
  1710. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1711. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1712. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1713. return 0;
  1714. }
  1715. static inline int analog_route_shift(int idx)
  1716. {
  1717. return (idx % 2) * 12 + ((idx / 2) * 3) + 8;
  1718. }
  1719. static inline int digital_route_shift(int idx)
  1720. {
  1721. return idx * 3;
  1722. }
  1723. static int get_route_val(struct snd_ice1712 *ice, int shift)
  1724. {
  1725. unsigned long val;
  1726. unsigned char eitem;
  1727. static const unsigned char xlate[8] = {
  1728. 0, 255, 1, 2, 255, 255, 3, 4,
  1729. };
  1730. val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1731. val >>= shift;
  1732. val &= 7; /* we now have 3 bits per output */
  1733. eitem = xlate[val];
  1734. if (eitem == 255) {
  1735. snd_BUG();
  1736. return 0;
  1737. }
  1738. return eitem;
  1739. }
  1740. static int put_route_val(struct snd_ice1712 *ice, unsigned int val, int shift)
  1741. {
  1742. unsigned int old_val, nval;
  1743. int change;
  1744. static const unsigned char xroute[8] = {
  1745. 0, /* PCM */
  1746. 2, /* PSDIN0 Left */
  1747. 3, /* PSDIN0 Right */
  1748. 6, /* SPDIN Left */
  1749. 7, /* SPDIN Right */
  1750. };
  1751. nval = xroute[val % 5];
  1752. val = old_val = inl(ICEMT1724(ice, ROUTE_PLAYBACK));
  1753. val &= ~(0x07 << shift);
  1754. val |= nval << shift;
  1755. change = val != old_val;
  1756. if (change)
  1757. outl(val, ICEMT1724(ice, ROUTE_PLAYBACK));
  1758. return change;
  1759. }
  1760. static int snd_vt1724_pro_route_analog_get(struct snd_kcontrol *kcontrol,
  1761. struct snd_ctl_elem_value *ucontrol)
  1762. {
  1763. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1764. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1765. ucontrol->value.enumerated.item[0] =
  1766. get_route_val(ice, analog_route_shift(idx));
  1767. return 0;
  1768. }
  1769. static int snd_vt1724_pro_route_analog_put(struct snd_kcontrol *kcontrol,
  1770. struct snd_ctl_elem_value *ucontrol)
  1771. {
  1772. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1773. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1774. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1775. analog_route_shift(idx));
  1776. }
  1777. static int snd_vt1724_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
  1778. struct snd_ctl_elem_value *ucontrol)
  1779. {
  1780. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1781. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1782. ucontrol->value.enumerated.item[0] =
  1783. get_route_val(ice, digital_route_shift(idx));
  1784. return 0;
  1785. }
  1786. static int snd_vt1724_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
  1787. struct snd_ctl_elem_value *ucontrol)
  1788. {
  1789. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1790. int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1791. return put_route_val(ice, ucontrol->value.enumerated.item[0],
  1792. digital_route_shift(idx));
  1793. }
  1794. static struct snd_kcontrol_new snd_vt1724_mixer_pro_analog_route __devinitdata = {
  1795. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1796. .name = "H/W Playback Route",
  1797. .info = snd_vt1724_pro_route_info,
  1798. .get = snd_vt1724_pro_route_analog_get,
  1799. .put = snd_vt1724_pro_route_analog_put,
  1800. };
  1801. static struct snd_kcontrol_new snd_vt1724_mixer_pro_spdif_route __devinitdata = {
  1802. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1803. .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
  1804. .info = snd_vt1724_pro_route_info,
  1805. .get = snd_vt1724_pro_route_spdif_get,
  1806. .put = snd_vt1724_pro_route_spdif_put,
  1807. .count = 2,
  1808. };
  1809. static int snd_vt1724_pro_peak_info(struct snd_kcontrol *kcontrol,
  1810. struct snd_ctl_elem_info *uinfo)
  1811. {
  1812. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1813. uinfo->count = 22; /* FIXME: for compatibility with ice1712... */
  1814. uinfo->value.integer.min = 0;
  1815. uinfo->value.integer.max = 255;
  1816. return 0;
  1817. }
  1818. static int snd_vt1724_pro_peak_get(struct snd_kcontrol *kcontrol,
  1819. struct snd_ctl_elem_value *ucontrol)
  1820. {
  1821. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1822. int idx;
  1823. spin_lock_irq(&ice->reg_lock);
  1824. for (idx = 0; idx < 22; idx++) {
  1825. outb(idx, ICEMT1724(ice, MONITOR_PEAKINDEX));
  1826. ucontrol->value.integer.value[idx] =
  1827. inb(ICEMT1724(ice, MONITOR_PEAKDATA));
  1828. }
  1829. spin_unlock_irq(&ice->reg_lock);
  1830. return 0;
  1831. }
  1832. static struct snd_kcontrol_new snd_vt1724_mixer_pro_peak __devinitdata = {
  1833. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1834. .name = "Multi Track Peak",
  1835. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1836. .info = snd_vt1724_pro_peak_info,
  1837. .get = snd_vt1724_pro_peak_get
  1838. };
  1839. /*
  1840. *
  1841. */
  1842. static struct snd_ice1712_card_info no_matched __devinitdata;
  1843. static struct snd_ice1712_card_info *card_tables[] __devinitdata = {
  1844. snd_vt1724_revo_cards,
  1845. snd_vt1724_amp_cards,
  1846. snd_vt1724_aureon_cards,
  1847. snd_vt1720_mobo_cards,
  1848. snd_vt1720_pontis_cards,
  1849. snd_vt1724_prodigy_hifi_cards,
  1850. snd_vt1724_prodigy192_cards,
  1851. snd_vt1724_juli_cards,
  1852. snd_vt1724_phase_cards,
  1853. snd_vt1724_wtm_cards,
  1854. snd_vt1724_se_cards,
  1855. NULL,
  1856. };
  1857. /*
  1858. */
  1859. static void wait_i2c_busy(struct snd_ice1712 *ice)
  1860. {
  1861. int t = 0x10000;
  1862. while ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_BUSY) && t--)
  1863. ;
  1864. if (t == -1)
  1865. printk(KERN_ERR "ice1724: i2c busy timeout\n");
  1866. }
  1867. unsigned char snd_vt1724_read_i2c(struct snd_ice1712 *ice,
  1868. unsigned char dev, unsigned char addr)
  1869. {
  1870. unsigned char val;
  1871. mutex_lock(&ice->i2c_mutex);
  1872. wait_i2c_busy(ice);
  1873. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1874. outb(dev & ~VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1875. wait_i2c_busy(ice);
  1876. val = inb(ICEREG1724(ice, I2C_DATA));
  1877. mutex_unlock(&ice->i2c_mutex);
  1878. /*
  1879. printk(KERN_DEBUG "i2c_read: [0x%x,0x%x] = 0x%x\n", dev, addr, val);
  1880. */
  1881. return val;
  1882. }
  1883. void snd_vt1724_write_i2c(struct snd_ice1712 *ice,
  1884. unsigned char dev, unsigned char addr, unsigned char data)
  1885. {
  1886. mutex_lock(&ice->i2c_mutex);
  1887. wait_i2c_busy(ice);
  1888. /*
  1889. printk(KERN_DEBUG "i2c_write: [0x%x,0x%x] = 0x%x\n", dev, addr, data);
  1890. */
  1891. outb(addr, ICEREG1724(ice, I2C_BYTE_ADDR));
  1892. outb(data, ICEREG1724(ice, I2C_DATA));
  1893. outb(dev | VT1724_I2C_WRITE, ICEREG1724(ice, I2C_DEV_ADDR));
  1894. wait_i2c_busy(ice);
  1895. mutex_unlock(&ice->i2c_mutex);
  1896. }
  1897. static int __devinit snd_vt1724_read_eeprom(struct snd_ice1712 *ice,
  1898. const char *modelname)
  1899. {
  1900. const int dev = 0xa0; /* EEPROM device address */
  1901. unsigned int i, size;
  1902. struct snd_ice1712_card_info * const *tbl, *c;
  1903. if (!modelname || !*modelname) {
  1904. ice->eeprom.subvendor = 0;
  1905. if ((inb(ICEREG1724(ice, I2C_CTRL)) & VT1724_I2C_EEPROM) != 0)
  1906. ice->eeprom.subvendor =
  1907. (snd_vt1724_read_i2c(ice, dev, 0x00) << 0) |
  1908. (snd_vt1724_read_i2c(ice, dev, 0x01) << 8) |
  1909. (snd_vt1724_read_i2c(ice, dev, 0x02) << 16) |
  1910. (snd_vt1724_read_i2c(ice, dev, 0x03) << 24);
  1911. if (ice->eeprom.subvendor == 0 ||
  1912. ice->eeprom.subvendor == (unsigned int)-1) {
  1913. /* invalid subvendor from EEPROM, try the PCI
  1914. * subststem ID instead
  1915. */
  1916. u16 vendor, device;
  1917. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID,
  1918. &vendor);
  1919. pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
  1920. ice->eeprom.subvendor =
  1921. ((unsigned int)swab16(vendor) << 16) | swab16(device);
  1922. if (ice->eeprom.subvendor == 0 ||
  1923. ice->eeprom.subvendor == (unsigned int)-1) {
  1924. printk(KERN_ERR "ice1724: No valid ID is found\n");
  1925. return -ENXIO;
  1926. }
  1927. }
  1928. }
  1929. for (tbl = card_tables; *tbl; tbl++) {
  1930. for (c = *tbl; c->subvendor; c++) {
  1931. if (modelname && c->model &&
  1932. !strcmp(modelname, c->model)) {
  1933. printk(KERN_INFO "ice1724: Using board model %s\n",
  1934. c->name);
  1935. ice->eeprom.subvendor = c->subvendor;
  1936. } else if (c->subvendor != ice->eeprom.subvendor)
  1937. continue;
  1938. if (!c->eeprom_size || !c->eeprom_data)
  1939. goto found;
  1940. /* if the EEPROM is given by the driver, use it */
  1941. snd_printdd("using the defined eeprom..\n");
  1942. ice->eeprom.version = 2;
  1943. ice->eeprom.size = c->eeprom_size + 6;
  1944. memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
  1945. goto read_skipped;
  1946. }
  1947. }
  1948. printk(KERN_WARNING "ice1724: No matching model found for ID 0x%x\n",
  1949. ice->eeprom.subvendor);
  1950. found:
  1951. ice->eeprom.size = snd_vt1724_read_i2c(ice, dev, 0x04);
  1952. if (ice->eeprom.size < 6)
  1953. ice->eeprom.size = 32;
  1954. else if (ice->eeprom.size > 32) {
  1955. printk(KERN_ERR "ice1724: Invalid EEPROM (size = %i)\n",
  1956. ice->eeprom.size);
  1957. return -EIO;
  1958. }
  1959. ice->eeprom.version = snd_vt1724_read_i2c(ice, dev, 0x05);
  1960. if (ice->eeprom.version != 2)
  1961. printk(KERN_WARNING "ice1724: Invalid EEPROM version %i\n",
  1962. ice->eeprom.version);
  1963. size = ice->eeprom.size - 6;
  1964. for (i = 0; i < size; i++)
  1965. ice->eeprom.data[i] = snd_vt1724_read_i2c(ice, dev, i + 6);
  1966. read_skipped:
  1967. ice->eeprom.gpiomask = eeprom_triple(ice, ICE_EEP2_GPIO_MASK);
  1968. ice->eeprom.gpiostate = eeprom_triple(ice, ICE_EEP2_GPIO_STATE);
  1969. ice->eeprom.gpiodir = eeprom_triple(ice, ICE_EEP2_GPIO_DIR);
  1970. return 0;
  1971. }
  1972. static void __devinit snd_vt1724_chip_reset(struct snd_ice1712 *ice)
  1973. {
  1974. outb(VT1724_RESET , ICEREG1724(ice, CONTROL));
  1975. msleep(10);
  1976. outb(0, ICEREG1724(ice, CONTROL));
  1977. msleep(10);
  1978. }
  1979. static int __devinit snd_vt1724_chip_init(struct snd_ice1712 *ice)
  1980. {
  1981. outb(ice->eeprom.data[ICE_EEP2_SYSCONF], ICEREG1724(ice, SYS_CFG));
  1982. outb(ice->eeprom.data[ICE_EEP2_ACLINK], ICEREG1724(ice, AC97_CFG));
  1983. outb(ice->eeprom.data[ICE_EEP2_I2S], ICEREG1724(ice, I2S_FEATURES));
  1984. outb(ice->eeprom.data[ICE_EEP2_SPDIF], ICEREG1724(ice, SPDIF_CFG));
  1985. ice->gpio.write_mask = ice->eeprom.gpiomask;
  1986. ice->gpio.direction = ice->eeprom.gpiodir;
  1987. snd_vt1724_set_gpio_mask(ice, ice->eeprom.gpiomask);
  1988. snd_vt1724_set_gpio_dir(ice, ice->eeprom.gpiodir);
  1989. snd_vt1724_set_gpio_data(ice, ice->eeprom.gpiostate);
  1990. outb(0, ICEREG1724(ice, POWERDOWN));
  1991. return 0;
  1992. }
  1993. static int __devinit snd_vt1724_spdif_build_controls(struct snd_ice1712 *ice)
  1994. {
  1995. int err;
  1996. struct snd_kcontrol *kctl;
  1997. if (snd_BUG_ON(!ice->pcm))
  1998. return -EIO;
  1999. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_spdif_route, ice));
  2000. if (err < 0)
  2001. return err;
  2002. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_spdif_switch, ice));
  2003. if (err < 0)
  2004. return err;
  2005. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_default, ice));
  2006. if (err < 0)
  2007. return err;
  2008. kctl->id.device = ice->pcm->device;
  2009. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskc, ice));
  2010. if (err < 0)
  2011. return err;
  2012. kctl->id.device = ice->pcm->device;
  2013. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_maskp, ice));
  2014. if (err < 0)
  2015. return err;
  2016. kctl->id.device = ice->pcm->device;
  2017. #if 0 /* use default only */
  2018. err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_vt1724_spdif_stream, ice));
  2019. if (err < 0)
  2020. return err;
  2021. kctl->id.device = ice->pcm->device;
  2022. ice->spdif.stream_ctl = kctl;
  2023. #endif
  2024. return 0;
  2025. }
  2026. static int __devinit snd_vt1724_build_controls(struct snd_ice1712 *ice)
  2027. {
  2028. int err;
  2029. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_eeprom, ice));
  2030. if (err < 0)
  2031. return err;
  2032. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_internal_clock, ice));
  2033. if (err < 0)
  2034. return err;
  2035. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_locking, ice));
  2036. if (err < 0)
  2037. return err;
  2038. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_pro_rate_reset, ice));
  2039. if (err < 0)
  2040. return err;
  2041. if (ice->num_total_dacs > 0) {
  2042. struct snd_kcontrol_new tmp = snd_vt1724_mixer_pro_analog_route;
  2043. tmp.count = ice->num_total_dacs;
  2044. if (ice->vt1720 && tmp.count > 2)
  2045. tmp.count = 2;
  2046. err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
  2047. if (err < 0)
  2048. return err;
  2049. }
  2050. err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_vt1724_mixer_pro_peak, ice));
  2051. if (err < 0)
  2052. return err;
  2053. return 0;
  2054. }
  2055. static int snd_vt1724_free(struct snd_ice1712 *ice)
  2056. {
  2057. if (!ice->port)
  2058. goto __hw_end;
  2059. /* mask all interrupts */
  2060. outb(0xff, ICEMT1724(ice, DMA_INT_MASK));
  2061. outb(0xff, ICEREG1724(ice, IRQMASK));
  2062. /* --- */
  2063. __hw_end:
  2064. if (ice->irq >= 0)
  2065. free_irq(ice->irq, ice);
  2066. pci_release_regions(ice->pci);
  2067. snd_ice1712_akm4xxx_free(ice);
  2068. pci_disable_device(ice->pci);
  2069. kfree(ice->spec);
  2070. kfree(ice);
  2071. return 0;
  2072. }
  2073. static int snd_vt1724_dev_free(struct snd_device *device)
  2074. {
  2075. struct snd_ice1712 *ice = device->device_data;
  2076. return snd_vt1724_free(ice);
  2077. }
  2078. static int __devinit snd_vt1724_create(struct snd_card *card,
  2079. struct pci_dev *pci,
  2080. const char *modelname,
  2081. struct snd_ice1712 **r_ice1712)
  2082. {
  2083. struct snd_ice1712 *ice;
  2084. int err;
  2085. static struct snd_device_ops ops = {
  2086. .dev_free = snd_vt1724_dev_free,
  2087. };
  2088. *r_ice1712 = NULL;
  2089. /* enable PCI device */
  2090. err = pci_enable_device(pci);
  2091. if (err < 0)
  2092. return err;
  2093. ice = kzalloc(sizeof(*ice), GFP_KERNEL);
  2094. if (ice == NULL) {
  2095. pci_disable_device(pci);
  2096. return -ENOMEM;
  2097. }
  2098. ice->vt1724 = 1;
  2099. spin_lock_init(&ice->reg_lock);
  2100. mutex_init(&ice->gpio_mutex);
  2101. mutex_init(&ice->open_mutex);
  2102. mutex_init(&ice->i2c_mutex);
  2103. ice->gpio.set_mask = snd_vt1724_set_gpio_mask;
  2104. ice->gpio.set_dir = snd_vt1724_set_gpio_dir;
  2105. ice->gpio.set_data = snd_vt1724_set_gpio_data;
  2106. ice->gpio.get_data = snd_vt1724_get_gpio_data;
  2107. ice->card = card;
  2108. ice->pci = pci;
  2109. ice->irq = -1;
  2110. pci_set_master(pci);
  2111. snd_vt1724_proc_init(ice);
  2112. synchronize_irq(pci->irq);
  2113. err = pci_request_regions(pci, "ICE1724");
  2114. if (err < 0) {
  2115. kfree(ice);
  2116. pci_disable_device(pci);
  2117. return err;
  2118. }
  2119. ice->port = pci_resource_start(pci, 0);
  2120. ice->profi_port = pci_resource_start(pci, 1);
  2121. if (request_irq(pci->irq, snd_vt1724_interrupt,
  2122. IRQF_SHARED, "ICE1724", ice)) {
  2123. snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
  2124. snd_vt1724_free(ice);
  2125. return -EIO;
  2126. }
  2127. ice->irq = pci->irq;
  2128. snd_vt1724_chip_reset(ice);
  2129. if (snd_vt1724_read_eeprom(ice, modelname) < 0) {
  2130. snd_vt1724_free(ice);
  2131. return -EIO;
  2132. }
  2133. if (snd_vt1724_chip_init(ice) < 0) {
  2134. snd_vt1724_free(ice);
  2135. return -EIO;
  2136. }
  2137. /* MPU_RX and TX irq masks are cleared later dynamically */
  2138. outb(VT1724_IRQ_MPU_RX | VT1724_IRQ_MPU_TX , ICEREG1724(ice, IRQMASK));
  2139. /* don't handle FIFO overrun/underruns (just yet),
  2140. * since they cause machine lockups
  2141. */
  2142. outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
  2143. err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
  2144. if (err < 0) {
  2145. snd_vt1724_free(ice);
  2146. return err;
  2147. }
  2148. snd_card_set_dev(card, &pci->dev);
  2149. *r_ice1712 = ice;
  2150. return 0;
  2151. }
  2152. /*
  2153. *
  2154. * Registration
  2155. *
  2156. */
  2157. static int __devinit snd_vt1724_probe(struct pci_dev *pci,
  2158. const struct pci_device_id *pci_id)
  2159. {
  2160. static int dev;
  2161. struct snd_card *card;
  2162. struct snd_ice1712 *ice;
  2163. int pcm_dev = 0, err;
  2164. struct snd_ice1712_card_info * const *tbl, *c;
  2165. if (dev >= SNDRV_CARDS)
  2166. return -ENODEV;
  2167. if (!enable[dev]) {
  2168. dev++;
  2169. return -ENOENT;
  2170. }
  2171. err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
  2172. if (err < 0)
  2173. return err;
  2174. strcpy(card->driver, "ICE1724");
  2175. strcpy(card->shortname, "ICEnsemble ICE1724");
  2176. err = snd_vt1724_create(card, pci, model[dev], &ice);
  2177. if (err < 0) {
  2178. snd_card_free(card);
  2179. return err;
  2180. }
  2181. for (tbl = card_tables; *tbl; tbl++) {
  2182. for (c = *tbl; c->subvendor; c++) {
  2183. if (c->subvendor == ice->eeprom.subvendor) {
  2184. strcpy(card->shortname, c->name);
  2185. if (c->driver) /* specific driver? */
  2186. strcpy(card->driver, c->driver);
  2187. if (c->chip_init) {
  2188. err = c->chip_init(ice);
  2189. if (err < 0) {
  2190. snd_card_free(card);
  2191. return err;
  2192. }
  2193. }
  2194. goto __found;
  2195. }
  2196. }
  2197. }
  2198. c = &no_matched;
  2199. __found:
  2200. /*
  2201. * VT1724 has separate DMAs for the analog and the SPDIF streams while
  2202. * ICE1712 has only one for both (mixed up).
  2203. *
  2204. * Confusingly the analog PCM is named "professional" here because it
  2205. * was called so in ice1712 driver, and vt1724 driver is derived from
  2206. * ice1712 driver.
  2207. */
  2208. ice->pro_rate_default = PRO_RATE_DEFAULT;
  2209. if (!ice->is_spdif_master)
  2210. ice->is_spdif_master = stdclock_is_spdif_master;
  2211. if (!ice->get_rate)
  2212. ice->get_rate = stdclock_get_rate;
  2213. if (!ice->set_rate)
  2214. ice->set_rate = stdclock_set_rate;
  2215. if (!ice->set_mclk)
  2216. ice->set_mclk = stdclock_set_mclk;
  2217. if (!ice->set_spdif_clock)
  2218. ice->set_spdif_clock = stdclock_set_spdif_clock;
  2219. if (!ice->hw_rates)
  2220. set_std_hw_rates(ice);
  2221. err = snd_vt1724_pcm_profi(ice, pcm_dev++);
  2222. if (err < 0) {
  2223. snd_card_free(card);
  2224. return err;
  2225. }
  2226. err = snd_vt1724_pcm_spdif(ice, pcm_dev++);
  2227. if (err < 0) {
  2228. snd_card_free(card);
  2229. return err;
  2230. }
  2231. err = snd_vt1724_pcm_indep(ice, pcm_dev++);
  2232. if (err < 0) {
  2233. snd_card_free(card);
  2234. return err;
  2235. }
  2236. err = snd_vt1724_ac97_mixer(ice);
  2237. if (err < 0) {
  2238. snd_card_free(card);
  2239. return err;
  2240. }
  2241. err = snd_vt1724_build_controls(ice);
  2242. if (err < 0) {
  2243. snd_card_free(card);
  2244. return err;
  2245. }
  2246. if (ice->pcm && ice->has_spdif) { /* has SPDIF I/O */
  2247. err = snd_vt1724_spdif_build_controls(ice);
  2248. if (err < 0) {
  2249. snd_card_free(card);
  2250. return err;
  2251. }
  2252. }
  2253. if (c->build_controls) {
  2254. err = c->build_controls(ice);
  2255. if (err < 0) {
  2256. snd_card_free(card);
  2257. return err;
  2258. }
  2259. }
  2260. if (!c->no_mpu401) {
  2261. if (ice->eeprom.data[ICE_EEP2_SYSCONF] & VT1724_CFG_MPU401) {
  2262. struct snd_rawmidi *rmidi;
  2263. err = snd_rawmidi_new(card, "MIDI", 0, 1, 1, &rmidi);
  2264. if (err < 0) {
  2265. snd_card_free(card);
  2266. return err;
  2267. }
  2268. ice->rmidi[0] = rmidi;
  2269. rmidi->private_data = ice;
  2270. strcpy(rmidi->name, "ICE1724 MIDI");
  2271. rmidi->info_flags = SNDRV_RAWMIDI_INFO_OUTPUT |
  2272. SNDRV_RAWMIDI_INFO_INPUT |
  2273. SNDRV_RAWMIDI_INFO_DUPLEX;
  2274. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT,
  2275. &vt1724_midi_output_ops);
  2276. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT,
  2277. &vt1724_midi_input_ops);
  2278. /* set watermarks */
  2279. outb(VT1724_MPU_RX_FIFO | 0x1,
  2280. ICEREG1724(ice, MPU_FIFO_WM));
  2281. outb(0x1, ICEREG1724(ice, MPU_FIFO_WM));
  2282. /* set UART mode */
  2283. outb(VT1724_MPU_UART, ICEREG1724(ice, MPU_CTRL));
  2284. }
  2285. }
  2286. sprintf(card->longname, "%s at 0x%lx, irq %i",
  2287. card->shortname, ice->port, ice->irq);
  2288. err = snd_card_register(card);
  2289. if (err < 0) {
  2290. snd_card_free(card);
  2291. return err;
  2292. }
  2293. pci_set_drvdata(pci, card);
  2294. dev++;
  2295. return 0;
  2296. }
  2297. static void __devexit snd_vt1724_remove(struct pci_dev *pci)
  2298. {
  2299. snd_card_free(pci_get_drvdata(pci));
  2300. pci_set_drvdata(pci, NULL);
  2301. }
  2302. static struct pci_driver driver = {
  2303. .name = "ICE1724",
  2304. .id_table = snd_vt1724_ids,
  2305. .probe = snd_vt1724_probe,
  2306. .remove = __devexit_p(snd_vt1724_remove),
  2307. };
  2308. static int __init alsa_card_ice1724_init(void)
  2309. {
  2310. return pci_register_driver(&driver);
  2311. }
  2312. static void __exit alsa_card_ice1724_exit(void)
  2313. {
  2314. pci_unregister_driver(&driver);
  2315. }
  2316. module_init(alsa_card_ice1724_init)
  2317. module_exit(alsa_card_ice1724_exit)