ab8500.h 4.5 KB

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  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. *
  4. * License Terms: GNU General Public License v2
  5. * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
  6. */
  7. #ifndef MFD_AB8500_H
  8. #define MFD_AB8500_H
  9. #include <linux/device.h>
  10. /*
  11. * AB8500 bank addresses
  12. */
  13. #define AB8500_SYS_CTRL1_BLOCK 0x1
  14. #define AB8500_SYS_CTRL2_BLOCK 0x2
  15. #define AB8500_REGU_CTRL1 0x3
  16. #define AB8500_REGU_CTRL2 0x4
  17. #define AB8500_USB 0x5
  18. #define AB8500_TVOUT 0x6
  19. #define AB8500_DBI 0x7
  20. #define AB8500_ECI_AV_ACC 0x8
  21. #define AB8500_RESERVED 0x9
  22. #define AB8500_GPADC 0xA
  23. #define AB8500_CHARGER 0xB
  24. #define AB8500_GAS_GAUGE 0xC
  25. #define AB8500_AUDIO 0xD
  26. #define AB8500_INTERRUPT 0xE
  27. #define AB8500_RTC 0xF
  28. #define AB8500_MISC 0x10
  29. #define AB8500_DEBUG 0x12
  30. #define AB8500_PROD_TEST 0x13
  31. #define AB8500_OTP_EMUL 0x15
  32. /*
  33. * Interrupts
  34. */
  35. #define AB8500_INT_MAIN_EXT_CH_NOT_OK 0
  36. #define AB8500_INT_UN_PLUG_TV_DET 1
  37. #define AB8500_INT_PLUG_TV_DET 2
  38. #define AB8500_INT_TEMP_WARM 3
  39. #define AB8500_INT_PON_KEY2DB_F 4
  40. #define AB8500_INT_PON_KEY2DB_R 5
  41. #define AB8500_INT_PON_KEY1DB_F 6
  42. #define AB8500_INT_PON_KEY1DB_R 7
  43. #define AB8500_INT_BATT_OVV 8
  44. #define AB8500_INT_MAIN_CH_UNPLUG_DET 10
  45. #define AB8500_INT_MAIN_CH_PLUG_DET 11
  46. #define AB8500_INT_USB_ID_DET_F 12
  47. #define AB8500_INT_USB_ID_DET_R 13
  48. #define AB8500_INT_VBUS_DET_F 14
  49. #define AB8500_INT_VBUS_DET_R 15
  50. #define AB8500_INT_VBUS_CH_DROP_END 16
  51. #define AB8500_INT_RTC_60S 17
  52. #define AB8500_INT_RTC_ALARM 18
  53. #define AB8500_INT_BAT_CTRL_INDB 20
  54. #define AB8500_INT_CH_WD_EXP 21
  55. #define AB8500_INT_VBUS_OVV 22
  56. #define AB8500_INT_MAIN_CH_DROP_END 23
  57. #define AB8500_INT_CCN_CONV_ACC 24
  58. #define AB8500_INT_INT_AUD 25
  59. #define AB8500_INT_CCEOC 26
  60. #define AB8500_INT_CC_INT_CALIB 27
  61. #define AB8500_INT_LOW_BAT_F 28
  62. #define AB8500_INT_LOW_BAT_R 29
  63. #define AB8500_INT_BUP_CHG_NOT_OK 30
  64. #define AB8500_INT_BUP_CHG_OK 31
  65. #define AB8500_INT_GP_HW_ADC_CONV_END 32
  66. #define AB8500_INT_ACC_DETECT_1DB_F 33
  67. #define AB8500_INT_ACC_DETECT_1DB_R 34
  68. #define AB8500_INT_ACC_DETECT_22DB_F 35
  69. #define AB8500_INT_ACC_DETECT_22DB_R 36
  70. #define AB8500_INT_ACC_DETECT_21DB_F 37
  71. #define AB8500_INT_ACC_DETECT_21DB_R 38
  72. #define AB8500_INT_GP_SW_ADC_CONV_END 39
  73. #define AB8500_INT_ADP_SOURCE_ERROR 72
  74. #define AB8500_INT_ADP_SINK_ERROR 73
  75. #define AB8500_INT_ADP_PROBE_PLUG 74
  76. #define AB8500_INT_ADP_PROBE_UNPLUG 75
  77. #define AB8500_INT_ADP_SENSE_OFF 76
  78. #define AB8500_INT_USB_PHY_POWER_ERR 78
  79. #define AB8500_INT_USB_LINK_STATUS 79
  80. #define AB8500_INT_BTEMP_LOW 80
  81. #define AB8500_INT_BTEMP_LOW_MEDIUM 81
  82. #define AB8500_INT_BTEMP_MEDIUM_HIGH 82
  83. #define AB8500_INT_BTEMP_HIGH 83
  84. #define AB8500_INT_USB_CHARGER_NOT_OK 89
  85. #define AB8500_INT_ID_WAKEUP_R 90
  86. #define AB8500_INT_ID_DET_R1R 92
  87. #define AB8500_INT_ID_DET_R2R 93
  88. #define AB8500_INT_ID_DET_R3R 94
  89. #define AB8500_INT_ID_DET_R4R 95
  90. #define AB8500_INT_ID_WAKEUP_F 96
  91. #define AB8500_INT_ID_DET_R1F 98
  92. #define AB8500_INT_ID_DET_R2F 99
  93. #define AB8500_INT_ID_DET_R3F 100
  94. #define AB8500_INT_ID_DET_R4F 101
  95. #define AB8500_INT_USB_CHG_DET_DONE 102
  96. #define AB8500_INT_USB_CH_TH_PROT_F 104
  97. #define AB8500_INT_USB_CH_TH_PROT_R 105
  98. #define AB8500_INT_MAIN_CH_TH_PROT_F 106
  99. #define AB8500_INT_MAIN_CH_TH_PROT_R 107
  100. #define AB8500_INT_USB_CHARGER_NOT_OKF 111
  101. #define AB8500_NR_IRQS 112
  102. #define AB8500_NUM_IRQ_REGS 14
  103. /**
  104. * struct ab8500 - ab8500 internal structure
  105. * @dev: parent device
  106. * @lock: read/write operations lock
  107. * @irq_lock: genirq bus lock
  108. * @revision: chip revision
  109. * @irq: irq line
  110. * @write: register write
  111. * @read: register read
  112. * @rx_buf: rx buf for SPI
  113. * @tx_buf: tx buf for SPI
  114. * @mask: cache of IRQ regs for bus lock
  115. * @oldmask: cache of previous IRQ regs for bus lock
  116. */
  117. struct ab8500 {
  118. struct device *dev;
  119. struct mutex lock;
  120. struct mutex irq_lock;
  121. int revision;
  122. int irq_base;
  123. int irq;
  124. u8 chip_id;
  125. int (*write) (struct ab8500 *a8500, u16 addr, u8 data);
  126. int (*read) (struct ab8500 *a8500, u16 addr);
  127. unsigned long tx_buf[4];
  128. unsigned long rx_buf[4];
  129. u8 mask[AB8500_NUM_IRQ_REGS];
  130. u8 oldmask[AB8500_NUM_IRQ_REGS];
  131. };
  132. struct regulator_init_data;
  133. /**
  134. * struct ab8500_platform_data - AB8500 platform data
  135. * @irq_base: start of AB8500 IRQs, AB8500_NR_IRQS will be used
  136. * @init: board-specific initialization after detection of ab8500
  137. * @regulator: machine-specific constraints for regulators
  138. */
  139. struct ab8500_platform_data {
  140. int irq_base;
  141. void (*init) (struct ab8500 *);
  142. int num_regulator;
  143. struct regulator_init_data *regulator;
  144. };
  145. extern int __devinit ab8500_init(struct ab8500 *ab8500);
  146. extern int __devexit ab8500_exit(struct ab8500 *ab8500);
  147. #endif /* MFD_AB8500_H */