omap2430.c 12 KB

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  1. /*
  2. * Copyright (C) 2005-2007 by Texas Instruments
  3. * Some code has been taken from tusb6010.c
  4. * Copyrights for that are attributable to:
  5. * Copyright (C) 2006 Nokia Corporation
  6. * Tony Lindgren <tony@atomide.com>
  7. *
  8. * This file is part of the Inventra Controller Driver for Linux.
  9. *
  10. * The Inventra Controller Driver for Linux is free software; you
  11. * can redistribute it and/or modify it under the terms of the GNU
  12. * General Public License version 2 as published by the Free Software
  13. * Foundation.
  14. *
  15. * The Inventra Controller Driver for Linux is distributed in
  16. * the hope that it will be useful, but WITHOUT ANY WARRANTY;
  17. * without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
  19. * License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with The Inventra Controller Driver for Linux ; if not,
  23. * write to the Free Software Foundation, Inc., 59 Temple Place,
  24. * Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <linux/module.h>
  28. #include <linux/kernel.h>
  29. #include <linux/sched.h>
  30. #include <linux/init.h>
  31. #include <linux/list.h>
  32. #include <linux/clk.h>
  33. #include <linux/io.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/dma-mapping.h>
  36. #include "musb_core.h"
  37. #include "omap2430.h"
  38. struct omap2430_glue {
  39. struct device *dev;
  40. struct platform_device *musb;
  41. struct clk *clk;
  42. };
  43. #define glue_to_musb(g) platform_get_drvdata(g->musb)
  44. static struct timer_list musb_idle_timer;
  45. static void musb_do_idle(unsigned long _musb)
  46. {
  47. struct musb *musb = (void *)_musb;
  48. unsigned long flags;
  49. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  50. u8 power;
  51. #endif
  52. u8 devctl;
  53. spin_lock_irqsave(&musb->lock, flags);
  54. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  55. switch (musb->xceiv->state) {
  56. case OTG_STATE_A_WAIT_BCON:
  57. devctl &= ~MUSB_DEVCTL_SESSION;
  58. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  59. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  60. if (devctl & MUSB_DEVCTL_BDEVICE) {
  61. musb->xceiv->state = OTG_STATE_B_IDLE;
  62. MUSB_DEV_MODE(musb);
  63. } else {
  64. musb->xceiv->state = OTG_STATE_A_IDLE;
  65. MUSB_HST_MODE(musb);
  66. }
  67. break;
  68. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  69. case OTG_STATE_A_SUSPEND:
  70. /* finish RESUME signaling? */
  71. if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
  72. power = musb_readb(musb->mregs, MUSB_POWER);
  73. power &= ~MUSB_POWER_RESUME;
  74. DBG(1, "root port resume stopped, power %02x\n", power);
  75. musb_writeb(musb->mregs, MUSB_POWER, power);
  76. musb->is_active = 1;
  77. musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  78. | MUSB_PORT_STAT_RESUME);
  79. musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  80. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  81. /* NOTE: it might really be A_WAIT_BCON ... */
  82. musb->xceiv->state = OTG_STATE_A_HOST;
  83. }
  84. break;
  85. #endif
  86. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  87. case OTG_STATE_A_HOST:
  88. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  89. if (devctl & MUSB_DEVCTL_BDEVICE)
  90. musb->xceiv->state = OTG_STATE_B_IDLE;
  91. else
  92. musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
  93. #endif
  94. default:
  95. break;
  96. }
  97. spin_unlock_irqrestore(&musb->lock, flags);
  98. }
  99. static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
  100. {
  101. unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
  102. static unsigned long last_timer;
  103. if (timeout == 0)
  104. timeout = default_timeout;
  105. /* Never idle if active, or when VBUS timeout is not set as host */
  106. if (musb->is_active || ((musb->a_wait_bcon == 0)
  107. && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
  108. DBG(4, "%s active, deleting timer\n", otg_state_string(musb));
  109. del_timer(&musb_idle_timer);
  110. last_timer = jiffies;
  111. return;
  112. }
  113. if (time_after(last_timer, timeout)) {
  114. if (!timer_pending(&musb_idle_timer))
  115. last_timer = timeout;
  116. else {
  117. DBG(4, "Longer idle timer already pending, ignoring\n");
  118. return;
  119. }
  120. }
  121. last_timer = timeout;
  122. DBG(4, "%s inactive, for idle timer for %lu ms\n",
  123. otg_state_string(musb),
  124. (unsigned long)jiffies_to_msecs(timeout - jiffies));
  125. mod_timer(&musb_idle_timer, timeout);
  126. }
  127. static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
  128. {
  129. u8 devctl;
  130. /* HDRC controls CPEN, but beware current surges during device
  131. * connect. They can trigger transient overcurrent conditions
  132. * that must be ignored.
  133. */
  134. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  135. if (is_on) {
  136. musb->is_active = 1;
  137. musb->xceiv->default_a = 1;
  138. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  139. devctl |= MUSB_DEVCTL_SESSION;
  140. MUSB_HST_MODE(musb);
  141. } else {
  142. musb->is_active = 0;
  143. /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
  144. * jumping right to B_IDLE...
  145. */
  146. musb->xceiv->default_a = 0;
  147. musb->xceiv->state = OTG_STATE_B_IDLE;
  148. devctl &= ~MUSB_DEVCTL_SESSION;
  149. MUSB_DEV_MODE(musb);
  150. }
  151. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  152. DBG(1, "VBUS %s, devctl %02x "
  153. /* otg %3x conf %08x prcm %08x */ "\n",
  154. otg_state_string(musb),
  155. musb_readb(musb->mregs, MUSB_DEVCTL));
  156. }
  157. static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
  158. {
  159. u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  160. devctl |= MUSB_DEVCTL_SESSION;
  161. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  162. return 0;
  163. }
  164. static inline void omap2430_low_level_exit(struct musb *musb)
  165. {
  166. u32 l;
  167. /* in any role */
  168. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  169. l |= ENABLEFORCE; /* enable MSTANDBY */
  170. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  171. l = musb_readl(musb->mregs, OTG_SYSCONFIG);
  172. l |= ENABLEWAKEUP; /* enable wakeup */
  173. musb_writel(musb->mregs, OTG_SYSCONFIG, l);
  174. }
  175. static inline void omap2430_low_level_init(struct musb *musb)
  176. {
  177. u32 l;
  178. l = musb_readl(musb->mregs, OTG_SYSCONFIG);
  179. l &= ~ENABLEWAKEUP; /* disable wakeup */
  180. musb_writel(musb->mregs, OTG_SYSCONFIG, l);
  181. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  182. l &= ~ENABLEFORCE; /* disable MSTANDBY */
  183. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  184. }
  185. static int omap2430_musb_init(struct musb *musb)
  186. {
  187. u32 l;
  188. struct device *dev = musb->controller;
  189. struct musb_hdrc_platform_data *plat = dev->platform_data;
  190. struct omap_musb_board_data *data = plat->board_data;
  191. /* We require some kind of external transceiver, hooked
  192. * up through ULPI. TWL4030-family PMICs include one,
  193. * which needs a driver, drivers aren't always needed.
  194. */
  195. musb->xceiv = otg_get_transceiver();
  196. if (!musb->xceiv) {
  197. pr_err("HS USB OTG: no transceiver configured\n");
  198. return -ENODEV;
  199. }
  200. omap2430_low_level_init(musb);
  201. l = musb_readl(musb->mregs, OTG_SYSCONFIG);
  202. l &= ~ENABLEWAKEUP; /* disable wakeup */
  203. l &= ~NOSTDBY; /* remove possible nostdby */
  204. l |= SMARTSTDBY; /* enable smart standby */
  205. l &= ~AUTOIDLE; /* disable auto idle */
  206. l &= ~NOIDLE; /* remove possible noidle */
  207. l |= SMARTIDLE; /* enable smart idle */
  208. /*
  209. * MUSB AUTOIDLE don't work in 3430.
  210. * Workaround by Richard Woodruff/TI
  211. */
  212. if (!cpu_is_omap3430())
  213. l |= AUTOIDLE; /* enable auto idle */
  214. musb_writel(musb->mregs, OTG_SYSCONFIG, l);
  215. l = musb_readl(musb->mregs, OTG_INTERFSEL);
  216. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  217. /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
  218. l &= ~ULPI_12PIN; /* Disable ULPI */
  219. l |= UTMI_8BIT; /* Enable UTMI */
  220. } else {
  221. l |= ULPI_12PIN;
  222. }
  223. musb_writel(musb->mregs, OTG_INTERFSEL, l);
  224. pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
  225. "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
  226. musb_readl(musb->mregs, OTG_REVISION),
  227. musb_readl(musb->mregs, OTG_SYSCONFIG),
  228. musb_readl(musb->mregs, OTG_SYSSTATUS),
  229. musb_readl(musb->mregs, OTG_INTERFSEL),
  230. musb_readl(musb->mregs, OTG_SIMENABLE));
  231. setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
  232. return 0;
  233. }
  234. static int omap2430_musb_exit(struct musb *musb)
  235. {
  236. omap2430_low_level_exit(musb);
  237. otg_put_transceiver(musb->xceiv);
  238. return 0;
  239. }
  240. static const struct musb_platform_ops omap2430_ops = {
  241. .init = omap2430_musb_init,
  242. .exit = omap2430_musb_exit,
  243. .set_mode = omap2430_musb_set_mode,
  244. .try_idle = omap2430_musb_try_idle,
  245. .set_vbus = omap2430_musb_set_vbus,
  246. };
  247. static u64 omap2430_dmamask = DMA_BIT_MASK(32);
  248. static int __init omap2430_probe(struct platform_device *pdev)
  249. {
  250. struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
  251. struct platform_device *musb;
  252. struct omap2430_glue *glue;
  253. struct clk *clk;
  254. int ret = -ENOMEM;
  255. glue = kzalloc(sizeof(*glue), GFP_KERNEL);
  256. if (!glue) {
  257. dev_err(&pdev->dev, "failed to allocate glue context\n");
  258. goto err0;
  259. }
  260. musb = platform_device_alloc("musb-hdrc", -1);
  261. if (!musb) {
  262. dev_err(&pdev->dev, "failed to allocate musb device\n");
  263. goto err1;
  264. }
  265. clk = clk_get(&pdev->dev, "ick");
  266. if (IS_ERR(clk)) {
  267. dev_err(&pdev->dev, "failed to get clock\n");
  268. ret = PTR_ERR(clk);
  269. goto err2;
  270. }
  271. ret = clk_enable(clk);
  272. if (ret) {
  273. dev_err(&pdev->dev, "failed to enable clock\n");
  274. goto err3;
  275. }
  276. musb->dev.parent = &pdev->dev;
  277. musb->dev.dma_mask = &omap2430_dmamask;
  278. musb->dev.coherent_dma_mask = omap2430_dmamask;
  279. glue->dev = &pdev->dev;
  280. glue->musb = musb;
  281. glue->clk = clk;
  282. pdata->platform_ops = &omap2430_ops;
  283. platform_set_drvdata(pdev, glue);
  284. ret = platform_device_add_resources(musb, pdev->resource,
  285. pdev->num_resources);
  286. if (ret) {
  287. dev_err(&pdev->dev, "failed to add resources\n");
  288. goto err4;
  289. }
  290. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  291. if (ret) {
  292. dev_err(&pdev->dev, "failed to add platform_data\n");
  293. goto err4;
  294. }
  295. ret = platform_device_add(musb);
  296. if (ret) {
  297. dev_err(&pdev->dev, "failed to register musb device\n");
  298. goto err4;
  299. }
  300. return 0;
  301. err4:
  302. clk_disable(clk);
  303. err3:
  304. clk_put(clk);
  305. err2:
  306. platform_device_put(musb);
  307. err1:
  308. kfree(glue);
  309. err0:
  310. return ret;
  311. }
  312. static int __exit omap2430_remove(struct platform_device *pdev)
  313. {
  314. struct omap2430_glue *glue = platform_get_drvdata(pdev);
  315. platform_device_del(glue->musb);
  316. platform_device_put(glue->musb);
  317. clk_disable(glue->clk);
  318. clk_put(glue->clk);
  319. kfree(glue);
  320. return 0;
  321. }
  322. #ifdef CONFIG_PM
  323. static void omap2430_save_context(struct musb *musb)
  324. {
  325. musb->context.otg_sysconfig = musb_readl(musb->mregs, OTG_SYSCONFIG);
  326. musb->context.otg_forcestandby = musb_readl(musb->mregs, OTG_FORCESTDBY);
  327. }
  328. static void omap2430_restore_context(struct musb *musb)
  329. {
  330. musb_writel(musb->mregs, OTG_SYSCONFIG, musb->context.otg_sysconfig);
  331. musb_writel(musb->mregs, OTG_FORCESTDBY, musb->context.otg_forcestandby);
  332. }
  333. static int omap2430_suspend(struct device *dev)
  334. {
  335. struct omap2430_glue *glue = dev_get_drvdata(dev);
  336. struct musb *musb = glue_to_musb(glue);
  337. omap2430_low_level_exit(musb);
  338. otg_set_suspend(musb->xceiv, 1);
  339. omap2430_save_context(musb);
  340. clk_disable(glue->clk);
  341. return 0;
  342. }
  343. static int omap2430_resume(struct device *dev)
  344. {
  345. struct omap2430_glue *glue = dev_get_drvdata(dev);
  346. struct musb *musb = glue_to_musb(glue);
  347. int ret;
  348. ret = clk_enable(glue->clk);
  349. if (ret) {
  350. dev_err(dev, "faled to enable clock\n");
  351. return ret;
  352. }
  353. omap2430_low_level_init(musb);
  354. omap2430_restore_context(musb);
  355. otg_set_suspend(musb->xceiv, 0);
  356. return 0;
  357. }
  358. static struct dev_pm_ops omap2430_pm_ops = {
  359. .suspend = omap2430_suspend,
  360. .resume = omap2430_resume,
  361. };
  362. #define DEV_PM_OPS (&omap2430_pm_ops)
  363. #else
  364. #define DEV_PM_OPS NULL
  365. #endif
  366. static struct platform_driver omap2430_driver = {
  367. .remove = __exit_p(omap2430_remove),
  368. .driver = {
  369. .name = "musb-omap2430",
  370. .pm = DEV_PM_OPS,
  371. },
  372. };
  373. MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
  374. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  375. MODULE_LICENSE("GPL v2");
  376. static int __init omap2430_init(void)
  377. {
  378. return platform_driver_probe(&omap2430_driver, omap2430_probe);
  379. }
  380. subsys_initcall(omap2430_init);
  381. static void __exit omap2430_exit(void)
  382. {
  383. platform_driver_unregister(&omap2430_driver);
  384. }
  385. module_exit(omap2430_exit);