sunsu.c 38 KB

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  1. /*
  2. * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
  3. *
  4. * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
  5. * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
  6. *
  7. * This is mainly a variation of 8250.c, credits go to authors mentioned
  8. * therein. In fact this driver should be merged into the generic 8250.c
  9. * infrastructure perhaps using a 8250_sparc.c module.
  10. *
  11. * Fixed to use tty_get_baud_rate().
  12. * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  13. *
  14. * Converted to new 2.5.x UART layer.
  15. * David S. Miller (davem@davemloft.net), 2002-Jul-29
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/errno.h>
  21. #include <linux/tty.h>
  22. #include <linux/tty_flip.h>
  23. #include <linux/major.h>
  24. #include <linux/string.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/ioport.h>
  27. #include <linux/circ_buf.h>
  28. #include <linux/serial.h>
  29. #include <linux/sysrq.h>
  30. #include <linux/console.h>
  31. #include <linux/slab.h>
  32. #ifdef CONFIG_SERIO
  33. #include <linux/serio.h>
  34. #endif
  35. #include <linux/serial_reg.h>
  36. #include <linux/init.h>
  37. #include <linux/delay.h>
  38. #include <linux/of_device.h>
  39. #include <asm/io.h>
  40. #include <asm/irq.h>
  41. #include <asm/prom.h>
  42. #include <asm/setup.h>
  43. #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  44. #define SUPPORT_SYSRQ
  45. #endif
  46. #include <linux/serial_core.h>
  47. #include <linux/sunserialcore.h>
  48. /* We are on a NS PC87303 clocked with 24.0 MHz, which results
  49. * in a UART clock of 1.8462 MHz.
  50. */
  51. #define SU_BASE_BAUD (1846200 / 16)
  52. enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  53. static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  54. struct serial_uart_config {
  55. char *name;
  56. int dfl_xmit_fifo_size;
  57. int flags;
  58. };
  59. /*
  60. * Here we define the default xmit fifo size used for each type of UART.
  61. */
  62. static const struct serial_uart_config uart_config[] = {
  63. { "unknown", 1, 0 },
  64. { "8250", 1, 0 },
  65. { "16450", 1, 0 },
  66. { "16550", 1, 0 },
  67. { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
  68. { "Cirrus", 1, 0 },
  69. { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
  70. { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  71. { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
  72. { "Startech", 1, 0 },
  73. { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
  74. { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  75. { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  76. { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
  77. };
  78. struct uart_sunsu_port {
  79. struct uart_port port;
  80. unsigned char acr;
  81. unsigned char ier;
  82. unsigned short rev;
  83. unsigned char lcr;
  84. unsigned int lsr_break_flag;
  85. unsigned int cflag;
  86. /* Probing information. */
  87. enum su_type su_type;
  88. unsigned int type_probed; /* XXX Stupid */
  89. unsigned long reg_size;
  90. #ifdef CONFIG_SERIO
  91. struct serio serio;
  92. int serio_open;
  93. #endif
  94. };
  95. static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
  96. {
  97. offset <<= up->port.regshift;
  98. switch (up->port.iotype) {
  99. case UPIO_HUB6:
  100. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  101. return inb(up->port.iobase + 1);
  102. case UPIO_MEM:
  103. return readb(up->port.membase + offset);
  104. default:
  105. return inb(up->port.iobase + offset);
  106. }
  107. }
  108. static void serial_out(struct uart_sunsu_port *up, int offset, int value)
  109. {
  110. #ifndef CONFIG_SPARC64
  111. /*
  112. * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
  113. * connected with a gate then go to SlavIO. When IRQ4 goes tristated
  114. * gate outputs a logical one. Since we use level triggered interrupts
  115. * we have lockup and watchdog reset. We cannot mask IRQ because
  116. * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
  117. * This problem is similar to what Alpha people suffer, see serial.c.
  118. */
  119. if (offset == UART_MCR)
  120. value |= UART_MCR_OUT2;
  121. #endif
  122. offset <<= up->port.regshift;
  123. switch (up->port.iotype) {
  124. case UPIO_HUB6:
  125. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  126. outb(value, up->port.iobase + 1);
  127. break;
  128. case UPIO_MEM:
  129. writeb(value, up->port.membase + offset);
  130. break;
  131. default:
  132. outb(value, up->port.iobase + offset);
  133. }
  134. }
  135. /*
  136. * We used to support using pause I/O for certain machines. We
  137. * haven't supported this for a while, but just in case it's badly
  138. * needed for certain old 386 machines, I've left these #define's
  139. * in....
  140. */
  141. #define serial_inp(up, offset) serial_in(up, offset)
  142. #define serial_outp(up, offset, value) serial_out(up, offset, value)
  143. /*
  144. * For the 16C950
  145. */
  146. static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
  147. {
  148. serial_out(up, UART_SCR, offset);
  149. serial_out(up, UART_ICR, value);
  150. }
  151. #if 0 /* Unused currently */
  152. static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
  153. {
  154. unsigned int value;
  155. serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
  156. serial_out(up, UART_SCR, offset);
  157. value = serial_in(up, UART_ICR);
  158. serial_icr_write(up, UART_ACR, up->acr);
  159. return value;
  160. }
  161. #endif
  162. #ifdef CONFIG_SERIAL_8250_RSA
  163. /*
  164. * Attempts to turn on the RSA FIFO. Returns zero on failure.
  165. * We set the port uart clock rate if we succeed.
  166. */
  167. static int __enable_rsa(struct uart_sunsu_port *up)
  168. {
  169. unsigned char mode;
  170. int result;
  171. mode = serial_inp(up, UART_RSA_MSR);
  172. result = mode & UART_RSA_MSR_FIFO;
  173. if (!result) {
  174. serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
  175. mode = serial_inp(up, UART_RSA_MSR);
  176. result = mode & UART_RSA_MSR_FIFO;
  177. }
  178. if (result)
  179. up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
  180. return result;
  181. }
  182. static void enable_rsa(struct uart_sunsu_port *up)
  183. {
  184. if (up->port.type == PORT_RSA) {
  185. if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
  186. spin_lock_irq(&up->port.lock);
  187. __enable_rsa(up);
  188. spin_unlock_irq(&up->port.lock);
  189. }
  190. if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
  191. serial_outp(up, UART_RSA_FRR, 0);
  192. }
  193. }
  194. /*
  195. * Attempts to turn off the RSA FIFO. Returns zero on failure.
  196. * It is unknown why interrupts were disabled in here. However,
  197. * the caller is expected to preserve this behaviour by grabbing
  198. * the spinlock before calling this function.
  199. */
  200. static void disable_rsa(struct uart_sunsu_port *up)
  201. {
  202. unsigned char mode;
  203. int result;
  204. if (up->port.type == PORT_RSA &&
  205. up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
  206. spin_lock_irq(&up->port.lock);
  207. mode = serial_inp(up, UART_RSA_MSR);
  208. result = !(mode & UART_RSA_MSR_FIFO);
  209. if (!result) {
  210. serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
  211. mode = serial_inp(up, UART_RSA_MSR);
  212. result = !(mode & UART_RSA_MSR_FIFO);
  213. }
  214. if (result)
  215. up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
  216. spin_unlock_irq(&up->port.lock);
  217. }
  218. }
  219. #endif /* CONFIG_SERIAL_8250_RSA */
  220. static inline void __stop_tx(struct uart_sunsu_port *p)
  221. {
  222. if (p->ier & UART_IER_THRI) {
  223. p->ier &= ~UART_IER_THRI;
  224. serial_out(p, UART_IER, p->ier);
  225. }
  226. }
  227. static void sunsu_stop_tx(struct uart_port *port)
  228. {
  229. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  230. __stop_tx(up);
  231. /*
  232. * We really want to stop the transmitter from sending.
  233. */
  234. if (up->port.type == PORT_16C950) {
  235. up->acr |= UART_ACR_TXDIS;
  236. serial_icr_write(up, UART_ACR, up->acr);
  237. }
  238. }
  239. static void sunsu_start_tx(struct uart_port *port)
  240. {
  241. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  242. if (!(up->ier & UART_IER_THRI)) {
  243. up->ier |= UART_IER_THRI;
  244. serial_out(up, UART_IER, up->ier);
  245. }
  246. /*
  247. * Re-enable the transmitter if we disabled it.
  248. */
  249. if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
  250. up->acr &= ~UART_ACR_TXDIS;
  251. serial_icr_write(up, UART_ACR, up->acr);
  252. }
  253. }
  254. static void sunsu_stop_rx(struct uart_port *port)
  255. {
  256. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  257. up->ier &= ~UART_IER_RLSI;
  258. up->port.read_status_mask &= ~UART_LSR_DR;
  259. serial_out(up, UART_IER, up->ier);
  260. }
  261. static void sunsu_enable_ms(struct uart_port *port)
  262. {
  263. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  264. unsigned long flags;
  265. spin_lock_irqsave(&up->port.lock, flags);
  266. up->ier |= UART_IER_MSI;
  267. serial_out(up, UART_IER, up->ier);
  268. spin_unlock_irqrestore(&up->port.lock, flags);
  269. }
  270. static struct tty_struct *
  271. receive_chars(struct uart_sunsu_port *up, unsigned char *status)
  272. {
  273. struct tty_port *port = &up->port.state->port;
  274. struct tty_struct *tty = port->tty;
  275. unsigned char ch, flag;
  276. int max_count = 256;
  277. int saw_console_brk = 0;
  278. do {
  279. ch = serial_inp(up, UART_RX);
  280. flag = TTY_NORMAL;
  281. up->port.icount.rx++;
  282. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  283. UART_LSR_FE | UART_LSR_OE))) {
  284. /*
  285. * For statistics only
  286. */
  287. if (*status & UART_LSR_BI) {
  288. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  289. up->port.icount.brk++;
  290. if (up->port.cons != NULL &&
  291. up->port.line == up->port.cons->index)
  292. saw_console_brk = 1;
  293. /*
  294. * We do the SysRQ and SAK checking
  295. * here because otherwise the break
  296. * may get masked by ignore_status_mask
  297. * or read_status_mask.
  298. */
  299. if (uart_handle_break(&up->port))
  300. goto ignore_char;
  301. } else if (*status & UART_LSR_PE)
  302. up->port.icount.parity++;
  303. else if (*status & UART_LSR_FE)
  304. up->port.icount.frame++;
  305. if (*status & UART_LSR_OE)
  306. up->port.icount.overrun++;
  307. /*
  308. * Mask off conditions which should be ingored.
  309. */
  310. *status &= up->port.read_status_mask;
  311. if (up->port.cons != NULL &&
  312. up->port.line == up->port.cons->index) {
  313. /* Recover the break flag from console xmit */
  314. *status |= up->lsr_break_flag;
  315. up->lsr_break_flag = 0;
  316. }
  317. if (*status & UART_LSR_BI) {
  318. flag = TTY_BREAK;
  319. } else if (*status & UART_LSR_PE)
  320. flag = TTY_PARITY;
  321. else if (*status & UART_LSR_FE)
  322. flag = TTY_FRAME;
  323. }
  324. if (uart_handle_sysrq_char(&up->port, ch))
  325. goto ignore_char;
  326. if ((*status & up->port.ignore_status_mask) == 0)
  327. tty_insert_flip_char(port, ch, flag);
  328. if (*status & UART_LSR_OE)
  329. /*
  330. * Overrun is special, since it's reported
  331. * immediately, and doesn't affect the current
  332. * character.
  333. */
  334. tty_insert_flip_char(port, 0, TTY_OVERRUN);
  335. ignore_char:
  336. *status = serial_inp(up, UART_LSR);
  337. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  338. if (saw_console_brk)
  339. sun_do_break();
  340. return tty;
  341. }
  342. static void transmit_chars(struct uart_sunsu_port *up)
  343. {
  344. struct circ_buf *xmit = &up->port.state->xmit;
  345. int count;
  346. if (up->port.x_char) {
  347. serial_outp(up, UART_TX, up->port.x_char);
  348. up->port.icount.tx++;
  349. up->port.x_char = 0;
  350. return;
  351. }
  352. if (uart_tx_stopped(&up->port)) {
  353. sunsu_stop_tx(&up->port);
  354. return;
  355. }
  356. if (uart_circ_empty(xmit)) {
  357. __stop_tx(up);
  358. return;
  359. }
  360. count = up->port.fifosize;
  361. do {
  362. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  363. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  364. up->port.icount.tx++;
  365. if (uart_circ_empty(xmit))
  366. break;
  367. } while (--count > 0);
  368. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  369. uart_write_wakeup(&up->port);
  370. if (uart_circ_empty(xmit))
  371. __stop_tx(up);
  372. }
  373. static void check_modem_status(struct uart_sunsu_port *up)
  374. {
  375. int status;
  376. status = serial_in(up, UART_MSR);
  377. if ((status & UART_MSR_ANY_DELTA) == 0)
  378. return;
  379. if (status & UART_MSR_TERI)
  380. up->port.icount.rng++;
  381. if (status & UART_MSR_DDSR)
  382. up->port.icount.dsr++;
  383. if (status & UART_MSR_DDCD)
  384. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  385. if (status & UART_MSR_DCTS)
  386. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  387. wake_up_interruptible(&up->port.state->port.delta_msr_wait);
  388. }
  389. static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
  390. {
  391. struct uart_sunsu_port *up = dev_id;
  392. unsigned long flags;
  393. unsigned char status;
  394. spin_lock_irqsave(&up->port.lock, flags);
  395. do {
  396. struct tty_struct *tty;
  397. status = serial_inp(up, UART_LSR);
  398. tty = NULL;
  399. if (status & UART_LSR_DR)
  400. tty = receive_chars(up, &status);
  401. check_modem_status(up);
  402. if (status & UART_LSR_THRE)
  403. transmit_chars(up);
  404. spin_unlock_irqrestore(&up->port.lock, flags);
  405. if (tty)
  406. tty_flip_buffer_push(tty);
  407. spin_lock_irqsave(&up->port.lock, flags);
  408. } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
  409. spin_unlock_irqrestore(&up->port.lock, flags);
  410. return IRQ_HANDLED;
  411. }
  412. /* Separate interrupt handling path for keyboard/mouse ports. */
  413. static void
  414. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  415. unsigned int iflag, unsigned int quot);
  416. static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
  417. {
  418. unsigned int cur_cflag = up->cflag;
  419. int quot, new_baud;
  420. up->cflag &= ~CBAUD;
  421. up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
  422. quot = up->port.uartclk / (16 * new_baud);
  423. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  424. }
  425. static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
  426. {
  427. do {
  428. unsigned char ch = serial_inp(up, UART_RX);
  429. /* Stop-A is handled by drivers/char/keyboard.c now. */
  430. if (up->su_type == SU_PORT_KBD) {
  431. #ifdef CONFIG_SERIO
  432. serio_interrupt(&up->serio, ch, 0);
  433. #endif
  434. } else if (up->su_type == SU_PORT_MS) {
  435. int ret = suncore_mouse_baud_detection(ch, is_break);
  436. switch (ret) {
  437. case 2:
  438. sunsu_change_mouse_baud(up);
  439. /* fallthru */
  440. case 1:
  441. break;
  442. case 0:
  443. #ifdef CONFIG_SERIO
  444. serio_interrupt(&up->serio, ch, 0);
  445. #endif
  446. break;
  447. };
  448. }
  449. } while (serial_in(up, UART_LSR) & UART_LSR_DR);
  450. }
  451. static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
  452. {
  453. struct uart_sunsu_port *up = dev_id;
  454. if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
  455. unsigned char status = serial_inp(up, UART_LSR);
  456. if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
  457. receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
  458. }
  459. return IRQ_HANDLED;
  460. }
  461. static unsigned int sunsu_tx_empty(struct uart_port *port)
  462. {
  463. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  464. unsigned long flags;
  465. unsigned int ret;
  466. spin_lock_irqsave(&up->port.lock, flags);
  467. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  468. spin_unlock_irqrestore(&up->port.lock, flags);
  469. return ret;
  470. }
  471. static unsigned int sunsu_get_mctrl(struct uart_port *port)
  472. {
  473. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  474. unsigned char status;
  475. unsigned int ret;
  476. status = serial_in(up, UART_MSR);
  477. ret = 0;
  478. if (status & UART_MSR_DCD)
  479. ret |= TIOCM_CAR;
  480. if (status & UART_MSR_RI)
  481. ret |= TIOCM_RNG;
  482. if (status & UART_MSR_DSR)
  483. ret |= TIOCM_DSR;
  484. if (status & UART_MSR_CTS)
  485. ret |= TIOCM_CTS;
  486. return ret;
  487. }
  488. static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
  489. {
  490. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  491. unsigned char mcr = 0;
  492. if (mctrl & TIOCM_RTS)
  493. mcr |= UART_MCR_RTS;
  494. if (mctrl & TIOCM_DTR)
  495. mcr |= UART_MCR_DTR;
  496. if (mctrl & TIOCM_OUT1)
  497. mcr |= UART_MCR_OUT1;
  498. if (mctrl & TIOCM_OUT2)
  499. mcr |= UART_MCR_OUT2;
  500. if (mctrl & TIOCM_LOOP)
  501. mcr |= UART_MCR_LOOP;
  502. serial_out(up, UART_MCR, mcr);
  503. }
  504. static void sunsu_break_ctl(struct uart_port *port, int break_state)
  505. {
  506. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  507. unsigned long flags;
  508. spin_lock_irqsave(&up->port.lock, flags);
  509. if (break_state == -1)
  510. up->lcr |= UART_LCR_SBC;
  511. else
  512. up->lcr &= ~UART_LCR_SBC;
  513. serial_out(up, UART_LCR, up->lcr);
  514. spin_unlock_irqrestore(&up->port.lock, flags);
  515. }
  516. static int sunsu_startup(struct uart_port *port)
  517. {
  518. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  519. unsigned long flags;
  520. int retval;
  521. if (up->port.type == PORT_16C950) {
  522. /* Wake up and initialize UART */
  523. up->acr = 0;
  524. serial_outp(up, UART_LCR, 0xBF);
  525. serial_outp(up, UART_EFR, UART_EFR_ECB);
  526. serial_outp(up, UART_IER, 0);
  527. serial_outp(up, UART_LCR, 0);
  528. serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
  529. serial_outp(up, UART_LCR, 0xBF);
  530. serial_outp(up, UART_EFR, UART_EFR_ECB);
  531. serial_outp(up, UART_LCR, 0);
  532. }
  533. #ifdef CONFIG_SERIAL_8250_RSA
  534. /*
  535. * If this is an RSA port, see if we can kick it up to the
  536. * higher speed clock.
  537. */
  538. enable_rsa(up);
  539. #endif
  540. /*
  541. * Clear the FIFO buffers and disable them.
  542. * (they will be reenabled in set_termios())
  543. */
  544. if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
  545. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  546. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  547. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  548. serial_outp(up, UART_FCR, 0);
  549. }
  550. /*
  551. * Clear the interrupt registers.
  552. */
  553. (void) serial_inp(up, UART_LSR);
  554. (void) serial_inp(up, UART_RX);
  555. (void) serial_inp(up, UART_IIR);
  556. (void) serial_inp(up, UART_MSR);
  557. /*
  558. * At this point, there's no way the LSR could still be 0xff;
  559. * if it is, then bail out, because there's likely no UART
  560. * here.
  561. */
  562. if (!(up->port.flags & UPF_BUGGY_UART) &&
  563. (serial_inp(up, UART_LSR) == 0xff)) {
  564. printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
  565. return -ENODEV;
  566. }
  567. if (up->su_type != SU_PORT_PORT) {
  568. retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
  569. IRQF_SHARED, su_typev[up->su_type], up);
  570. } else {
  571. retval = request_irq(up->port.irq, sunsu_serial_interrupt,
  572. IRQF_SHARED, su_typev[up->su_type], up);
  573. }
  574. if (retval) {
  575. printk("su: Cannot register IRQ %d\n", up->port.irq);
  576. return retval;
  577. }
  578. /*
  579. * Now, initialize the UART
  580. */
  581. serial_outp(up, UART_LCR, UART_LCR_WLEN8);
  582. spin_lock_irqsave(&up->port.lock, flags);
  583. up->port.mctrl |= TIOCM_OUT2;
  584. sunsu_set_mctrl(&up->port, up->port.mctrl);
  585. spin_unlock_irqrestore(&up->port.lock, flags);
  586. /*
  587. * Finally, enable interrupts. Note: Modem status interrupts
  588. * are set via set_termios(), which will be occurring imminently
  589. * anyway, so we don't enable them here.
  590. */
  591. up->ier = UART_IER_RLSI | UART_IER_RDI;
  592. serial_outp(up, UART_IER, up->ier);
  593. if (up->port.flags & UPF_FOURPORT) {
  594. unsigned int icp;
  595. /*
  596. * Enable interrupts on the AST Fourport board
  597. */
  598. icp = (up->port.iobase & 0xfe0) | 0x01f;
  599. outb_p(0x80, icp);
  600. (void) inb_p(icp);
  601. }
  602. /*
  603. * And clear the interrupt registers again for luck.
  604. */
  605. (void) serial_inp(up, UART_LSR);
  606. (void) serial_inp(up, UART_RX);
  607. (void) serial_inp(up, UART_IIR);
  608. (void) serial_inp(up, UART_MSR);
  609. return 0;
  610. }
  611. static void sunsu_shutdown(struct uart_port *port)
  612. {
  613. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  614. unsigned long flags;
  615. /*
  616. * Disable interrupts from this port
  617. */
  618. up->ier = 0;
  619. serial_outp(up, UART_IER, 0);
  620. spin_lock_irqsave(&up->port.lock, flags);
  621. if (up->port.flags & UPF_FOURPORT) {
  622. /* reset interrupts on the AST Fourport board */
  623. inb((up->port.iobase & 0xfe0) | 0x1f);
  624. up->port.mctrl |= TIOCM_OUT1;
  625. } else
  626. up->port.mctrl &= ~TIOCM_OUT2;
  627. sunsu_set_mctrl(&up->port, up->port.mctrl);
  628. spin_unlock_irqrestore(&up->port.lock, flags);
  629. /*
  630. * Disable break condition and FIFOs
  631. */
  632. serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
  633. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  634. UART_FCR_CLEAR_RCVR |
  635. UART_FCR_CLEAR_XMIT);
  636. serial_outp(up, UART_FCR, 0);
  637. #ifdef CONFIG_SERIAL_8250_RSA
  638. /*
  639. * Reset the RSA board back to 115kbps compat mode.
  640. */
  641. disable_rsa(up);
  642. #endif
  643. /*
  644. * Read data port to reset things.
  645. */
  646. (void) serial_in(up, UART_RX);
  647. free_irq(up->port.irq, up);
  648. }
  649. static void
  650. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  651. unsigned int iflag, unsigned int quot)
  652. {
  653. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  654. unsigned char cval, fcr = 0;
  655. unsigned long flags;
  656. switch (cflag & CSIZE) {
  657. case CS5:
  658. cval = 0x00;
  659. break;
  660. case CS6:
  661. cval = 0x01;
  662. break;
  663. case CS7:
  664. cval = 0x02;
  665. break;
  666. default:
  667. case CS8:
  668. cval = 0x03;
  669. break;
  670. }
  671. if (cflag & CSTOPB)
  672. cval |= 0x04;
  673. if (cflag & PARENB)
  674. cval |= UART_LCR_PARITY;
  675. if (!(cflag & PARODD))
  676. cval |= UART_LCR_EPAR;
  677. #ifdef CMSPAR
  678. if (cflag & CMSPAR)
  679. cval |= UART_LCR_SPAR;
  680. #endif
  681. /*
  682. * Work around a bug in the Oxford Semiconductor 952 rev B
  683. * chip which causes it to seriously miscalculate baud rates
  684. * when DLL is 0.
  685. */
  686. if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
  687. up->rev == 0x5201)
  688. quot ++;
  689. if (uart_config[up->port.type].flags & UART_USE_FIFO) {
  690. if ((up->port.uartclk / quot) < (2400 * 16))
  691. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
  692. #ifdef CONFIG_SERIAL_8250_RSA
  693. else if (up->port.type == PORT_RSA)
  694. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
  695. #endif
  696. else
  697. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
  698. }
  699. if (up->port.type == PORT_16750)
  700. fcr |= UART_FCR7_64BYTE;
  701. /*
  702. * Ok, we're now changing the port state. Do it with
  703. * interrupts disabled.
  704. */
  705. spin_lock_irqsave(&up->port.lock, flags);
  706. /*
  707. * Update the per-port timeout.
  708. */
  709. uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
  710. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  711. if (iflag & INPCK)
  712. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  713. if (iflag & (BRKINT | PARMRK))
  714. up->port.read_status_mask |= UART_LSR_BI;
  715. /*
  716. * Characteres to ignore
  717. */
  718. up->port.ignore_status_mask = 0;
  719. if (iflag & IGNPAR)
  720. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  721. if (iflag & IGNBRK) {
  722. up->port.ignore_status_mask |= UART_LSR_BI;
  723. /*
  724. * If we're ignoring parity and break indicators,
  725. * ignore overruns too (for real raw support).
  726. */
  727. if (iflag & IGNPAR)
  728. up->port.ignore_status_mask |= UART_LSR_OE;
  729. }
  730. /*
  731. * ignore all characters if CREAD is not set
  732. */
  733. if ((cflag & CREAD) == 0)
  734. up->port.ignore_status_mask |= UART_LSR_DR;
  735. /*
  736. * CTS flow control flag and modem status interrupts
  737. */
  738. up->ier &= ~UART_IER_MSI;
  739. if (UART_ENABLE_MS(&up->port, cflag))
  740. up->ier |= UART_IER_MSI;
  741. serial_out(up, UART_IER, up->ier);
  742. if (uart_config[up->port.type].flags & UART_STARTECH) {
  743. serial_outp(up, UART_LCR, 0xBF);
  744. serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
  745. }
  746. serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  747. serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
  748. serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
  749. if (up->port.type == PORT_16750)
  750. serial_outp(up, UART_FCR, fcr); /* set fcr */
  751. serial_outp(up, UART_LCR, cval); /* reset DLAB */
  752. up->lcr = cval; /* Save LCR */
  753. if (up->port.type != PORT_16750) {
  754. if (fcr & UART_FCR_ENABLE_FIFO) {
  755. /* emulated UARTs (Lucent Venus 167x) need two steps */
  756. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  757. }
  758. serial_outp(up, UART_FCR, fcr); /* set fcr */
  759. }
  760. up->cflag = cflag;
  761. spin_unlock_irqrestore(&up->port.lock, flags);
  762. }
  763. static void
  764. sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
  765. struct ktermios *old)
  766. {
  767. unsigned int baud, quot;
  768. /*
  769. * Ask the core to calculate the divisor for us.
  770. */
  771. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  772. quot = uart_get_divisor(port, baud);
  773. sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
  774. }
  775. static void sunsu_release_port(struct uart_port *port)
  776. {
  777. }
  778. static int sunsu_request_port(struct uart_port *port)
  779. {
  780. return 0;
  781. }
  782. static void sunsu_config_port(struct uart_port *port, int flags)
  783. {
  784. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  785. if (flags & UART_CONFIG_TYPE) {
  786. /*
  787. * We are supposed to call autoconfig here, but this requires
  788. * splitting all the OBP probing crap from the UART probing.
  789. * We'll do it when we kill sunsu.c altogether.
  790. */
  791. port->type = up->type_probed; /* XXX */
  792. }
  793. }
  794. static int
  795. sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
  796. {
  797. return -EINVAL;
  798. }
  799. static const char *
  800. sunsu_type(struct uart_port *port)
  801. {
  802. int type = port->type;
  803. if (type >= ARRAY_SIZE(uart_config))
  804. type = 0;
  805. return uart_config[type].name;
  806. }
  807. static struct uart_ops sunsu_pops = {
  808. .tx_empty = sunsu_tx_empty,
  809. .set_mctrl = sunsu_set_mctrl,
  810. .get_mctrl = sunsu_get_mctrl,
  811. .stop_tx = sunsu_stop_tx,
  812. .start_tx = sunsu_start_tx,
  813. .stop_rx = sunsu_stop_rx,
  814. .enable_ms = sunsu_enable_ms,
  815. .break_ctl = sunsu_break_ctl,
  816. .startup = sunsu_startup,
  817. .shutdown = sunsu_shutdown,
  818. .set_termios = sunsu_set_termios,
  819. .type = sunsu_type,
  820. .release_port = sunsu_release_port,
  821. .request_port = sunsu_request_port,
  822. .config_port = sunsu_config_port,
  823. .verify_port = sunsu_verify_port,
  824. };
  825. #define UART_NR 4
  826. static struct uart_sunsu_port sunsu_ports[UART_NR];
  827. #ifdef CONFIG_SERIO
  828. static DEFINE_SPINLOCK(sunsu_serio_lock);
  829. static int sunsu_serio_write(struct serio *serio, unsigned char ch)
  830. {
  831. struct uart_sunsu_port *up = serio->port_data;
  832. unsigned long flags;
  833. int lsr;
  834. spin_lock_irqsave(&sunsu_serio_lock, flags);
  835. do {
  836. lsr = serial_in(up, UART_LSR);
  837. } while (!(lsr & UART_LSR_THRE));
  838. /* Send the character out. */
  839. serial_out(up, UART_TX, ch);
  840. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  841. return 0;
  842. }
  843. static int sunsu_serio_open(struct serio *serio)
  844. {
  845. struct uart_sunsu_port *up = serio->port_data;
  846. unsigned long flags;
  847. int ret;
  848. spin_lock_irqsave(&sunsu_serio_lock, flags);
  849. if (!up->serio_open) {
  850. up->serio_open = 1;
  851. ret = 0;
  852. } else
  853. ret = -EBUSY;
  854. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  855. return ret;
  856. }
  857. static void sunsu_serio_close(struct serio *serio)
  858. {
  859. struct uart_sunsu_port *up = serio->port_data;
  860. unsigned long flags;
  861. spin_lock_irqsave(&sunsu_serio_lock, flags);
  862. up->serio_open = 0;
  863. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  864. }
  865. #endif /* CONFIG_SERIO */
  866. static void sunsu_autoconfig(struct uart_sunsu_port *up)
  867. {
  868. unsigned char status1, status2, scratch, scratch2, scratch3;
  869. unsigned char save_lcr, save_mcr;
  870. unsigned long flags;
  871. if (up->su_type == SU_PORT_NONE)
  872. return;
  873. up->type_probed = PORT_UNKNOWN;
  874. up->port.iotype = UPIO_MEM;
  875. spin_lock_irqsave(&up->port.lock, flags);
  876. if (!(up->port.flags & UPF_BUGGY_UART)) {
  877. /*
  878. * Do a simple existence test first; if we fail this, there's
  879. * no point trying anything else.
  880. *
  881. * 0x80 is used as a nonsense port to prevent against false
  882. * positives due to ISA bus float. The assumption is that
  883. * 0x80 is a non-existent port; which should be safe since
  884. * include/asm/io.h also makes this assumption.
  885. */
  886. scratch = serial_inp(up, UART_IER);
  887. serial_outp(up, UART_IER, 0);
  888. #ifdef __i386__
  889. outb(0xff, 0x080);
  890. #endif
  891. scratch2 = serial_inp(up, UART_IER);
  892. serial_outp(up, UART_IER, 0x0f);
  893. #ifdef __i386__
  894. outb(0, 0x080);
  895. #endif
  896. scratch3 = serial_inp(up, UART_IER);
  897. serial_outp(up, UART_IER, scratch);
  898. if (scratch2 != 0 || scratch3 != 0x0F)
  899. goto out; /* We failed; there's nothing here */
  900. }
  901. save_mcr = serial_in(up, UART_MCR);
  902. save_lcr = serial_in(up, UART_LCR);
  903. /*
  904. * Check to see if a UART is really there. Certain broken
  905. * internal modems based on the Rockwell chipset fail this
  906. * test, because they apparently don't implement the loopback
  907. * test mode. So this test is skipped on the COM 1 through
  908. * COM 4 ports. This *should* be safe, since no board
  909. * manufacturer would be stupid enough to design a board
  910. * that conflicts with COM 1-4 --- we hope!
  911. */
  912. if (!(up->port.flags & UPF_SKIP_TEST)) {
  913. serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
  914. status1 = serial_inp(up, UART_MSR) & 0xF0;
  915. serial_outp(up, UART_MCR, save_mcr);
  916. if (status1 != 0x90)
  917. goto out; /* We failed loopback test */
  918. }
  919. serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
  920. serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
  921. serial_outp(up, UART_LCR, 0);
  922. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  923. scratch = serial_in(up, UART_IIR) >> 6;
  924. switch (scratch) {
  925. case 0:
  926. up->port.type = PORT_16450;
  927. break;
  928. case 1:
  929. up->port.type = PORT_UNKNOWN;
  930. break;
  931. case 2:
  932. up->port.type = PORT_16550;
  933. break;
  934. case 3:
  935. up->port.type = PORT_16550A;
  936. break;
  937. }
  938. if (up->port.type == PORT_16550A) {
  939. /* Check for Startech UART's */
  940. serial_outp(up, UART_LCR, UART_LCR_DLAB);
  941. if (serial_in(up, UART_EFR) == 0) {
  942. up->port.type = PORT_16650;
  943. } else {
  944. serial_outp(up, UART_LCR, 0xBF);
  945. if (serial_in(up, UART_EFR) == 0)
  946. up->port.type = PORT_16650V2;
  947. }
  948. }
  949. if (up->port.type == PORT_16550A) {
  950. /* Check for TI 16750 */
  951. serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
  952. serial_outp(up, UART_FCR,
  953. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  954. scratch = serial_in(up, UART_IIR) >> 5;
  955. if (scratch == 7) {
  956. /*
  957. * If this is a 16750, and not a cheap UART
  958. * clone, then it should only go into 64 byte
  959. * mode if the UART_FCR7_64BYTE bit was set
  960. * while UART_LCR_DLAB was latched.
  961. */
  962. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  963. serial_outp(up, UART_LCR, 0);
  964. serial_outp(up, UART_FCR,
  965. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  966. scratch = serial_in(up, UART_IIR) >> 5;
  967. if (scratch == 6)
  968. up->port.type = PORT_16750;
  969. }
  970. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  971. }
  972. serial_outp(up, UART_LCR, save_lcr);
  973. if (up->port.type == PORT_16450) {
  974. scratch = serial_in(up, UART_SCR);
  975. serial_outp(up, UART_SCR, 0xa5);
  976. status1 = serial_in(up, UART_SCR);
  977. serial_outp(up, UART_SCR, 0x5a);
  978. status2 = serial_in(up, UART_SCR);
  979. serial_outp(up, UART_SCR, scratch);
  980. if ((status1 != 0xa5) || (status2 != 0x5a))
  981. up->port.type = PORT_8250;
  982. }
  983. up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
  984. if (up->port.type == PORT_UNKNOWN)
  985. goto out;
  986. up->type_probed = up->port.type; /* XXX */
  987. /*
  988. * Reset the UART.
  989. */
  990. #ifdef CONFIG_SERIAL_8250_RSA
  991. if (up->port.type == PORT_RSA)
  992. serial_outp(up, UART_RSA_FRR, 0);
  993. #endif
  994. serial_outp(up, UART_MCR, save_mcr);
  995. serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
  996. UART_FCR_CLEAR_RCVR |
  997. UART_FCR_CLEAR_XMIT));
  998. serial_outp(up, UART_FCR, 0);
  999. (void)serial_in(up, UART_RX);
  1000. serial_outp(up, UART_IER, 0);
  1001. out:
  1002. spin_unlock_irqrestore(&up->port.lock, flags);
  1003. }
  1004. static struct uart_driver sunsu_reg = {
  1005. .owner = THIS_MODULE,
  1006. .driver_name = "sunsu",
  1007. .dev_name = "ttyS",
  1008. .major = TTY_MAJOR,
  1009. };
  1010. static int sunsu_kbd_ms_init(struct uart_sunsu_port *up)
  1011. {
  1012. int quot, baud;
  1013. #ifdef CONFIG_SERIO
  1014. struct serio *serio;
  1015. #endif
  1016. if (up->su_type == SU_PORT_KBD) {
  1017. up->cflag = B1200 | CS8 | CLOCAL | CREAD;
  1018. baud = 1200;
  1019. } else {
  1020. up->cflag = B4800 | CS8 | CLOCAL | CREAD;
  1021. baud = 4800;
  1022. }
  1023. quot = up->port.uartclk / (16 * baud);
  1024. sunsu_autoconfig(up);
  1025. if (up->port.type == PORT_UNKNOWN)
  1026. return -ENODEV;
  1027. printk("%s: %s port at %llx, irq %u\n",
  1028. up->port.dev->of_node->full_name,
  1029. (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
  1030. (unsigned long long) up->port.mapbase,
  1031. up->port.irq);
  1032. #ifdef CONFIG_SERIO
  1033. serio = &up->serio;
  1034. serio->port_data = up;
  1035. serio->id.type = SERIO_RS232;
  1036. if (up->su_type == SU_PORT_KBD) {
  1037. serio->id.proto = SERIO_SUNKBD;
  1038. strlcpy(serio->name, "sukbd", sizeof(serio->name));
  1039. } else {
  1040. serio->id.proto = SERIO_SUN;
  1041. serio->id.extra = 1;
  1042. strlcpy(serio->name, "sums", sizeof(serio->name));
  1043. }
  1044. strlcpy(serio->phys,
  1045. (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
  1046. sizeof(serio->phys));
  1047. serio->write = sunsu_serio_write;
  1048. serio->open = sunsu_serio_open;
  1049. serio->close = sunsu_serio_close;
  1050. serio->dev.parent = up->port.dev;
  1051. serio_register_port(serio);
  1052. #endif
  1053. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  1054. sunsu_startup(&up->port);
  1055. return 0;
  1056. }
  1057. /*
  1058. * ------------------------------------------------------------
  1059. * Serial console driver
  1060. * ------------------------------------------------------------
  1061. */
  1062. #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
  1063. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  1064. /*
  1065. * Wait for transmitter & holding register to empty
  1066. */
  1067. static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
  1068. {
  1069. unsigned int status, tmout = 10000;
  1070. /* Wait up to 10ms for the character(s) to be sent. */
  1071. do {
  1072. status = serial_in(up, UART_LSR);
  1073. if (status & UART_LSR_BI)
  1074. up->lsr_break_flag = UART_LSR_BI;
  1075. if (--tmout == 0)
  1076. break;
  1077. udelay(1);
  1078. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  1079. /* Wait up to 1s for flow control if necessary */
  1080. if (up->port.flags & UPF_CONS_FLOW) {
  1081. tmout = 1000000;
  1082. while (--tmout &&
  1083. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  1084. udelay(1);
  1085. }
  1086. }
  1087. static void sunsu_console_putchar(struct uart_port *port, int ch)
  1088. {
  1089. struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;
  1090. wait_for_xmitr(up);
  1091. serial_out(up, UART_TX, ch);
  1092. }
  1093. /*
  1094. * Print a string to the serial port trying not to disturb
  1095. * any possible real use of the port...
  1096. */
  1097. static void sunsu_console_write(struct console *co, const char *s,
  1098. unsigned int count)
  1099. {
  1100. struct uart_sunsu_port *up = &sunsu_ports[co->index];
  1101. unsigned long flags;
  1102. unsigned int ier;
  1103. int locked = 1;
  1104. local_irq_save(flags);
  1105. if (up->port.sysrq) {
  1106. locked = 0;
  1107. } else if (oops_in_progress) {
  1108. locked = spin_trylock(&up->port.lock);
  1109. } else
  1110. spin_lock(&up->port.lock);
  1111. /*
  1112. * First save the UER then disable the interrupts
  1113. */
  1114. ier = serial_in(up, UART_IER);
  1115. serial_out(up, UART_IER, 0);
  1116. uart_console_write(&up->port, s, count, sunsu_console_putchar);
  1117. /*
  1118. * Finally, wait for transmitter to become empty
  1119. * and restore the IER
  1120. */
  1121. wait_for_xmitr(up);
  1122. serial_out(up, UART_IER, ier);
  1123. if (locked)
  1124. spin_unlock(&up->port.lock);
  1125. local_irq_restore(flags);
  1126. }
  1127. /*
  1128. * Setup initial baud/bits/parity. We do two things here:
  1129. * - construct a cflag setting for the first su_open()
  1130. * - initialize the serial port
  1131. * Return non-zero if we didn't find a serial port.
  1132. */
  1133. static int __init sunsu_console_setup(struct console *co, char *options)
  1134. {
  1135. static struct ktermios dummy;
  1136. struct ktermios termios;
  1137. struct uart_port *port;
  1138. printk("Console: ttyS%d (SU)\n",
  1139. (sunsu_reg.minor - 64) + co->index);
  1140. /*
  1141. * Check whether an invalid uart number has been specified, and
  1142. * if so, search for the first available port that does have
  1143. * console support.
  1144. */
  1145. if (co->index >= UART_NR)
  1146. co->index = 0;
  1147. port = &sunsu_ports[co->index].port;
  1148. /*
  1149. * Temporary fix.
  1150. */
  1151. spin_lock_init(&port->lock);
  1152. /* Get firmware console settings. */
  1153. sunserial_console_termios(co, port->dev->of_node);
  1154. memset(&termios, 0, sizeof(struct ktermios));
  1155. termios.c_cflag = co->cflag;
  1156. port->mctrl |= TIOCM_DTR;
  1157. port->ops->set_termios(port, &termios, &dummy);
  1158. return 0;
  1159. }
  1160. static struct console sunsu_console = {
  1161. .name = "ttyS",
  1162. .write = sunsu_console_write,
  1163. .device = uart_console_device,
  1164. .setup = sunsu_console_setup,
  1165. .flags = CON_PRINTBUFFER,
  1166. .index = -1,
  1167. .data = &sunsu_reg,
  1168. };
  1169. /*
  1170. * Register console.
  1171. */
  1172. static inline struct console *SUNSU_CONSOLE(void)
  1173. {
  1174. return &sunsu_console;
  1175. }
  1176. #else
  1177. #define SUNSU_CONSOLE() (NULL)
  1178. #define sunsu_serial_console_init() do { } while (0)
  1179. #endif
  1180. static enum su_type su_get_type(struct device_node *dp)
  1181. {
  1182. struct device_node *ap = of_find_node_by_path("/aliases");
  1183. if (ap) {
  1184. const char *keyb = of_get_property(ap, "keyboard", NULL);
  1185. const char *ms = of_get_property(ap, "mouse", NULL);
  1186. if (keyb) {
  1187. if (dp == of_find_node_by_path(keyb))
  1188. return SU_PORT_KBD;
  1189. }
  1190. if (ms) {
  1191. if (dp == of_find_node_by_path(ms))
  1192. return SU_PORT_MS;
  1193. }
  1194. }
  1195. return SU_PORT_PORT;
  1196. }
  1197. static int su_probe(struct platform_device *op)
  1198. {
  1199. static int inst;
  1200. struct device_node *dp = op->dev.of_node;
  1201. struct uart_sunsu_port *up;
  1202. struct resource *rp;
  1203. enum su_type type;
  1204. bool ignore_line;
  1205. int err;
  1206. type = su_get_type(dp);
  1207. if (type == SU_PORT_PORT) {
  1208. if (inst >= UART_NR)
  1209. return -EINVAL;
  1210. up = &sunsu_ports[inst];
  1211. } else {
  1212. up = kzalloc(sizeof(*up), GFP_KERNEL);
  1213. if (!up)
  1214. return -ENOMEM;
  1215. }
  1216. up->port.line = inst;
  1217. spin_lock_init(&up->port.lock);
  1218. up->su_type = type;
  1219. rp = &op->resource[0];
  1220. up->port.mapbase = rp->start;
  1221. up->reg_size = resource_size(rp);
  1222. up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
  1223. if (!up->port.membase) {
  1224. if (type != SU_PORT_PORT)
  1225. kfree(up);
  1226. return -ENOMEM;
  1227. }
  1228. up->port.irq = op->archdata.irqs[0];
  1229. up->port.dev = &op->dev;
  1230. up->port.type = PORT_UNKNOWN;
  1231. up->port.uartclk = (SU_BASE_BAUD * 16);
  1232. err = 0;
  1233. if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
  1234. err = sunsu_kbd_ms_init(up);
  1235. if (err) {
  1236. of_iounmap(&op->resource[0],
  1237. up->port.membase, up->reg_size);
  1238. kfree(up);
  1239. return err;
  1240. }
  1241. dev_set_drvdata(&op->dev, up);
  1242. return 0;
  1243. }
  1244. up->port.flags |= UPF_BOOT_AUTOCONF;
  1245. sunsu_autoconfig(up);
  1246. err = -ENODEV;
  1247. if (up->port.type == PORT_UNKNOWN)
  1248. goto out_unmap;
  1249. up->port.ops = &sunsu_pops;
  1250. ignore_line = false;
  1251. if (!strcmp(dp->name, "rsc-console") ||
  1252. !strcmp(dp->name, "lom-console"))
  1253. ignore_line = true;
  1254. sunserial_console_match(SUNSU_CONSOLE(), dp,
  1255. &sunsu_reg, up->port.line,
  1256. ignore_line);
  1257. err = uart_add_one_port(&sunsu_reg, &up->port);
  1258. if (err)
  1259. goto out_unmap;
  1260. dev_set_drvdata(&op->dev, up);
  1261. inst++;
  1262. return 0;
  1263. out_unmap:
  1264. of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
  1265. return err;
  1266. }
  1267. static int su_remove(struct platform_device *op)
  1268. {
  1269. struct uart_sunsu_port *up = dev_get_drvdata(&op->dev);
  1270. bool kbdms = false;
  1271. if (up->su_type == SU_PORT_MS ||
  1272. up->su_type == SU_PORT_KBD)
  1273. kbdms = true;
  1274. if (kbdms) {
  1275. #ifdef CONFIG_SERIO
  1276. serio_unregister_port(&up->serio);
  1277. #endif
  1278. } else if (up->port.type != PORT_UNKNOWN)
  1279. uart_remove_one_port(&sunsu_reg, &up->port);
  1280. if (up->port.membase)
  1281. of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
  1282. if (kbdms)
  1283. kfree(up);
  1284. dev_set_drvdata(&op->dev, NULL);
  1285. return 0;
  1286. }
  1287. static const struct of_device_id su_match[] = {
  1288. {
  1289. .name = "su",
  1290. },
  1291. {
  1292. .name = "su_pnp",
  1293. },
  1294. {
  1295. .name = "serial",
  1296. .compatible = "su",
  1297. },
  1298. {
  1299. .type = "serial",
  1300. .compatible = "su",
  1301. },
  1302. {},
  1303. };
  1304. MODULE_DEVICE_TABLE(of, su_match);
  1305. static struct platform_driver su_driver = {
  1306. .driver = {
  1307. .name = "su",
  1308. .owner = THIS_MODULE,
  1309. .of_match_table = su_match,
  1310. },
  1311. .probe = su_probe,
  1312. .remove = su_remove,
  1313. };
  1314. static int __init sunsu_init(void)
  1315. {
  1316. struct device_node *dp;
  1317. int err;
  1318. int num_uart = 0;
  1319. for_each_node_by_name(dp, "su") {
  1320. if (su_get_type(dp) == SU_PORT_PORT)
  1321. num_uart++;
  1322. }
  1323. for_each_node_by_name(dp, "su_pnp") {
  1324. if (su_get_type(dp) == SU_PORT_PORT)
  1325. num_uart++;
  1326. }
  1327. for_each_node_by_name(dp, "serial") {
  1328. if (of_device_is_compatible(dp, "su")) {
  1329. if (su_get_type(dp) == SU_PORT_PORT)
  1330. num_uart++;
  1331. }
  1332. }
  1333. for_each_node_by_type(dp, "serial") {
  1334. if (of_device_is_compatible(dp, "su")) {
  1335. if (su_get_type(dp) == SU_PORT_PORT)
  1336. num_uart++;
  1337. }
  1338. }
  1339. if (num_uart) {
  1340. err = sunserial_register_minors(&sunsu_reg, num_uart);
  1341. if (err)
  1342. return err;
  1343. }
  1344. err = platform_driver_register(&su_driver);
  1345. if (err && num_uart)
  1346. sunserial_unregister_minors(&sunsu_reg, num_uart);
  1347. return err;
  1348. }
  1349. static void __exit sunsu_exit(void)
  1350. {
  1351. if (sunsu_reg.nr)
  1352. sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
  1353. }
  1354. module_init(sunsu_init);
  1355. module_exit(sunsu_exit);
  1356. MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
  1357. MODULE_DESCRIPTION("Sun SU serial port driver");
  1358. MODULE_VERSION("2.0");
  1359. MODULE_LICENSE("GPL");