pasemi_mac.c 31 KB

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  1. /*
  2. * Copyright (C) 2006-2007 PA Semi, Inc
  3. *
  4. * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/init.h>
  20. #include <linux/module.h>
  21. #include <linux/pci.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/dmaengine.h>
  24. #include <linux/delay.h>
  25. #include <linux/netdevice.h>
  26. #include <linux/etherdevice.h>
  27. #include <asm/dma-mapping.h>
  28. #include <linux/in.h>
  29. #include <linux/skbuff.h>
  30. #include <linux/ip.h>
  31. #include <linux/tcp.h>
  32. #include <net/checksum.h>
  33. #include <asm/irq.h>
  34. #include "pasemi_mac.h"
  35. /* TODO list
  36. *
  37. * - Get rid of pci_{read,write}_config(), map registers with ioremap
  38. * for performance
  39. * - PHY support
  40. * - Multicast support
  41. * - Large MTU support
  42. * - Other performance improvements
  43. */
  44. /* Must be a power of two */
  45. #define RX_RING_SIZE 512
  46. #define TX_RING_SIZE 512
  47. #define DEFAULT_MSG_ENABLE \
  48. (NETIF_MSG_DRV | \
  49. NETIF_MSG_PROBE | \
  50. NETIF_MSG_LINK | \
  51. NETIF_MSG_TIMER | \
  52. NETIF_MSG_IFDOWN | \
  53. NETIF_MSG_IFUP | \
  54. NETIF_MSG_RX_ERR | \
  55. NETIF_MSG_TX_ERR)
  56. #define TX_DESC(mac, num) ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
  57. #define TX_DESC_INFO(mac, num) ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
  58. #define RX_DESC(mac, num) ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
  59. #define RX_DESC_INFO(mac, num) ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
  60. #define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
  61. #define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \
  62. & ((ring)->size - 1))
  63. #define RING_AVAIL(ring) ((ring->size) - RING_USED(ring))
  64. #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
  65. MODULE_LICENSE("GPL");
  66. MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
  67. MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
  68. static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
  69. module_param(debug, int, 0);
  70. MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
  71. static struct pasdma_status *dma_status;
  72. static void write_iob_reg(struct pasemi_mac *mac, unsigned int reg,
  73. unsigned int val)
  74. {
  75. out_le32(mac->iob_regs+reg, val);
  76. }
  77. static unsigned int read_mac_reg(struct pasemi_mac *mac, unsigned int reg)
  78. {
  79. return in_le32(mac->regs+reg);
  80. }
  81. static void write_mac_reg(struct pasemi_mac *mac, unsigned int reg,
  82. unsigned int val)
  83. {
  84. out_le32(mac->regs+reg, val);
  85. }
  86. static unsigned int read_dma_reg(struct pasemi_mac *mac, unsigned int reg)
  87. {
  88. return in_le32(mac->dma_regs+reg);
  89. }
  90. static void write_dma_reg(struct pasemi_mac *mac, unsigned int reg,
  91. unsigned int val)
  92. {
  93. out_le32(mac->dma_regs+reg, val);
  94. }
  95. static int pasemi_get_mac_addr(struct pasemi_mac *mac)
  96. {
  97. struct pci_dev *pdev = mac->pdev;
  98. struct device_node *dn = pci_device_to_OF_node(pdev);
  99. int len;
  100. const u8 *maddr;
  101. u8 addr[6];
  102. if (!dn) {
  103. dev_dbg(&pdev->dev,
  104. "No device node for mac, not configuring\n");
  105. return -ENOENT;
  106. }
  107. maddr = of_get_property(dn, "local-mac-address", &len);
  108. if (maddr && len == 6) {
  109. memcpy(mac->mac_addr, maddr, 6);
  110. return 0;
  111. }
  112. /* Some old versions of firmware mistakenly uses mac-address
  113. * (and as a string) instead of a byte array in local-mac-address.
  114. */
  115. if (maddr == NULL)
  116. maddr = of_get_property(dn, "mac-address", NULL);
  117. if (maddr == NULL) {
  118. dev_warn(&pdev->dev,
  119. "no mac address in device tree, not configuring\n");
  120. return -ENOENT;
  121. }
  122. if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
  123. &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
  124. dev_warn(&pdev->dev,
  125. "can't parse mac address, not configuring\n");
  126. return -EINVAL;
  127. }
  128. memcpy(mac->mac_addr, addr, 6);
  129. return 0;
  130. }
  131. static int pasemi_mac_setup_rx_resources(struct net_device *dev)
  132. {
  133. struct pasemi_mac_rxring *ring;
  134. struct pasemi_mac *mac = netdev_priv(dev);
  135. int chan_id = mac->dma_rxch;
  136. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  137. if (!ring)
  138. goto out_ring;
  139. spin_lock_init(&ring->lock);
  140. ring->size = RX_RING_SIZE;
  141. ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
  142. RX_RING_SIZE, GFP_KERNEL);
  143. if (!ring->desc_info)
  144. goto out_desc_info;
  145. /* Allocate descriptors */
  146. ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
  147. RX_RING_SIZE *
  148. sizeof(struct pas_dma_xct_descr),
  149. &ring->dma, GFP_KERNEL);
  150. if (!ring->desc)
  151. goto out_desc;
  152. memset(ring->desc, 0, RX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
  153. ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
  154. RX_RING_SIZE * sizeof(u64),
  155. &ring->buf_dma, GFP_KERNEL);
  156. if (!ring->buffers)
  157. goto out_buffers;
  158. memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
  159. write_dma_reg(mac, PAS_DMA_RXCHAN_BASEL(chan_id), PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
  160. write_dma_reg(mac, PAS_DMA_RXCHAN_BASEU(chan_id),
  161. PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
  162. PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2));
  163. write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id),
  164. PAS_DMA_RXCHAN_CFG_HBU(2));
  165. write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if),
  166. PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
  167. write_dma_reg(mac, PAS_DMA_RXINT_BASEU(mac->dma_if),
  168. PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
  169. PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
  170. write_dma_reg(mac, PAS_DMA_RXINT_CFG(mac->dma_if),
  171. PAS_DMA_RXINT_CFG_DHL(2));
  172. ring->next_to_fill = 0;
  173. ring->next_to_clean = 0;
  174. snprintf(ring->irq_name, sizeof(ring->irq_name),
  175. "%s rx", dev->name);
  176. mac->rx = ring;
  177. return 0;
  178. out_buffers:
  179. dma_free_coherent(&mac->dma_pdev->dev,
  180. RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
  181. mac->rx->desc, mac->rx->dma);
  182. out_desc:
  183. kfree(ring->desc_info);
  184. out_desc_info:
  185. kfree(ring);
  186. out_ring:
  187. return -ENOMEM;
  188. }
  189. static int pasemi_mac_setup_tx_resources(struct net_device *dev)
  190. {
  191. struct pasemi_mac *mac = netdev_priv(dev);
  192. u32 val;
  193. int chan_id = mac->dma_txch;
  194. struct pasemi_mac_txring *ring;
  195. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  196. if (!ring)
  197. goto out_ring;
  198. spin_lock_init(&ring->lock);
  199. ring->size = TX_RING_SIZE;
  200. ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
  201. TX_RING_SIZE, GFP_KERNEL);
  202. if (!ring->desc_info)
  203. goto out_desc_info;
  204. /* Allocate descriptors */
  205. ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
  206. TX_RING_SIZE *
  207. sizeof(struct pas_dma_xct_descr),
  208. &ring->dma, GFP_KERNEL);
  209. if (!ring->desc)
  210. goto out_desc;
  211. memset(ring->desc, 0, TX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
  212. write_dma_reg(mac, PAS_DMA_TXCHAN_BASEL(chan_id),
  213. PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
  214. val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
  215. val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2);
  216. write_dma_reg(mac, PAS_DMA_TXCHAN_BASEU(chan_id), val);
  217. write_dma_reg(mac, PAS_DMA_TXCHAN_CFG(chan_id),
  218. PAS_DMA_TXCHAN_CFG_TY_IFACE |
  219. PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
  220. PAS_DMA_TXCHAN_CFG_UP |
  221. PAS_DMA_TXCHAN_CFG_WT(2));
  222. ring->next_to_fill = 0;
  223. ring->next_to_clean = 0;
  224. snprintf(ring->irq_name, sizeof(ring->irq_name),
  225. "%s tx", dev->name);
  226. mac->tx = ring;
  227. return 0;
  228. out_desc:
  229. kfree(ring->desc_info);
  230. out_desc_info:
  231. kfree(ring);
  232. out_ring:
  233. return -ENOMEM;
  234. }
  235. static void pasemi_mac_free_tx_resources(struct net_device *dev)
  236. {
  237. struct pasemi_mac *mac = netdev_priv(dev);
  238. unsigned int i;
  239. struct pasemi_mac_buffer *info;
  240. struct pas_dma_xct_descr *dp;
  241. for (i = 0; i < TX_RING_SIZE; i++) {
  242. info = &TX_DESC_INFO(mac, i);
  243. dp = &TX_DESC(mac, i);
  244. if (info->dma) {
  245. if (info->skb) {
  246. pci_unmap_single(mac->dma_pdev,
  247. info->dma,
  248. info->skb->len,
  249. PCI_DMA_TODEVICE);
  250. dev_kfree_skb_any(info->skb);
  251. }
  252. info->dma = 0;
  253. info->skb = NULL;
  254. dp->mactx = 0;
  255. dp->ptr = 0;
  256. }
  257. }
  258. dma_free_coherent(&mac->dma_pdev->dev,
  259. TX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
  260. mac->tx->desc, mac->tx->dma);
  261. kfree(mac->tx->desc_info);
  262. kfree(mac->tx);
  263. mac->tx = NULL;
  264. }
  265. static void pasemi_mac_free_rx_resources(struct net_device *dev)
  266. {
  267. struct pasemi_mac *mac = netdev_priv(dev);
  268. unsigned int i;
  269. struct pasemi_mac_buffer *info;
  270. struct pas_dma_xct_descr *dp;
  271. for (i = 0; i < RX_RING_SIZE; i++) {
  272. info = &RX_DESC_INFO(mac, i);
  273. dp = &RX_DESC(mac, i);
  274. if (info->skb) {
  275. if (info->dma) {
  276. pci_unmap_single(mac->dma_pdev,
  277. info->dma,
  278. info->skb->len,
  279. PCI_DMA_FROMDEVICE);
  280. dev_kfree_skb_any(info->skb);
  281. }
  282. info->dma = 0;
  283. info->skb = NULL;
  284. dp->macrx = 0;
  285. dp->ptr = 0;
  286. }
  287. }
  288. dma_free_coherent(&mac->dma_pdev->dev,
  289. RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
  290. mac->rx->desc, mac->rx->dma);
  291. dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
  292. mac->rx->buffers, mac->rx->buf_dma);
  293. kfree(mac->rx->desc_info);
  294. kfree(mac->rx);
  295. mac->rx = NULL;
  296. }
  297. static void pasemi_mac_replenish_rx_ring(struct net_device *dev, int limit)
  298. {
  299. struct pasemi_mac *mac = netdev_priv(dev);
  300. unsigned int i;
  301. int start = mac->rx->next_to_fill;
  302. int count;
  303. if (limit <= 0)
  304. return;
  305. i = start;
  306. for (count = 0; count < limit; count++) {
  307. struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
  308. u64 *buff = &RX_BUFF(mac, i);
  309. struct sk_buff *skb;
  310. dma_addr_t dma;
  311. /* skb might still be in there for recycle on short receives */
  312. if (info->skb)
  313. skb = info->skb;
  314. else
  315. skb = dev_alloc_skb(BUF_SIZE);
  316. if (unlikely(!skb))
  317. break;
  318. dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
  319. PCI_DMA_FROMDEVICE);
  320. if (unlikely(dma_mapping_error(dma))) {
  321. dev_kfree_skb_irq(info->skb);
  322. break;
  323. }
  324. info->skb = skb;
  325. info->dma = dma;
  326. *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
  327. i++;
  328. }
  329. wmb();
  330. write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), count);
  331. write_dma_reg(mac, PAS_DMA_RXINT_INCR(mac->dma_if), count);
  332. mac->rx->next_to_fill += count;
  333. }
  334. static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
  335. {
  336. unsigned int reg, pcnt;
  337. /* Re-enable packet count interrupts: finally
  338. * ack the packet count interrupt we got in rx_intr.
  339. */
  340. pcnt = *mac->rx_status & PAS_STATUS_PCNT_M;
  341. reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
  342. write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
  343. }
  344. static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
  345. {
  346. unsigned int reg, pcnt;
  347. /* Re-enable packet count interrupts */
  348. pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
  349. reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
  350. write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
  351. }
  352. static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
  353. {
  354. unsigned int n;
  355. int count;
  356. struct pas_dma_xct_descr *dp;
  357. struct pasemi_mac_buffer *info;
  358. struct sk_buff *skb;
  359. unsigned int i, len;
  360. u64 macrx;
  361. dma_addr_t dma;
  362. spin_lock(&mac->rx->lock);
  363. n = mac->rx->next_to_clean;
  364. for (count = limit; count; count--) {
  365. rmb();
  366. dp = &RX_DESC(mac, n);
  367. prefetchw(dp);
  368. macrx = dp->macrx;
  369. if (!(macrx & XCT_MACRX_O))
  370. break;
  371. info = NULL;
  372. /* We have to scan for our skb since there's no way
  373. * to back-map them from the descriptor, and if we
  374. * have several receive channels then they might not
  375. * show up in the same order as they were put on the
  376. * interface ring.
  377. */
  378. dma = (dp->ptr & XCT_PTR_ADDR_M);
  379. for (i = n; i < (n + RX_RING_SIZE); i++) {
  380. info = &RX_DESC_INFO(mac, i);
  381. if (info->dma == dma)
  382. break;
  383. }
  384. prefetchw(info);
  385. skb = info->skb;
  386. prefetchw(skb);
  387. info->dma = 0;
  388. pci_unmap_single(mac->dma_pdev, dma, skb->len,
  389. PCI_DMA_FROMDEVICE);
  390. len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
  391. if (len < 256) {
  392. struct sk_buff *new_skb =
  393. netdev_alloc_skb(mac->netdev, len + NET_IP_ALIGN);
  394. if (new_skb) {
  395. skb_reserve(new_skb, NET_IP_ALIGN);
  396. memcpy(new_skb->data, skb->data, len);
  397. /* save the skb in buffer_info as good */
  398. skb = new_skb;
  399. }
  400. /* else just continue with the old one */
  401. } else
  402. info->skb = NULL;
  403. skb_put(skb, len);
  404. if (likely((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK)) {
  405. skb->ip_summed = CHECKSUM_UNNECESSARY;
  406. skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
  407. XCT_MACRX_CSUM_S;
  408. } else
  409. skb->ip_summed = CHECKSUM_NONE;
  410. mac->netdev->stats.rx_bytes += len;
  411. mac->netdev->stats.rx_packets++;
  412. skb->protocol = eth_type_trans(skb, mac->netdev);
  413. netif_receive_skb(skb);
  414. dp->ptr = 0;
  415. dp->macrx = 0;
  416. n++;
  417. }
  418. mac->rx->next_to_clean += limit - count;
  419. pasemi_mac_replenish_rx_ring(mac->netdev, limit-count);
  420. spin_unlock(&mac->rx->lock);
  421. return count;
  422. }
  423. static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
  424. {
  425. int i;
  426. struct pasemi_mac_buffer *info;
  427. struct pas_dma_xct_descr *dp;
  428. unsigned int start, count, limit;
  429. unsigned int total_count;
  430. unsigned long flags;
  431. struct sk_buff *skbs[32];
  432. dma_addr_t dmas[32];
  433. total_count = 0;
  434. restart:
  435. spin_lock_irqsave(&mac->tx->lock, flags);
  436. start = mac->tx->next_to_clean;
  437. limit = min(mac->tx->next_to_fill, start+32);
  438. count = 0;
  439. for (i = start; i < limit; i++) {
  440. dp = &TX_DESC(mac, i);
  441. if (unlikely(dp->mactx & XCT_MACTX_O))
  442. /* Not yet transmitted */
  443. break;
  444. info = &TX_DESC_INFO(mac, i);
  445. skbs[count] = info->skb;
  446. dmas[count] = info->dma;
  447. info->skb = NULL;
  448. info->dma = 0;
  449. dp->mactx = 0;
  450. dp->ptr = 0;
  451. count++;
  452. }
  453. mac->tx->next_to_clean += count;
  454. spin_unlock_irqrestore(&mac->tx->lock, flags);
  455. netif_wake_queue(mac->netdev);
  456. for (i = 0; i < count; i++) {
  457. pci_unmap_single(mac->dma_pdev, dmas[i],
  458. skbs[i]->len, PCI_DMA_TODEVICE);
  459. dev_kfree_skb_irq(skbs[i]);
  460. }
  461. total_count += count;
  462. /* If the batch was full, try to clean more */
  463. if (count == 32)
  464. goto restart;
  465. return total_count;
  466. }
  467. static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
  468. {
  469. struct net_device *dev = data;
  470. struct pasemi_mac *mac = netdev_priv(dev);
  471. unsigned int reg;
  472. if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
  473. return IRQ_NONE;
  474. if (*mac->rx_status & PAS_STATUS_ERROR)
  475. printk("rx_status reported error\n");
  476. /* Don't reset packet count so it won't fire again but clear
  477. * all others.
  478. */
  479. reg = 0;
  480. if (*mac->rx_status & PAS_STATUS_SOFT)
  481. reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
  482. if (*mac->rx_status & PAS_STATUS_ERROR)
  483. reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
  484. if (*mac->rx_status & PAS_STATUS_TIMER)
  485. reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
  486. netif_rx_schedule(dev, &mac->napi);
  487. write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
  488. return IRQ_HANDLED;
  489. }
  490. static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
  491. {
  492. struct net_device *dev = data;
  493. struct pasemi_mac *mac = netdev_priv(dev);
  494. unsigned int reg, pcnt;
  495. if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
  496. return IRQ_NONE;
  497. pasemi_mac_clean_tx(mac);
  498. pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
  499. reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
  500. if (*mac->tx_status & PAS_STATUS_SOFT)
  501. reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
  502. if (*mac->tx_status & PAS_STATUS_ERROR)
  503. reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
  504. write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
  505. return IRQ_HANDLED;
  506. }
  507. static void pasemi_adjust_link(struct net_device *dev)
  508. {
  509. struct pasemi_mac *mac = netdev_priv(dev);
  510. int msg;
  511. unsigned int flags;
  512. unsigned int new_flags;
  513. if (!mac->phydev->link) {
  514. /* If no link, MAC speed settings don't matter. Just report
  515. * link down and return.
  516. */
  517. if (mac->link && netif_msg_link(mac))
  518. printk(KERN_INFO "%s: Link is down.\n", dev->name);
  519. netif_carrier_off(dev);
  520. mac->link = 0;
  521. return;
  522. } else
  523. netif_carrier_on(dev);
  524. flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
  525. new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
  526. PAS_MAC_CFG_PCFG_TSR_M);
  527. if (!mac->phydev->duplex)
  528. new_flags |= PAS_MAC_CFG_PCFG_HD;
  529. switch (mac->phydev->speed) {
  530. case 1000:
  531. new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
  532. PAS_MAC_CFG_PCFG_TSR_1G;
  533. break;
  534. case 100:
  535. new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
  536. PAS_MAC_CFG_PCFG_TSR_100M;
  537. break;
  538. case 10:
  539. new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
  540. PAS_MAC_CFG_PCFG_TSR_10M;
  541. break;
  542. default:
  543. printk("Unsupported speed %d\n", mac->phydev->speed);
  544. }
  545. /* Print on link or speed/duplex change */
  546. msg = mac->link != mac->phydev->link || flags != new_flags;
  547. mac->duplex = mac->phydev->duplex;
  548. mac->speed = mac->phydev->speed;
  549. mac->link = mac->phydev->link;
  550. if (new_flags != flags)
  551. write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
  552. if (msg && netif_msg_link(mac))
  553. printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
  554. dev->name, mac->speed, mac->duplex ? "full" : "half");
  555. }
  556. static int pasemi_mac_phy_init(struct net_device *dev)
  557. {
  558. struct pasemi_mac *mac = netdev_priv(dev);
  559. struct device_node *dn, *phy_dn;
  560. struct phy_device *phydev;
  561. unsigned int phy_id;
  562. const phandle *ph;
  563. const unsigned int *prop;
  564. struct resource r;
  565. int ret;
  566. dn = pci_device_to_OF_node(mac->pdev);
  567. ph = of_get_property(dn, "phy-handle", NULL);
  568. if (!ph)
  569. return -ENODEV;
  570. phy_dn = of_find_node_by_phandle(*ph);
  571. prop = of_get_property(phy_dn, "reg", NULL);
  572. ret = of_address_to_resource(phy_dn->parent, 0, &r);
  573. if (ret)
  574. goto err;
  575. phy_id = *prop;
  576. snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
  577. of_node_put(phy_dn);
  578. mac->link = 0;
  579. mac->speed = 0;
  580. mac->duplex = -1;
  581. phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
  582. if (IS_ERR(phydev)) {
  583. printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
  584. return PTR_ERR(phydev);
  585. }
  586. mac->phydev = phydev;
  587. return 0;
  588. err:
  589. of_node_put(phy_dn);
  590. return -ENODEV;
  591. }
  592. static int pasemi_mac_open(struct net_device *dev)
  593. {
  594. struct pasemi_mac *mac = netdev_priv(dev);
  595. int base_irq;
  596. unsigned int flags;
  597. int ret;
  598. /* enable rx section */
  599. write_dma_reg(mac, PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
  600. /* enable tx section */
  601. write_dma_reg(mac, PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
  602. flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
  603. PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
  604. PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
  605. write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
  606. write_iob_reg(mac, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
  607. PAS_IOB_DMA_RXCH_CFG_CNTTH(0));
  608. write_iob_reg(mac, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
  609. PAS_IOB_DMA_TXCH_CFG_CNTTH(128));
  610. /* Clear out any residual packet count state from firmware */
  611. pasemi_mac_restart_rx_intr(mac);
  612. pasemi_mac_restart_tx_intr(mac);
  613. /* 0xffffff is max value, about 16ms */
  614. write_iob_reg(mac, PAS_IOB_DMA_COM_TIMEOUTCFG,
  615. PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
  616. ret = pasemi_mac_setup_rx_resources(dev);
  617. if (ret)
  618. goto out_rx_resources;
  619. ret = pasemi_mac_setup_tx_resources(dev);
  620. if (ret)
  621. goto out_tx_resources;
  622. write_mac_reg(mac, PAS_MAC_IPC_CHNL,
  623. PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
  624. PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
  625. /* enable rx if */
  626. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
  627. PAS_DMA_RXINT_RCMDSTA_EN);
  628. /* enable rx channel */
  629. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
  630. PAS_DMA_RXCHAN_CCMDSTA_EN |
  631. PAS_DMA_RXCHAN_CCMDSTA_DU);
  632. /* enable tx channel */
  633. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
  634. PAS_DMA_TXCHAN_TCMDSTA_EN);
  635. pasemi_mac_replenish_rx_ring(dev, RX_RING_SIZE);
  636. flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
  637. PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
  638. if (mac->type == MAC_TYPE_GMAC)
  639. flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
  640. else
  641. flags |= PAS_MAC_CFG_PCFG_TSR_10G | PAS_MAC_CFG_PCFG_SPD_10G;
  642. /* Enable interface in MAC */
  643. write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
  644. ret = pasemi_mac_phy_init(dev);
  645. /* Some configs don't have PHYs (XAUI etc), so don't complain about
  646. * failed init due to -ENODEV.
  647. */
  648. if (ret && ret != -ENODEV)
  649. dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
  650. netif_start_queue(dev);
  651. napi_enable(&mac->napi);
  652. /* Interrupts are a bit different for our DMA controller: While
  653. * it's got one a regular PCI device header, the interrupt there
  654. * is really the base of the range it's using. Each tx and rx
  655. * channel has it's own interrupt source.
  656. */
  657. base_irq = virq_to_hw(mac->dma_pdev->irq);
  658. mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
  659. mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
  660. ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
  661. mac->tx->irq_name, dev);
  662. if (ret) {
  663. dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
  664. base_irq + mac->dma_txch, ret);
  665. goto out_tx_int;
  666. }
  667. ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
  668. mac->rx->irq_name, dev);
  669. if (ret) {
  670. dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
  671. base_irq + 20 + mac->dma_rxch, ret);
  672. goto out_rx_int;
  673. }
  674. if (mac->phydev)
  675. phy_start(mac->phydev);
  676. return 0;
  677. out_rx_int:
  678. free_irq(mac->tx_irq, dev);
  679. out_tx_int:
  680. napi_disable(&mac->napi);
  681. netif_stop_queue(dev);
  682. pasemi_mac_free_tx_resources(dev);
  683. out_tx_resources:
  684. pasemi_mac_free_rx_resources(dev);
  685. out_rx_resources:
  686. return ret;
  687. }
  688. #define MAX_RETRIES 5000
  689. static int pasemi_mac_close(struct net_device *dev)
  690. {
  691. struct pasemi_mac *mac = netdev_priv(dev);
  692. unsigned int stat;
  693. int retries;
  694. if (mac->phydev) {
  695. phy_stop(mac->phydev);
  696. phy_disconnect(mac->phydev);
  697. }
  698. netif_stop_queue(dev);
  699. napi_disable(&mac->napi);
  700. /* Clean out any pending buffers */
  701. pasemi_mac_clean_tx(mac);
  702. pasemi_mac_clean_rx(mac, RX_RING_SIZE);
  703. /* Disable interface */
  704. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), PAS_DMA_TXCHAN_TCMDSTA_ST);
  705. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), PAS_DMA_RXINT_RCMDSTA_ST);
  706. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), PAS_DMA_RXCHAN_CCMDSTA_ST);
  707. for (retries = 0; retries < MAX_RETRIES; retries++) {
  708. stat = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
  709. if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
  710. break;
  711. cond_resched();
  712. }
  713. if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
  714. dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
  715. for (retries = 0; retries < MAX_RETRIES; retries++) {
  716. stat = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
  717. if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
  718. break;
  719. cond_resched();
  720. }
  721. if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
  722. dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
  723. for (retries = 0; retries < MAX_RETRIES; retries++) {
  724. stat = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
  725. if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
  726. break;
  727. cond_resched();
  728. }
  729. if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
  730. dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
  731. /* Then, disable the channel. This must be done separately from
  732. * stopping, since you can't disable when active.
  733. */
  734. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
  735. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
  736. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
  737. free_irq(mac->tx_irq, dev);
  738. free_irq(mac->rx_irq, dev);
  739. /* Free resources */
  740. pasemi_mac_free_rx_resources(dev);
  741. pasemi_mac_free_tx_resources(dev);
  742. return 0;
  743. }
  744. static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
  745. {
  746. struct pasemi_mac *mac = netdev_priv(dev);
  747. struct pasemi_mac_txring *txring;
  748. struct pasemi_mac_buffer *info;
  749. struct pas_dma_xct_descr *dp;
  750. u64 dflags, mactx, ptr;
  751. dma_addr_t map;
  752. unsigned long flags;
  753. dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
  754. if (skb->ip_summed == CHECKSUM_PARTIAL) {
  755. const unsigned char *nh = skb_network_header(skb);
  756. switch (ip_hdr(skb)->protocol) {
  757. case IPPROTO_TCP:
  758. dflags |= XCT_MACTX_CSUM_TCP;
  759. dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
  760. dflags |= XCT_MACTX_IPO(nh - skb->data);
  761. break;
  762. case IPPROTO_UDP:
  763. dflags |= XCT_MACTX_CSUM_UDP;
  764. dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
  765. dflags |= XCT_MACTX_IPO(nh - skb->data);
  766. break;
  767. }
  768. }
  769. map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
  770. if (dma_mapping_error(map))
  771. return NETDEV_TX_BUSY;
  772. mactx = dflags | XCT_MACTX_LLEN(skb->len);
  773. ptr = XCT_PTR_LEN(skb->len) | XCT_PTR_ADDR(map);
  774. txring = mac->tx;
  775. spin_lock_irqsave(&txring->lock, flags);
  776. if (RING_AVAIL(txring) <= 1) {
  777. spin_unlock_irqrestore(&txring->lock, flags);
  778. pasemi_mac_clean_tx(mac);
  779. pasemi_mac_restart_tx_intr(mac);
  780. spin_lock_irqsave(&txring->lock, flags);
  781. if (RING_AVAIL(txring) <= 1) {
  782. /* Still no room -- stop the queue and wait for tx
  783. * intr when there's room.
  784. */
  785. netif_stop_queue(dev);
  786. goto out_err;
  787. }
  788. }
  789. dp = &TX_DESC(mac, txring->next_to_fill);
  790. info = &TX_DESC_INFO(mac, txring->next_to_fill);
  791. dp->mactx = mactx;
  792. dp->ptr = ptr;
  793. info->dma = map;
  794. info->skb = skb;
  795. txring->next_to_fill++;
  796. dev->stats.tx_packets++;
  797. dev->stats.tx_bytes += skb->len;
  798. spin_unlock_irqrestore(&txring->lock, flags);
  799. write_dma_reg(mac, PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
  800. return NETDEV_TX_OK;
  801. out_err:
  802. spin_unlock_irqrestore(&txring->lock, flags);
  803. pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
  804. return NETDEV_TX_BUSY;
  805. }
  806. static void pasemi_mac_set_rx_mode(struct net_device *dev)
  807. {
  808. struct pasemi_mac *mac = netdev_priv(dev);
  809. unsigned int flags;
  810. flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
  811. /* Set promiscuous */
  812. if (dev->flags & IFF_PROMISC)
  813. flags |= PAS_MAC_CFG_PCFG_PR;
  814. else
  815. flags &= ~PAS_MAC_CFG_PCFG_PR;
  816. write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
  817. }
  818. static int pasemi_mac_poll(struct napi_struct *napi, int budget)
  819. {
  820. struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
  821. struct net_device *dev = mac->netdev;
  822. int pkts;
  823. pasemi_mac_clean_tx(mac);
  824. pkts = pasemi_mac_clean_rx(mac, budget);
  825. if (pkts < budget) {
  826. /* all done, no more packets present */
  827. netif_rx_complete(dev, napi);
  828. pasemi_mac_restart_rx_intr(mac);
  829. }
  830. return pkts;
  831. }
  832. static void __iomem * __devinit map_onedev(struct pci_dev *p, int index)
  833. {
  834. struct device_node *dn;
  835. void __iomem *ret;
  836. dn = pci_device_to_OF_node(p);
  837. if (!dn)
  838. goto fallback;
  839. ret = of_iomap(dn, index);
  840. if (!ret)
  841. goto fallback;
  842. return ret;
  843. fallback:
  844. /* This is hardcoded and ugly, but we have some firmware versions
  845. * that don't provide the register space in the device tree. Luckily
  846. * they are at well-known locations so we can just do the math here.
  847. */
  848. return ioremap(0xe0000000 + (p->devfn << 12), 0x2000);
  849. }
  850. static int __devinit pasemi_mac_map_regs(struct pasemi_mac *mac)
  851. {
  852. struct resource res;
  853. struct device_node *dn;
  854. int err;
  855. mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
  856. if (!mac->dma_pdev) {
  857. dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
  858. return -ENODEV;
  859. }
  860. mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
  861. if (!mac->iob_pdev) {
  862. dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
  863. return -ENODEV;
  864. }
  865. mac->regs = map_onedev(mac->pdev, 0);
  866. mac->dma_regs = map_onedev(mac->dma_pdev, 0);
  867. mac->iob_regs = map_onedev(mac->iob_pdev, 0);
  868. if (!mac->regs || !mac->dma_regs || !mac->iob_regs) {
  869. dev_err(&mac->pdev->dev, "Can't map registers\n");
  870. return -ENODEV;
  871. }
  872. /* The dma status structure is located in the I/O bridge, and
  873. * is cache coherent.
  874. */
  875. if (!dma_status) {
  876. dn = pci_device_to_OF_node(mac->iob_pdev);
  877. if (dn)
  878. err = of_address_to_resource(dn, 1, &res);
  879. if (!dn || err) {
  880. /* Fallback for old firmware */
  881. res.start = 0xfd800000;
  882. res.end = res.start + 0x1000;
  883. }
  884. dma_status = __ioremap(res.start, res.end-res.start, 0);
  885. }
  886. return 0;
  887. }
  888. static int __devinit
  889. pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  890. {
  891. static int index = 0;
  892. struct net_device *dev;
  893. struct pasemi_mac *mac;
  894. int err;
  895. DECLARE_MAC_BUF(mac_buf);
  896. err = pci_enable_device(pdev);
  897. if (err)
  898. return err;
  899. dev = alloc_etherdev(sizeof(struct pasemi_mac));
  900. if (dev == NULL) {
  901. dev_err(&pdev->dev,
  902. "pasemi_mac: Could not allocate ethernet device.\n");
  903. err = -ENOMEM;
  904. goto out_disable_device;
  905. }
  906. pci_set_drvdata(pdev, dev);
  907. SET_NETDEV_DEV(dev, &pdev->dev);
  908. mac = netdev_priv(dev);
  909. mac->pdev = pdev;
  910. mac->netdev = dev;
  911. netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
  912. dev->features = NETIF_F_HW_CSUM | NETIF_F_LLTX;
  913. /* These should come out of the device tree eventually */
  914. mac->dma_txch = index;
  915. mac->dma_rxch = index;
  916. /* We probe GMAC before XAUI, but the DMA interfaces are
  917. * in XAUI, GMAC order.
  918. */
  919. if (index < 4)
  920. mac->dma_if = index + 2;
  921. else
  922. mac->dma_if = index - 4;
  923. index++;
  924. switch (pdev->device) {
  925. case 0xa005:
  926. mac->type = MAC_TYPE_GMAC;
  927. break;
  928. case 0xa006:
  929. mac->type = MAC_TYPE_XAUI;
  930. break;
  931. default:
  932. err = -ENODEV;
  933. goto out;
  934. }
  935. /* get mac addr from device tree */
  936. if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
  937. err = -ENODEV;
  938. goto out;
  939. }
  940. memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
  941. dev->open = pasemi_mac_open;
  942. dev->stop = pasemi_mac_close;
  943. dev->hard_start_xmit = pasemi_mac_start_tx;
  944. dev->set_multicast_list = pasemi_mac_set_rx_mode;
  945. err = pasemi_mac_map_regs(mac);
  946. if (err)
  947. goto out;
  948. mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
  949. mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
  950. mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  951. /* Enable most messages by default */
  952. mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
  953. err = register_netdev(dev);
  954. if (err) {
  955. dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
  956. err);
  957. goto out;
  958. } else
  959. printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
  960. "hw addr %s\n",
  961. dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
  962. mac->dma_if, mac->dma_txch, mac->dma_rxch,
  963. print_mac(mac_buf, dev->dev_addr));
  964. return err;
  965. out:
  966. if (mac->iob_pdev)
  967. pci_dev_put(mac->iob_pdev);
  968. if (mac->dma_pdev)
  969. pci_dev_put(mac->dma_pdev);
  970. if (mac->dma_regs)
  971. iounmap(mac->dma_regs);
  972. if (mac->iob_regs)
  973. iounmap(mac->iob_regs);
  974. if (mac->regs)
  975. iounmap(mac->regs);
  976. free_netdev(dev);
  977. out_disable_device:
  978. pci_disable_device(pdev);
  979. return err;
  980. }
  981. static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
  982. {
  983. struct net_device *netdev = pci_get_drvdata(pdev);
  984. struct pasemi_mac *mac;
  985. if (!netdev)
  986. return;
  987. mac = netdev_priv(netdev);
  988. unregister_netdev(netdev);
  989. pci_disable_device(pdev);
  990. pci_dev_put(mac->dma_pdev);
  991. pci_dev_put(mac->iob_pdev);
  992. iounmap(mac->regs);
  993. iounmap(mac->dma_regs);
  994. iounmap(mac->iob_regs);
  995. pci_set_drvdata(pdev, NULL);
  996. free_netdev(netdev);
  997. }
  998. static struct pci_device_id pasemi_mac_pci_tbl[] = {
  999. { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
  1000. { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
  1001. { },
  1002. };
  1003. MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
  1004. static struct pci_driver pasemi_mac_driver = {
  1005. .name = "pasemi_mac",
  1006. .id_table = pasemi_mac_pci_tbl,
  1007. .probe = pasemi_mac_probe,
  1008. .remove = __devexit_p(pasemi_mac_remove),
  1009. };
  1010. static void __exit pasemi_mac_cleanup_module(void)
  1011. {
  1012. pci_unregister_driver(&pasemi_mac_driver);
  1013. __iounmap(dma_status);
  1014. dma_status = NULL;
  1015. }
  1016. int pasemi_mac_init_module(void)
  1017. {
  1018. return pci_register_driver(&pasemi_mac_driver);
  1019. }
  1020. module_init(pasemi_mac_init_module);
  1021. module_exit(pasemi_mac_cleanup_module);