pn544_hci.c 27 KB

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  1. /*
  2. * HCI based Driver for NXP PN544 NFC Chip
  3. *
  4. * Copyright (C) 2012 Intel Corporation. All rights reserved.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms and conditions of the GNU General Public License,
  8. * version 2, as published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the
  17. * Free Software Foundation, Inc.,
  18. * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19. */
  20. #include <linux/crc-ccitt.h>
  21. #include <linux/module.h>
  22. #include <linux/delay.h>
  23. #include <linux/slab.h>
  24. #include <linux/miscdevice.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/gpio.h>
  27. #include <linux/i2c.h>
  28. #include <linux/nfc.h>
  29. #include <net/nfc/hci.h>
  30. #include <net/nfc/llc.h>
  31. #include <linux/nfc/pn544.h>
  32. #define DRIVER_DESC "HCI NFC driver for PN544"
  33. #define PN544_HCI_DRIVER_NAME "pn544_hci"
  34. /* Timing restrictions (ms) */
  35. #define PN544_HCI_RESETVEN_TIME 30
  36. static struct i2c_device_id pn544_hci_id_table[] = {
  37. {"pn544", 0},
  38. {}
  39. };
  40. MODULE_DEVICE_TABLE(i2c, pn544_hci_id_table);
  41. #define HCI_MODE 0
  42. #define FW_MODE 1
  43. /* framing in HCI mode */
  44. #define PN544_HCI_LLC_LEN 1
  45. #define PN544_HCI_LLC_CRC 2
  46. #define PN544_HCI_LLC_LEN_CRC (PN544_HCI_LLC_LEN + PN544_HCI_LLC_CRC)
  47. #define PN544_HCI_LLC_MIN_SIZE (1 + PN544_HCI_LLC_LEN_CRC)
  48. #define PN544_HCI_LLC_MAX_PAYLOAD 29
  49. #define PN544_HCI_LLC_MAX_SIZE (PN544_HCI_LLC_LEN_CRC + 1 + \
  50. PN544_HCI_LLC_MAX_PAYLOAD)
  51. enum pn544_state {
  52. PN544_ST_COLD,
  53. PN544_ST_FW_READY,
  54. PN544_ST_READY,
  55. };
  56. #define FULL_VERSION_LEN 11
  57. /* Proprietary commands */
  58. #define PN544_WRITE 0x3f
  59. /* Proprietary gates, events, commands and registers */
  60. /* NFC_HCI_RF_READER_A_GATE additional registers and commands */
  61. #define PN544_RF_READER_A_AUTO_ACTIVATION 0x10
  62. #define PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION 0x12
  63. #define PN544_MIFARE_CMD 0x21
  64. /* Commands that apply to all RF readers */
  65. #define PN544_RF_READER_CMD_PRESENCE_CHECK 0x30
  66. #define PN544_RF_READER_CMD_ACTIVATE_NEXT 0x32
  67. /* NFC_HCI_ID_MGMT_GATE additional registers */
  68. #define PN544_ID_MGMT_FULL_VERSION_SW 0x10
  69. #define PN544_RF_READER_ISO15693_GATE 0x12
  70. #define PN544_RF_READER_F_GATE 0x14
  71. #define PN544_FELICA_ID 0x04
  72. #define PN544_FELICA_RAW 0x20
  73. #define PN544_RF_READER_JEWEL_GATE 0x15
  74. #define PN544_JEWEL_RAW_CMD 0x23
  75. #define PN544_RF_READER_NFCIP1_INITIATOR_GATE 0x30
  76. #define PN544_RF_READER_NFCIP1_TARGET_GATE 0x31
  77. #define PN544_SYS_MGMT_GATE 0x90
  78. #define PN544_SYS_MGMT_INFO_NOTIFICATION 0x02
  79. #define PN544_POLLING_LOOP_MGMT_GATE 0x94
  80. #define PN544_DEP_MODE 0x01
  81. #define PN544_DEP_ATR_REQ 0x02
  82. #define PN544_DEP_ATR_RES 0x03
  83. #define PN544_DEP_MERGE 0x0D
  84. #define PN544_PL_RDPHASES 0x06
  85. #define PN544_PL_EMULATION 0x07
  86. #define PN544_PL_NFCT_DEACTIVATED 0x09
  87. #define PN544_SWP_MGMT_GATE 0xA0
  88. #define PN544_NFC_WI_MGMT_GATE 0xA1
  89. #define PN544_HCI_EVT_SND_DATA 0x01
  90. #define PN544_HCI_EVT_ACTIVATED 0x02
  91. #define PN544_HCI_EVT_DEACTIVATED 0x03
  92. #define PN544_HCI_EVT_RCV_DATA 0x04
  93. #define PN544_HCI_EVT_CONTINUE_MI 0x05
  94. #define PN544_HCI_CMD_CONTINUE_ACTIVATION 0x13
  95. static struct nfc_hci_gate pn544_gates[] = {
  96. {NFC_HCI_ADMIN_GATE, NFC_HCI_INVALID_PIPE},
  97. {NFC_HCI_LOOPBACK_GATE, NFC_HCI_INVALID_PIPE},
  98. {NFC_HCI_ID_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  99. {NFC_HCI_LINK_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  100. {NFC_HCI_RF_READER_B_GATE, NFC_HCI_INVALID_PIPE},
  101. {NFC_HCI_RF_READER_A_GATE, NFC_HCI_INVALID_PIPE},
  102. {PN544_SYS_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  103. {PN544_SWP_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  104. {PN544_POLLING_LOOP_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  105. {PN544_NFC_WI_MGMT_GATE, NFC_HCI_INVALID_PIPE},
  106. {PN544_RF_READER_F_GATE, NFC_HCI_INVALID_PIPE},
  107. {PN544_RF_READER_JEWEL_GATE, NFC_HCI_INVALID_PIPE},
  108. {PN544_RF_READER_ISO15693_GATE, NFC_HCI_INVALID_PIPE},
  109. {PN544_RF_READER_NFCIP1_INITIATOR_GATE, NFC_HCI_INVALID_PIPE},
  110. {PN544_RF_READER_NFCIP1_TARGET_GATE, NFC_HCI_INVALID_PIPE}
  111. };
  112. /* Largest headroom needed for outgoing custom commands */
  113. #define PN544_CMDS_HEADROOM 2
  114. #define PN544_FRAME_HEADROOM 1
  115. #define PN544_FRAME_TAILROOM 2
  116. struct pn544_hci_info {
  117. struct i2c_client *i2c_dev;
  118. struct nfc_hci_dev *hdev;
  119. enum pn544_state state;
  120. struct mutex info_lock;
  121. unsigned int gpio_en;
  122. unsigned int gpio_irq;
  123. unsigned int gpio_fw;
  124. unsigned int en_polarity;
  125. int hard_fault; /*
  126. * < 0 if hardware error occured (e.g. i2c err)
  127. * and prevents normal operation.
  128. */
  129. int async_cb_type;
  130. data_exchange_cb_t async_cb;
  131. void *async_cb_context;
  132. };
  133. static void pn544_hci_platform_init(struct pn544_hci_info *info)
  134. {
  135. int polarity, retry, ret;
  136. char rset_cmd[] = { 0x05, 0xF9, 0x04, 0x00, 0xC3, 0xE5 };
  137. int count = sizeof(rset_cmd);
  138. pr_info(DRIVER_DESC ": %s\n", __func__);
  139. dev_info(&info->i2c_dev->dev, "Detecting nfc_en polarity\n");
  140. /* Disable fw download */
  141. gpio_set_value(info->gpio_fw, 0);
  142. for (polarity = 0; polarity < 2; polarity++) {
  143. info->en_polarity = polarity;
  144. retry = 3;
  145. while (retry--) {
  146. /* power off */
  147. gpio_set_value(info->gpio_en, !info->en_polarity);
  148. usleep_range(10000, 15000);
  149. /* power on */
  150. gpio_set_value(info->gpio_en, info->en_polarity);
  151. usleep_range(10000, 15000);
  152. /* send reset */
  153. dev_dbg(&info->i2c_dev->dev, "Sending reset cmd\n");
  154. ret = i2c_master_send(info->i2c_dev, rset_cmd, count);
  155. if (ret == count) {
  156. dev_info(&info->i2c_dev->dev,
  157. "nfc_en polarity : active %s\n",
  158. (polarity == 0 ? "low" : "high"));
  159. goto out;
  160. }
  161. }
  162. }
  163. dev_err(&info->i2c_dev->dev,
  164. "Could not detect nfc_en polarity, fallback to active high\n");
  165. out:
  166. gpio_set_value(info->gpio_en, !info->en_polarity);
  167. }
  168. static int pn544_hci_enable(struct pn544_hci_info *info, int mode)
  169. {
  170. pr_info(DRIVER_DESC ": %s\n", __func__);
  171. gpio_set_value(info->gpio_fw, 0);
  172. gpio_set_value(info->gpio_en, info->en_polarity);
  173. usleep_range(10000, 15000);
  174. return 0;
  175. }
  176. static void pn544_hci_disable(struct pn544_hci_info *info)
  177. {
  178. pr_info(DRIVER_DESC ": %s\n", __func__);
  179. gpio_set_value(info->gpio_fw, 0);
  180. gpio_set_value(info->gpio_en, !info->en_polarity);
  181. usleep_range(10000, 15000);
  182. gpio_set_value(info->gpio_en, info->en_polarity);
  183. usleep_range(10000, 15000);
  184. gpio_set_value(info->gpio_en, !info->en_polarity);
  185. usleep_range(10000, 15000);
  186. }
  187. static int pn544_hci_i2c_write(struct i2c_client *client, u8 *buf, int len)
  188. {
  189. int r;
  190. usleep_range(3000, 6000);
  191. r = i2c_master_send(client, buf, len);
  192. if (r == -EREMOTEIO) { /* Retry, chip was in standby */
  193. usleep_range(6000, 10000);
  194. r = i2c_master_send(client, buf, len);
  195. }
  196. if (r >= 0) {
  197. if (r != len)
  198. return -EREMOTEIO;
  199. else
  200. return 0;
  201. }
  202. return r;
  203. }
  204. static int check_crc(u8 *buf, int buflen)
  205. {
  206. int len;
  207. u16 crc;
  208. len = buf[0] + 1;
  209. crc = crc_ccitt(0xffff, buf, len - 2);
  210. crc = ~crc;
  211. if (buf[len - 2] != (crc & 0xff) || buf[len - 1] != (crc >> 8)) {
  212. pr_err(PN544_HCI_DRIVER_NAME ": CRC error 0x%x != 0x%x 0x%x\n",
  213. crc, buf[len - 1], buf[len - 2]);
  214. pr_info(DRIVER_DESC ": %s : BAD CRC\n", __func__);
  215. print_hex_dump(KERN_DEBUG, "crc: ", DUMP_PREFIX_NONE,
  216. 16, 2, buf, buflen, false);
  217. return -EPERM;
  218. }
  219. return 0;
  220. }
  221. /*
  222. * Reads an shdlc frame and returns it in a newly allocated sk_buff. Guarantees
  223. * that i2c bus will be flushed and that next read will start on a new frame.
  224. * returned skb contains only LLC header and payload.
  225. * returns:
  226. * -EREMOTEIO : i2c read error (fatal)
  227. * -EBADMSG : frame was incorrect and discarded
  228. * -ENOMEM : cannot allocate skb, frame dropped
  229. */
  230. static int pn544_hci_i2c_read(struct i2c_client *client, struct sk_buff **skb)
  231. {
  232. int r;
  233. u8 len;
  234. u8 tmp[PN544_HCI_LLC_MAX_SIZE - 1];
  235. r = i2c_master_recv(client, &len, 1);
  236. if (r != 1) {
  237. dev_err(&client->dev, "cannot read len byte\n");
  238. return -EREMOTEIO;
  239. }
  240. if ((len < (PN544_HCI_LLC_MIN_SIZE - 1)) ||
  241. (len > (PN544_HCI_LLC_MAX_SIZE - 1))) {
  242. dev_err(&client->dev, "invalid len byte\n");
  243. r = -EBADMSG;
  244. goto flush;
  245. }
  246. *skb = alloc_skb(1 + len, GFP_KERNEL);
  247. if (*skb == NULL) {
  248. r = -ENOMEM;
  249. goto flush;
  250. }
  251. *skb_put(*skb, 1) = len;
  252. r = i2c_master_recv(client, skb_put(*skb, len), len);
  253. if (r != len) {
  254. kfree_skb(*skb);
  255. return -EREMOTEIO;
  256. }
  257. r = check_crc((*skb)->data, (*skb)->len);
  258. if (r != 0) {
  259. kfree_skb(*skb);
  260. r = -EBADMSG;
  261. goto flush;
  262. }
  263. skb_pull(*skb, 1);
  264. skb_trim(*skb, (*skb)->len - 2);
  265. usleep_range(3000, 6000);
  266. return 0;
  267. flush:
  268. if (i2c_master_recv(client, tmp, sizeof(tmp)) < 0)
  269. r = -EREMOTEIO;
  270. usleep_range(3000, 6000);
  271. return r;
  272. }
  273. /*
  274. * Reads an shdlc frame from the chip. This is not as straightforward as it
  275. * seems. There are cases where we could loose the frame start synchronization.
  276. * The frame format is len-data-crc, and corruption can occur anywhere while
  277. * transiting on i2c bus, such that we could read an invalid len.
  278. * In order to recover synchronization with the next frame, we must be sure
  279. * to read the real amount of data without using the len byte. We do this by
  280. * assuming the following:
  281. * - the chip will always present only one single complete frame on the bus
  282. * before triggering the interrupt
  283. * - the chip will not present a new frame until we have completely read
  284. * the previous one (or until we have handled the interrupt).
  285. * The tricky case is when we read a corrupted len that is less than the real
  286. * len. We must detect this here in order to determine that we need to flush
  287. * the bus. This is the reason why we check the crc here.
  288. */
  289. static irqreturn_t pn544_hci_irq_thread_fn(int irq, void *dev_id)
  290. {
  291. struct pn544_hci_info *info = dev_id;
  292. struct i2c_client *client;
  293. struct sk_buff *skb = NULL;
  294. int r;
  295. if (!info || irq != info->i2c_dev->irq) {
  296. WARN_ON_ONCE(1);
  297. return IRQ_NONE;
  298. }
  299. client = info->i2c_dev;
  300. dev_dbg(&client->dev, "IRQ\n");
  301. if (info->hard_fault != 0)
  302. return IRQ_HANDLED;
  303. r = pn544_hci_i2c_read(client, &skb);
  304. if (r == -EREMOTEIO) {
  305. info->hard_fault = r;
  306. nfc_hci_recv_frame(info->hdev, NULL);
  307. return IRQ_HANDLED;
  308. } else if ((r == -ENOMEM) || (r == -EBADMSG)) {
  309. return IRQ_HANDLED;
  310. }
  311. nfc_hci_recv_frame(info->hdev, skb);
  312. return IRQ_HANDLED;
  313. }
  314. static int pn544_hci_open(struct nfc_hci_dev *hdev)
  315. {
  316. struct pn544_hci_info *info = nfc_hci_get_clientdata(hdev);
  317. int r = 0;
  318. mutex_lock(&info->info_lock);
  319. if (info->state != PN544_ST_COLD) {
  320. r = -EBUSY;
  321. goto out;
  322. }
  323. r = pn544_hci_enable(info, HCI_MODE);
  324. if (r == 0)
  325. info->state = PN544_ST_READY;
  326. out:
  327. mutex_unlock(&info->info_lock);
  328. return r;
  329. }
  330. static void pn544_hci_close(struct nfc_hci_dev *hdev)
  331. {
  332. struct pn544_hci_info *info = nfc_hci_get_clientdata(hdev);
  333. mutex_lock(&info->info_lock);
  334. if (info->state == PN544_ST_COLD)
  335. goto out;
  336. pn544_hci_disable(info);
  337. info->state = PN544_ST_COLD;
  338. out:
  339. mutex_unlock(&info->info_lock);
  340. }
  341. static int pn544_hci_ready(struct nfc_hci_dev *hdev)
  342. {
  343. struct sk_buff *skb;
  344. static struct hw_config {
  345. u8 adr[2];
  346. u8 value;
  347. } hw_config[] = {
  348. {{0x9f, 0x9a}, 0x00},
  349. {{0x98, 0x10}, 0xbc},
  350. {{0x9e, 0x71}, 0x00},
  351. {{0x98, 0x09}, 0x00},
  352. {{0x9e, 0xb4}, 0x00},
  353. {{0x9e, 0xd9}, 0xff},
  354. {{0x9e, 0xda}, 0xff},
  355. {{0x9e, 0xdb}, 0x23},
  356. {{0x9e, 0xdc}, 0x21},
  357. {{0x9e, 0xdd}, 0x22},
  358. {{0x9e, 0xde}, 0x24},
  359. {{0x9c, 0x01}, 0x08},
  360. {{0x9e, 0xaa}, 0x01},
  361. {{0x9b, 0xd1}, 0x0d},
  362. {{0x9b, 0xd2}, 0x24},
  363. {{0x9b, 0xd3}, 0x0a},
  364. {{0x9b, 0xd4}, 0x22},
  365. {{0x9b, 0xd5}, 0x08},
  366. {{0x9b, 0xd6}, 0x1e},
  367. {{0x9b, 0xdd}, 0x1c},
  368. {{0x9b, 0x84}, 0x13},
  369. {{0x99, 0x81}, 0x7f},
  370. {{0x99, 0x31}, 0x70},
  371. {{0x98, 0x00}, 0x3f},
  372. {{0x9f, 0x09}, 0x00},
  373. {{0x9f, 0x0a}, 0x05},
  374. {{0x9e, 0xd1}, 0xa1},
  375. {{0x99, 0x23}, 0x00},
  376. {{0x9e, 0x74}, 0x80},
  377. {{0x9f, 0x28}, 0x10},
  378. {{0x9f, 0x35}, 0x14},
  379. {{0x9f, 0x36}, 0x60},
  380. {{0x9c, 0x31}, 0x00},
  381. {{0x9c, 0x32}, 0xc8},
  382. {{0x9c, 0x19}, 0x40},
  383. {{0x9c, 0x1a}, 0x40},
  384. {{0x9c, 0x0c}, 0x00},
  385. {{0x9c, 0x0d}, 0x00},
  386. {{0x9c, 0x12}, 0x00},
  387. {{0x9c, 0x13}, 0x00},
  388. {{0x98, 0xa2}, 0x0e},
  389. {{0x98, 0x93}, 0x40},
  390. {{0x98, 0x7d}, 0x02},
  391. {{0x98, 0x7e}, 0x00},
  392. {{0x9f, 0xc8}, 0x01},
  393. };
  394. struct hw_config *p = hw_config;
  395. int count = ARRAY_SIZE(hw_config);
  396. struct sk_buff *res_skb;
  397. u8 param[4];
  398. int r;
  399. param[0] = 0;
  400. while (count--) {
  401. param[1] = p->adr[0];
  402. param[2] = p->adr[1];
  403. param[3] = p->value;
  404. r = nfc_hci_send_cmd(hdev, PN544_SYS_MGMT_GATE, PN544_WRITE,
  405. param, 4, &res_skb);
  406. if (r < 0)
  407. return r;
  408. if (res_skb->len != 1) {
  409. kfree_skb(res_skb);
  410. return -EPROTO;
  411. }
  412. if (res_skb->data[0] != p->value) {
  413. kfree_skb(res_skb);
  414. return -EIO;
  415. }
  416. kfree_skb(res_skb);
  417. p++;
  418. }
  419. param[0] = NFC_HCI_UICC_HOST_ID;
  420. r = nfc_hci_set_param(hdev, NFC_HCI_ADMIN_GATE,
  421. NFC_HCI_ADMIN_WHITELIST, param, 1);
  422. if (r < 0)
  423. return r;
  424. param[0] = 0x3d;
  425. r = nfc_hci_set_param(hdev, PN544_SYS_MGMT_GATE,
  426. PN544_SYS_MGMT_INFO_NOTIFICATION, param, 1);
  427. if (r < 0)
  428. return r;
  429. param[0] = 0x0;
  430. r = nfc_hci_set_param(hdev, NFC_HCI_RF_READER_A_GATE,
  431. PN544_RF_READER_A_AUTO_ACTIVATION, param, 1);
  432. if (r < 0)
  433. return r;
  434. r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
  435. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  436. if (r < 0)
  437. return r;
  438. param[0] = 0x1;
  439. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  440. PN544_PL_NFCT_DEACTIVATED, param, 1);
  441. if (r < 0)
  442. return r;
  443. param[0] = 0x0;
  444. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  445. PN544_PL_RDPHASES, param, 1);
  446. if (r < 0)
  447. return r;
  448. r = nfc_hci_get_param(hdev, NFC_HCI_ID_MGMT_GATE,
  449. PN544_ID_MGMT_FULL_VERSION_SW, &skb);
  450. if (r < 0)
  451. return r;
  452. if (skb->len != FULL_VERSION_LEN) {
  453. kfree_skb(skb);
  454. return -EINVAL;
  455. }
  456. print_hex_dump(KERN_DEBUG, "FULL VERSION SOFTWARE INFO: ",
  457. DUMP_PREFIX_NONE, 16, 1,
  458. skb->data, FULL_VERSION_LEN, false);
  459. kfree_skb(skb);
  460. return 0;
  461. }
  462. static void pn544_hci_add_len_crc(struct sk_buff *skb)
  463. {
  464. u16 crc;
  465. int len;
  466. len = skb->len + 2;
  467. *skb_push(skb, 1) = len;
  468. crc = crc_ccitt(0xffff, skb->data, skb->len);
  469. crc = ~crc;
  470. *skb_put(skb, 1) = crc & 0xff;
  471. *skb_put(skb, 1) = crc >> 8;
  472. }
  473. static void pn544_hci_remove_len_crc(struct sk_buff *skb)
  474. {
  475. skb_pull(skb, PN544_FRAME_HEADROOM);
  476. skb_trim(skb, PN544_FRAME_TAILROOM);
  477. }
  478. static int pn544_hci_xmit(struct nfc_hci_dev *hdev, struct sk_buff *skb)
  479. {
  480. struct pn544_hci_info *info = nfc_hci_get_clientdata(hdev);
  481. struct i2c_client *client = info->i2c_dev;
  482. int r;
  483. if (info->hard_fault != 0)
  484. return info->hard_fault;
  485. pn544_hci_add_len_crc(skb);
  486. r = pn544_hci_i2c_write(client, skb->data, skb->len);
  487. pn544_hci_remove_len_crc(skb);
  488. return r;
  489. }
  490. static int pn544_hci_start_poll(struct nfc_hci_dev *hdev,
  491. u32 im_protocols, u32 tm_protocols)
  492. {
  493. u8 phases = 0;
  494. int r;
  495. u8 duration[2];
  496. u8 activated;
  497. u8 i_mode = 0x3f; /* Enable all supported modes */
  498. u8 t_mode = 0x0f;
  499. u8 t_merge = 0x01; /* Enable merge by default */
  500. pr_info(DRIVER_DESC ": %s protocols 0x%x 0x%x\n",
  501. __func__, im_protocols, tm_protocols);
  502. r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
  503. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  504. if (r < 0)
  505. return r;
  506. duration[0] = 0x18;
  507. duration[1] = 0x6a;
  508. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  509. PN544_PL_EMULATION, duration, 2);
  510. if (r < 0)
  511. return r;
  512. activated = 0;
  513. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  514. PN544_PL_NFCT_DEACTIVATED, &activated, 1);
  515. if (r < 0)
  516. return r;
  517. if (im_protocols & (NFC_PROTO_ISO14443_MASK | NFC_PROTO_MIFARE_MASK |
  518. NFC_PROTO_JEWEL_MASK))
  519. phases |= 1; /* Type A */
  520. if (im_protocols & NFC_PROTO_FELICA_MASK) {
  521. phases |= (1 << 2); /* Type F 212 */
  522. phases |= (1 << 3); /* Type F 424 */
  523. }
  524. phases |= (1 << 5); /* NFC active */
  525. r = nfc_hci_set_param(hdev, PN544_POLLING_LOOP_MGMT_GATE,
  526. PN544_PL_RDPHASES, &phases, 1);
  527. if (r < 0)
  528. return r;
  529. if ((im_protocols | tm_protocols) & NFC_PROTO_NFC_DEP_MASK) {
  530. hdev->gb = nfc_get_local_general_bytes(hdev->ndev,
  531. &hdev->gb_len);
  532. pr_debug("generate local bytes %p", hdev->gb);
  533. if (hdev->gb == NULL || hdev->gb_len == 0) {
  534. im_protocols &= ~NFC_PROTO_NFC_DEP_MASK;
  535. tm_protocols &= ~NFC_PROTO_NFC_DEP_MASK;
  536. }
  537. }
  538. if (im_protocols & NFC_PROTO_NFC_DEP_MASK) {
  539. r = nfc_hci_send_event(hdev,
  540. PN544_RF_READER_NFCIP1_INITIATOR_GATE,
  541. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  542. if (r < 0)
  543. return r;
  544. r = nfc_hci_set_param(hdev,
  545. PN544_RF_READER_NFCIP1_INITIATOR_GATE,
  546. PN544_DEP_MODE, &i_mode, 1);
  547. if (r < 0)
  548. return r;
  549. r = nfc_hci_set_param(hdev,
  550. PN544_RF_READER_NFCIP1_INITIATOR_GATE,
  551. PN544_DEP_ATR_REQ, hdev->gb, hdev->gb_len);
  552. if (r < 0)
  553. return r;
  554. r = nfc_hci_send_event(hdev,
  555. PN544_RF_READER_NFCIP1_INITIATOR_GATE,
  556. NFC_HCI_EVT_READER_REQUESTED, NULL, 0);
  557. if (r < 0)
  558. nfc_hci_send_event(hdev,
  559. PN544_RF_READER_NFCIP1_INITIATOR_GATE,
  560. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  561. }
  562. if (tm_protocols & NFC_PROTO_NFC_DEP_MASK) {
  563. r = nfc_hci_set_param(hdev, PN544_RF_READER_NFCIP1_TARGET_GATE,
  564. PN544_DEP_MODE, &t_mode, 1);
  565. if (r < 0)
  566. return r;
  567. r = nfc_hci_set_param(hdev, PN544_RF_READER_NFCIP1_TARGET_GATE,
  568. PN544_DEP_ATR_RES, hdev->gb, hdev->gb_len);
  569. if (r < 0)
  570. return r;
  571. r = nfc_hci_set_param(hdev, PN544_RF_READER_NFCIP1_TARGET_GATE,
  572. PN544_DEP_MERGE, &t_merge, 1);
  573. if (r < 0)
  574. return r;
  575. }
  576. r = nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
  577. NFC_HCI_EVT_READER_REQUESTED, NULL, 0);
  578. if (r < 0)
  579. nfc_hci_send_event(hdev, NFC_HCI_RF_READER_A_GATE,
  580. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  581. return r;
  582. }
  583. static int pn544_hci_target_from_gate(struct nfc_hci_dev *hdev, u8 gate,
  584. struct nfc_target *target)
  585. {
  586. switch (gate) {
  587. case PN544_RF_READER_F_GATE:
  588. target->supported_protocols = NFC_PROTO_FELICA_MASK;
  589. break;
  590. case PN544_RF_READER_JEWEL_GATE:
  591. target->supported_protocols = NFC_PROTO_JEWEL_MASK;
  592. target->sens_res = 0x0c00;
  593. break;
  594. case PN544_RF_READER_NFCIP1_INITIATOR_GATE:
  595. target->supported_protocols = NFC_PROTO_NFC_DEP_MASK;
  596. break;
  597. default:
  598. return -EPROTO;
  599. }
  600. return 0;
  601. }
  602. static int pn544_hci_complete_target_discovered(struct nfc_hci_dev *hdev,
  603. u8 gate,
  604. struct nfc_target *target)
  605. {
  606. struct sk_buff *uid_skb;
  607. int r = 0;
  608. if (gate == PN544_RF_READER_NFCIP1_INITIATOR_GATE)
  609. return r;
  610. if (target->supported_protocols & NFC_PROTO_NFC_DEP_MASK) {
  611. r = nfc_hci_send_cmd(hdev,
  612. PN544_RF_READER_NFCIP1_INITIATOR_GATE,
  613. PN544_HCI_CMD_CONTINUE_ACTIVATION, NULL, 0, NULL);
  614. if (r < 0)
  615. return r;
  616. target->hci_reader_gate = PN544_RF_READER_NFCIP1_INITIATOR_GATE;
  617. } else if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) {
  618. if (target->nfcid1_len != 4 && target->nfcid1_len != 7 &&
  619. target->nfcid1_len != 10)
  620. return -EPROTO;
  621. r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE,
  622. PN544_RF_READER_CMD_ACTIVATE_NEXT,
  623. target->nfcid1, target->nfcid1_len, NULL);
  624. } else if (target->supported_protocols & NFC_PROTO_FELICA_MASK) {
  625. r = nfc_hci_get_param(hdev, PN544_RF_READER_F_GATE,
  626. PN544_FELICA_ID, &uid_skb);
  627. if (r < 0)
  628. return r;
  629. if (uid_skb->len != 8) {
  630. kfree_skb(uid_skb);
  631. return -EPROTO;
  632. }
  633. r = nfc_hci_send_cmd(hdev, PN544_RF_READER_F_GATE,
  634. PN544_RF_READER_CMD_ACTIVATE_NEXT,
  635. uid_skb->data, uid_skb->len, NULL);
  636. kfree_skb(uid_skb);
  637. r = nfc_hci_send_cmd(hdev,
  638. PN544_RF_READER_NFCIP1_INITIATOR_GATE,
  639. PN544_HCI_CMD_CONTINUE_ACTIVATION,
  640. NULL, 0, NULL);
  641. if (r < 0)
  642. return r;
  643. target->hci_reader_gate = PN544_RF_READER_NFCIP1_INITIATOR_GATE;
  644. target->supported_protocols = NFC_PROTO_NFC_DEP_MASK;
  645. } else if (target->supported_protocols & NFC_PROTO_ISO14443_MASK) {
  646. /*
  647. * TODO: maybe other ISO 14443 require some kind of continue
  648. * activation, but for now we've seen only this one below.
  649. */
  650. if (target->sens_res == 0x4403) /* Type 4 Mifare DESFire */
  651. r = nfc_hci_send_cmd(hdev, NFC_HCI_RF_READER_A_GATE,
  652. PN544_RF_READER_A_CMD_CONTINUE_ACTIVATION,
  653. NULL, 0, NULL);
  654. }
  655. return r;
  656. }
  657. #define PN544_CB_TYPE_READER_F 1
  658. static void pn544_hci_data_exchange_cb(void *context, struct sk_buff *skb,
  659. int err)
  660. {
  661. struct pn544_hci_info *info = context;
  662. switch (info->async_cb_type) {
  663. case PN544_CB_TYPE_READER_F:
  664. if (err == 0)
  665. skb_pull(skb, 1);
  666. info->async_cb(info->async_cb_context, skb, err);
  667. break;
  668. default:
  669. if (err == 0)
  670. kfree_skb(skb);
  671. break;
  672. }
  673. }
  674. #define MIFARE_CMD_AUTH_KEY_A 0x60
  675. #define MIFARE_CMD_AUTH_KEY_B 0x61
  676. #define MIFARE_CMD_HEADER 2
  677. #define MIFARE_UID_LEN 4
  678. #define MIFARE_KEY_LEN 6
  679. #define MIFARE_CMD_LEN 12
  680. /*
  681. * Returns:
  682. * <= 0: driver handled the data exchange
  683. * 1: driver doesn't especially handle, please do standard processing
  684. */
  685. static int pn544_hci_data_exchange(struct nfc_hci_dev *hdev,
  686. struct nfc_target *target,
  687. struct sk_buff *skb, data_exchange_cb_t cb,
  688. void *cb_context)
  689. {
  690. struct pn544_hci_info *info = nfc_hci_get_clientdata(hdev);
  691. pr_info(DRIVER_DESC ": %s for gate=%d\n", __func__,
  692. target->hci_reader_gate);
  693. switch (target->hci_reader_gate) {
  694. case NFC_HCI_RF_READER_A_GATE:
  695. if (target->supported_protocols & NFC_PROTO_MIFARE_MASK) {
  696. /*
  697. * It seems that pn544 is inverting key and UID for
  698. * MIFARE authentication commands.
  699. */
  700. if (skb->len == MIFARE_CMD_LEN &&
  701. (skb->data[0] == MIFARE_CMD_AUTH_KEY_A ||
  702. skb->data[0] == MIFARE_CMD_AUTH_KEY_B)) {
  703. u8 uid[MIFARE_UID_LEN];
  704. u8 *data = skb->data + MIFARE_CMD_HEADER;
  705. memcpy(uid, data + MIFARE_KEY_LEN,
  706. MIFARE_UID_LEN);
  707. memmove(data + MIFARE_UID_LEN, data,
  708. MIFARE_KEY_LEN);
  709. memcpy(data, uid, MIFARE_UID_LEN);
  710. }
  711. return nfc_hci_send_cmd_async(hdev,
  712. target->hci_reader_gate,
  713. PN544_MIFARE_CMD,
  714. skb->data, skb->len,
  715. cb, cb_context);
  716. } else
  717. return 1;
  718. case PN544_RF_READER_F_GATE:
  719. *skb_push(skb, 1) = 0;
  720. *skb_push(skb, 1) = 0;
  721. info->async_cb_type = PN544_CB_TYPE_READER_F;
  722. info->async_cb = cb;
  723. info->async_cb_context = cb_context;
  724. return nfc_hci_send_cmd_async(hdev, target->hci_reader_gate,
  725. PN544_FELICA_RAW, skb->data,
  726. skb->len,
  727. pn544_hci_data_exchange_cb, info);
  728. case PN544_RF_READER_JEWEL_GATE:
  729. return nfc_hci_send_cmd_async(hdev, target->hci_reader_gate,
  730. PN544_JEWEL_RAW_CMD, skb->data,
  731. skb->len, cb, cb_context);
  732. default:
  733. return 1;
  734. }
  735. }
  736. static int pn544_hci_check_presence(struct nfc_hci_dev *hdev,
  737. struct nfc_target *target)
  738. {
  739. return nfc_hci_send_cmd(hdev, target->hci_reader_gate,
  740. PN544_RF_READER_CMD_PRESENCE_CHECK,
  741. NULL, 0, NULL);
  742. }
  743. void pn544_hci_event_received(struct nfc_hci_dev *hdev, u8 gate, u8 event,
  744. struct sk_buff *skb)
  745. {
  746. struct sk_buff *rgb_skb = NULL;
  747. int r = 0;
  748. pr_debug("hci event %d", event);
  749. switch (event) {
  750. case PN544_HCI_EVT_ACTIVATED:
  751. if (gate == PN544_RF_READER_NFCIP1_INITIATOR_GATE)
  752. nfc_hci_target_discovered(hdev, gate);
  753. else if (gate == PN544_RF_READER_NFCIP1_TARGET_GATE) {
  754. r = nfc_hci_get_param(hdev, gate, PN544_DEP_ATR_REQ,
  755. &rgb_skb);
  756. if (r < 0)
  757. goto exit;
  758. nfc_tm_activated(hdev->ndev, NFC_PROTO_NFC_DEP_MASK,
  759. NFC_COMM_PASSIVE, rgb_skb->data,
  760. rgb_skb->len);
  761. kfree_skb(rgb_skb);
  762. }
  763. break;
  764. case PN544_HCI_EVT_DEACTIVATED:
  765. nfc_hci_send_event(hdev, gate,
  766. NFC_HCI_EVT_END_OPERATION, NULL, 0);
  767. break;
  768. default:
  769. break;
  770. }
  771. exit:
  772. kfree_skb(skb);
  773. }
  774. static struct nfc_hci_ops pn544_hci_ops = {
  775. .open = pn544_hci_open,
  776. .close = pn544_hci_close,
  777. .hci_ready = pn544_hci_ready,
  778. .xmit = pn544_hci_xmit,
  779. .start_poll = pn544_hci_start_poll,
  780. .target_from_gate = pn544_hci_target_from_gate,
  781. .complete_target_discovered = pn544_hci_complete_target_discovered,
  782. .data_exchange = pn544_hci_data_exchange,
  783. .check_presence = pn544_hci_check_presence,
  784. .event_received = pn544_hci_event_received,
  785. };
  786. static int __devinit pn544_hci_probe(struct i2c_client *client,
  787. const struct i2c_device_id *id)
  788. {
  789. struct pn544_hci_info *info;
  790. struct pn544_nfc_platform_data *pdata;
  791. int r = 0;
  792. u32 protocols;
  793. struct nfc_hci_init_data init_data;
  794. dev_dbg(&client->dev, "%s\n", __func__);
  795. dev_dbg(&client->dev, "IRQ: %d\n", client->irq);
  796. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
  797. dev_err(&client->dev, "Need I2C_FUNC_I2C\n");
  798. return -ENODEV;
  799. }
  800. info = kzalloc(sizeof(struct pn544_hci_info), GFP_KERNEL);
  801. if (!info) {
  802. dev_err(&client->dev,
  803. "Cannot allocate memory for pn544_hci_info.\n");
  804. r = -ENOMEM;
  805. goto err_info_alloc;
  806. }
  807. info->i2c_dev = client;
  808. info->state = PN544_ST_COLD;
  809. mutex_init(&info->info_lock);
  810. i2c_set_clientdata(client, info);
  811. pdata = client->dev.platform_data;
  812. if (pdata == NULL) {
  813. dev_err(&client->dev, "No platform data\n");
  814. r = -EINVAL;
  815. goto err_pdata;
  816. }
  817. if (pdata->request_resources == NULL) {
  818. dev_err(&client->dev, "request_resources() missing\n");
  819. r = -EINVAL;
  820. goto err_pdata;
  821. }
  822. r = pdata->request_resources(client);
  823. if (r) {
  824. dev_err(&client->dev, "Cannot get platform resources\n");
  825. goto err_pdata;
  826. }
  827. info->gpio_en = pdata->get_gpio(NFC_GPIO_ENABLE);
  828. info->gpio_fw = pdata->get_gpio(NFC_GPIO_FW_RESET);
  829. info->gpio_irq = pdata->get_gpio(NFC_GPIO_IRQ);
  830. pn544_hci_platform_init(info);
  831. r = request_threaded_irq(client->irq, NULL, pn544_hci_irq_thread_fn,
  832. IRQF_TRIGGER_RISING | IRQF_ONESHOT,
  833. PN544_HCI_DRIVER_NAME, info);
  834. if (r < 0) {
  835. dev_err(&client->dev, "Unable to register IRQ handler\n");
  836. goto err_rti;
  837. }
  838. init_data.gate_count = ARRAY_SIZE(pn544_gates);
  839. memcpy(init_data.gates, pn544_gates, sizeof(pn544_gates));
  840. /*
  841. * TODO: Session id must include the driver name + some bus addr
  842. * persistent info to discriminate 2 identical chips
  843. */
  844. strcpy(init_data.session_id, "ID544HCI");
  845. protocols = NFC_PROTO_JEWEL_MASK |
  846. NFC_PROTO_MIFARE_MASK |
  847. NFC_PROTO_FELICA_MASK |
  848. NFC_PROTO_ISO14443_MASK |
  849. NFC_PROTO_ISO14443_B_MASK |
  850. NFC_PROTO_NFC_DEP_MASK;
  851. info->hdev = nfc_hci_allocate_device(&pn544_hci_ops, &init_data,
  852. protocols, LLC_SHDLC_NAME,
  853. PN544_FRAME_HEADROOM +
  854. PN544_CMDS_HEADROOM,
  855. PN544_FRAME_TAILROOM,
  856. PN544_HCI_LLC_MAX_PAYLOAD);
  857. if (!info->hdev) {
  858. dev_err(&client->dev, "Cannot allocate nfc hdev.\n");
  859. r = -ENOMEM;
  860. goto err_alloc_hdev;
  861. }
  862. nfc_hci_set_clientdata(info->hdev, info);
  863. r = nfc_hci_register_device(info->hdev);
  864. if (r)
  865. goto err_regdev;
  866. return 0;
  867. err_regdev:
  868. nfc_hci_free_device(info->hdev);
  869. err_alloc_hdev:
  870. free_irq(client->irq, info);
  871. err_rti:
  872. if (pdata->free_resources != NULL)
  873. pdata->free_resources();
  874. err_pdata:
  875. kfree(info);
  876. err_info_alloc:
  877. return r;
  878. }
  879. static __devexit int pn544_hci_remove(struct i2c_client *client)
  880. {
  881. struct pn544_hci_info *info = i2c_get_clientdata(client);
  882. struct pn544_nfc_platform_data *pdata = client->dev.platform_data;
  883. dev_dbg(&client->dev, "%s\n", __func__);
  884. nfc_hci_free_device(info->hdev);
  885. if (info->state != PN544_ST_COLD) {
  886. if (pdata->disable)
  887. pdata->disable();
  888. }
  889. free_irq(client->irq, info);
  890. if (pdata->free_resources)
  891. pdata->free_resources();
  892. kfree(info);
  893. return 0;
  894. }
  895. static struct i2c_driver pn544_hci_driver = {
  896. .driver = {
  897. .name = PN544_HCI_DRIVER_NAME,
  898. },
  899. .probe = pn544_hci_probe,
  900. .id_table = pn544_hci_id_table,
  901. .remove = __devexit_p(pn544_hci_remove),
  902. };
  903. static int __init pn544_hci_init(void)
  904. {
  905. int r;
  906. pr_debug(DRIVER_DESC ": %s\n", __func__);
  907. r = i2c_add_driver(&pn544_hci_driver);
  908. if (r) {
  909. pr_err(PN544_HCI_DRIVER_NAME ": driver registration failed\n");
  910. return r;
  911. }
  912. return 0;
  913. }
  914. static void __exit pn544_hci_exit(void)
  915. {
  916. i2c_del_driver(&pn544_hci_driver);
  917. }
  918. module_init(pn544_hci_init);
  919. module_exit(pn544_hci_exit);
  920. MODULE_LICENSE("GPL");
  921. MODULE_DESCRIPTION(DRIVER_DESC);