board-h3.c 12 KB

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  1. /*
  2. * linux/arch/arm/mach-omap1/board-h3.c
  3. *
  4. * This file contains OMAP1710 H3 specific code.
  5. *
  6. * Copyright (C) 2004 Texas Instruments, Inc.
  7. * Copyright (C) 2002 MontaVista Software, Inc.
  8. * Copyright (C) 2001 RidgeRun, Inc.
  9. * Author: RidgeRun, Inc.
  10. * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. */
  16. #include <linux/types.h>
  17. #include <linux/init.h>
  18. #include <linux/major.h>
  19. #include <linux/kernel.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/errno.h>
  22. #include <linux/workqueue.h>
  23. #include <linux/mtd/mtd.h>
  24. #include <linux/mtd/nand.h>
  25. #include <linux/mtd/partitions.h>
  26. #include <linux/input.h>
  27. #include <asm/setup.h>
  28. #include <asm/page.h>
  29. #include <asm/hardware.h>
  30. #include <asm/mach-types.h>
  31. #include <asm/mach/arch.h>
  32. #include <asm/mach/flash.h>
  33. #include <asm/mach/map.h>
  34. #include <asm/arch/gpio.h>
  35. #include <asm/arch/gpioexpander.h>
  36. #include <asm/arch/irqs.h>
  37. #include <asm/arch/mux.h>
  38. #include <asm/arch/tc.h>
  39. #include <asm/arch/irda.h>
  40. #include <asm/arch/usb.h>
  41. #include <asm/arch/keypad.h>
  42. #include <asm/arch/dma.h>
  43. #include <asm/arch/common.h>
  44. #include <asm/arch/mcbsp.h>
  45. #include <asm/arch/omap-alsa.h>
  46. extern int omap_gpio_init(void);
  47. static int h3_keymap[] = {
  48. KEY(0, 0, KEY_LEFT),
  49. KEY(0, 1, KEY_RIGHT),
  50. KEY(0, 2, KEY_3),
  51. KEY(0, 3, KEY_F10),
  52. KEY(0, 4, KEY_F5),
  53. KEY(0, 5, KEY_9),
  54. KEY(1, 0, KEY_DOWN),
  55. KEY(1, 1, KEY_UP),
  56. KEY(1, 2, KEY_2),
  57. KEY(1, 3, KEY_F9),
  58. KEY(1, 4, KEY_F7),
  59. KEY(1, 5, KEY_0),
  60. KEY(2, 0, KEY_ENTER),
  61. KEY(2, 1, KEY_6),
  62. KEY(2, 2, KEY_1),
  63. KEY(2, 3, KEY_F2),
  64. KEY(2, 4, KEY_F6),
  65. KEY(2, 5, KEY_HOME),
  66. KEY(3, 0, KEY_8),
  67. KEY(3, 1, KEY_5),
  68. KEY(3, 2, KEY_F12),
  69. KEY(3, 3, KEY_F3),
  70. KEY(3, 4, KEY_F8),
  71. KEY(3, 5, KEY_END),
  72. KEY(4, 0, KEY_7),
  73. KEY(4, 1, KEY_4),
  74. KEY(4, 2, KEY_F11),
  75. KEY(4, 3, KEY_F1),
  76. KEY(4, 4, KEY_F4),
  77. KEY(4, 5, KEY_ESC),
  78. KEY(5, 0, KEY_F13),
  79. KEY(5, 1, KEY_F14),
  80. KEY(5, 2, KEY_F15),
  81. KEY(5, 3, KEY_F16),
  82. KEY(5, 4, KEY_SLEEP),
  83. 0
  84. };
  85. static struct mtd_partition nor_partitions[] = {
  86. /* bootloader (U-Boot, etc) in first sector */
  87. {
  88. .name = "bootloader",
  89. .offset = 0,
  90. .size = SZ_128K,
  91. .mask_flags = MTD_WRITEABLE, /* force read-only */
  92. },
  93. /* bootloader params in the next sector */
  94. {
  95. .name = "params",
  96. .offset = MTDPART_OFS_APPEND,
  97. .size = SZ_128K,
  98. .mask_flags = 0,
  99. },
  100. /* kernel */
  101. {
  102. .name = "kernel",
  103. .offset = MTDPART_OFS_APPEND,
  104. .size = SZ_2M,
  105. .mask_flags = 0
  106. },
  107. /* file system */
  108. {
  109. .name = "filesystem",
  110. .offset = MTDPART_OFS_APPEND,
  111. .size = MTDPART_SIZ_FULL,
  112. .mask_flags = 0
  113. }
  114. };
  115. static struct flash_platform_data nor_data = {
  116. .map_name = "cfi_probe",
  117. .width = 2,
  118. .parts = nor_partitions,
  119. .nr_parts = ARRAY_SIZE(nor_partitions),
  120. };
  121. static struct resource nor_resource = {
  122. /* This is on CS3, wherever it's mapped */
  123. .flags = IORESOURCE_MEM,
  124. };
  125. static struct platform_device nor_device = {
  126. .name = "omapflash",
  127. .id = 0,
  128. .dev = {
  129. .platform_data = &nor_data,
  130. },
  131. .num_resources = 1,
  132. .resource = &nor_resource,
  133. };
  134. static struct mtd_partition nand_partitions[] = {
  135. #if 0
  136. /* REVISIT: enable these partitions if you make NAND BOOT work */
  137. {
  138. .name = "xloader",
  139. .offset = 0,
  140. .size = 64 * 1024,
  141. .mask_flags = MTD_WRITEABLE, /* force read-only */
  142. },
  143. {
  144. .name = "bootloader",
  145. .offset = MTDPART_OFS_APPEND,
  146. .size = 256 * 1024,
  147. .mask_flags = MTD_WRITEABLE, /* force read-only */
  148. },
  149. {
  150. .name = "params",
  151. .offset = MTDPART_OFS_APPEND,
  152. .size = 192 * 1024,
  153. },
  154. {
  155. .name = "kernel",
  156. .offset = MTDPART_OFS_APPEND,
  157. .size = 2 * SZ_1M,
  158. },
  159. #endif
  160. {
  161. .name = "filesystem",
  162. .size = MTDPART_SIZ_FULL,
  163. .offset = MTDPART_OFS_APPEND,
  164. },
  165. };
  166. /* dip switches control NAND chip access: 8 bit, 16 bit, or neither */
  167. static struct nand_platform_data nand_data = {
  168. .options = NAND_SAMSUNG_LP_OPTIONS,
  169. .parts = nand_partitions,
  170. .nr_parts = ARRAY_SIZE(nand_partitions),
  171. };
  172. static struct resource nand_resource = {
  173. .flags = IORESOURCE_MEM,
  174. };
  175. static struct platform_device nand_device = {
  176. .name = "omapnand",
  177. .id = 0,
  178. .dev = {
  179. .platform_data = &nand_data,
  180. },
  181. .num_resources = 1,
  182. .resource = &nand_resource,
  183. };
  184. static struct resource smc91x_resources[] = {
  185. [0] = {
  186. .start = OMAP1710_ETHR_START, /* Physical */
  187. .end = OMAP1710_ETHR_START + 0xf,
  188. .flags = IORESOURCE_MEM,
  189. },
  190. [1] = {
  191. .start = OMAP_GPIO_IRQ(40),
  192. .end = OMAP_GPIO_IRQ(40),
  193. .flags = IORESOURCE_IRQ,
  194. },
  195. };
  196. static struct platform_device smc91x_device = {
  197. .name = "smc91x",
  198. .id = 0,
  199. .num_resources = ARRAY_SIZE(smc91x_resources),
  200. .resource = smc91x_resources,
  201. };
  202. #define GPTIMER_BASE 0xFFFB1400
  203. #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
  204. #define GPTIMER_REGS_SIZE 0x46
  205. static struct resource intlat_resources[] = {
  206. [0] = {
  207. .start = GPTIMER_REGS(0), /* Physical */
  208. .end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
  209. .flags = IORESOURCE_MEM,
  210. },
  211. [1] = {
  212. .start = INT_1610_GPTIMER1,
  213. .end = INT_1610_GPTIMER1,
  214. .flags = IORESOURCE_IRQ,
  215. },
  216. };
  217. static struct platform_device intlat_device = {
  218. .name = "omap_intlat",
  219. .id = 0,
  220. .num_resources = ARRAY_SIZE(intlat_resources),
  221. .resource = intlat_resources,
  222. };
  223. static struct resource h3_kp_resources[] = {
  224. [0] = {
  225. .start = INT_KEYBOARD,
  226. .end = INT_KEYBOARD,
  227. .flags = IORESOURCE_IRQ,
  228. },
  229. };
  230. static struct omap_kp_platform_data h3_kp_data = {
  231. .rows = 8,
  232. .cols = 8,
  233. .keymap = h3_keymap,
  234. .keymapsize = ARRAY_SIZE(h3_keymap),
  235. .rep = 1,
  236. .delay = 9,
  237. .dbounce = 1,
  238. };
  239. static struct platform_device h3_kp_device = {
  240. .name = "omap-keypad",
  241. .id = -1,
  242. .dev = {
  243. .platform_data = &h3_kp_data,
  244. },
  245. .num_resources = ARRAY_SIZE(h3_kp_resources),
  246. .resource = h3_kp_resources,
  247. };
  248. /* Select between the IrDA and aGPS module
  249. */
  250. static int h3_select_irda(struct device *dev, int state)
  251. {
  252. unsigned char expa;
  253. int err = 0;
  254. if ((err = read_gpio_expa(&expa, 0x26))) {
  255. printk(KERN_ERR "Error reading from I/O EXPANDER \n");
  256. return err;
  257. }
  258. /* 'P6' enable/disable IRDA_TX and IRDA_RX */
  259. if (state & IR_SEL) { /* IrDA */
  260. if ((err = write_gpio_expa(expa | 0x40, 0x26))) {
  261. printk(KERN_ERR "Error writing to I/O EXPANDER \n");
  262. return err;
  263. }
  264. } else {
  265. if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
  266. printk(KERN_ERR "Error writing to I/O EXPANDER \n");
  267. return err;
  268. }
  269. }
  270. return err;
  271. }
  272. static void set_trans_mode(struct work_struct *work)
  273. {
  274. struct omap_irda_config *irda_config =
  275. container_of(work, struct omap_irda_config, gpio_expa.work);
  276. int mode = irda_config->mode;
  277. unsigned char expa;
  278. int err = 0;
  279. if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
  280. printk(KERN_ERR "Error reading from I/O expander\n");
  281. }
  282. expa &= ~0x03;
  283. if (mode & IR_SIRMODE) {
  284. expa |= 0x01;
  285. } else { /* MIR/FIR */
  286. expa |= 0x03;
  287. }
  288. if ((err = write_gpio_expa(expa, 0x27)) != 0) {
  289. printk(KERN_ERR "Error writing to I/O expander\n");
  290. }
  291. }
  292. static int h3_transceiver_mode(struct device *dev, int mode)
  293. {
  294. struct omap_irda_config *irda_config = dev->platform_data;
  295. irda_config->mode = mode;
  296. cancel_delayed_work(&irda_config->gpio_expa);
  297. PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
  298. schedule_delayed_work(&irda_config->gpio_expa, 0);
  299. return 0;
  300. }
  301. static struct omap_irda_config h3_irda_data = {
  302. .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
  303. .transceiver_mode = h3_transceiver_mode,
  304. .select_irda = h3_select_irda,
  305. .rx_channel = OMAP_DMA_UART3_RX,
  306. .tx_channel = OMAP_DMA_UART3_TX,
  307. .dest_start = UART3_THR,
  308. .src_start = UART3_RHR,
  309. .tx_trigger = 0,
  310. .rx_trigger = 0,
  311. };
  312. static struct resource h3_irda_resources[] = {
  313. [0] = {
  314. .start = INT_UART3,
  315. .end = INT_UART3,
  316. .flags = IORESOURCE_IRQ,
  317. },
  318. };
  319. static u64 irda_dmamask = 0xffffffff;
  320. static struct platform_device h3_irda_device = {
  321. .name = "omapirda",
  322. .id = 0,
  323. .dev = {
  324. .platform_data = &h3_irda_data,
  325. .dma_mask = &irda_dmamask,
  326. },
  327. .num_resources = ARRAY_SIZE(h3_irda_resources),
  328. .resource = h3_irda_resources,
  329. };
  330. static struct platform_device h3_lcd_device = {
  331. .name = "lcd_h3",
  332. .id = -1,
  333. };
  334. static struct omap_mcbsp_reg_cfg mcbsp_regs = {
  335. .spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
  336. .spcr1 = RINTM(3) | RRST,
  337. .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
  338. RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
  339. .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
  340. .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
  341. XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
  342. .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
  343. .srgr1 = FWID(15),
  344. .srgr2 = GSYNC | CLKSP | FSGM | FPER(31),
  345. .pcr0 = CLKRM | SCLKME | FSXP | FSRP | CLKXP | CLKRP,
  346. //.pcr0 = CLKXP | CLKRP, /* mcbsp: slave */
  347. };
  348. static struct omap_alsa_codec_config alsa_config = {
  349. .name = "H3 TSC2101",
  350. .mcbsp_regs_alsa = &mcbsp_regs,
  351. .codec_configure_dev = NULL, // tsc2101_configure,
  352. .codec_set_samplerate = NULL, // tsc2101_set_samplerate,
  353. .codec_clock_setup = NULL, // tsc2101_clock_setup,
  354. .codec_clock_on = NULL, // tsc2101_clock_on,
  355. .codec_clock_off = NULL, // tsc2101_clock_off,
  356. .get_default_samplerate = NULL, // tsc2101_get_default_samplerate,
  357. };
  358. static struct platform_device h3_mcbsp1_device = {
  359. .name = "omap_alsa_mcbsp",
  360. .id = 1,
  361. .dev = {
  362. .platform_data = &alsa_config,
  363. },
  364. };
  365. static struct platform_device *devices[] __initdata = {
  366. &nor_device,
  367. &nand_device,
  368. &smc91x_device,
  369. &intlat_device,
  370. &h3_irda_device,
  371. &h3_kp_device,
  372. &h3_lcd_device,
  373. &h3_mcbsp1_device,
  374. };
  375. static struct omap_usb_config h3_usb_config __initdata = {
  376. /* usb1 has a Mini-AB port and external isp1301 transceiver */
  377. .otg = 2,
  378. #ifdef CONFIG_USB_GADGET_OMAP
  379. .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
  380. #elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
  381. /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
  382. .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
  383. #endif
  384. .pins[1] = 3,
  385. };
  386. static struct omap_mmc_config h3_mmc_config __initdata = {
  387. .mmc[0] = {
  388. .enabled = 1,
  389. .power_pin = -1, /* tps65010 GPIO4 */
  390. .switch_pin = OMAP_MPUIO(1),
  391. },
  392. };
  393. static struct omap_uart_config h3_uart_config __initdata = {
  394. .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
  395. };
  396. static struct omap_lcd_config h3_lcd_config __initdata = {
  397. .ctrl_name = "internal",
  398. };
  399. static struct omap_board_config_kernel h3_config[] = {
  400. { OMAP_TAG_USB, &h3_usb_config },
  401. { OMAP_TAG_MMC, &h3_mmc_config },
  402. { OMAP_TAG_UART, &h3_uart_config },
  403. { OMAP_TAG_LCD, &h3_lcd_config },
  404. };
  405. #define H3_NAND_RB_GPIO_PIN 10
  406. static int nand_dev_ready(struct nand_platform_data *data)
  407. {
  408. return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
  409. }
  410. static void __init h3_init(void)
  411. {
  412. /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
  413. * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
  414. * notice whether a NAND chip is enabled at probe time.
  415. *
  416. * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
  417. * (which on H2 may be 16bit) on CS3. Try detecting that in code here,
  418. * to avoid probing every possible flash configuration...
  419. */
  420. nor_resource.end = nor_resource.start = omap_cs3_phys();
  421. nor_resource.end += SZ_32M - 1;
  422. nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
  423. nand_resource.end += SZ_4K - 1;
  424. if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
  425. nand_data.dev_ready = nand_dev_ready;
  426. /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
  427. /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
  428. omap_cfg_reg(V2_1710_GPIO10);
  429. platform_add_devices(devices, ARRAY_SIZE(devices));
  430. omap_board_config = h3_config;
  431. omap_board_config_size = ARRAY_SIZE(h3_config);
  432. omap_serial_init();
  433. }
  434. static void __init h3_init_smc91x(void)
  435. {
  436. omap_cfg_reg(W15_1710_GPIO40);
  437. if (omap_request_gpio(40) < 0) {
  438. printk("Error requesting gpio 40 for smc91x irq\n");
  439. return;
  440. }
  441. }
  442. static void __init h3_init_irq(void)
  443. {
  444. omap1_init_common_hw();
  445. omap_init_irq();
  446. omap_gpio_init();
  447. h3_init_smc91x();
  448. }
  449. static void __init h3_map_io(void)
  450. {
  451. omap1_map_common_io();
  452. }
  453. MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
  454. /* Maintainer: Texas Instruments, Inc. */
  455. .phys_io = 0xfff00000,
  456. .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
  457. .boot_params = 0x10000100,
  458. .map_io = h3_map_io,
  459. .init_irq = h3_init_irq,
  460. .init_machine = h3_init,
  461. .timer = &omap_timer,
  462. MACHINE_END