pci-sysfs.c 25 KB

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  1. /*
  2. * drivers/pci/pci-sysfs.c
  3. *
  4. * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
  5. * (C) Copyright 2002-2004 IBM Corp.
  6. * (C) Copyright 2003 Matthew Wilcox
  7. * (C) Copyright 2003 Hewlett-Packard
  8. * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
  9. * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
  10. *
  11. * File attributes for PCI devices
  12. *
  13. * Modeled after usb's driverfs.c
  14. *
  15. */
  16. #include <linux/kernel.h>
  17. #include <linux/sched.h>
  18. #include <linux/pci.h>
  19. #include <linux/stat.h>
  20. #include <linux/topology.h>
  21. #include <linux/mm.h>
  22. #include <linux/capability.h>
  23. #include <linux/pci-aspm.h>
  24. #include "pci.h"
  25. static int sysfs_initialized; /* = 0 */
  26. /* show configuration fields */
  27. #define pci_config_attr(field, format_string) \
  28. static ssize_t \
  29. field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
  30. { \
  31. struct pci_dev *pdev; \
  32. \
  33. pdev = to_pci_dev (dev); \
  34. return sprintf (buf, format_string, pdev->field); \
  35. }
  36. pci_config_attr(vendor, "0x%04x\n");
  37. pci_config_attr(device, "0x%04x\n");
  38. pci_config_attr(subsystem_vendor, "0x%04x\n");
  39. pci_config_attr(subsystem_device, "0x%04x\n");
  40. pci_config_attr(class, "0x%06x\n");
  41. pci_config_attr(irq, "%u\n");
  42. static ssize_t broken_parity_status_show(struct device *dev,
  43. struct device_attribute *attr,
  44. char *buf)
  45. {
  46. struct pci_dev *pdev = to_pci_dev(dev);
  47. return sprintf (buf, "%u\n", pdev->broken_parity_status);
  48. }
  49. static ssize_t broken_parity_status_store(struct device *dev,
  50. struct device_attribute *attr,
  51. const char *buf, size_t count)
  52. {
  53. struct pci_dev *pdev = to_pci_dev(dev);
  54. unsigned long val;
  55. if (strict_strtoul(buf, 0, &val) < 0)
  56. return -EINVAL;
  57. pdev->broken_parity_status = !!val;
  58. return count;
  59. }
  60. static ssize_t local_cpus_show(struct device *dev,
  61. struct device_attribute *attr, char *buf)
  62. {
  63. cpumask_t mask;
  64. int len;
  65. mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
  66. len = cpumask_scnprintf(buf, PAGE_SIZE-2, &mask);
  67. buf[len++] = '\n';
  68. buf[len] = '\0';
  69. return len;
  70. }
  71. static ssize_t local_cpulist_show(struct device *dev,
  72. struct device_attribute *attr, char *buf)
  73. {
  74. cpumask_t mask;
  75. int len;
  76. mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
  77. len = cpulist_scnprintf(buf, PAGE_SIZE-2, &mask);
  78. buf[len++] = '\n';
  79. buf[len] = '\0';
  80. return len;
  81. }
  82. /* show resources */
  83. static ssize_t
  84. resource_show(struct device * dev, struct device_attribute *attr, char * buf)
  85. {
  86. struct pci_dev * pci_dev = to_pci_dev(dev);
  87. char * str = buf;
  88. int i;
  89. int max = 7;
  90. resource_size_t start, end;
  91. if (pci_dev->subordinate)
  92. max = DEVICE_COUNT_RESOURCE;
  93. for (i = 0; i < max; i++) {
  94. struct resource *res = &pci_dev->resource[i];
  95. pci_resource_to_user(pci_dev, i, res, &start, &end);
  96. str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
  97. (unsigned long long)start,
  98. (unsigned long long)end,
  99. (unsigned long long)res->flags);
  100. }
  101. return (str - buf);
  102. }
  103. static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
  104. {
  105. struct pci_dev *pci_dev = to_pci_dev(dev);
  106. return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
  107. pci_dev->vendor, pci_dev->device,
  108. pci_dev->subsystem_vendor, pci_dev->subsystem_device,
  109. (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
  110. (u8)(pci_dev->class));
  111. }
  112. static ssize_t is_enabled_store(struct device *dev,
  113. struct device_attribute *attr, const char *buf,
  114. size_t count)
  115. {
  116. struct pci_dev *pdev = to_pci_dev(dev);
  117. unsigned long val;
  118. ssize_t result = strict_strtoul(buf, 0, &val);
  119. if (result < 0)
  120. return result;
  121. /* this can crash the machine when done on the "wrong" device */
  122. if (!capable(CAP_SYS_ADMIN))
  123. return -EPERM;
  124. if (!val) {
  125. if (atomic_read(&pdev->enable_cnt) != 0)
  126. pci_disable_device(pdev);
  127. else
  128. result = -EIO;
  129. } else
  130. result = pci_enable_device(pdev);
  131. return result < 0 ? result : count;
  132. }
  133. static ssize_t is_enabled_show(struct device *dev,
  134. struct device_attribute *attr, char *buf)
  135. {
  136. struct pci_dev *pdev;
  137. pdev = to_pci_dev (dev);
  138. return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
  139. }
  140. #ifdef CONFIG_NUMA
  141. static ssize_t
  142. numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
  143. {
  144. return sprintf (buf, "%d\n", dev->numa_node);
  145. }
  146. #endif
  147. static ssize_t
  148. msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
  149. {
  150. struct pci_dev *pdev = to_pci_dev(dev);
  151. if (!pdev->subordinate)
  152. return 0;
  153. return sprintf (buf, "%u\n",
  154. !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
  155. }
  156. static ssize_t
  157. msi_bus_store(struct device *dev, struct device_attribute *attr,
  158. const char *buf, size_t count)
  159. {
  160. struct pci_dev *pdev = to_pci_dev(dev);
  161. unsigned long val;
  162. if (strict_strtoul(buf, 0, &val) < 0)
  163. return -EINVAL;
  164. /* bad things may happen if the no_msi flag is changed
  165. * while some drivers are loaded */
  166. if (!capable(CAP_SYS_ADMIN))
  167. return -EPERM;
  168. /* Maybe pci devices without subordinate busses shouldn't even have this
  169. * attribute in the first place? */
  170. if (!pdev->subordinate)
  171. return count;
  172. /* Is the flag going to change, or keep the value it already had? */
  173. if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
  174. !!val) {
  175. pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
  176. dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
  177. " bad things could happen\n", val ? "" : " not");
  178. }
  179. return count;
  180. }
  181. struct device_attribute pci_dev_attrs[] = {
  182. __ATTR_RO(resource),
  183. __ATTR_RO(vendor),
  184. __ATTR_RO(device),
  185. __ATTR_RO(subsystem_vendor),
  186. __ATTR_RO(subsystem_device),
  187. __ATTR_RO(class),
  188. __ATTR_RO(irq),
  189. __ATTR_RO(local_cpus),
  190. __ATTR_RO(local_cpulist),
  191. __ATTR_RO(modalias),
  192. #ifdef CONFIG_NUMA
  193. __ATTR_RO(numa_node),
  194. #endif
  195. __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
  196. __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
  197. broken_parity_status_show,broken_parity_status_store),
  198. __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
  199. __ATTR_NULL,
  200. };
  201. static ssize_t
  202. pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  203. char *buf, loff_t off, size_t count)
  204. {
  205. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  206. unsigned int size = 64;
  207. loff_t init_off = off;
  208. u8 *data = (u8*) buf;
  209. /* Several chips lock up trying to read undefined config space */
  210. if (capable(CAP_SYS_ADMIN)) {
  211. size = dev->cfg_size;
  212. } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
  213. size = 128;
  214. }
  215. if (off > size)
  216. return 0;
  217. if (off + count > size) {
  218. size -= off;
  219. count = size;
  220. } else {
  221. size = count;
  222. }
  223. if ((off & 1) && size) {
  224. u8 val;
  225. pci_user_read_config_byte(dev, off, &val);
  226. data[off - init_off] = val;
  227. off++;
  228. size--;
  229. }
  230. if ((off & 3) && size > 2) {
  231. u16 val;
  232. pci_user_read_config_word(dev, off, &val);
  233. data[off - init_off] = val & 0xff;
  234. data[off - init_off + 1] = (val >> 8) & 0xff;
  235. off += 2;
  236. size -= 2;
  237. }
  238. while (size > 3) {
  239. u32 val;
  240. pci_user_read_config_dword(dev, off, &val);
  241. data[off - init_off] = val & 0xff;
  242. data[off - init_off + 1] = (val >> 8) & 0xff;
  243. data[off - init_off + 2] = (val >> 16) & 0xff;
  244. data[off - init_off + 3] = (val >> 24) & 0xff;
  245. off += 4;
  246. size -= 4;
  247. }
  248. if (size >= 2) {
  249. u16 val;
  250. pci_user_read_config_word(dev, off, &val);
  251. data[off - init_off] = val & 0xff;
  252. data[off - init_off + 1] = (val >> 8) & 0xff;
  253. off += 2;
  254. size -= 2;
  255. }
  256. if (size > 0) {
  257. u8 val;
  258. pci_user_read_config_byte(dev, off, &val);
  259. data[off - init_off] = val;
  260. off++;
  261. --size;
  262. }
  263. return count;
  264. }
  265. static ssize_t
  266. pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
  267. char *buf, loff_t off, size_t count)
  268. {
  269. struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
  270. unsigned int size = count;
  271. loff_t init_off = off;
  272. u8 *data = (u8*) buf;
  273. if (off > dev->cfg_size)
  274. return 0;
  275. if (off + count > dev->cfg_size) {
  276. size = dev->cfg_size - off;
  277. count = size;
  278. }
  279. if ((off & 1) && size) {
  280. pci_user_write_config_byte(dev, off, data[off - init_off]);
  281. off++;
  282. size--;
  283. }
  284. if ((off & 3) && size > 2) {
  285. u16 val = data[off - init_off];
  286. val |= (u16) data[off - init_off + 1] << 8;
  287. pci_user_write_config_word(dev, off, val);
  288. off += 2;
  289. size -= 2;
  290. }
  291. while (size > 3) {
  292. u32 val = data[off - init_off];
  293. val |= (u32) data[off - init_off + 1] << 8;
  294. val |= (u32) data[off - init_off + 2] << 16;
  295. val |= (u32) data[off - init_off + 3] << 24;
  296. pci_user_write_config_dword(dev, off, val);
  297. off += 4;
  298. size -= 4;
  299. }
  300. if (size >= 2) {
  301. u16 val = data[off - init_off];
  302. val |= (u16) data[off - init_off + 1] << 8;
  303. pci_user_write_config_word(dev, off, val);
  304. off += 2;
  305. size -= 2;
  306. }
  307. if (size) {
  308. pci_user_write_config_byte(dev, off, data[off - init_off]);
  309. off++;
  310. --size;
  311. }
  312. return count;
  313. }
  314. static ssize_t
  315. pci_read_vpd(struct kobject *kobj, struct bin_attribute *bin_attr,
  316. char *buf, loff_t off, size_t count)
  317. {
  318. struct pci_dev *dev =
  319. to_pci_dev(container_of(kobj, struct device, kobj));
  320. int end;
  321. int ret;
  322. if (off > bin_attr->size)
  323. count = 0;
  324. else if (count > bin_attr->size - off)
  325. count = bin_attr->size - off;
  326. end = off + count;
  327. while (off < end) {
  328. ret = dev->vpd->ops->read(dev, off, end - off, buf);
  329. if (ret < 0)
  330. return ret;
  331. buf += ret;
  332. off += ret;
  333. }
  334. return count;
  335. }
  336. static ssize_t
  337. pci_write_vpd(struct kobject *kobj, struct bin_attribute *bin_attr,
  338. char *buf, loff_t off, size_t count)
  339. {
  340. struct pci_dev *dev =
  341. to_pci_dev(container_of(kobj, struct device, kobj));
  342. int end;
  343. int ret;
  344. if (off > bin_attr->size)
  345. count = 0;
  346. else if (count > bin_attr->size - off)
  347. count = bin_attr->size - off;
  348. end = off + count;
  349. while (off < end) {
  350. ret = dev->vpd->ops->write(dev, off, end - off, buf);
  351. if (ret < 0)
  352. return ret;
  353. buf += ret;
  354. off += ret;
  355. }
  356. return count;
  357. }
  358. #ifdef HAVE_PCI_LEGACY
  359. /**
  360. * pci_read_legacy_io - read byte(s) from legacy I/O port space
  361. * @kobj: kobject corresponding to file to read from
  362. * @buf: buffer to store results
  363. * @off: offset into legacy I/O port space
  364. * @count: number of bytes to read
  365. *
  366. * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  367. * callback routine (pci_legacy_read).
  368. */
  369. static ssize_t
  370. pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  371. char *buf, loff_t off, size_t count)
  372. {
  373. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  374. struct device,
  375. kobj));
  376. /* Only support 1, 2 or 4 byte accesses */
  377. if (count != 1 && count != 2 && count != 4)
  378. return -EINVAL;
  379. return pci_legacy_read(bus, off, (u32 *)buf, count);
  380. }
  381. /**
  382. * pci_write_legacy_io - write byte(s) to legacy I/O port space
  383. * @kobj: kobject corresponding to file to read from
  384. * @buf: buffer containing value to be written
  385. * @off: offset into legacy I/O port space
  386. * @count: number of bytes to write
  387. *
  388. * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
  389. * callback routine (pci_legacy_write).
  390. */
  391. static ssize_t
  392. pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
  393. char *buf, loff_t off, size_t count)
  394. {
  395. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  396. struct device,
  397. kobj));
  398. /* Only support 1, 2 or 4 byte accesses */
  399. if (count != 1 && count != 2 && count != 4)
  400. return -EINVAL;
  401. return pci_legacy_write(bus, off, *(u32 *)buf, count);
  402. }
  403. /**
  404. * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
  405. * @kobj: kobject corresponding to device to be mapped
  406. * @attr: struct bin_attribute for this file
  407. * @vma: struct vm_area_struct passed to mmap
  408. *
  409. * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
  410. * legacy memory space (first meg of bus space) into application virtual
  411. * memory space.
  412. */
  413. static int
  414. pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
  415. struct vm_area_struct *vma)
  416. {
  417. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  418. struct device,
  419. kobj));
  420. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
  421. }
  422. /**
  423. * pci_mmap_legacy_io - map legacy PCI IO into user memory space
  424. * @kobj: kobject corresponding to device to be mapped
  425. * @attr: struct bin_attribute for this file
  426. * @vma: struct vm_area_struct passed to mmap
  427. *
  428. * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
  429. * legacy IO space (first meg of bus space) into application virtual
  430. * memory space. Returns -ENOSYS if the operation isn't supported
  431. */
  432. static int
  433. pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
  434. struct vm_area_struct *vma)
  435. {
  436. struct pci_bus *bus = to_pci_bus(container_of(kobj,
  437. struct device,
  438. kobj));
  439. return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
  440. }
  441. /**
  442. * pci_create_legacy_files - create legacy I/O port and memory files
  443. * @b: bus to create files under
  444. *
  445. * Some platforms allow access to legacy I/O port and ISA memory space on
  446. * a per-bus basis. This routine creates the files and ties them into
  447. * their associated read, write and mmap files from pci-sysfs.c
  448. *
  449. * On error unwind, but don't propogate the error to the caller
  450. * as it is ok to set up the PCI bus without these files.
  451. */
  452. void pci_create_legacy_files(struct pci_bus *b)
  453. {
  454. int error;
  455. b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
  456. GFP_ATOMIC);
  457. if (!b->legacy_io)
  458. goto kzalloc_err;
  459. b->legacy_io->attr.name = "legacy_io";
  460. b->legacy_io->size = 0xffff;
  461. b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
  462. b->legacy_io->read = pci_read_legacy_io;
  463. b->legacy_io->write = pci_write_legacy_io;
  464. b->legacy_io->mmap = pci_mmap_legacy_io;
  465. error = device_create_bin_file(&b->dev, b->legacy_io);
  466. if (error)
  467. goto legacy_io_err;
  468. /* Allocated above after the legacy_io struct */
  469. b->legacy_mem = b->legacy_io + 1;
  470. b->legacy_mem->attr.name = "legacy_mem";
  471. b->legacy_mem->size = 1024*1024;
  472. b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
  473. b->legacy_mem->mmap = pci_mmap_legacy_mem;
  474. error = device_create_bin_file(&b->dev, b->legacy_mem);
  475. if (error)
  476. goto legacy_mem_err;
  477. return;
  478. legacy_mem_err:
  479. device_remove_bin_file(&b->dev, b->legacy_io);
  480. legacy_io_err:
  481. kfree(b->legacy_io);
  482. b->legacy_io = NULL;
  483. kzalloc_err:
  484. printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
  485. "and ISA memory resources to sysfs\n");
  486. return;
  487. }
  488. void pci_remove_legacy_files(struct pci_bus *b)
  489. {
  490. if (b->legacy_io) {
  491. device_remove_bin_file(&b->dev, b->legacy_io);
  492. device_remove_bin_file(&b->dev, b->legacy_mem);
  493. kfree(b->legacy_io); /* both are allocated here */
  494. }
  495. }
  496. #endif /* HAVE_PCI_LEGACY */
  497. #ifdef HAVE_PCI_MMAP
  498. int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
  499. {
  500. unsigned long nr, start, size;
  501. nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
  502. start = vma->vm_pgoff;
  503. size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
  504. if (start < size && size - start >= nr)
  505. return 1;
  506. WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
  507. current->comm, start, start+nr, pci_name(pdev), resno, size);
  508. return 0;
  509. }
  510. /**
  511. * pci_mmap_resource - map a PCI resource into user memory space
  512. * @kobj: kobject for mapping
  513. * @attr: struct bin_attribute for the file being mapped
  514. * @vma: struct vm_area_struct passed into the mmap
  515. * @write_combine: 1 for write_combine mapping
  516. *
  517. * Use the regular PCI mapping routines to map a PCI resource into userspace.
  518. */
  519. static int
  520. pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
  521. struct vm_area_struct *vma, int write_combine)
  522. {
  523. struct pci_dev *pdev = to_pci_dev(container_of(kobj,
  524. struct device, kobj));
  525. struct resource *res = (struct resource *)attr->private;
  526. enum pci_mmap_state mmap_type;
  527. resource_size_t start, end;
  528. int i;
  529. for (i = 0; i < PCI_ROM_RESOURCE; i++)
  530. if (res == &pdev->resource[i])
  531. break;
  532. if (i >= PCI_ROM_RESOURCE)
  533. return -ENODEV;
  534. if (!pci_mmap_fits(pdev, i, vma))
  535. return -EINVAL;
  536. /* pci_mmap_page_range() expects the same kind of entry as coming
  537. * from /proc/bus/pci/ which is a "user visible" value. If this is
  538. * different from the resource itself, arch will do necessary fixup.
  539. */
  540. pci_resource_to_user(pdev, i, res, &start, &end);
  541. vma->vm_pgoff += start >> PAGE_SHIFT;
  542. mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
  543. if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
  544. return -EINVAL;
  545. return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
  546. }
  547. static int
  548. pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
  549. struct vm_area_struct *vma)
  550. {
  551. return pci_mmap_resource(kobj, attr, vma, 0);
  552. }
  553. static int
  554. pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
  555. struct vm_area_struct *vma)
  556. {
  557. return pci_mmap_resource(kobj, attr, vma, 1);
  558. }
  559. /**
  560. * pci_remove_resource_files - cleanup resource files
  561. * @dev: dev to cleanup
  562. *
  563. * If we created resource files for @dev, remove them from sysfs and
  564. * free their resources.
  565. */
  566. static void
  567. pci_remove_resource_files(struct pci_dev *pdev)
  568. {
  569. int i;
  570. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  571. struct bin_attribute *res_attr;
  572. res_attr = pdev->res_attr[i];
  573. if (res_attr) {
  574. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  575. kfree(res_attr);
  576. }
  577. res_attr = pdev->res_attr_wc[i];
  578. if (res_attr) {
  579. sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
  580. kfree(res_attr);
  581. }
  582. }
  583. }
  584. static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
  585. {
  586. /* allocate attribute structure, piggyback attribute name */
  587. int name_len = write_combine ? 13 : 10;
  588. struct bin_attribute *res_attr;
  589. int retval;
  590. res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
  591. if (res_attr) {
  592. char *res_attr_name = (char *)(res_attr + 1);
  593. if (write_combine) {
  594. pdev->res_attr_wc[num] = res_attr;
  595. sprintf(res_attr_name, "resource%d_wc", num);
  596. res_attr->mmap = pci_mmap_resource_wc;
  597. } else {
  598. pdev->res_attr[num] = res_attr;
  599. sprintf(res_attr_name, "resource%d", num);
  600. res_attr->mmap = pci_mmap_resource_uc;
  601. }
  602. res_attr->attr.name = res_attr_name;
  603. res_attr->attr.mode = S_IRUSR | S_IWUSR;
  604. res_attr->size = pci_resource_len(pdev, num);
  605. res_attr->private = &pdev->resource[num];
  606. retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
  607. } else
  608. retval = -ENOMEM;
  609. return retval;
  610. }
  611. /**
  612. * pci_create_resource_files - create resource files in sysfs for @dev
  613. * @dev: dev in question
  614. *
  615. * Walk the resources in @dev creating files for each resource available.
  616. */
  617. static int pci_create_resource_files(struct pci_dev *pdev)
  618. {
  619. int i;
  620. int retval;
  621. /* Expose the PCI resources from this device as files */
  622. for (i = 0; i < PCI_ROM_RESOURCE; i++) {
  623. /* skip empty resources */
  624. if (!pci_resource_len(pdev, i))
  625. continue;
  626. retval = pci_create_attr(pdev, i, 0);
  627. /* for prefetchable resources, create a WC mappable file */
  628. if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
  629. retval = pci_create_attr(pdev, i, 1);
  630. if (retval) {
  631. pci_remove_resource_files(pdev);
  632. return retval;
  633. }
  634. }
  635. return 0;
  636. }
  637. #else /* !HAVE_PCI_MMAP */
  638. static inline int pci_create_resource_files(struct pci_dev *dev) { return 0; }
  639. static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
  640. #endif /* HAVE_PCI_MMAP */
  641. /**
  642. * pci_write_rom - used to enable access to the PCI ROM display
  643. * @kobj: kernel object handle
  644. * @buf: user input
  645. * @off: file offset
  646. * @count: number of byte in input
  647. *
  648. * writing anything except 0 enables it
  649. */
  650. static ssize_t
  651. pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  652. char *buf, loff_t off, size_t count)
  653. {
  654. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  655. if ((off == 0) && (*buf == '0') && (count == 2))
  656. pdev->rom_attr_enabled = 0;
  657. else
  658. pdev->rom_attr_enabled = 1;
  659. return count;
  660. }
  661. /**
  662. * pci_read_rom - read a PCI ROM
  663. * @kobj: kernel object handle
  664. * @buf: where to put the data we read from the ROM
  665. * @off: file offset
  666. * @count: number of bytes to read
  667. *
  668. * Put @count bytes starting at @off into @buf from the ROM in the PCI
  669. * device corresponding to @kobj.
  670. */
  671. static ssize_t
  672. pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
  673. char *buf, loff_t off, size_t count)
  674. {
  675. struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
  676. void __iomem *rom;
  677. size_t size;
  678. if (!pdev->rom_attr_enabled)
  679. return -EINVAL;
  680. rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
  681. if (!rom)
  682. return 0;
  683. if (off >= size)
  684. count = 0;
  685. else {
  686. if (off + count > size)
  687. count = size - off;
  688. memcpy_fromio(buf, rom + off, count);
  689. }
  690. pci_unmap_rom(pdev, rom);
  691. return count;
  692. }
  693. static struct bin_attribute pci_config_attr = {
  694. .attr = {
  695. .name = "config",
  696. .mode = S_IRUGO | S_IWUSR,
  697. },
  698. .size = PCI_CFG_SPACE_SIZE,
  699. .read = pci_read_config,
  700. .write = pci_write_config,
  701. };
  702. static struct bin_attribute pcie_config_attr = {
  703. .attr = {
  704. .name = "config",
  705. .mode = S_IRUGO | S_IWUSR,
  706. },
  707. .size = PCI_CFG_SPACE_EXP_SIZE,
  708. .read = pci_read_config,
  709. .write = pci_write_config,
  710. };
  711. int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
  712. {
  713. return 0;
  714. }
  715. static int pci_create_capabilities_sysfs(struct pci_dev *dev)
  716. {
  717. int retval;
  718. struct bin_attribute *attr;
  719. /* If the device has VPD, try to expose it in sysfs. */
  720. if (dev->vpd) {
  721. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  722. if (!attr)
  723. return -ENOMEM;
  724. attr->size = dev->vpd->len;
  725. attr->attr.name = "vpd";
  726. attr->attr.mode = S_IRUSR | S_IWUSR;
  727. attr->read = pci_read_vpd;
  728. attr->write = pci_write_vpd;
  729. retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
  730. if (retval) {
  731. kfree(dev->vpd->attr);
  732. return retval;
  733. }
  734. dev->vpd->attr = attr;
  735. }
  736. /* Active State Power Management */
  737. pcie_aspm_create_sysfs_dev_files(dev);
  738. return 0;
  739. }
  740. int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
  741. {
  742. int retval;
  743. int rom_size = 0;
  744. struct bin_attribute *attr;
  745. if (!sysfs_initialized)
  746. return -EACCES;
  747. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  748. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
  749. else
  750. retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  751. if (retval)
  752. goto err;
  753. retval = pci_create_resource_files(pdev);
  754. if (retval)
  755. goto err_config_file;
  756. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  757. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  758. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  759. rom_size = 0x20000;
  760. /* If the device has a ROM, try to expose it in sysfs. */
  761. if (rom_size) {
  762. attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
  763. if (!attr) {
  764. retval = -ENOMEM;
  765. goto err_resource_files;
  766. }
  767. attr->size = rom_size;
  768. attr->attr.name = "rom";
  769. attr->attr.mode = S_IRUSR;
  770. attr->read = pci_read_rom;
  771. attr->write = pci_write_rom;
  772. retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
  773. if (retval) {
  774. kfree(attr);
  775. goto err_resource_files;
  776. }
  777. pdev->rom_attr = attr;
  778. }
  779. /* add platform-specific attributes */
  780. retval = pcibios_add_platform_entries(pdev);
  781. if (retval)
  782. goto err_rom_file;
  783. /* add sysfs entries for various capabilities */
  784. retval = pci_create_capabilities_sysfs(pdev);
  785. if (retval)
  786. goto err_rom_file;
  787. return 0;
  788. err_rom_file:
  789. if (rom_size) {
  790. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  791. kfree(pdev->rom_attr);
  792. pdev->rom_attr = NULL;
  793. }
  794. err_resource_files:
  795. pci_remove_resource_files(pdev);
  796. err_config_file:
  797. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  798. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  799. else
  800. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  801. err:
  802. return retval;
  803. }
  804. static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
  805. {
  806. if (dev->vpd && dev->vpd->attr) {
  807. sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
  808. kfree(dev->vpd->attr);
  809. }
  810. pcie_aspm_remove_sysfs_dev_files(dev);
  811. }
  812. /**
  813. * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
  814. * @pdev: device whose entries we should free
  815. *
  816. * Cleanup when @pdev is removed from sysfs.
  817. */
  818. void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
  819. {
  820. int rom_size = 0;
  821. if (!sysfs_initialized)
  822. return;
  823. pci_remove_capabilities_sysfs(pdev);
  824. if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
  825. sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
  826. else
  827. sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
  828. pci_remove_resource_files(pdev);
  829. if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
  830. rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
  831. else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
  832. rom_size = 0x20000;
  833. if (rom_size && pdev->rom_attr) {
  834. sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
  835. kfree(pdev->rom_attr);
  836. }
  837. }
  838. static int __init pci_sysfs_init(void)
  839. {
  840. struct pci_dev *pdev = NULL;
  841. int retval;
  842. sysfs_initialized = 1;
  843. for_each_pci_dev(pdev) {
  844. retval = pci_create_sysfs_dev_files(pdev);
  845. if (retval) {
  846. pci_dev_put(pdev);
  847. return retval;
  848. }
  849. }
  850. return 0;
  851. }
  852. late_initcall(pci_sysfs_init);