uhci-q.c 46 KB

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  1. /*
  2. * Universal Host Controller Interface driver for USB.
  3. *
  4. * Maintainer: Alan Stern <stern@rowland.harvard.edu>
  5. *
  6. * (C) Copyright 1999 Linus Torvalds
  7. * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
  8. * (C) Copyright 1999 Randy Dunlap
  9. * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  10. * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  11. * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  12. * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
  13. * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
  14. * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
  15. * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
  16. * (C) Copyright 2004-2007 Alan Stern, stern@rowland.harvard.edu
  17. */
  18. /*
  19. * Technically, updating td->status here is a race, but it's not really a
  20. * problem. The worst that can happen is that we set the IOC bit again
  21. * generating a spurious interrupt. We could fix this by creating another
  22. * QH and leaving the IOC bit always set, but then we would have to play
  23. * games with the FSBR code to make sure we get the correct order in all
  24. * the cases. I don't think it's worth the effort
  25. */
  26. static void uhci_set_next_interrupt(struct uhci_hcd *uhci)
  27. {
  28. if (uhci->is_stopped)
  29. mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
  30. uhci->term_td->status |= cpu_to_le32(TD_CTRL_IOC);
  31. }
  32. static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci)
  33. {
  34. uhci->term_td->status &= ~cpu_to_le32(TD_CTRL_IOC);
  35. }
  36. /*
  37. * Full-Speed Bandwidth Reclamation (FSBR).
  38. * We turn on FSBR whenever a queue that wants it is advancing,
  39. * and leave it on for a short time thereafter.
  40. */
  41. static void uhci_fsbr_on(struct uhci_hcd *uhci)
  42. {
  43. struct uhci_qh *fsbr_qh, *lqh, *tqh;
  44. uhci->fsbr_is_on = 1;
  45. lqh = list_entry(uhci->skel_async_qh->node.prev,
  46. struct uhci_qh, node);
  47. /* Find the first FSBR QH. Linear search through the list is
  48. * acceptable because normally FSBR gets turned on as soon as
  49. * one QH needs it. */
  50. fsbr_qh = NULL;
  51. list_for_each_entry_reverse(tqh, &uhci->skel_async_qh->node, node) {
  52. if (tqh->skel < SKEL_FSBR)
  53. break;
  54. fsbr_qh = tqh;
  55. }
  56. /* No FSBR QH means we must insert the terminating skeleton QH */
  57. if (!fsbr_qh) {
  58. uhci->skel_term_qh->link = LINK_TO_QH(uhci->skel_term_qh);
  59. wmb();
  60. lqh->link = uhci->skel_term_qh->link;
  61. /* Otherwise loop the last QH to the first FSBR QH */
  62. } else
  63. lqh->link = LINK_TO_QH(fsbr_qh);
  64. }
  65. static void uhci_fsbr_off(struct uhci_hcd *uhci)
  66. {
  67. struct uhci_qh *lqh;
  68. uhci->fsbr_is_on = 0;
  69. lqh = list_entry(uhci->skel_async_qh->node.prev,
  70. struct uhci_qh, node);
  71. /* End the async list normally and unlink the terminating QH */
  72. lqh->link = uhci->skel_term_qh->link = UHCI_PTR_TERM;
  73. }
  74. static void uhci_add_fsbr(struct uhci_hcd *uhci, struct urb *urb)
  75. {
  76. struct urb_priv *urbp = urb->hcpriv;
  77. if (!(urb->transfer_flags & URB_NO_FSBR))
  78. urbp->fsbr = 1;
  79. }
  80. static void uhci_urbp_wants_fsbr(struct uhci_hcd *uhci, struct urb_priv *urbp)
  81. {
  82. if (urbp->fsbr) {
  83. uhci->fsbr_is_wanted = 1;
  84. if (!uhci->fsbr_is_on)
  85. uhci_fsbr_on(uhci);
  86. else if (uhci->fsbr_expiring) {
  87. uhci->fsbr_expiring = 0;
  88. del_timer(&uhci->fsbr_timer);
  89. }
  90. }
  91. }
  92. static void uhci_fsbr_timeout(unsigned long _uhci)
  93. {
  94. struct uhci_hcd *uhci = (struct uhci_hcd *) _uhci;
  95. unsigned long flags;
  96. spin_lock_irqsave(&uhci->lock, flags);
  97. if (uhci->fsbr_expiring) {
  98. uhci->fsbr_expiring = 0;
  99. uhci_fsbr_off(uhci);
  100. }
  101. spin_unlock_irqrestore(&uhci->lock, flags);
  102. }
  103. static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci)
  104. {
  105. dma_addr_t dma_handle;
  106. struct uhci_td *td;
  107. td = dma_pool_alloc(uhci->td_pool, GFP_ATOMIC, &dma_handle);
  108. if (!td)
  109. return NULL;
  110. td->dma_handle = dma_handle;
  111. td->frame = -1;
  112. INIT_LIST_HEAD(&td->list);
  113. INIT_LIST_HEAD(&td->fl_list);
  114. return td;
  115. }
  116. static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td)
  117. {
  118. if (!list_empty(&td->list))
  119. dev_warn(uhci_dev(uhci), "td %p still in list!\n", td);
  120. if (!list_empty(&td->fl_list))
  121. dev_warn(uhci_dev(uhci), "td %p still in fl_list!\n", td);
  122. dma_pool_free(uhci->td_pool, td, td->dma_handle);
  123. }
  124. static inline void uhci_fill_td(struct uhci_td *td, u32 status,
  125. u32 token, u32 buffer)
  126. {
  127. td->status = cpu_to_le32(status);
  128. td->token = cpu_to_le32(token);
  129. td->buffer = cpu_to_le32(buffer);
  130. }
  131. static void uhci_add_td_to_urbp(struct uhci_td *td, struct urb_priv *urbp)
  132. {
  133. list_add_tail(&td->list, &urbp->td_list);
  134. }
  135. static void uhci_remove_td_from_urbp(struct uhci_td *td)
  136. {
  137. list_del_init(&td->list);
  138. }
  139. /*
  140. * We insert Isochronous URBs directly into the frame list at the beginning
  141. */
  142. static inline void uhci_insert_td_in_frame_list(struct uhci_hcd *uhci,
  143. struct uhci_td *td, unsigned framenum)
  144. {
  145. framenum &= (UHCI_NUMFRAMES - 1);
  146. td->frame = framenum;
  147. /* Is there a TD already mapped there? */
  148. if (uhci->frame_cpu[framenum]) {
  149. struct uhci_td *ftd, *ltd;
  150. ftd = uhci->frame_cpu[framenum];
  151. ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
  152. list_add_tail(&td->fl_list, &ftd->fl_list);
  153. td->link = ltd->link;
  154. wmb();
  155. ltd->link = LINK_TO_TD(td);
  156. } else {
  157. td->link = uhci->frame[framenum];
  158. wmb();
  159. uhci->frame[framenum] = LINK_TO_TD(td);
  160. uhci->frame_cpu[framenum] = td;
  161. }
  162. }
  163. static inline void uhci_remove_td_from_frame_list(struct uhci_hcd *uhci,
  164. struct uhci_td *td)
  165. {
  166. /* If it's not inserted, don't remove it */
  167. if (td->frame == -1) {
  168. WARN_ON(!list_empty(&td->fl_list));
  169. return;
  170. }
  171. if (uhci->frame_cpu[td->frame] == td) {
  172. if (list_empty(&td->fl_list)) {
  173. uhci->frame[td->frame] = td->link;
  174. uhci->frame_cpu[td->frame] = NULL;
  175. } else {
  176. struct uhci_td *ntd;
  177. ntd = list_entry(td->fl_list.next, struct uhci_td, fl_list);
  178. uhci->frame[td->frame] = LINK_TO_TD(ntd);
  179. uhci->frame_cpu[td->frame] = ntd;
  180. }
  181. } else {
  182. struct uhci_td *ptd;
  183. ptd = list_entry(td->fl_list.prev, struct uhci_td, fl_list);
  184. ptd->link = td->link;
  185. }
  186. list_del_init(&td->fl_list);
  187. td->frame = -1;
  188. }
  189. static inline void uhci_remove_tds_from_frame(struct uhci_hcd *uhci,
  190. unsigned int framenum)
  191. {
  192. struct uhci_td *ftd, *ltd;
  193. framenum &= (UHCI_NUMFRAMES - 1);
  194. ftd = uhci->frame_cpu[framenum];
  195. if (ftd) {
  196. ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
  197. uhci->frame[framenum] = ltd->link;
  198. uhci->frame_cpu[framenum] = NULL;
  199. while (!list_empty(&ftd->fl_list))
  200. list_del_init(ftd->fl_list.prev);
  201. }
  202. }
  203. /*
  204. * Remove all the TDs for an Isochronous URB from the frame list
  205. */
  206. static void uhci_unlink_isochronous_tds(struct uhci_hcd *uhci, struct urb *urb)
  207. {
  208. struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
  209. struct uhci_td *td;
  210. list_for_each_entry(td, &urbp->td_list, list)
  211. uhci_remove_td_from_frame_list(uhci, td);
  212. }
  213. static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci,
  214. struct usb_device *udev, struct usb_host_endpoint *hep)
  215. {
  216. dma_addr_t dma_handle;
  217. struct uhci_qh *qh;
  218. qh = dma_pool_alloc(uhci->qh_pool, GFP_ATOMIC, &dma_handle);
  219. if (!qh)
  220. return NULL;
  221. memset(qh, 0, sizeof(*qh));
  222. qh->dma_handle = dma_handle;
  223. qh->element = UHCI_PTR_TERM;
  224. qh->link = UHCI_PTR_TERM;
  225. INIT_LIST_HEAD(&qh->queue);
  226. INIT_LIST_HEAD(&qh->node);
  227. if (udev) { /* Normal QH */
  228. qh->type = hep->desc.bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
  229. if (qh->type != USB_ENDPOINT_XFER_ISOC) {
  230. qh->dummy_td = uhci_alloc_td(uhci);
  231. if (!qh->dummy_td) {
  232. dma_pool_free(uhci->qh_pool, qh, dma_handle);
  233. return NULL;
  234. }
  235. }
  236. qh->state = QH_STATE_IDLE;
  237. qh->hep = hep;
  238. qh->udev = udev;
  239. hep->hcpriv = qh;
  240. if (qh->type == USB_ENDPOINT_XFER_INT ||
  241. qh->type == USB_ENDPOINT_XFER_ISOC)
  242. qh->load = usb_calc_bus_time(udev->speed,
  243. usb_endpoint_dir_in(&hep->desc),
  244. qh->type == USB_ENDPOINT_XFER_ISOC,
  245. le16_to_cpu(hep->desc.wMaxPacketSize))
  246. / 1000 + 1;
  247. } else { /* Skeleton QH */
  248. qh->state = QH_STATE_ACTIVE;
  249. qh->type = -1;
  250. }
  251. return qh;
  252. }
  253. static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  254. {
  255. WARN_ON(qh->state != QH_STATE_IDLE && qh->udev);
  256. if (!list_empty(&qh->queue))
  257. dev_warn(uhci_dev(uhci), "qh %p list not empty!\n", qh);
  258. list_del(&qh->node);
  259. if (qh->udev) {
  260. qh->hep->hcpriv = NULL;
  261. if (qh->dummy_td)
  262. uhci_free_td(uhci, qh->dummy_td);
  263. }
  264. dma_pool_free(uhci->qh_pool, qh, qh->dma_handle);
  265. }
  266. /*
  267. * When a queue is stopped and a dequeued URB is given back, adjust
  268. * the previous TD link (if the URB isn't first on the queue) or
  269. * save its toggle value (if it is first and is currently executing).
  270. *
  271. * Returns 0 if the URB should not yet be given back, 1 otherwise.
  272. */
  273. static int uhci_cleanup_queue(struct uhci_hcd *uhci, struct uhci_qh *qh,
  274. struct urb *urb)
  275. {
  276. struct urb_priv *urbp = urb->hcpriv;
  277. struct uhci_td *td;
  278. int ret = 1;
  279. /* Isochronous pipes don't use toggles and their TD link pointers
  280. * get adjusted during uhci_urb_dequeue(). But since their queues
  281. * cannot truly be stopped, we have to watch out for dequeues
  282. * occurring after the nominal unlink frame. */
  283. if (qh->type == USB_ENDPOINT_XFER_ISOC) {
  284. ret = (uhci->frame_number + uhci->is_stopped !=
  285. qh->unlink_frame);
  286. goto done;
  287. }
  288. /* If the URB isn't first on its queue, adjust the link pointer
  289. * of the last TD in the previous URB. The toggle doesn't need
  290. * to be saved since this URB can't be executing yet. */
  291. if (qh->queue.next != &urbp->node) {
  292. struct urb_priv *purbp;
  293. struct uhci_td *ptd;
  294. purbp = list_entry(urbp->node.prev, struct urb_priv, node);
  295. WARN_ON(list_empty(&purbp->td_list));
  296. ptd = list_entry(purbp->td_list.prev, struct uhci_td,
  297. list);
  298. td = list_entry(urbp->td_list.prev, struct uhci_td,
  299. list);
  300. ptd->link = td->link;
  301. goto done;
  302. }
  303. /* If the QH element pointer is UHCI_PTR_TERM then then currently
  304. * executing URB has already been unlinked, so this one isn't it. */
  305. if (qh_element(qh) == UHCI_PTR_TERM)
  306. goto done;
  307. qh->element = UHCI_PTR_TERM;
  308. /* Control pipes don't have to worry about toggles */
  309. if (qh->type == USB_ENDPOINT_XFER_CONTROL)
  310. goto done;
  311. /* Save the next toggle value */
  312. WARN_ON(list_empty(&urbp->td_list));
  313. td = list_entry(urbp->td_list.next, struct uhci_td, list);
  314. qh->needs_fixup = 1;
  315. qh->initial_toggle = uhci_toggle(td_token(td));
  316. done:
  317. return ret;
  318. }
  319. /*
  320. * Fix up the data toggles for URBs in a queue, when one of them
  321. * terminates early (short transfer, error, or dequeued).
  322. */
  323. static void uhci_fixup_toggles(struct uhci_qh *qh, int skip_first)
  324. {
  325. struct urb_priv *urbp = NULL;
  326. struct uhci_td *td;
  327. unsigned int toggle = qh->initial_toggle;
  328. unsigned int pipe;
  329. /* Fixups for a short transfer start with the second URB in the
  330. * queue (the short URB is the first). */
  331. if (skip_first)
  332. urbp = list_entry(qh->queue.next, struct urb_priv, node);
  333. /* When starting with the first URB, if the QH element pointer is
  334. * still valid then we know the URB's toggles are okay. */
  335. else if (qh_element(qh) != UHCI_PTR_TERM)
  336. toggle = 2;
  337. /* Fix up the toggle for the URBs in the queue. Normally this
  338. * loop won't run more than once: When an error or short transfer
  339. * occurs, the queue usually gets emptied. */
  340. urbp = list_prepare_entry(urbp, &qh->queue, node);
  341. list_for_each_entry_continue(urbp, &qh->queue, node) {
  342. /* If the first TD has the right toggle value, we don't
  343. * need to change any toggles in this URB */
  344. td = list_entry(urbp->td_list.next, struct uhci_td, list);
  345. if (toggle > 1 || uhci_toggle(td_token(td)) == toggle) {
  346. td = list_entry(urbp->td_list.prev, struct uhci_td,
  347. list);
  348. toggle = uhci_toggle(td_token(td)) ^ 1;
  349. /* Otherwise all the toggles in the URB have to be switched */
  350. } else {
  351. list_for_each_entry(td, &urbp->td_list, list) {
  352. td->token ^= __constant_cpu_to_le32(
  353. TD_TOKEN_TOGGLE);
  354. toggle ^= 1;
  355. }
  356. }
  357. }
  358. wmb();
  359. pipe = list_entry(qh->queue.next, struct urb_priv, node)->urb->pipe;
  360. usb_settoggle(qh->udev, usb_pipeendpoint(pipe),
  361. usb_pipeout(pipe), toggle);
  362. qh->needs_fixup = 0;
  363. }
  364. /*
  365. * Link an Isochronous QH into its skeleton's list
  366. */
  367. static inline void link_iso(struct uhci_hcd *uhci, struct uhci_qh *qh)
  368. {
  369. list_add_tail(&qh->node, &uhci->skel_iso_qh->node);
  370. /* Isochronous QHs aren't linked by the hardware */
  371. }
  372. /*
  373. * Link a high-period interrupt QH into the schedule at the end of its
  374. * skeleton's list
  375. */
  376. static void link_interrupt(struct uhci_hcd *uhci, struct uhci_qh *qh)
  377. {
  378. struct uhci_qh *pqh;
  379. list_add_tail(&qh->node, &uhci->skelqh[qh->skel]->node);
  380. pqh = list_entry(qh->node.prev, struct uhci_qh, node);
  381. qh->link = pqh->link;
  382. wmb();
  383. pqh->link = LINK_TO_QH(qh);
  384. }
  385. /*
  386. * Link a period-1 interrupt or async QH into the schedule at the
  387. * correct spot in the async skeleton's list, and update the FSBR link
  388. */
  389. static void link_async(struct uhci_hcd *uhci, struct uhci_qh *qh)
  390. {
  391. struct uhci_qh *pqh, *lqh;
  392. __le32 link_to_new_qh;
  393. __le32 *extra_link = &link_to_new_qh;
  394. /* Find the predecessor QH for our new one and insert it in the list.
  395. * The list of QHs is expected to be short, so linear search won't
  396. * take too long. */
  397. list_for_each_entry_reverse(pqh, &uhci->skel_async_qh->node, node) {
  398. if (pqh->skel <= qh->skel)
  399. break;
  400. }
  401. list_add(&qh->node, &pqh->node);
  402. qh->link = pqh->link;
  403. link_to_new_qh = LINK_TO_QH(qh);
  404. /* If this is now the first FSBR QH, take special action */
  405. if (uhci->fsbr_is_on && pqh->skel < SKEL_FSBR &&
  406. qh->skel >= SKEL_FSBR) {
  407. lqh = list_entry(uhci->skel_async_qh->node.prev,
  408. struct uhci_qh, node);
  409. /* If the new QH is also the last one, we must unlink
  410. * the terminating skeleton QH and make the new QH point
  411. * back to itself. */
  412. if (qh == lqh) {
  413. qh->link = link_to_new_qh;
  414. extra_link = &uhci->skel_term_qh->link;
  415. /* Otherwise the last QH must point to the new QH */
  416. } else
  417. extra_link = &lqh->link;
  418. }
  419. /* Link it into the schedule */
  420. wmb();
  421. *extra_link = pqh->link = link_to_new_qh;
  422. }
  423. /*
  424. * Put a QH on the schedule in both hardware and software
  425. */
  426. static void uhci_activate_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  427. {
  428. WARN_ON(list_empty(&qh->queue));
  429. /* Set the element pointer if it isn't set already.
  430. * This isn't needed for Isochronous queues, but it doesn't hurt. */
  431. if (qh_element(qh) == UHCI_PTR_TERM) {
  432. struct urb_priv *urbp = list_entry(qh->queue.next,
  433. struct urb_priv, node);
  434. struct uhci_td *td = list_entry(urbp->td_list.next,
  435. struct uhci_td, list);
  436. qh->element = LINK_TO_TD(td);
  437. }
  438. /* Treat the queue as if it has just advanced */
  439. qh->wait_expired = 0;
  440. qh->advance_jiffies = jiffies;
  441. if (qh->state == QH_STATE_ACTIVE)
  442. return;
  443. qh->state = QH_STATE_ACTIVE;
  444. /* Move the QH from its old list to the correct spot in the appropriate
  445. * skeleton's list */
  446. if (qh == uhci->next_qh)
  447. uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
  448. node);
  449. list_del(&qh->node);
  450. if (qh->skel == SKEL_ISO)
  451. link_iso(uhci, qh);
  452. else if (qh->skel < SKEL_ASYNC)
  453. link_interrupt(uhci, qh);
  454. else
  455. link_async(uhci, qh);
  456. }
  457. /*
  458. * Unlink a high-period interrupt QH from the schedule
  459. */
  460. static void unlink_interrupt(struct uhci_hcd *uhci, struct uhci_qh *qh)
  461. {
  462. struct uhci_qh *pqh;
  463. pqh = list_entry(qh->node.prev, struct uhci_qh, node);
  464. pqh->link = qh->link;
  465. mb();
  466. }
  467. /*
  468. * Unlink a period-1 interrupt or async QH from the schedule
  469. */
  470. static void unlink_async(struct uhci_hcd *uhci, struct uhci_qh *qh)
  471. {
  472. struct uhci_qh *pqh, *lqh;
  473. __le32 link_to_next_qh = qh->link;
  474. pqh = list_entry(qh->node.prev, struct uhci_qh, node);
  475. /* If this is the first FSBQ QH, take special action */
  476. if (uhci->fsbr_is_on && pqh->skel < SKEL_FSBR &&
  477. qh->skel >= SKEL_FSBR) {
  478. lqh = list_entry(uhci->skel_async_qh->node.prev,
  479. struct uhci_qh, node);
  480. /* If this QH is also the last one, we must link in
  481. * the terminating skeleton QH. */
  482. if (qh == lqh) {
  483. link_to_next_qh = LINK_TO_QH(uhci->skel_term_qh);
  484. uhci->skel_term_qh->link = link_to_next_qh;
  485. wmb();
  486. qh->link = link_to_next_qh;
  487. /* Otherwise the last QH must point to the new first FSBR QH */
  488. } else
  489. lqh->link = link_to_next_qh;
  490. }
  491. pqh->link = link_to_next_qh;
  492. mb();
  493. }
  494. /*
  495. * Take a QH off the hardware schedule
  496. */
  497. static void uhci_unlink_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  498. {
  499. if (qh->state == QH_STATE_UNLINKING)
  500. return;
  501. WARN_ON(qh->state != QH_STATE_ACTIVE || !qh->udev);
  502. qh->state = QH_STATE_UNLINKING;
  503. /* Unlink the QH from the schedule and record when we did it */
  504. if (qh->skel == SKEL_ISO)
  505. ;
  506. else if (qh->skel < SKEL_ASYNC)
  507. unlink_interrupt(uhci, qh);
  508. else
  509. unlink_async(uhci, qh);
  510. uhci_get_current_frame_number(uhci);
  511. qh->unlink_frame = uhci->frame_number;
  512. /* Force an interrupt so we know when the QH is fully unlinked */
  513. if (list_empty(&uhci->skel_unlink_qh->node))
  514. uhci_set_next_interrupt(uhci);
  515. /* Move the QH from its old list to the end of the unlinking list */
  516. if (qh == uhci->next_qh)
  517. uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
  518. node);
  519. list_move_tail(&qh->node, &uhci->skel_unlink_qh->node);
  520. }
  521. /*
  522. * When we and the controller are through with a QH, it becomes IDLE.
  523. * This happens when a QH has been off the schedule (on the unlinking
  524. * list) for more than one frame, or when an error occurs while adding
  525. * the first URB onto a new QH.
  526. */
  527. static void uhci_make_qh_idle(struct uhci_hcd *uhci, struct uhci_qh *qh)
  528. {
  529. WARN_ON(qh->state == QH_STATE_ACTIVE);
  530. if (qh == uhci->next_qh)
  531. uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
  532. node);
  533. list_move(&qh->node, &uhci->idle_qh_list);
  534. qh->state = QH_STATE_IDLE;
  535. /* Now that the QH is idle, its post_td isn't being used */
  536. if (qh->post_td) {
  537. uhci_free_td(uhci, qh->post_td);
  538. qh->post_td = NULL;
  539. }
  540. /* If anyone is waiting for a QH to become idle, wake them up */
  541. if (uhci->num_waiting)
  542. wake_up_all(&uhci->waitqh);
  543. }
  544. /*
  545. * Find the highest existing bandwidth load for a given phase and period.
  546. */
  547. static int uhci_highest_load(struct uhci_hcd *uhci, int phase, int period)
  548. {
  549. int highest_load = uhci->load[phase];
  550. for (phase += period; phase < MAX_PHASE; phase += period)
  551. highest_load = max_t(int, highest_load, uhci->load[phase]);
  552. return highest_load;
  553. }
  554. /*
  555. * Set qh->phase to the optimal phase for a periodic transfer and
  556. * check whether the bandwidth requirement is acceptable.
  557. */
  558. static int uhci_check_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
  559. {
  560. int minimax_load;
  561. /* Find the optimal phase (unless it is already set) and get
  562. * its load value. */
  563. if (qh->phase >= 0)
  564. minimax_load = uhci_highest_load(uhci, qh->phase, qh->period);
  565. else {
  566. int phase, load;
  567. int max_phase = min_t(int, MAX_PHASE, qh->period);
  568. qh->phase = 0;
  569. minimax_load = uhci_highest_load(uhci, qh->phase, qh->period);
  570. for (phase = 1; phase < max_phase; ++phase) {
  571. load = uhci_highest_load(uhci, phase, qh->period);
  572. if (load < minimax_load) {
  573. minimax_load = load;
  574. qh->phase = phase;
  575. }
  576. }
  577. }
  578. /* Maximum allowable periodic bandwidth is 90%, or 900 us per frame */
  579. if (minimax_load + qh->load > 900) {
  580. dev_dbg(uhci_dev(uhci), "bandwidth allocation failed: "
  581. "period %d, phase %d, %d + %d us\n",
  582. qh->period, qh->phase, minimax_load, qh->load);
  583. return -ENOSPC;
  584. }
  585. return 0;
  586. }
  587. /*
  588. * Reserve a periodic QH's bandwidth in the schedule
  589. */
  590. static void uhci_reserve_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
  591. {
  592. int i;
  593. int load = qh->load;
  594. char *p = "??";
  595. for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
  596. uhci->load[i] += load;
  597. uhci->total_load += load;
  598. }
  599. uhci_to_hcd(uhci)->self.bandwidth_allocated =
  600. uhci->total_load / MAX_PHASE;
  601. switch (qh->type) {
  602. case USB_ENDPOINT_XFER_INT:
  603. ++uhci_to_hcd(uhci)->self.bandwidth_int_reqs;
  604. p = "INT";
  605. break;
  606. case USB_ENDPOINT_XFER_ISOC:
  607. ++uhci_to_hcd(uhci)->self.bandwidth_isoc_reqs;
  608. p = "ISO";
  609. break;
  610. }
  611. qh->bandwidth_reserved = 1;
  612. dev_dbg(uhci_dev(uhci),
  613. "%s dev %d ep%02x-%s, period %d, phase %d, %d us\n",
  614. "reserve", qh->udev->devnum,
  615. qh->hep->desc.bEndpointAddress, p,
  616. qh->period, qh->phase, load);
  617. }
  618. /*
  619. * Release a periodic QH's bandwidth reservation
  620. */
  621. static void uhci_release_bandwidth(struct uhci_hcd *uhci, struct uhci_qh *qh)
  622. {
  623. int i;
  624. int load = qh->load;
  625. char *p = "??";
  626. for (i = qh->phase; i < MAX_PHASE; i += qh->period) {
  627. uhci->load[i] -= load;
  628. uhci->total_load -= load;
  629. }
  630. uhci_to_hcd(uhci)->self.bandwidth_allocated =
  631. uhci->total_load / MAX_PHASE;
  632. switch (qh->type) {
  633. case USB_ENDPOINT_XFER_INT:
  634. --uhci_to_hcd(uhci)->self.bandwidth_int_reqs;
  635. p = "INT";
  636. break;
  637. case USB_ENDPOINT_XFER_ISOC:
  638. --uhci_to_hcd(uhci)->self.bandwidth_isoc_reqs;
  639. p = "ISO";
  640. break;
  641. }
  642. qh->bandwidth_reserved = 0;
  643. dev_dbg(uhci_dev(uhci),
  644. "%s dev %d ep%02x-%s, period %d, phase %d, %d us\n",
  645. "release", qh->udev->devnum,
  646. qh->hep->desc.bEndpointAddress, p,
  647. qh->period, qh->phase, load);
  648. }
  649. static inline struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci,
  650. struct urb *urb)
  651. {
  652. struct urb_priv *urbp;
  653. urbp = kmem_cache_zalloc(uhci_up_cachep, GFP_ATOMIC);
  654. if (!urbp)
  655. return NULL;
  656. urbp->urb = urb;
  657. urb->hcpriv = urbp;
  658. INIT_LIST_HEAD(&urbp->node);
  659. INIT_LIST_HEAD(&urbp->td_list);
  660. return urbp;
  661. }
  662. static void uhci_free_urb_priv(struct uhci_hcd *uhci,
  663. struct urb_priv *urbp)
  664. {
  665. struct uhci_td *td, *tmp;
  666. if (!list_empty(&urbp->node))
  667. dev_warn(uhci_dev(uhci), "urb %p still on QH's list!\n",
  668. urbp->urb);
  669. list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
  670. uhci_remove_td_from_urbp(td);
  671. uhci_free_td(uhci, td);
  672. }
  673. urbp->urb->hcpriv = NULL;
  674. kmem_cache_free(uhci_up_cachep, urbp);
  675. }
  676. /*
  677. * Map status to standard result codes
  678. *
  679. * <status> is (td_status(td) & 0xF60000), a.k.a.
  680. * uhci_status_bits(td_status(td)).
  681. * Note: <status> does not include the TD_CTRL_NAK bit.
  682. * <dir_out> is True for output TDs and False for input TDs.
  683. */
  684. static int uhci_map_status(int status, int dir_out)
  685. {
  686. if (!status)
  687. return 0;
  688. if (status & TD_CTRL_BITSTUFF) /* Bitstuff error */
  689. return -EPROTO;
  690. if (status & TD_CTRL_CRCTIMEO) { /* CRC/Timeout */
  691. if (dir_out)
  692. return -EPROTO;
  693. else
  694. return -EILSEQ;
  695. }
  696. if (status & TD_CTRL_BABBLE) /* Babble */
  697. return -EOVERFLOW;
  698. if (status & TD_CTRL_DBUFERR) /* Buffer error */
  699. return -ENOSR;
  700. if (status & TD_CTRL_STALLED) /* Stalled */
  701. return -EPIPE;
  702. return 0;
  703. }
  704. /*
  705. * Control transfers
  706. */
  707. static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb,
  708. struct uhci_qh *qh)
  709. {
  710. struct uhci_td *td;
  711. unsigned long destination, status;
  712. int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize);
  713. int len = urb->transfer_buffer_length;
  714. dma_addr_t data = urb->transfer_dma;
  715. __le32 *plink;
  716. struct urb_priv *urbp = urb->hcpriv;
  717. int skel;
  718. /* The "pipe" thing contains the destination in bits 8--18 */
  719. destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP;
  720. /* 3 errors, dummy TD remains inactive */
  721. status = uhci_maxerr(3);
  722. if (urb->dev->speed == USB_SPEED_LOW)
  723. status |= TD_CTRL_LS;
  724. /*
  725. * Build the TD for the control request setup packet
  726. */
  727. td = qh->dummy_td;
  728. uhci_add_td_to_urbp(td, urbp);
  729. uhci_fill_td(td, status, destination | uhci_explen(8),
  730. urb->setup_dma);
  731. plink = &td->link;
  732. status |= TD_CTRL_ACTIVE;
  733. /*
  734. * If direction is "send", change the packet ID from SETUP (0x2D)
  735. * to OUT (0xE1). Else change it from SETUP to IN (0x69) and
  736. * set Short Packet Detect (SPD) for all data packets.
  737. */
  738. if (usb_pipeout(urb->pipe))
  739. destination ^= (USB_PID_SETUP ^ USB_PID_OUT);
  740. else {
  741. destination ^= (USB_PID_SETUP ^ USB_PID_IN);
  742. status |= TD_CTRL_SPD;
  743. }
  744. /*
  745. * Build the DATA TDs
  746. */
  747. while (len > 0) {
  748. int pktsze = min(len, maxsze);
  749. td = uhci_alloc_td(uhci);
  750. if (!td)
  751. goto nomem;
  752. *plink = LINK_TO_TD(td);
  753. /* Alternate Data0/1 (start with Data1) */
  754. destination ^= TD_TOKEN_TOGGLE;
  755. uhci_add_td_to_urbp(td, urbp);
  756. uhci_fill_td(td, status, destination | uhci_explen(pktsze),
  757. data);
  758. plink = &td->link;
  759. data += pktsze;
  760. len -= pktsze;
  761. }
  762. /*
  763. * Build the final TD for control status
  764. */
  765. td = uhci_alloc_td(uhci);
  766. if (!td)
  767. goto nomem;
  768. *plink = LINK_TO_TD(td);
  769. /*
  770. * It's IN if the pipe is an output pipe or we're not expecting
  771. * data back.
  772. */
  773. destination &= ~TD_TOKEN_PID_MASK;
  774. if (usb_pipeout(urb->pipe) || !urb->transfer_buffer_length)
  775. destination |= USB_PID_IN;
  776. else
  777. destination |= USB_PID_OUT;
  778. destination |= TD_TOKEN_TOGGLE; /* End in Data1 */
  779. status &= ~TD_CTRL_SPD;
  780. uhci_add_td_to_urbp(td, urbp);
  781. uhci_fill_td(td, status | TD_CTRL_IOC,
  782. destination | uhci_explen(0), 0);
  783. plink = &td->link;
  784. /*
  785. * Build the new dummy TD and activate the old one
  786. */
  787. td = uhci_alloc_td(uhci);
  788. if (!td)
  789. goto nomem;
  790. *plink = LINK_TO_TD(td);
  791. uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0);
  792. wmb();
  793. qh->dummy_td->status |= __constant_cpu_to_le32(TD_CTRL_ACTIVE);
  794. qh->dummy_td = td;
  795. /* Low-speed transfers get a different queue, and won't hog the bus.
  796. * Also, some devices enumerate better without FSBR; the easiest way
  797. * to do that is to put URBs on the low-speed queue while the device
  798. * isn't in the CONFIGURED state. */
  799. if (urb->dev->speed == USB_SPEED_LOW ||
  800. urb->dev->state != USB_STATE_CONFIGURED)
  801. skel = SKEL_LS_CONTROL;
  802. else {
  803. skel = SKEL_FS_CONTROL;
  804. uhci_add_fsbr(uhci, urb);
  805. }
  806. if (qh->state != QH_STATE_ACTIVE)
  807. qh->skel = skel;
  808. urb->actual_length = -8; /* Account for the SETUP packet */
  809. return 0;
  810. nomem:
  811. /* Remove the dummy TD from the td_list so it doesn't get freed */
  812. uhci_remove_td_from_urbp(qh->dummy_td);
  813. return -ENOMEM;
  814. }
  815. /*
  816. * Common submit for bulk and interrupt
  817. */
  818. static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb,
  819. struct uhci_qh *qh)
  820. {
  821. struct uhci_td *td;
  822. unsigned long destination, status;
  823. int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize);
  824. int len = urb->transfer_buffer_length;
  825. dma_addr_t data = urb->transfer_dma;
  826. __le32 *plink;
  827. struct urb_priv *urbp = urb->hcpriv;
  828. unsigned int toggle;
  829. if (len < 0)
  830. return -EINVAL;
  831. /* The "pipe" thing contains the destination in bits 8--18 */
  832. destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
  833. toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  834. usb_pipeout(urb->pipe));
  835. /* 3 errors, dummy TD remains inactive */
  836. status = uhci_maxerr(3);
  837. if (urb->dev->speed == USB_SPEED_LOW)
  838. status |= TD_CTRL_LS;
  839. if (usb_pipein(urb->pipe))
  840. status |= TD_CTRL_SPD;
  841. /*
  842. * Build the DATA TDs
  843. */
  844. plink = NULL;
  845. td = qh->dummy_td;
  846. do { /* Allow zero length packets */
  847. int pktsze = maxsze;
  848. if (len <= pktsze) { /* The last packet */
  849. pktsze = len;
  850. if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
  851. status &= ~TD_CTRL_SPD;
  852. }
  853. if (plink) {
  854. td = uhci_alloc_td(uhci);
  855. if (!td)
  856. goto nomem;
  857. *plink = LINK_TO_TD(td);
  858. }
  859. uhci_add_td_to_urbp(td, urbp);
  860. uhci_fill_td(td, status,
  861. destination | uhci_explen(pktsze) |
  862. (toggle << TD_TOKEN_TOGGLE_SHIFT),
  863. data);
  864. plink = &td->link;
  865. status |= TD_CTRL_ACTIVE;
  866. data += pktsze;
  867. len -= maxsze;
  868. toggle ^= 1;
  869. } while (len > 0);
  870. /*
  871. * URB_ZERO_PACKET means adding a 0-length packet, if direction
  872. * is OUT and the transfer_length was an exact multiple of maxsze,
  873. * hence (len = transfer_length - N * maxsze) == 0
  874. * however, if transfer_length == 0, the zero packet was already
  875. * prepared above.
  876. */
  877. if ((urb->transfer_flags & URB_ZERO_PACKET) &&
  878. usb_pipeout(urb->pipe) && len == 0 &&
  879. urb->transfer_buffer_length > 0) {
  880. td = uhci_alloc_td(uhci);
  881. if (!td)
  882. goto nomem;
  883. *plink = LINK_TO_TD(td);
  884. uhci_add_td_to_urbp(td, urbp);
  885. uhci_fill_td(td, status,
  886. destination | uhci_explen(0) |
  887. (toggle << TD_TOKEN_TOGGLE_SHIFT),
  888. data);
  889. plink = &td->link;
  890. toggle ^= 1;
  891. }
  892. /* Set the interrupt-on-completion flag on the last packet.
  893. * A more-or-less typical 4 KB URB (= size of one memory page)
  894. * will require about 3 ms to transfer; that's a little on the
  895. * fast side but not enough to justify delaying an interrupt
  896. * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT
  897. * flag setting. */
  898. td->status |= __constant_cpu_to_le32(TD_CTRL_IOC);
  899. /*
  900. * Build the new dummy TD and activate the old one
  901. */
  902. td = uhci_alloc_td(uhci);
  903. if (!td)
  904. goto nomem;
  905. *plink = LINK_TO_TD(td);
  906. uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0);
  907. wmb();
  908. qh->dummy_td->status |= __constant_cpu_to_le32(TD_CTRL_ACTIVE);
  909. qh->dummy_td = td;
  910. usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  911. usb_pipeout(urb->pipe), toggle);
  912. return 0;
  913. nomem:
  914. /* Remove the dummy TD from the td_list so it doesn't get freed */
  915. uhci_remove_td_from_urbp(qh->dummy_td);
  916. return -ENOMEM;
  917. }
  918. static int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb,
  919. struct uhci_qh *qh)
  920. {
  921. int ret;
  922. /* Can't have low-speed bulk transfers */
  923. if (urb->dev->speed == USB_SPEED_LOW)
  924. return -EINVAL;
  925. if (qh->state != QH_STATE_ACTIVE)
  926. qh->skel = SKEL_BULK;
  927. ret = uhci_submit_common(uhci, urb, qh);
  928. if (ret == 0)
  929. uhci_add_fsbr(uhci, urb);
  930. return ret;
  931. }
  932. static int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb,
  933. struct uhci_qh *qh)
  934. {
  935. int ret;
  936. /* USB 1.1 interrupt transfers only involve one packet per interval.
  937. * Drivers can submit URBs of any length, but longer ones will need
  938. * multiple intervals to complete.
  939. */
  940. if (!qh->bandwidth_reserved) {
  941. int exponent;
  942. /* Figure out which power-of-two queue to use */
  943. for (exponent = 7; exponent >= 0; --exponent) {
  944. if ((1 << exponent) <= urb->interval)
  945. break;
  946. }
  947. if (exponent < 0)
  948. return -EINVAL;
  949. qh->period = 1 << exponent;
  950. qh->skel = SKEL_INDEX(exponent);
  951. /* For now, interrupt phase is fixed by the layout
  952. * of the QH lists. */
  953. qh->phase = (qh->period / 2) & (MAX_PHASE - 1);
  954. ret = uhci_check_bandwidth(uhci, qh);
  955. if (ret)
  956. return ret;
  957. } else if (qh->period > urb->interval)
  958. return -EINVAL; /* Can't decrease the period */
  959. ret = uhci_submit_common(uhci, urb, qh);
  960. if (ret == 0) {
  961. urb->interval = qh->period;
  962. if (!qh->bandwidth_reserved)
  963. uhci_reserve_bandwidth(uhci, qh);
  964. }
  965. return ret;
  966. }
  967. /*
  968. * Fix up the data structures following a short transfer
  969. */
  970. static int uhci_fixup_short_transfer(struct uhci_hcd *uhci,
  971. struct uhci_qh *qh, struct urb_priv *urbp)
  972. {
  973. struct uhci_td *td;
  974. struct list_head *tmp;
  975. int ret;
  976. td = list_entry(urbp->td_list.prev, struct uhci_td, list);
  977. if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
  978. /* When a control transfer is short, we have to restart
  979. * the queue at the status stage transaction, which is
  980. * the last TD. */
  981. WARN_ON(list_empty(&urbp->td_list));
  982. qh->element = LINK_TO_TD(td);
  983. tmp = td->list.prev;
  984. ret = -EINPROGRESS;
  985. } else {
  986. /* When a bulk/interrupt transfer is short, we have to
  987. * fix up the toggles of the following URBs on the queue
  988. * before restarting the queue at the next URB. */
  989. qh->initial_toggle = uhci_toggle(td_token(qh->post_td)) ^ 1;
  990. uhci_fixup_toggles(qh, 1);
  991. if (list_empty(&urbp->td_list))
  992. td = qh->post_td;
  993. qh->element = td->link;
  994. tmp = urbp->td_list.prev;
  995. ret = 0;
  996. }
  997. /* Remove all the TDs we skipped over, from tmp back to the start */
  998. while (tmp != &urbp->td_list) {
  999. td = list_entry(tmp, struct uhci_td, list);
  1000. tmp = tmp->prev;
  1001. uhci_remove_td_from_urbp(td);
  1002. uhci_free_td(uhci, td);
  1003. }
  1004. return ret;
  1005. }
  1006. /*
  1007. * Common result for control, bulk, and interrupt
  1008. */
  1009. static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb)
  1010. {
  1011. struct urb_priv *urbp = urb->hcpriv;
  1012. struct uhci_qh *qh = urbp->qh;
  1013. struct uhci_td *td, *tmp;
  1014. unsigned status;
  1015. int ret = 0;
  1016. list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
  1017. unsigned int ctrlstat;
  1018. int len;
  1019. ctrlstat = td_status(td);
  1020. status = uhci_status_bits(ctrlstat);
  1021. if (status & TD_CTRL_ACTIVE)
  1022. return -EINPROGRESS;
  1023. len = uhci_actual_length(ctrlstat);
  1024. urb->actual_length += len;
  1025. if (status) {
  1026. ret = uhci_map_status(status,
  1027. uhci_packetout(td_token(td)));
  1028. if ((debug == 1 && ret != -EPIPE) || debug > 1) {
  1029. /* Some debugging code */
  1030. dev_dbg(&urb->dev->dev,
  1031. "%s: failed with status %x\n",
  1032. __FUNCTION__, status);
  1033. if (debug > 1 && errbuf) {
  1034. /* Print the chain for debugging */
  1035. uhci_show_qh(urbp->qh, errbuf,
  1036. ERRBUF_LEN, 0);
  1037. lprintk(errbuf);
  1038. }
  1039. }
  1040. } else if (len < uhci_expected_length(td_token(td))) {
  1041. /* We received a short packet */
  1042. if (urb->transfer_flags & URB_SHORT_NOT_OK)
  1043. ret = -EREMOTEIO;
  1044. /* Fixup needed only if this isn't the URB's last TD */
  1045. else if (&td->list != urbp->td_list.prev)
  1046. ret = 1;
  1047. }
  1048. uhci_remove_td_from_urbp(td);
  1049. if (qh->post_td)
  1050. uhci_free_td(uhci, qh->post_td);
  1051. qh->post_td = td;
  1052. if (ret != 0)
  1053. goto err;
  1054. }
  1055. return ret;
  1056. err:
  1057. if (ret < 0) {
  1058. /* In case a control transfer gets an error
  1059. * during the setup stage */
  1060. urb->actual_length = max(urb->actual_length, 0);
  1061. /* Note that the queue has stopped and save
  1062. * the next toggle value */
  1063. qh->element = UHCI_PTR_TERM;
  1064. qh->is_stopped = 1;
  1065. qh->needs_fixup = (qh->type != USB_ENDPOINT_XFER_CONTROL);
  1066. qh->initial_toggle = uhci_toggle(td_token(td)) ^
  1067. (ret == -EREMOTEIO);
  1068. } else /* Short packet received */
  1069. ret = uhci_fixup_short_transfer(uhci, qh, urbp);
  1070. return ret;
  1071. }
  1072. /*
  1073. * Isochronous transfers
  1074. */
  1075. static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb,
  1076. struct uhci_qh *qh)
  1077. {
  1078. struct uhci_td *td = NULL; /* Since urb->number_of_packets > 0 */
  1079. int i, frame;
  1080. unsigned long destination, status;
  1081. struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
  1082. /* Values must not be too big (could overflow below) */
  1083. if (urb->interval >= UHCI_NUMFRAMES ||
  1084. urb->number_of_packets >= UHCI_NUMFRAMES)
  1085. return -EFBIG;
  1086. /* Check the period and figure out the starting frame number */
  1087. if (!qh->bandwidth_reserved) {
  1088. qh->period = urb->interval;
  1089. if (urb->transfer_flags & URB_ISO_ASAP) {
  1090. qh->phase = -1; /* Find the best phase */
  1091. i = uhci_check_bandwidth(uhci, qh);
  1092. if (i)
  1093. return i;
  1094. /* Allow a little time to allocate the TDs */
  1095. uhci_get_current_frame_number(uhci);
  1096. frame = uhci->frame_number + 10;
  1097. /* Move forward to the first frame having the
  1098. * correct phase */
  1099. urb->start_frame = frame + ((qh->phase - frame) &
  1100. (qh->period - 1));
  1101. } else {
  1102. i = urb->start_frame - uhci->last_iso_frame;
  1103. if (i <= 0 || i >= UHCI_NUMFRAMES)
  1104. return -EINVAL;
  1105. qh->phase = urb->start_frame & (qh->period - 1);
  1106. i = uhci_check_bandwidth(uhci, qh);
  1107. if (i)
  1108. return i;
  1109. }
  1110. } else if (qh->period != urb->interval) {
  1111. return -EINVAL; /* Can't change the period */
  1112. } else { /* Pick up where the last URB leaves off */
  1113. if (list_empty(&qh->queue)) {
  1114. frame = qh->iso_frame;
  1115. } else {
  1116. struct urb *lurb;
  1117. lurb = list_entry(qh->queue.prev,
  1118. struct urb_priv, node)->urb;
  1119. frame = lurb->start_frame +
  1120. lurb->number_of_packets *
  1121. lurb->interval;
  1122. }
  1123. if (urb->transfer_flags & URB_ISO_ASAP)
  1124. urb->start_frame = frame;
  1125. else if (urb->start_frame != frame)
  1126. return -EINVAL;
  1127. }
  1128. /* Make sure we won't have to go too far into the future */
  1129. if (uhci_frame_before_eq(uhci->last_iso_frame + UHCI_NUMFRAMES,
  1130. urb->start_frame + urb->number_of_packets *
  1131. urb->interval))
  1132. return -EFBIG;
  1133. status = TD_CTRL_ACTIVE | TD_CTRL_IOS;
  1134. destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
  1135. for (i = 0; i < urb->number_of_packets; i++) {
  1136. td = uhci_alloc_td(uhci);
  1137. if (!td)
  1138. return -ENOMEM;
  1139. uhci_add_td_to_urbp(td, urbp);
  1140. uhci_fill_td(td, status, destination |
  1141. uhci_explen(urb->iso_frame_desc[i].length),
  1142. urb->transfer_dma +
  1143. urb->iso_frame_desc[i].offset);
  1144. }
  1145. /* Set the interrupt-on-completion flag on the last packet. */
  1146. td->status |= __constant_cpu_to_le32(TD_CTRL_IOC);
  1147. /* Add the TDs to the frame list */
  1148. frame = urb->start_frame;
  1149. list_for_each_entry(td, &urbp->td_list, list) {
  1150. uhci_insert_td_in_frame_list(uhci, td, frame);
  1151. frame += qh->period;
  1152. }
  1153. if (list_empty(&qh->queue)) {
  1154. qh->iso_packet_desc = &urb->iso_frame_desc[0];
  1155. qh->iso_frame = urb->start_frame;
  1156. qh->iso_status = 0;
  1157. }
  1158. qh->skel = SKEL_ISO;
  1159. if (!qh->bandwidth_reserved)
  1160. uhci_reserve_bandwidth(uhci, qh);
  1161. return 0;
  1162. }
  1163. static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb)
  1164. {
  1165. struct uhci_td *td, *tmp;
  1166. struct urb_priv *urbp = urb->hcpriv;
  1167. struct uhci_qh *qh = urbp->qh;
  1168. list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
  1169. unsigned int ctrlstat;
  1170. int status;
  1171. int actlength;
  1172. if (uhci_frame_before_eq(uhci->cur_iso_frame, qh->iso_frame))
  1173. return -EINPROGRESS;
  1174. uhci_remove_tds_from_frame(uhci, qh->iso_frame);
  1175. ctrlstat = td_status(td);
  1176. if (ctrlstat & TD_CTRL_ACTIVE) {
  1177. status = -EXDEV; /* TD was added too late? */
  1178. } else {
  1179. status = uhci_map_status(uhci_status_bits(ctrlstat),
  1180. usb_pipeout(urb->pipe));
  1181. actlength = uhci_actual_length(ctrlstat);
  1182. urb->actual_length += actlength;
  1183. qh->iso_packet_desc->actual_length = actlength;
  1184. qh->iso_packet_desc->status = status;
  1185. }
  1186. if (status) {
  1187. urb->error_count++;
  1188. qh->iso_status = status;
  1189. }
  1190. uhci_remove_td_from_urbp(td);
  1191. uhci_free_td(uhci, td);
  1192. qh->iso_frame += qh->period;
  1193. ++qh->iso_packet_desc;
  1194. }
  1195. return qh->iso_status;
  1196. }
  1197. static int uhci_urb_enqueue(struct usb_hcd *hcd,
  1198. struct usb_host_endpoint *hep,
  1199. struct urb *urb, gfp_t mem_flags)
  1200. {
  1201. int ret;
  1202. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  1203. unsigned long flags;
  1204. struct urb_priv *urbp;
  1205. struct uhci_qh *qh;
  1206. spin_lock_irqsave(&uhci->lock, flags);
  1207. ret = urb->status;
  1208. if (ret != -EINPROGRESS) /* URB already unlinked! */
  1209. goto done;
  1210. ret = -ENOMEM;
  1211. urbp = uhci_alloc_urb_priv(uhci, urb);
  1212. if (!urbp)
  1213. goto done;
  1214. if (hep->hcpriv)
  1215. qh = (struct uhci_qh *) hep->hcpriv;
  1216. else {
  1217. qh = uhci_alloc_qh(uhci, urb->dev, hep);
  1218. if (!qh)
  1219. goto err_no_qh;
  1220. }
  1221. urbp->qh = qh;
  1222. switch (qh->type) {
  1223. case USB_ENDPOINT_XFER_CONTROL:
  1224. ret = uhci_submit_control(uhci, urb, qh);
  1225. break;
  1226. case USB_ENDPOINT_XFER_BULK:
  1227. ret = uhci_submit_bulk(uhci, urb, qh);
  1228. break;
  1229. case USB_ENDPOINT_XFER_INT:
  1230. ret = uhci_submit_interrupt(uhci, urb, qh);
  1231. break;
  1232. case USB_ENDPOINT_XFER_ISOC:
  1233. urb->error_count = 0;
  1234. ret = uhci_submit_isochronous(uhci, urb, qh);
  1235. break;
  1236. }
  1237. if (ret != 0)
  1238. goto err_submit_failed;
  1239. /* Add this URB to the QH */
  1240. urbp->qh = qh;
  1241. list_add_tail(&urbp->node, &qh->queue);
  1242. /* If the new URB is the first and only one on this QH then either
  1243. * the QH is new and idle or else it's unlinked and waiting to
  1244. * become idle, so we can activate it right away. But only if the
  1245. * queue isn't stopped. */
  1246. if (qh->queue.next == &urbp->node && !qh->is_stopped) {
  1247. uhci_activate_qh(uhci, qh);
  1248. uhci_urbp_wants_fsbr(uhci, urbp);
  1249. }
  1250. goto done;
  1251. err_submit_failed:
  1252. if (qh->state == QH_STATE_IDLE)
  1253. uhci_make_qh_idle(uhci, qh); /* Reclaim unused QH */
  1254. err_no_qh:
  1255. uhci_free_urb_priv(uhci, urbp);
  1256. done:
  1257. spin_unlock_irqrestore(&uhci->lock, flags);
  1258. return ret;
  1259. }
  1260. static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
  1261. {
  1262. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  1263. unsigned long flags;
  1264. struct urb_priv *urbp;
  1265. struct uhci_qh *qh;
  1266. spin_lock_irqsave(&uhci->lock, flags);
  1267. urbp = urb->hcpriv;
  1268. if (!urbp) /* URB was never linked! */
  1269. goto done;
  1270. qh = urbp->qh;
  1271. /* Remove Isochronous TDs from the frame list ASAP */
  1272. if (qh->type == USB_ENDPOINT_XFER_ISOC) {
  1273. uhci_unlink_isochronous_tds(uhci, urb);
  1274. mb();
  1275. /* If the URB has already started, update the QH unlink time */
  1276. uhci_get_current_frame_number(uhci);
  1277. if (uhci_frame_before_eq(urb->start_frame, uhci->frame_number))
  1278. qh->unlink_frame = uhci->frame_number;
  1279. }
  1280. uhci_unlink_qh(uhci, qh);
  1281. done:
  1282. spin_unlock_irqrestore(&uhci->lock, flags);
  1283. return 0;
  1284. }
  1285. /*
  1286. * Finish unlinking an URB and give it back
  1287. */
  1288. static void uhci_giveback_urb(struct uhci_hcd *uhci, struct uhci_qh *qh,
  1289. struct urb *urb)
  1290. __releases(uhci->lock)
  1291. __acquires(uhci->lock)
  1292. {
  1293. struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
  1294. /* When giving back the first URB in an Isochronous queue,
  1295. * reinitialize the QH's iso-related members for the next URB. */
  1296. if (qh->type == USB_ENDPOINT_XFER_ISOC &&
  1297. urbp->node.prev == &qh->queue &&
  1298. urbp->node.next != &qh->queue) {
  1299. struct urb *nurb = list_entry(urbp->node.next,
  1300. struct urb_priv, node)->urb;
  1301. qh->iso_packet_desc = &nurb->iso_frame_desc[0];
  1302. qh->iso_frame = nurb->start_frame;
  1303. qh->iso_status = 0;
  1304. }
  1305. /* Take the URB off the QH's queue. If the queue is now empty,
  1306. * this is a perfect time for a toggle fixup. */
  1307. list_del_init(&urbp->node);
  1308. if (list_empty(&qh->queue) && qh->needs_fixup) {
  1309. usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  1310. usb_pipeout(urb->pipe), qh->initial_toggle);
  1311. qh->needs_fixup = 0;
  1312. }
  1313. uhci_free_urb_priv(uhci, urbp);
  1314. spin_unlock(&uhci->lock);
  1315. usb_hcd_giveback_urb(uhci_to_hcd(uhci), urb);
  1316. spin_lock(&uhci->lock);
  1317. /* If the queue is now empty, we can unlink the QH and give up its
  1318. * reserved bandwidth. */
  1319. if (list_empty(&qh->queue)) {
  1320. uhci_unlink_qh(uhci, qh);
  1321. if (qh->bandwidth_reserved)
  1322. uhci_release_bandwidth(uhci, qh);
  1323. }
  1324. }
  1325. /*
  1326. * Scan the URBs in a QH's queue
  1327. */
  1328. #define QH_FINISHED_UNLINKING(qh) \
  1329. (qh->state == QH_STATE_UNLINKING && \
  1330. uhci->frame_number + uhci->is_stopped != qh->unlink_frame)
  1331. static void uhci_scan_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  1332. {
  1333. struct urb_priv *urbp;
  1334. struct urb *urb;
  1335. int status;
  1336. while (!list_empty(&qh->queue)) {
  1337. urbp = list_entry(qh->queue.next, struct urb_priv, node);
  1338. urb = urbp->urb;
  1339. if (qh->type == USB_ENDPOINT_XFER_ISOC)
  1340. status = uhci_result_isochronous(uhci, urb);
  1341. else
  1342. status = uhci_result_common(uhci, urb);
  1343. if (status == -EINPROGRESS)
  1344. break;
  1345. spin_lock(&urb->lock);
  1346. if (urb->status == -EINPROGRESS) /* Not dequeued */
  1347. urb->status = status;
  1348. else
  1349. status = ECONNRESET; /* Not -ECONNRESET */
  1350. spin_unlock(&urb->lock);
  1351. /* Dequeued but completed URBs can't be given back unless
  1352. * the QH is stopped or has finished unlinking. */
  1353. if (status == ECONNRESET) {
  1354. if (QH_FINISHED_UNLINKING(qh))
  1355. qh->is_stopped = 1;
  1356. else if (!qh->is_stopped)
  1357. return;
  1358. }
  1359. uhci_giveback_urb(uhci, qh, urb);
  1360. if (status < 0 && qh->type != USB_ENDPOINT_XFER_ISOC)
  1361. break;
  1362. }
  1363. /* If the QH is neither stopped nor finished unlinking (normal case),
  1364. * our work here is done. */
  1365. if (QH_FINISHED_UNLINKING(qh))
  1366. qh->is_stopped = 1;
  1367. else if (!qh->is_stopped)
  1368. return;
  1369. /* Otherwise give back each of the dequeued URBs */
  1370. restart:
  1371. list_for_each_entry(urbp, &qh->queue, node) {
  1372. urb = urbp->urb;
  1373. if (urb->status != -EINPROGRESS) {
  1374. /* Fix up the TD links and save the toggles for
  1375. * non-Isochronous queues. For Isochronous queues,
  1376. * test for too-recent dequeues. */
  1377. if (!uhci_cleanup_queue(uhci, qh, urb)) {
  1378. qh->is_stopped = 0;
  1379. return;
  1380. }
  1381. uhci_giveback_urb(uhci, qh, urb);
  1382. goto restart;
  1383. }
  1384. }
  1385. qh->is_stopped = 0;
  1386. /* There are no more dequeued URBs. If there are still URBs on the
  1387. * queue, the QH can now be re-activated. */
  1388. if (!list_empty(&qh->queue)) {
  1389. if (qh->needs_fixup)
  1390. uhci_fixup_toggles(qh, 0);
  1391. /* If the first URB on the queue wants FSBR but its time
  1392. * limit has expired, set the next TD to interrupt on
  1393. * completion before reactivating the QH. */
  1394. urbp = list_entry(qh->queue.next, struct urb_priv, node);
  1395. if (urbp->fsbr && qh->wait_expired) {
  1396. struct uhci_td *td = list_entry(urbp->td_list.next,
  1397. struct uhci_td, list);
  1398. td->status |= __cpu_to_le32(TD_CTRL_IOC);
  1399. }
  1400. uhci_activate_qh(uhci, qh);
  1401. }
  1402. /* The queue is empty. The QH can become idle if it is fully
  1403. * unlinked. */
  1404. else if (QH_FINISHED_UNLINKING(qh))
  1405. uhci_make_qh_idle(uhci, qh);
  1406. }
  1407. /*
  1408. * Check for queues that have made some forward progress.
  1409. * Returns 0 if the queue is not Isochronous, is ACTIVE, and
  1410. * has not advanced since last examined; 1 otherwise.
  1411. *
  1412. * Early Intel controllers have a bug which causes qh->element sometimes
  1413. * not to advance when a TD completes successfully. The queue remains
  1414. * stuck on the inactive completed TD. We detect such cases and advance
  1415. * the element pointer by hand.
  1416. */
  1417. static int uhci_advance_check(struct uhci_hcd *uhci, struct uhci_qh *qh)
  1418. {
  1419. struct urb_priv *urbp = NULL;
  1420. struct uhci_td *td;
  1421. int ret = 1;
  1422. unsigned status;
  1423. if (qh->type == USB_ENDPOINT_XFER_ISOC)
  1424. goto done;
  1425. /* Treat an UNLINKING queue as though it hasn't advanced.
  1426. * This is okay because reactivation will treat it as though
  1427. * it has advanced, and if it is going to become IDLE then
  1428. * this doesn't matter anyway. Furthermore it's possible
  1429. * for an UNLINKING queue not to have any URBs at all, or
  1430. * for its first URB not to have any TDs (if it was dequeued
  1431. * just as it completed). So it's not easy in any case to
  1432. * test whether such queues have advanced. */
  1433. if (qh->state != QH_STATE_ACTIVE) {
  1434. urbp = NULL;
  1435. status = 0;
  1436. } else {
  1437. urbp = list_entry(qh->queue.next, struct urb_priv, node);
  1438. td = list_entry(urbp->td_list.next, struct uhci_td, list);
  1439. status = td_status(td);
  1440. if (!(status & TD_CTRL_ACTIVE)) {
  1441. /* We're okay, the queue has advanced */
  1442. qh->wait_expired = 0;
  1443. qh->advance_jiffies = jiffies;
  1444. goto done;
  1445. }
  1446. ret = 0;
  1447. }
  1448. /* The queue hasn't advanced; check for timeout */
  1449. if (qh->wait_expired)
  1450. goto done;
  1451. if (time_after(jiffies, qh->advance_jiffies + QH_WAIT_TIMEOUT)) {
  1452. /* Detect the Intel bug and work around it */
  1453. if (qh->post_td && qh_element(qh) == LINK_TO_TD(qh->post_td)) {
  1454. qh->element = qh->post_td->link;
  1455. qh->advance_jiffies = jiffies;
  1456. ret = 1;
  1457. goto done;
  1458. }
  1459. qh->wait_expired = 1;
  1460. /* If the current URB wants FSBR, unlink it temporarily
  1461. * so that we can safely set the next TD to interrupt on
  1462. * completion. That way we'll know as soon as the queue
  1463. * starts moving again. */
  1464. if (urbp && urbp->fsbr && !(status & TD_CTRL_IOC))
  1465. uhci_unlink_qh(uhci, qh);
  1466. } else {
  1467. /* Unmoving but not-yet-expired queues keep FSBR alive */
  1468. if (urbp)
  1469. uhci_urbp_wants_fsbr(uhci, urbp);
  1470. }
  1471. done:
  1472. return ret;
  1473. }
  1474. /*
  1475. * Process events in the schedule, but only in one thread at a time
  1476. */
  1477. static void uhci_scan_schedule(struct uhci_hcd *uhci)
  1478. {
  1479. int i;
  1480. struct uhci_qh *qh;
  1481. /* Don't allow re-entrant calls */
  1482. if (uhci->scan_in_progress) {
  1483. uhci->need_rescan = 1;
  1484. return;
  1485. }
  1486. uhci->scan_in_progress = 1;
  1487. rescan:
  1488. uhci->need_rescan = 0;
  1489. uhci->fsbr_is_wanted = 0;
  1490. uhci_clear_next_interrupt(uhci);
  1491. uhci_get_current_frame_number(uhci);
  1492. uhci->cur_iso_frame = uhci->frame_number;
  1493. /* Go through all the QH queues and process the URBs in each one */
  1494. for (i = 0; i < UHCI_NUM_SKELQH - 1; ++i) {
  1495. uhci->next_qh = list_entry(uhci->skelqh[i]->node.next,
  1496. struct uhci_qh, node);
  1497. while ((qh = uhci->next_qh) != uhci->skelqh[i]) {
  1498. uhci->next_qh = list_entry(qh->node.next,
  1499. struct uhci_qh, node);
  1500. if (uhci_advance_check(uhci, qh)) {
  1501. uhci_scan_qh(uhci, qh);
  1502. if (qh->state == QH_STATE_ACTIVE) {
  1503. uhci_urbp_wants_fsbr(uhci,
  1504. list_entry(qh->queue.next, struct urb_priv, node));
  1505. }
  1506. }
  1507. }
  1508. }
  1509. uhci->last_iso_frame = uhci->cur_iso_frame;
  1510. if (uhci->need_rescan)
  1511. goto rescan;
  1512. uhci->scan_in_progress = 0;
  1513. if (uhci->fsbr_is_on && !uhci->fsbr_is_wanted &&
  1514. !uhci->fsbr_expiring) {
  1515. uhci->fsbr_expiring = 1;
  1516. mod_timer(&uhci->fsbr_timer, jiffies + FSBR_OFF_DELAY);
  1517. }
  1518. if (list_empty(&uhci->skel_unlink_qh->node))
  1519. uhci_clear_next_interrupt(uhci);
  1520. else
  1521. uhci_set_next_interrupt(uhci);
  1522. }