saa7164-core.c 29 KB

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  1. /*
  2. * Driver for the NXP SAA7164 PCIe bridge
  3. *
  4. * Copyright (c) 2010 Steven Toth <stoth@kernellabs.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. *
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. #include <linux/init.h>
  22. #include <linux/list.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/kmod.h>
  26. #include <linux/kernel.h>
  27. #include <linux/slab.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/delay.h>
  30. #include <asm/div64.h>
  31. #include "saa7164.h"
  32. MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards");
  33. MODULE_AUTHOR("Steven Toth <stoth@kernellabs.com>");
  34. MODULE_LICENSE("GPL");
  35. /*
  36. 1 Basic
  37. 2
  38. 4 i2c
  39. 8 api
  40. 16 cmd
  41. 32 bus
  42. */
  43. unsigned int saa_debug;
  44. module_param_named(debug, saa_debug, int, 0644);
  45. MODULE_PARM_DESC(debug, "enable debug messages");
  46. unsigned int waitsecs = 10;
  47. module_param(waitsecs, int, 0644);
  48. MODULE_PARM_DESC(debug, "timeout on firmware messages");
  49. static unsigned int card[] = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET };
  50. module_param_array(card, int, NULL, 0444);
  51. MODULE_PARM_DESC(card, "card type");
  52. unsigned int print_histogram = 64;
  53. module_param(print_histogram, int, 0644);
  54. MODULE_PARM_DESC(debug, "print histogram values once");
  55. static unsigned int saa7164_devcount;
  56. static DEFINE_MUTEX(devlist);
  57. LIST_HEAD(saa7164_devlist);
  58. #define INT_SIZE 16
  59. static void saa7164_ts_verifier(struct saa7164_buffer *buf)
  60. {
  61. struct saa7164_port *port = buf->port;
  62. struct saa7164_dev *dev = port->dev;
  63. u32 i;
  64. u8 tmp, cc, a;
  65. u8 *bufcpu = (u8 *)buf->cpu;
  66. port->sync_errors = 0;
  67. port->v_cc_errors = 0;
  68. port->a_cc_errors = 0;
  69. for (i = 0; i < buf->actual_size; i += 188) {
  70. if (*(bufcpu + i) != 0x47)
  71. port->sync_errors++;
  72. /* Query pid lower 8 bits */
  73. tmp = *(bufcpu + i + 2);
  74. cc = *(bufcpu + i + 3) & 0x0f;
  75. if (tmp == 0xf1) {
  76. a = ((port->last_v_cc + 1) & 0x0f);
  77. if (a != cc) {
  78. printk(KERN_ERR "video cc last = %x current = %x i = %d\n", port->last_v_cc, cc, i);
  79. port->v_cc_errors++;
  80. }
  81. port->last_v_cc = cc;
  82. } else
  83. if (tmp == 0xf2) {
  84. a = ((port->last_a_cc + 1) & 0x0f);
  85. if (a != cc) {
  86. printk(KERN_ERR "audio cc last = %x current = %x i = %d\n", port->last_a_cc, cc, i);
  87. port->a_cc_errors++;
  88. }
  89. port->last_a_cc = cc;
  90. }
  91. }
  92. if (port->v_cc_errors)
  93. printk(KERN_ERR "video pid cc, %d errors\n", port->v_cc_errors);
  94. if (port->a_cc_errors)
  95. printk(KERN_ERR "audio pid cc, %d errors\n", port->a_cc_errors);
  96. if (port->sync_errors)
  97. printk(KERN_ERR "sync_errors = %d\n", port->sync_errors);
  98. }
  99. static void saa7164_histogram_reset(struct saa7164_histogram *hg, char *name)
  100. {
  101. int i;
  102. memset(hg, 0, sizeof(struct saa7164_histogram));
  103. strcpy(hg->name, name);
  104. /* First 30ms x 1ms */
  105. for (i = 0; i < 30; i++) {
  106. hg->counter1[0 + i].val = i;
  107. }
  108. /* 30 - 200ms x 10ms */
  109. for (i = 0; i < 18; i++) {
  110. hg->counter1[30 + i].val = 30 + (i * 10);
  111. }
  112. /* 200 - 2000ms x 100ms */
  113. for (i = 0; i < 15; i++) {
  114. hg->counter1[48 + i].val = 200 + (i * 100);
  115. }
  116. /* Catch all massive value (1hr) */
  117. hg->counter1[63].val = 3600000;
  118. }
  119. static void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val)
  120. {
  121. int i;
  122. for (i = 0; i < 64; i++ ) {
  123. if (val <= hg->counter1[i].val) {
  124. hg->counter1[i].count++;
  125. hg->counter1[i].update_time = jiffies;
  126. break;
  127. }
  128. }
  129. }
  130. static void saa7164_histogram_print(struct saa7164_port *port,
  131. struct saa7164_histogram *hg)
  132. {
  133. struct saa7164_dev *dev = port->dev;
  134. u32 entries = 0;
  135. int i;
  136. printk(KERN_ERR "Histogram named %s\n", hg->name);
  137. for (i = 0; i < 64; i++ ) {
  138. if (hg->counter1[i].count == 0)
  139. continue;
  140. printk(KERN_ERR " %4d %12d %Ld\n",
  141. hg->counter1[i].val,
  142. hg->counter1[i].count,
  143. hg->counter1[i].update_time);
  144. entries++;
  145. }
  146. printk(KERN_ERR "Total: %d\n", entries);
  147. }
  148. static void saa7164_work_enchandler(struct work_struct *w)
  149. {
  150. struct saa7164_port *port =
  151. container_of(w, struct saa7164_port, workenc);
  152. struct saa7164_dev *dev = port->dev;
  153. struct saa7164_buffer *buf;
  154. struct saa7164_user_buffer *ubuf;
  155. struct list_head *c, *n;
  156. int wp, rp, i = 0;
  157. port->last_svc_msecs_diff = port->last_svc_msecs;
  158. port->last_svc_msecs = jiffies_to_msecs(jiffies);
  159. port->last_svc_wp = saa7164_readl(port->bufcounter);
  160. port->last_svc_rp = port->last_irq_rp;
  161. wp = port->last_svc_wp;
  162. rp = port->last_svc_rp;
  163. port->last_svc_msecs_diff = port->last_svc_msecs -
  164. port->last_svc_msecs_diff;
  165. saa7164_histogram_update(&port->svc_interval,
  166. port->last_svc_msecs_diff);
  167. port->last_irq_svc_msecs_diff = port->last_svc_msecs -
  168. port->last_irq_msecs;
  169. saa7164_histogram_update(&port->irq_svc_interval,
  170. port->last_irq_svc_msecs_diff);
  171. dprintk(DBGLVL_IRQ,
  172. "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n",
  173. __func__,
  174. port->last_svc_msecs_diff,
  175. port->last_irq_svc_msecs_diff,
  176. port->last_svc_wp,
  177. port->last_svc_rp
  178. );
  179. if ((rp < 0) || (rp > 7)) {
  180. printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
  181. return;
  182. }
  183. mutex_lock(&port->dmaqueue_lock);
  184. list_for_each_safe(c, n, &port->dmaqueue.list) {
  185. buf = list_entry(c, struct saa7164_buffer, list);
  186. if (i++ > port->hwcfg.buffercount) {
  187. printk(KERN_ERR "%s() illegal i count %d\n",
  188. __func__, i);
  189. break;
  190. }
  191. if (buf->idx == rp) {
  192. /* Found the buffer, deal with it */
  193. dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n",
  194. __func__, wp, rp);
  195. /* Validate the incoming buffer content */
  196. if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_TS)
  197. saa7164_ts_verifier(buf);
  198. /* find a free user buffer and clone to it */
  199. if (!list_empty(&port->list_buf_free.list)) {
  200. /* Pull the first buffer from the used list */
  201. ubuf = list_first_entry(&port->list_buf_free.list,
  202. struct saa7164_user_buffer, list);
  203. if (ubuf->actual_size == buf->actual_size)
  204. memcpy(ubuf->data, buf->cpu,
  205. ubuf->actual_size);
  206. /* Requeue the buffer on the free list */
  207. ubuf->pos = 0;
  208. list_move_tail(&ubuf->list,
  209. &port->list_buf_used.list);
  210. /* Flag any userland waiters */
  211. wake_up_interruptible(&port->wait_read);
  212. } else
  213. printk(KERN_ERR "encirq no free buffers\n");
  214. /* Ensure offset into buffer remains 0, fill buffer
  215. * with known bad data. */
  216. saa7164_buffer_zero_offsets(port, rp);
  217. memset(buf->cpu, 0xDE, buf->pci_size);
  218. break;
  219. }
  220. }
  221. mutex_unlock(&port->dmaqueue_lock);
  222. if (print_histogram == port->nr) {
  223. saa7164_histogram_print(port, &port->irq_interval);
  224. saa7164_histogram_print(port, &port->svc_interval);
  225. saa7164_histogram_print(port, &port->irq_svc_interval);
  226. print_histogram = 64 + port->nr;
  227. }
  228. }
  229. static void saa7164_work_cmdhandler(struct work_struct *w)
  230. {
  231. struct saa7164_dev *dev = container_of(w, struct saa7164_dev, workcmd);
  232. /* Wake up any complete commands */
  233. saa7164_irq_dequeue(dev);
  234. }
  235. static void saa7164_buffer_deliver(struct saa7164_buffer *buf)
  236. {
  237. struct saa7164_port *port = buf->port;
  238. /* Feed the transport payload into the kernel demux */
  239. dvb_dmx_swfilter_packets(&port->dvb.demux, (u8 *)buf->cpu,
  240. SAA7164_TS_NUMBER_OF_LINES);
  241. }
  242. static irqreturn_t saa7164_irq_encoder(struct saa7164_port *port)
  243. {
  244. struct saa7164_dev *dev = port->dev;
  245. int wp, rp;
  246. /* Find the current write point from the hardware */
  247. wp = saa7164_readl(port->bufcounter);
  248. if (wp > (port->hwcfg.buffercount - 1)) {
  249. printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp);
  250. return 0;
  251. }
  252. /* Find the previous buffer to the current write point */
  253. if (wp == 0)
  254. rp = 7;
  255. else
  256. rp = wp - 1;
  257. if ((rp < 0) || (rp > 7)) {
  258. printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp);
  259. return 0;
  260. }
  261. if (rp != ((port->last_irq_rp + 1) % 8)) {
  262. printk(KERN_ERR "%s() Multiple bufs on interrupt, port %p\n",
  263. __func__, port);
  264. }
  265. /* Store old time */
  266. port->last_irq_msecs_diff = port->last_irq_msecs;
  267. /* Collect new stats */
  268. port->last_irq_msecs = jiffies_to_msecs(jiffies);
  269. port->last_irq_wp = wp;
  270. port->last_irq_rp = rp;
  271. /* Calculate stats */
  272. port->last_irq_msecs_diff = port->last_irq_msecs -
  273. port->last_irq_msecs_diff;
  274. saa7164_histogram_update(&port->irq_interval,
  275. port->last_irq_msecs_diff);
  276. dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed wp: %d rp: %d\n",
  277. __func__,
  278. port->last_irq_msecs_diff,
  279. port->last_irq_wp,
  280. port->last_irq_rp
  281. );
  282. schedule_work(&port->workenc);
  283. return 0;
  284. }
  285. static irqreturn_t saa7164_irq_ts(struct saa7164_port *port)
  286. {
  287. struct saa7164_dev *dev = port->dev;
  288. struct saa7164_buffer *buf;
  289. struct list_head *c, *n;
  290. int wp, i = 0, rp;
  291. /* Find the current write point from the hardware */
  292. wp = saa7164_readl(port->bufcounter);
  293. if (wp > (port->hwcfg.buffercount - 1))
  294. BUG();
  295. /* Find the previous buffer to the current write point */
  296. if (wp == 0)
  297. rp = 7;
  298. else
  299. rp = wp - 1;
  300. /* Lookup the WP in the buffer list */
  301. /* TODO: turn this into a worker thread */
  302. list_for_each_safe(c, n, &port->dmaqueue.list) {
  303. buf = list_entry(c, struct saa7164_buffer, list);
  304. if (i++ > port->hwcfg.buffercount)
  305. BUG();
  306. if (buf->idx == rp) {
  307. /* Found the buffer, deal with it */
  308. dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n",
  309. __func__, wp, rp);
  310. saa7164_buffer_deliver(buf);
  311. break;
  312. }
  313. }
  314. return 0;
  315. }
  316. /* Primary IRQ handler and dispatch mechanism */
  317. static irqreturn_t saa7164_irq(int irq, void *dev_id)
  318. {
  319. struct saa7164_dev *dev = dev_id;
  320. struct saa7164_port *porta = &dev->ports[ SAA7164_PORT_TS1 ];
  321. struct saa7164_port *portb = &dev->ports[ SAA7164_PORT_TS2 ];
  322. struct saa7164_port *portc = &dev->ports[ SAA7164_PORT_ENC1 ];
  323. struct saa7164_port *portd = &dev->ports[ SAA7164_PORT_ENC2 ];
  324. u32 intid, intstat[INT_SIZE/4];
  325. int i, handled = 0, bit;
  326. if (dev == 0) {
  327. printk(KERN_ERR "%s() No device specified\n", __func__);
  328. handled = 0;
  329. goto out;
  330. }
  331. /* Check that the hardware is accessable. If the status bytes are
  332. * 0xFF then the device is not accessable, the the IRQ belongs
  333. * to another driver.
  334. * 4 x u32 interrupt registers.
  335. */
  336. for (i = 0; i < INT_SIZE/4; i++) {
  337. /* TODO: Convert into saa7164_readl() */
  338. /* Read the 4 hardware interrupt registers */
  339. intstat[i] = saa7164_readl(dev->int_status + (i * 4));
  340. if (intstat[i])
  341. handled = 1;
  342. }
  343. if (handled == 0)
  344. goto out;
  345. /* For each of the HW interrupt registers */
  346. for (i = 0; i < INT_SIZE/4; i++) {
  347. if (intstat[i]) {
  348. /* Each function of the board has it's own interruptid.
  349. * Find the function that triggered then call
  350. * it's handler.
  351. */
  352. for (bit = 0; bit < 32; bit++) {
  353. if (((intstat[i] >> bit) & 0x00000001) == 0)
  354. continue;
  355. /* Calculate the interrupt id (0x00 to 0x7f) */
  356. intid = (i * 32) + bit;
  357. if (intid == dev->intfdesc.bInterruptId) {
  358. /* A response to an cmd/api call */
  359. schedule_work(&dev->workcmd);
  360. } else if (intid == porta->hwcfg.interruptid) {
  361. /* Transport path 1 */
  362. saa7164_irq_ts(porta);
  363. } else if (intid == portb->hwcfg.interruptid) {
  364. /* Transport path 2 */
  365. saa7164_irq_ts(portb);
  366. } else if (intid == portc->hwcfg.interruptid) {
  367. /* Encoder path 1 */
  368. saa7164_irq_encoder(portc);
  369. } else if (intid == portd->hwcfg.interruptid) {
  370. /* Encoder path 1 */
  371. saa7164_irq_encoder(portd);
  372. } else {
  373. /* Find the function */
  374. dprintk(DBGLVL_IRQ,
  375. "%s() unhandled interrupt "
  376. "reg 0x%x bit 0x%x "
  377. "intid = 0x%x\n",
  378. __func__, i, bit, intid);
  379. }
  380. }
  381. /* Ack it */
  382. saa7164_writel(dev->int_ack + (i * 4), intstat[i]);
  383. }
  384. }
  385. out:
  386. return IRQ_RETVAL(handled);
  387. }
  388. void saa7164_getfirmwarestatus(struct saa7164_dev *dev)
  389. {
  390. struct saa7164_fw_status *s = &dev->fw_status;
  391. dev->fw_status.status = saa7164_readl(SAA_DEVICE_SYSINIT_STATUS);
  392. dev->fw_status.mode = saa7164_readl(SAA_DEVICE_SYSINIT_MODE);
  393. dev->fw_status.spec = saa7164_readl(SAA_DEVICE_SYSINIT_SPEC);
  394. dev->fw_status.inst = saa7164_readl(SAA_DEVICE_SYSINIT_INST);
  395. dev->fw_status.cpuload = saa7164_readl(SAA_DEVICE_SYSINIT_CPULOAD);
  396. dev->fw_status.remainheap =
  397. saa7164_readl(SAA_DEVICE_SYSINIT_REMAINHEAP);
  398. dprintk(1, "Firmware status:\n");
  399. dprintk(1, " .status = 0x%08x\n", s->status);
  400. dprintk(1, " .mode = 0x%08x\n", s->mode);
  401. dprintk(1, " .spec = 0x%08x\n", s->spec);
  402. dprintk(1, " .inst = 0x%08x\n", s->inst);
  403. dprintk(1, " .cpuload = 0x%08x\n", s->cpuload);
  404. dprintk(1, " .remainheap = 0x%08x\n", s->remainheap);
  405. }
  406. u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev)
  407. {
  408. u32 reg;
  409. reg = saa7164_readl(SAA_DEVICE_VERSION);
  410. dprintk(1, "Device running firmware version %d.%d.%d.%d (0x%x)\n",
  411. (reg & 0x0000fc00) >> 10,
  412. (reg & 0x000003e0) >> 5,
  413. (reg & 0x0000001f),
  414. (reg & 0xffff0000) >> 16,
  415. reg);
  416. return reg;
  417. }
  418. /* TODO: Debugging func, remove */
  419. void saa7164_dumphex16(struct saa7164_dev *dev, u8 *buf, int len)
  420. {
  421. int i;
  422. printk(KERN_INFO "--------------------> "
  423. "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  424. for (i = 0; i < len; i += 16)
  425. printk(KERN_INFO " [0x%08x] "
  426. "%02x %02x %02x %02x %02x %02x %02x %02x "
  427. "%02x %02x %02x %02x %02x %02x %02x %02x\n", i,
  428. *(buf+i+0), *(buf+i+1), *(buf+i+2), *(buf+i+3),
  429. *(buf+i+4), *(buf+i+5), *(buf+i+6), *(buf+i+7),
  430. *(buf+i+8), *(buf+i+9), *(buf+i+10), *(buf+i+11),
  431. *(buf+i+12), *(buf+i+13), *(buf+i+14), *(buf+i+15));
  432. }
  433. /* TODO: Debugging func, remove */
  434. void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr)
  435. {
  436. int i;
  437. dprintk(1, "--------------------> "
  438. "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n");
  439. for (i = 0; i < 0x100; i += 16)
  440. dprintk(1, "region0[0x%08x] = "
  441. "%02x %02x %02x %02x %02x %02x %02x %02x"
  442. " %02x %02x %02x %02x %02x %02x %02x %02x\n", i,
  443. (u8)saa7164_readb(addr + i + 0),
  444. (u8)saa7164_readb(addr + i + 1),
  445. (u8)saa7164_readb(addr + i + 2),
  446. (u8)saa7164_readb(addr + i + 3),
  447. (u8)saa7164_readb(addr + i + 4),
  448. (u8)saa7164_readb(addr + i + 5),
  449. (u8)saa7164_readb(addr + i + 6),
  450. (u8)saa7164_readb(addr + i + 7),
  451. (u8)saa7164_readb(addr + i + 8),
  452. (u8)saa7164_readb(addr + i + 9),
  453. (u8)saa7164_readb(addr + i + 10),
  454. (u8)saa7164_readb(addr + i + 11),
  455. (u8)saa7164_readb(addr + i + 12),
  456. (u8)saa7164_readb(addr + i + 13),
  457. (u8)saa7164_readb(addr + i + 14),
  458. (u8)saa7164_readb(addr + i + 15)
  459. );
  460. }
  461. static void saa7164_dump_hwdesc(struct saa7164_dev *dev)
  462. {
  463. dprintk(1, "@0x%p hwdesc sizeof(tmComResHWDescr_t) = %d bytes\n",
  464. &dev->hwdesc, (u32)sizeof(tmComResHWDescr_t));
  465. dprintk(1, " .bLength = 0x%x\n", dev->hwdesc.bLength);
  466. dprintk(1, " .bDescriptorType = 0x%x\n", dev->hwdesc.bDescriptorType);
  467. dprintk(1, " .bDescriptorSubtype = 0x%x\n",
  468. dev->hwdesc.bDescriptorSubtype);
  469. dprintk(1, " .bcdSpecVersion = 0x%x\n", dev->hwdesc.bcdSpecVersion);
  470. dprintk(1, " .dwClockFrequency = 0x%x\n", dev->hwdesc.dwClockFrequency);
  471. dprintk(1, " .dwClockUpdateRes = 0x%x\n", dev->hwdesc.dwClockUpdateRes);
  472. dprintk(1, " .bCapabilities = 0x%x\n", dev->hwdesc.bCapabilities);
  473. dprintk(1, " .dwDeviceRegistersLocation = 0x%x\n",
  474. dev->hwdesc.dwDeviceRegistersLocation);
  475. dprintk(1, " .dwHostMemoryRegion = 0x%x\n",
  476. dev->hwdesc.dwHostMemoryRegion);
  477. dprintk(1, " .dwHostMemoryRegionSize = 0x%x\n",
  478. dev->hwdesc.dwHostMemoryRegionSize);
  479. dprintk(1, " .dwHostHibernatMemRegion = 0x%x\n",
  480. dev->hwdesc.dwHostHibernatMemRegion);
  481. dprintk(1, " .dwHostHibernatMemRegionSize = 0x%x\n",
  482. dev->hwdesc.dwHostHibernatMemRegionSize);
  483. }
  484. static void saa7164_dump_intfdesc(struct saa7164_dev *dev)
  485. {
  486. dprintk(1, "@0x%p intfdesc "
  487. "sizeof(tmComResInterfaceDescr_t) = %d bytes\n",
  488. &dev->intfdesc, (u32)sizeof(tmComResInterfaceDescr_t));
  489. dprintk(1, " .bLength = 0x%x\n", dev->intfdesc.bLength);
  490. dprintk(1, " .bDescriptorType = 0x%x\n", dev->intfdesc.bDescriptorType);
  491. dprintk(1, " .bDescriptorSubtype = 0x%x\n",
  492. dev->intfdesc.bDescriptorSubtype);
  493. dprintk(1, " .bFlags = 0x%x\n", dev->intfdesc.bFlags);
  494. dprintk(1, " .bInterfaceType = 0x%x\n", dev->intfdesc.bInterfaceType);
  495. dprintk(1, " .bInterfaceId = 0x%x\n", dev->intfdesc.bInterfaceId);
  496. dprintk(1, " .bBaseInterface = 0x%x\n", dev->intfdesc.bBaseInterface);
  497. dprintk(1, " .bInterruptId = 0x%x\n", dev->intfdesc.bInterruptId);
  498. dprintk(1, " .bDebugInterruptId = 0x%x\n",
  499. dev->intfdesc.bDebugInterruptId);
  500. dprintk(1, " .BARLocation = 0x%x\n", dev->intfdesc.BARLocation);
  501. }
  502. static void saa7164_dump_busdesc(struct saa7164_dev *dev)
  503. {
  504. dprintk(1, "@0x%p busdesc sizeof(tmComResBusDescr_t) = %d bytes\n",
  505. &dev->busdesc, (u32)sizeof(tmComResBusDescr_t));
  506. dprintk(1, " .CommandRing = 0x%016Lx\n", dev->busdesc.CommandRing);
  507. dprintk(1, " .ResponseRing = 0x%016Lx\n", dev->busdesc.ResponseRing);
  508. dprintk(1, " .CommandWrite = 0x%x\n", dev->busdesc.CommandWrite);
  509. dprintk(1, " .CommandRead = 0x%x\n", dev->busdesc.CommandRead);
  510. dprintk(1, " .ResponseWrite = 0x%x\n", dev->busdesc.ResponseWrite);
  511. dprintk(1, " .ResponseRead = 0x%x\n", dev->busdesc.ResponseRead);
  512. }
  513. /* Much of the hardware configuration and PCI registers are configured
  514. * dynamically depending on firmware. We have to cache some initial
  515. * structures then use these to locate other important structures
  516. * from PCI space.
  517. */
  518. static void saa7164_get_descriptors(struct saa7164_dev *dev)
  519. {
  520. memcpy(&dev->hwdesc, dev->bmmio, sizeof(tmComResHWDescr_t));
  521. memcpy(&dev->intfdesc, dev->bmmio + sizeof(tmComResHWDescr_t),
  522. sizeof(tmComResInterfaceDescr_t));
  523. memcpy(&dev->busdesc, dev->bmmio + dev->intfdesc.BARLocation,
  524. sizeof(tmComResBusDescr_t));
  525. if (dev->hwdesc.bLength != sizeof(tmComResHWDescr_t)) {
  526. printk(KERN_ERR "Structure tmComResHWDescr_t is mangled\n");
  527. printk(KERN_ERR "Need %x got %d\n", dev->hwdesc.bLength,
  528. (u32)sizeof(tmComResHWDescr_t));
  529. } else
  530. saa7164_dump_hwdesc(dev);
  531. if (dev->intfdesc.bLength != sizeof(tmComResInterfaceDescr_t)) {
  532. printk(KERN_ERR "struct tmComResInterfaceDescr_t is mangled\n");
  533. printk(KERN_ERR "Need %x got %d\n", dev->intfdesc.bLength,
  534. (u32)sizeof(tmComResInterfaceDescr_t));
  535. } else
  536. saa7164_dump_intfdesc(dev);
  537. saa7164_dump_busdesc(dev);
  538. }
  539. static int saa7164_pci_quirks(struct saa7164_dev *dev)
  540. {
  541. return 0;
  542. }
  543. static int get_resources(struct saa7164_dev *dev)
  544. {
  545. if (request_mem_region(pci_resource_start(dev->pci, 0),
  546. pci_resource_len(dev->pci, 0), dev->name)) {
  547. if (request_mem_region(pci_resource_start(dev->pci, 2),
  548. pci_resource_len(dev->pci, 2), dev->name))
  549. return 0;
  550. }
  551. printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx or 0x%llx\n",
  552. dev->name,
  553. (u64)pci_resource_start(dev->pci, 0),
  554. (u64)pci_resource_start(dev->pci, 2));
  555. return -EBUSY;
  556. }
  557. static int saa7164_port_init(struct saa7164_dev *dev, int portnr)
  558. {
  559. struct saa7164_port *port = 0;
  560. if ((portnr < 0) || (portnr >= SAA7164_MAX_PORTS))
  561. BUG();
  562. port = &dev->ports[ portnr ];
  563. port->dev = dev;
  564. port->nr = portnr;
  565. if ((portnr == SAA7164_PORT_TS1) || (portnr == SAA7164_PORT_TS2))
  566. port->type = SAA7164_MPEG_DVB;
  567. else
  568. if ((portnr == SAA7164_PORT_ENC1) || (portnr == SAA7164_PORT_ENC2))
  569. port->type = SAA7164_MPEG_ENCODER;
  570. else
  571. BUG();
  572. /* Init all the critical resources */
  573. mutex_init(&port->dvb.lock);
  574. INIT_LIST_HEAD(&port->dmaqueue.list);
  575. mutex_init(&port->dmaqueue_lock);
  576. INIT_LIST_HEAD(&port->list_buf_used.list);
  577. INIT_LIST_HEAD(&port->list_buf_free.list);
  578. init_waitqueue_head(&port->wait_read);
  579. /* We need a deferred interrupt handler for cmd handling */
  580. INIT_WORK(&port->workenc, saa7164_work_enchandler);
  581. saa7164_histogram_reset(&port->irq_interval, "irq intervals");
  582. saa7164_histogram_reset(&port->svc_interval, "deferred intervals");
  583. saa7164_histogram_reset(&port->irq_svc_interval,
  584. "irq to deferred intervals");
  585. return 0;
  586. }
  587. static int saa7164_dev_setup(struct saa7164_dev *dev)
  588. {
  589. int i;
  590. mutex_init(&dev->lock);
  591. atomic_inc(&dev->refcount);
  592. dev->nr = saa7164_devcount++;
  593. sprintf(dev->name, "saa7164[%d]", dev->nr);
  594. mutex_lock(&devlist);
  595. list_add_tail(&dev->devlist, &saa7164_devlist);
  596. mutex_unlock(&devlist);
  597. /* board config */
  598. dev->board = UNSET;
  599. if (card[dev->nr] < saa7164_bcount)
  600. dev->board = card[dev->nr];
  601. for (i = 0; UNSET == dev->board && i < saa7164_idcount; i++)
  602. if (dev->pci->subsystem_vendor == saa7164_subids[i].subvendor &&
  603. dev->pci->subsystem_device ==
  604. saa7164_subids[i].subdevice)
  605. dev->board = saa7164_subids[i].card;
  606. if (UNSET == dev->board) {
  607. dev->board = SAA7164_BOARD_UNKNOWN;
  608. saa7164_card_list(dev);
  609. }
  610. dev->pci_bus = dev->pci->bus->number;
  611. dev->pci_slot = PCI_SLOT(dev->pci->devfn);
  612. /* I2C Defaults / setup */
  613. dev->i2c_bus[0].dev = dev;
  614. dev->i2c_bus[0].nr = 0;
  615. dev->i2c_bus[1].dev = dev;
  616. dev->i2c_bus[1].nr = 1;
  617. dev->i2c_bus[2].dev = dev;
  618. dev->i2c_bus[2].nr = 2;
  619. /* Transport + Encoder ports 1, 2, 3, 4 - Defaults / setup */
  620. saa7164_port_init(dev, SAA7164_PORT_TS1);
  621. saa7164_port_init(dev, SAA7164_PORT_TS2);
  622. saa7164_port_init(dev, SAA7164_PORT_ENC1);
  623. saa7164_port_init(dev, SAA7164_PORT_ENC2);
  624. if (get_resources(dev) < 0) {
  625. printk(KERN_ERR "CORE %s No more PCIe resources for "
  626. "subsystem: %04x:%04x\n",
  627. dev->name, dev->pci->subsystem_vendor,
  628. dev->pci->subsystem_device);
  629. saa7164_devcount--;
  630. return -ENODEV;
  631. }
  632. /* PCI/e allocations */
  633. dev->lmmio = ioremap(pci_resource_start(dev->pci, 0),
  634. pci_resource_len(dev->pci, 0));
  635. dev->lmmio2 = ioremap(pci_resource_start(dev->pci, 2),
  636. pci_resource_len(dev->pci, 2));
  637. dev->bmmio = (u8 __iomem *)dev->lmmio;
  638. dev->bmmio2 = (u8 __iomem *)dev->lmmio2;
  639. /* Inerrupt and ack register locations offset of bmmio */
  640. dev->int_status = 0x183000 + 0xf80;
  641. dev->int_ack = 0x183000 + 0xf90;
  642. printk(KERN_INFO
  643. "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n",
  644. dev->name, dev->pci->subsystem_vendor,
  645. dev->pci->subsystem_device, saa7164_boards[dev->board].name,
  646. dev->board, card[dev->nr] == dev->board ?
  647. "insmod option" : "autodetected");
  648. saa7164_pci_quirks(dev);
  649. return 0;
  650. }
  651. static void saa7164_dev_unregister(struct saa7164_dev *dev)
  652. {
  653. dprintk(1, "%s()\n", __func__);
  654. release_mem_region(pci_resource_start(dev->pci, 0),
  655. pci_resource_len(dev->pci, 0));
  656. release_mem_region(pci_resource_start(dev->pci, 2),
  657. pci_resource_len(dev->pci, 2));
  658. if (!atomic_dec_and_test(&dev->refcount))
  659. return;
  660. iounmap(dev->lmmio);
  661. iounmap(dev->lmmio2);
  662. return;
  663. }
  664. static int __devinit saa7164_initdev(struct pci_dev *pci_dev,
  665. const struct pci_device_id *pci_id)
  666. {
  667. struct saa7164_dev *dev;
  668. int err, i;
  669. u32 version;
  670. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  671. if (NULL == dev)
  672. return -ENOMEM;
  673. /* pci init */
  674. dev->pci = pci_dev;
  675. if (pci_enable_device(pci_dev)) {
  676. err = -EIO;
  677. goto fail_free;
  678. }
  679. if (saa7164_dev_setup(dev) < 0) {
  680. err = -EINVAL;
  681. goto fail_free;
  682. }
  683. /* print pci info */
  684. pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
  685. pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
  686. printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
  687. "latency: %d, mmio: 0x%llx\n", dev->name,
  688. pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
  689. dev->pci_lat,
  690. (unsigned long long)pci_resource_start(pci_dev, 0));
  691. pci_set_master(pci_dev);
  692. /* TODO */
  693. if (!pci_dma_supported(pci_dev, 0xffffffff)) {
  694. printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name);
  695. err = -EIO;
  696. goto fail_irq;
  697. }
  698. err = request_irq(pci_dev->irq, saa7164_irq,
  699. IRQF_SHARED | IRQF_DISABLED, dev->name, dev);
  700. if (err < 0) {
  701. printk(KERN_ERR "%s: can't get IRQ %d\n", dev->name,
  702. pci_dev->irq);
  703. err = -EIO;
  704. goto fail_irq;
  705. }
  706. pci_set_drvdata(pci_dev, dev);
  707. /* Init the internal command list */
  708. for (i = 0; i < SAA_CMD_MAX_MSG_UNITS; i++) {
  709. dev->cmds[i].seqno = i;
  710. dev->cmds[i].inuse = 0;
  711. mutex_init(&dev->cmds[i].lock);
  712. init_waitqueue_head(&dev->cmds[i].wait);
  713. }
  714. /* We need a deferred interrupt handler for cmd handling */
  715. INIT_WORK(&dev->workcmd, saa7164_work_cmdhandler);
  716. /* Only load the firmware if we know the board */
  717. if (dev->board != SAA7164_BOARD_UNKNOWN) {
  718. err = saa7164_downloadfirmware(dev);
  719. if (err < 0) {
  720. printk(KERN_ERR
  721. "Failed to boot firmware, no features "
  722. "registered\n");
  723. goto fail_fw;
  724. }
  725. saa7164_get_descriptors(dev);
  726. saa7164_dumpregs(dev, 0);
  727. saa7164_getcurrentfirmwareversion(dev);
  728. saa7164_getfirmwarestatus(dev);
  729. err = saa7164_bus_setup(dev);
  730. if (err < 0)
  731. printk(KERN_ERR
  732. "Failed to setup the bus, will continue\n");
  733. saa7164_bus_dump(dev);
  734. /* Ping the running firmware via the command bus and get the
  735. * firmware version, this checks the bus is running OK.
  736. */
  737. version = 0;
  738. if (saa7164_api_get_fw_version(dev, &version) == SAA_OK)
  739. dprintk(1, "Bus is operating correctly using "
  740. "version %d.%d.%d.%d (0x%x)\n",
  741. (version & 0x0000fc00) >> 10,
  742. (version & 0x000003e0) >> 5,
  743. (version & 0x0000001f),
  744. (version & 0xffff0000) >> 16,
  745. version);
  746. else
  747. printk(KERN_ERR
  748. "Failed to communicate with the firmware\n");
  749. /* Bring up the I2C buses */
  750. saa7164_i2c_register(&dev->i2c_bus[0]);
  751. saa7164_i2c_register(&dev->i2c_bus[1]);
  752. saa7164_i2c_register(&dev->i2c_bus[2]);
  753. saa7164_gpio_setup(dev);
  754. saa7164_card_setup(dev);
  755. /* Parse the dynamic device configuration, find various
  756. * media endpoints (MPEG, WMV, PS, TS) and cache their
  757. * configuration details into the driver, so we can
  758. * reference them later during simething_register() func,
  759. * interrupt handlers, deferred work handlers etc.
  760. */
  761. saa7164_api_enum_subdevs(dev);
  762. /* Begin to create the video sub-systems and register funcs */
  763. if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) {
  764. if (saa7164_dvb_register(&dev->ports[ SAA7164_PORT_TS1 ]) < 0) {
  765. printk(KERN_ERR "%s() Failed to register "
  766. "dvb adapters on porta\n",
  767. __func__);
  768. }
  769. }
  770. if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) {
  771. if (saa7164_dvb_register(&dev->ports[ SAA7164_PORT_TS2 ]) < 0) {
  772. printk(KERN_ERR"%s() Failed to register "
  773. "dvb adapters on portb\n",
  774. __func__);
  775. }
  776. }
  777. if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) {
  778. if (saa7164_encoder_register(&dev->ports[ SAA7164_PORT_ENC1 ]) < 0) {
  779. printk(KERN_ERR"%s() Failed to register "
  780. "mpeg encoder\n", __func__);
  781. }
  782. }
  783. if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) {
  784. if (saa7164_encoder_register(&dev->ports[ SAA7164_PORT_ENC2 ]) < 0) {
  785. printk(KERN_ERR"%s() Failed to register "
  786. "mpeg encoder\n", __func__);
  787. }
  788. }
  789. } /* != BOARD_UNKNOWN */
  790. else
  791. printk(KERN_ERR "%s() Unsupported board detected, "
  792. "registering without firmware\n", __func__);
  793. dprintk(1, "%s() parameter debug = %d\n", __func__, saa_debug);
  794. dprintk(1, "%s() parameter waitsecs = %d\n", __func__, waitsecs);
  795. fail_fw:
  796. return 0;
  797. fail_irq:
  798. saa7164_dev_unregister(dev);
  799. fail_free:
  800. kfree(dev);
  801. return err;
  802. }
  803. static void saa7164_shutdown(struct saa7164_dev *dev)
  804. {
  805. dprintk(1, "%s()\n", __func__);
  806. }
  807. static void __devexit saa7164_finidev(struct pci_dev *pci_dev)
  808. {
  809. struct saa7164_dev *dev = pci_get_drvdata(pci_dev);
  810. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  811. &dev->ports[ SAA7164_PORT_ENC1 ].irq_interval);
  812. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  813. &dev->ports[ SAA7164_PORT_ENC1 ].svc_interval);
  814. saa7164_histogram_print(&dev->ports[ SAA7164_PORT_ENC1 ],
  815. &dev->ports[ SAA7164_PORT_ENC1 ].irq_svc_interval);
  816. saa7164_shutdown(dev);
  817. if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB)
  818. saa7164_dvb_unregister(&dev->ports[ SAA7164_PORT_TS1 ]);
  819. if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB)
  820. saa7164_dvb_unregister(&dev->ports[ SAA7164_PORT_TS2 ]);
  821. if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER)
  822. saa7164_encoder_unregister(&dev->ports[ SAA7164_PORT_ENC1 ]);
  823. if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER)
  824. saa7164_encoder_unregister(&dev->ports[ SAA7164_PORT_ENC2 ]);
  825. saa7164_i2c_unregister(&dev->i2c_bus[0]);
  826. saa7164_i2c_unregister(&dev->i2c_bus[1]);
  827. saa7164_i2c_unregister(&dev->i2c_bus[2]);
  828. pci_disable_device(pci_dev);
  829. /* unregister stuff */
  830. free_irq(pci_dev->irq, dev);
  831. pci_set_drvdata(pci_dev, NULL);
  832. mutex_lock(&devlist);
  833. list_del(&dev->devlist);
  834. mutex_unlock(&devlist);
  835. saa7164_dev_unregister(dev);
  836. kfree(dev);
  837. }
  838. static struct pci_device_id saa7164_pci_tbl[] = {
  839. {
  840. /* SAA7164 */
  841. .vendor = 0x1131,
  842. .device = 0x7164,
  843. .subvendor = PCI_ANY_ID,
  844. .subdevice = PCI_ANY_ID,
  845. }, {
  846. /* --- end of list --- */
  847. }
  848. };
  849. MODULE_DEVICE_TABLE(pci, saa7164_pci_tbl);
  850. static struct pci_driver saa7164_pci_driver = {
  851. .name = "saa7164",
  852. .id_table = saa7164_pci_tbl,
  853. .probe = saa7164_initdev,
  854. .remove = __devexit_p(saa7164_finidev),
  855. /* TODO */
  856. .suspend = NULL,
  857. .resume = NULL,
  858. };
  859. static int __init saa7164_init(void)
  860. {
  861. printk(KERN_INFO "saa7164 driver loaded\n");
  862. return pci_register_driver(&saa7164_pci_driver);
  863. }
  864. static void __exit saa7164_fini(void)
  865. {
  866. pci_unregister_driver(&saa7164_pci_driver);
  867. }
  868. module_init(saa7164_init);
  869. module_exit(saa7164_fini);