ni65.c 30 KB

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  1. /*
  2. * ni6510 (am7990 'lance' chip) driver for Linux-net-3
  3. * BETAcode v0.71 (96/09/29) for 2.0.0 (or later)
  4. * copyrights (c) 1994,1995,1996 by M.Hipp
  5. *
  6. * This driver can handle the old ni6510 board and the newer ni6510
  7. * EtherBlaster. (probably it also works with every full NE2100
  8. * compatible card)
  9. *
  10. * driver probes: io: 0x360,0x300,0x320,0x340 / dma: 3,5,6,7
  11. *
  12. * This is an extension to the Linux operating system, and is covered by the
  13. * same GNU General Public License that covers the Linux-kernel.
  14. *
  15. * comments/bugs/suggestions can be sent to:
  16. * Michael Hipp
  17. * email: hippm@informatik.uni-tuebingen.de
  18. *
  19. * sources:
  20. * some things are from the 'ni6510-packet-driver for dos by Russ Nelson'
  21. * and from the original drivers by D.Becker
  22. *
  23. * known problems:
  24. * - on some PCI boards (including my own) the card/board/ISA-bridge has
  25. * problems with bus master DMA. This results in lotsa overruns.
  26. * It may help to '#define RCV_PARANOIA_CHECK' or try to #undef
  27. * the XMT and RCV_VIA_SKB option .. this reduces driver performance.
  28. * Or just play with your BIOS options to optimize ISA-DMA access.
  29. * Maybe you also wanna play with the LOW_PERFORAMCE and MID_PERFORMANCE
  30. * defines -> please report me your experience then
  31. * - Harald reported for ASUS SP3G mainboards, that you should use
  32. * the 'optimal settings' from the user's manual on page 3-12!
  33. *
  34. * credits:
  35. * thanx to Jason Sullivan for sending me a ni6510 card!
  36. * lot of debug runs with ASUS SP3G Boards (Intel Saturn) by Harald Koenig
  37. *
  38. * simple performance test: (486DX-33/Ni6510-EB receives from 486DX4-100/Ni6510-EB)
  39. * average: FTP -> 8384421 bytes received in 8.5 seconds
  40. * (no RCV_VIA_SKB,no XMT_VIA_SKB,PARANOIA_CHECK,4 XMIT BUFS, 8 RCV_BUFFS)
  41. * peak: FTP -> 8384421 bytes received in 7.5 seconds
  42. * (RCV_VIA_SKB,XMT_VIA_SKB,no PARANOIA_CHECK,1(!) XMIT BUF, 16 RCV BUFFS)
  43. */
  44. /*
  45. * 99.Jun.8: added support for /proc/net/dev byte count for xosview (HK)
  46. * 96.Sept.29: virt_to_bus stuff added for new memory modell
  47. * 96.April.29: Added Harald Koenig's Patches (MH)
  48. * 96.April.13: enhanced error handling .. more tests (MH)
  49. * 96.April.5/6: a lot of performance tests. Got it stable now (hopefully) (MH)
  50. * 96.April.1: (no joke ;) .. added EtherBlaster and Module support (MH)
  51. * 96.Feb.19: fixed a few bugs .. cleanups .. tested for 1.3.66 (MH)
  52. * hopefully no more 16MB limit
  53. *
  54. * 95.Nov.18: multicast tweaked (AC).
  55. *
  56. * 94.Aug.22: changes in xmit_intr (ack more than one xmitted-packet), ni65_send_packet (p->lock) (MH)
  57. *
  58. * 94.July.16: fixed bugs in recv_skb and skb-alloc stuff (MH)
  59. */
  60. #include <linux/kernel.h>
  61. #include <linux/string.h>
  62. #include <linux/errno.h>
  63. #include <linux/ioport.h>
  64. #include <linux/slab.h>
  65. #include <linux/interrupt.h>
  66. #include <linux/delay.h>
  67. #include <linux/init.h>
  68. #include <linux/netdevice.h>
  69. #include <linux/etherdevice.h>
  70. #include <linux/skbuff.h>
  71. #include <linux/module.h>
  72. #include <linux/bitops.h>
  73. #include <asm/io.h>
  74. #include <asm/dma.h>
  75. #include "ni65.h"
  76. /*
  77. * the current setting allows an acceptable performance
  78. * for 'RCV_PARANOIA_CHECK' read the 'known problems' part in
  79. * the header of this file
  80. * 'invert' the defines for max. performance. This may cause DMA problems
  81. * on some boards (e.g on my ASUS SP3G)
  82. */
  83. #undef XMT_VIA_SKB
  84. #undef RCV_VIA_SKB
  85. #define RCV_PARANOIA_CHECK
  86. #define MID_PERFORMANCE
  87. #if defined( LOW_PERFORMANCE )
  88. static int isa0=7,isa1=7,csr80=0x0c10;
  89. #elif defined( MID_PERFORMANCE )
  90. static int isa0=5,isa1=5,csr80=0x2810;
  91. #else /* high performance */
  92. static int isa0=4,isa1=4,csr80=0x0017;
  93. #endif
  94. /*
  95. * a few card/vendor specific defines
  96. */
  97. #define NI65_ID0 0x00
  98. #define NI65_ID1 0x55
  99. #define NI65_EB_ID0 0x52
  100. #define NI65_EB_ID1 0x44
  101. #define NE2100_ID0 0x57
  102. #define NE2100_ID1 0x57
  103. #define PORT p->cmdr_addr
  104. /*
  105. * buffer configuration
  106. */
  107. #if 1
  108. #define RMDNUM 16
  109. #define RMDNUMMASK 0x80000000
  110. #else
  111. #define RMDNUM 8
  112. #define RMDNUMMASK 0x60000000 /* log2(RMDNUM)<<29 */
  113. #endif
  114. #if 0
  115. #define TMDNUM 1
  116. #define TMDNUMMASK 0x00000000
  117. #else
  118. #define TMDNUM 4
  119. #define TMDNUMMASK 0x40000000 /* log2(TMDNUM)<<29 */
  120. #endif
  121. /* slightly oversized */
  122. #define R_BUF_SIZE 1544
  123. #define T_BUF_SIZE 1544
  124. /*
  125. * lance register defines
  126. */
  127. #define L_DATAREG 0x00
  128. #define L_ADDRREG 0x02
  129. #define L_RESET 0x04
  130. #define L_CONFIG 0x05
  131. #define L_BUSIF 0x06
  132. /*
  133. * to access the lance/am7990-regs, you have to write
  134. * reg-number into L_ADDRREG, then you can access it using L_DATAREG
  135. */
  136. #define CSR0 0x00
  137. #define CSR1 0x01
  138. #define CSR2 0x02
  139. #define CSR3 0x03
  140. #define INIT_RING_BEFORE_START 0x1
  141. #define FULL_RESET_ON_ERROR 0x2
  142. #if 0
  143. #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);inw(PORT+L_ADDRREG); \
  144. outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
  145. #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_ADDRREG),\
  146. inw(PORT+L_DATAREG))
  147. #if 0
  148. #define writedatareg(val) {outw(val,PORT+L_DATAREG);inw(PORT+L_DATAREG);}
  149. #else
  150. #define writedatareg(val) { writereg(val,CSR0); }
  151. #endif
  152. #else
  153. #define writereg(val,reg) {outw(reg,PORT+L_ADDRREG);outw(val,PORT+L_DATAREG);}
  154. #define readreg(reg) (outw(reg,PORT+L_ADDRREG),inw(PORT+L_DATAREG))
  155. #define writedatareg(val) { writereg(val,CSR0); }
  156. #endif
  157. static unsigned char ni_vendor[] = { 0x02,0x07,0x01 };
  158. static struct card {
  159. unsigned char id0,id1;
  160. short id_offset;
  161. short total_size;
  162. short cmd_offset;
  163. short addr_offset;
  164. unsigned char *vendor_id;
  165. char *cardname;
  166. unsigned long config;
  167. } cards[] = {
  168. {
  169. .id0 = NI65_ID0,
  170. .id1 = NI65_ID1,
  171. .id_offset = 0x0e,
  172. .total_size = 0x10,
  173. .cmd_offset = 0x0,
  174. .addr_offset = 0x8,
  175. .vendor_id = ni_vendor,
  176. .cardname = "ni6510",
  177. .config = 0x1,
  178. },
  179. {
  180. .id0 = NI65_EB_ID0,
  181. .id1 = NI65_EB_ID1,
  182. .id_offset = 0x0e,
  183. .total_size = 0x18,
  184. .cmd_offset = 0x10,
  185. .addr_offset = 0x0,
  186. .vendor_id = ni_vendor,
  187. .cardname = "ni6510 EtherBlaster",
  188. .config = 0x2,
  189. },
  190. {
  191. .id0 = NE2100_ID0,
  192. .id1 = NE2100_ID1,
  193. .id_offset = 0x0e,
  194. .total_size = 0x18,
  195. .cmd_offset = 0x10,
  196. .addr_offset = 0x0,
  197. .vendor_id = NULL,
  198. .cardname = "generic NE2100",
  199. .config = 0x0,
  200. },
  201. };
  202. #define NUM_CARDS 3
  203. struct priv
  204. {
  205. struct rmd rmdhead[RMDNUM];
  206. struct tmd tmdhead[TMDNUM];
  207. struct init_block ib;
  208. int rmdnum;
  209. int tmdnum,tmdlast;
  210. #ifdef RCV_VIA_SKB
  211. struct sk_buff *recv_skb[RMDNUM];
  212. #else
  213. void *recvbounce[RMDNUM];
  214. #endif
  215. #ifdef XMT_VIA_SKB
  216. struct sk_buff *tmd_skb[TMDNUM];
  217. #endif
  218. void *tmdbounce[TMDNUM];
  219. int tmdbouncenum;
  220. int lock,xmit_queued;
  221. struct net_device_stats stats;
  222. void *self;
  223. int cmdr_addr;
  224. int cardno;
  225. int features;
  226. spinlock_t ring_lock;
  227. };
  228. static int ni65_probe1(struct net_device *dev,int);
  229. static irqreturn_t ni65_interrupt(int irq, void * dev_id);
  230. static void ni65_recv_intr(struct net_device *dev,int);
  231. static void ni65_xmit_intr(struct net_device *dev,int);
  232. static int ni65_open(struct net_device *dev);
  233. static int ni65_lance_reinit(struct net_device *dev);
  234. static void ni65_init_lance(struct priv *p,unsigned char*,int,int);
  235. static int ni65_send_packet(struct sk_buff *skb, struct net_device *dev);
  236. static void ni65_timeout(struct net_device *dev);
  237. static int ni65_close(struct net_device *dev);
  238. static int ni65_alloc_buffer(struct net_device *dev);
  239. static void ni65_free_buffer(struct priv *p);
  240. static struct net_device_stats *ni65_get_stats(struct net_device *);
  241. static void set_multicast_list(struct net_device *dev);
  242. static int irqtab[] __initdata = { 9,12,15,5 }; /* irq config-translate */
  243. static int dmatab[] __initdata = { 0,3,5,6,7 }; /* dma config-translate and autodetect */
  244. static int debuglevel = 1;
  245. /*
  246. * set 'performance' registers .. we must STOP lance for that
  247. */
  248. static void ni65_set_performance(struct priv *p)
  249. {
  250. writereg(CSR0_STOP | CSR0_CLRALL,CSR0); /* STOP */
  251. if( !(cards[p->cardno].config & 0x02) )
  252. return;
  253. outw(80,PORT+L_ADDRREG);
  254. if(inw(PORT+L_ADDRREG) != 80)
  255. return;
  256. writereg( (csr80 & 0x3fff) ,80); /* FIFO watermarks */
  257. outw(0,PORT+L_ADDRREG);
  258. outw((short)isa0,PORT+L_BUSIF); /* write ISA 0: DMA_R : isa0 * 50ns */
  259. outw(1,PORT+L_ADDRREG);
  260. outw((short)isa1,PORT+L_BUSIF); /* write ISA 1: DMA_W : isa1 * 50ns */
  261. outw(CSR0,PORT+L_ADDRREG); /* switch back to CSR0 */
  262. }
  263. /*
  264. * open interface (up)
  265. */
  266. static int ni65_open(struct net_device *dev)
  267. {
  268. struct priv *p = dev->ml_priv;
  269. int irqval = request_irq(dev->irq, &ni65_interrupt,0,
  270. cards[p->cardno].cardname,dev);
  271. if (irqval) {
  272. printk(KERN_ERR "%s: unable to get IRQ %d (irqval=%d).\n",
  273. dev->name,dev->irq, irqval);
  274. return -EAGAIN;
  275. }
  276. if(ni65_lance_reinit(dev))
  277. {
  278. netif_start_queue(dev);
  279. return 0;
  280. }
  281. else
  282. {
  283. free_irq(dev->irq,dev);
  284. return -EAGAIN;
  285. }
  286. }
  287. /*
  288. * close interface (down)
  289. */
  290. static int ni65_close(struct net_device *dev)
  291. {
  292. struct priv *p = dev->ml_priv;
  293. netif_stop_queue(dev);
  294. outw(inw(PORT+L_RESET),PORT+L_RESET); /* that's the hard way */
  295. #ifdef XMT_VIA_SKB
  296. {
  297. int i;
  298. for(i=0;i<TMDNUM;i++)
  299. {
  300. if(p->tmd_skb[i]) {
  301. dev_kfree_skb(p->tmd_skb[i]);
  302. p->tmd_skb[i] = NULL;
  303. }
  304. }
  305. }
  306. #endif
  307. free_irq(dev->irq,dev);
  308. return 0;
  309. }
  310. static void cleanup_card(struct net_device *dev)
  311. {
  312. struct priv *p = dev->ml_priv;
  313. disable_dma(dev->dma);
  314. free_dma(dev->dma);
  315. release_region(dev->base_addr, cards[p->cardno].total_size);
  316. ni65_free_buffer(p);
  317. }
  318. /* set: io,irq,dma or set it when calling insmod */
  319. static int irq;
  320. static int io;
  321. static int dma;
  322. /*
  323. * Probe The Card (not the lance-chip)
  324. */
  325. struct net_device * __init ni65_probe(int unit)
  326. {
  327. struct net_device *dev = alloc_etherdev(0);
  328. static int ports[] = {0x360,0x300,0x320,0x340, 0};
  329. int *port;
  330. int err = 0;
  331. if (!dev)
  332. return ERR_PTR(-ENOMEM);
  333. if (unit >= 0) {
  334. sprintf(dev->name, "eth%d", unit);
  335. netdev_boot_setup_check(dev);
  336. irq = dev->irq;
  337. dma = dev->dma;
  338. } else {
  339. dev->base_addr = io;
  340. }
  341. if (dev->base_addr > 0x1ff) { /* Check a single specified location. */
  342. err = ni65_probe1(dev, dev->base_addr);
  343. } else if (dev->base_addr > 0) { /* Don't probe at all. */
  344. err = -ENXIO;
  345. } else {
  346. for (port = ports; *port && ni65_probe1(dev, *port); port++)
  347. ;
  348. if (!*port)
  349. err = -ENODEV;
  350. }
  351. if (err)
  352. goto out;
  353. err = register_netdev(dev);
  354. if (err)
  355. goto out1;
  356. return dev;
  357. out1:
  358. cleanup_card(dev);
  359. out:
  360. free_netdev(dev);
  361. return ERR_PTR(err);
  362. }
  363. /*
  364. * this is the real card probe ..
  365. */
  366. static int __init ni65_probe1(struct net_device *dev,int ioaddr)
  367. {
  368. int i,j;
  369. struct priv *p;
  370. unsigned long flags;
  371. dev->irq = irq;
  372. dev->dma = dma;
  373. for(i=0;i<NUM_CARDS;i++) {
  374. if(!request_region(ioaddr, cards[i].total_size, cards[i].cardname))
  375. continue;
  376. if(cards[i].id_offset >= 0) {
  377. if(inb(ioaddr+cards[i].id_offset+0) != cards[i].id0 ||
  378. inb(ioaddr+cards[i].id_offset+1) != cards[i].id1) {
  379. release_region(ioaddr, cards[i].total_size);
  380. continue;
  381. }
  382. }
  383. if(cards[i].vendor_id) {
  384. for(j=0;j<3;j++)
  385. if(inb(ioaddr+cards[i].addr_offset+j) != cards[i].vendor_id[j]) {
  386. release_region(ioaddr, cards[i].total_size);
  387. continue;
  388. }
  389. }
  390. break;
  391. }
  392. if(i == NUM_CARDS)
  393. return -ENODEV;
  394. for(j=0;j<6;j++)
  395. dev->dev_addr[j] = inb(ioaddr+cards[i].addr_offset+j);
  396. if( (j=ni65_alloc_buffer(dev)) < 0) {
  397. release_region(ioaddr, cards[i].total_size);
  398. return j;
  399. }
  400. p = dev->ml_priv;
  401. p->cmdr_addr = ioaddr + cards[i].cmd_offset;
  402. p->cardno = i;
  403. spin_lock_init(&p->ring_lock);
  404. printk(KERN_INFO "%s: %s found at %#3x, ", dev->name, cards[p->cardno].cardname , ioaddr);
  405. outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */
  406. if( (j=readreg(CSR0)) != 0x4) {
  407. printk("failed.\n");
  408. printk(KERN_ERR "%s: Can't RESET card: %04x\n", dev->name, j);
  409. ni65_free_buffer(p);
  410. release_region(ioaddr, cards[p->cardno].total_size);
  411. return -EAGAIN;
  412. }
  413. outw(88,PORT+L_ADDRREG);
  414. if(inw(PORT+L_ADDRREG) == 88) {
  415. unsigned long v;
  416. v = inw(PORT+L_DATAREG);
  417. v <<= 16;
  418. outw(89,PORT+L_ADDRREG);
  419. v |= inw(PORT+L_DATAREG);
  420. printk("Version %#08lx, ",v);
  421. p->features = INIT_RING_BEFORE_START;
  422. }
  423. else {
  424. printk("ancient LANCE, ");
  425. p->features = 0x0;
  426. }
  427. if(test_bit(0,&cards[i].config)) {
  428. dev->irq = irqtab[(inw(ioaddr+L_CONFIG)>>2)&3];
  429. dev->dma = dmatab[inw(ioaddr+L_CONFIG)&3];
  430. printk("IRQ %d (from card), DMA %d (from card).\n",dev->irq,dev->dma);
  431. }
  432. else {
  433. if(dev->dma == 0) {
  434. /* 'stuck test' from lance.c */
  435. unsigned long dma_channels =
  436. ((inb(DMA1_STAT_REG) >> 4) & 0x0f)
  437. | (inb(DMA2_STAT_REG) & 0xf0);
  438. for(i=1;i<5;i++) {
  439. int dma = dmatab[i];
  440. if(test_bit(dma,&dma_channels) || request_dma(dma,"ni6510"))
  441. continue;
  442. flags=claim_dma_lock();
  443. disable_dma(dma);
  444. set_dma_mode(dma,DMA_MODE_CASCADE);
  445. enable_dma(dma);
  446. release_dma_lock(flags);
  447. ni65_init_lance(p,dev->dev_addr,0,0); /* trigger memory access */
  448. flags=claim_dma_lock();
  449. disable_dma(dma);
  450. free_dma(dma);
  451. release_dma_lock(flags);
  452. if(readreg(CSR0) & CSR0_IDON)
  453. break;
  454. }
  455. if(i == 5) {
  456. printk("failed.\n");
  457. printk(KERN_ERR "%s: Can't detect DMA channel!\n", dev->name);
  458. ni65_free_buffer(p);
  459. release_region(ioaddr, cards[p->cardno].total_size);
  460. return -EAGAIN;
  461. }
  462. dev->dma = dmatab[i];
  463. printk("DMA %d (autodetected), ",dev->dma);
  464. }
  465. else
  466. printk("DMA %d (assigned), ",dev->dma);
  467. if(dev->irq < 2)
  468. {
  469. unsigned long irq_mask;
  470. ni65_init_lance(p,dev->dev_addr,0,0);
  471. irq_mask = probe_irq_on();
  472. writereg(CSR0_INIT|CSR0_INEA,CSR0); /* trigger interrupt */
  473. msleep(20);
  474. dev->irq = probe_irq_off(irq_mask);
  475. if(!dev->irq)
  476. {
  477. printk("Failed to detect IRQ line!\n");
  478. ni65_free_buffer(p);
  479. release_region(ioaddr, cards[p->cardno].total_size);
  480. return -EAGAIN;
  481. }
  482. printk("IRQ %d (autodetected).\n",dev->irq);
  483. }
  484. else
  485. printk("IRQ %d (assigned).\n",dev->irq);
  486. }
  487. if(request_dma(dev->dma, cards[p->cardno].cardname ) != 0)
  488. {
  489. printk(KERN_ERR "%s: Can't request dma-channel %d\n",dev->name,(int) dev->dma);
  490. ni65_free_buffer(p);
  491. release_region(ioaddr, cards[p->cardno].total_size);
  492. return -EAGAIN;
  493. }
  494. dev->base_addr = ioaddr;
  495. dev->open = ni65_open;
  496. dev->stop = ni65_close;
  497. dev->hard_start_xmit = ni65_send_packet;
  498. dev->tx_timeout = ni65_timeout;
  499. dev->watchdog_timeo = HZ/2;
  500. dev->get_stats = ni65_get_stats;
  501. dev->set_multicast_list = set_multicast_list;
  502. return 0; /* everything is OK */
  503. }
  504. /*
  505. * set lance register and trigger init
  506. */
  507. static void ni65_init_lance(struct priv *p,unsigned char *daddr,int filter,int mode)
  508. {
  509. int i;
  510. u32 pib;
  511. writereg(CSR0_CLRALL|CSR0_STOP,CSR0);
  512. for(i=0;i<6;i++)
  513. p->ib.eaddr[i] = daddr[i];
  514. for(i=0;i<8;i++)
  515. p->ib.filter[i] = filter;
  516. p->ib.mode = mode;
  517. p->ib.trp = (u32) isa_virt_to_bus(p->tmdhead) | TMDNUMMASK;
  518. p->ib.rrp = (u32) isa_virt_to_bus(p->rmdhead) | RMDNUMMASK;
  519. writereg(0,CSR3); /* busmaster/no word-swap */
  520. pib = (u32) isa_virt_to_bus(&p->ib);
  521. writereg(pib & 0xffff,CSR1);
  522. writereg(pib >> 16,CSR2);
  523. writereg(CSR0_INIT,CSR0); /* this changes L_ADDRREG to CSR0 */
  524. for(i=0;i<32;i++)
  525. {
  526. mdelay(4);
  527. if(inw(PORT+L_DATAREG) & (CSR0_IDON | CSR0_MERR) )
  528. break; /* init ok ? */
  529. }
  530. }
  531. /*
  532. * allocate memory area and check the 16MB border
  533. */
  534. static void *ni65_alloc_mem(struct net_device *dev,char *what,int size,int type)
  535. {
  536. struct sk_buff *skb=NULL;
  537. unsigned char *ptr;
  538. void *ret;
  539. if(type) {
  540. ret = skb = alloc_skb(2+16+size,GFP_KERNEL|GFP_DMA);
  541. if(!skb) {
  542. printk(KERN_WARNING "%s: unable to allocate %s memory.\n",dev->name,what);
  543. return NULL;
  544. }
  545. skb_reserve(skb,2+16);
  546. skb_put(skb,R_BUF_SIZE); /* grab the whole space .. (not necessary) */
  547. ptr = skb->data;
  548. }
  549. else {
  550. ret = ptr = kmalloc(T_BUF_SIZE,GFP_KERNEL | GFP_DMA);
  551. if(!ret) {
  552. printk(KERN_WARNING "%s: unable to allocate %s memory.\n",dev->name,what);
  553. return NULL;
  554. }
  555. }
  556. if( (u32) virt_to_phys(ptr+size) > 0x1000000) {
  557. printk(KERN_WARNING "%s: unable to allocate %s memory in lower 16MB!\n",dev->name,what);
  558. if(type)
  559. kfree_skb(skb);
  560. else
  561. kfree(ptr);
  562. return NULL;
  563. }
  564. return ret;
  565. }
  566. /*
  567. * allocate all memory structures .. send/recv buffers etc ...
  568. */
  569. static int ni65_alloc_buffer(struct net_device *dev)
  570. {
  571. unsigned char *ptr;
  572. struct priv *p;
  573. int i;
  574. /*
  575. * we need 8-aligned memory ..
  576. */
  577. ptr = ni65_alloc_mem(dev,"BUFFER",sizeof(struct priv)+8,0);
  578. if(!ptr)
  579. return -ENOMEM;
  580. p = dev->ml_priv = (struct priv *) (((unsigned long) ptr + 7) & ~0x7);
  581. memset((char *)p, 0, sizeof(struct priv));
  582. p->self = ptr;
  583. for(i=0;i<TMDNUM;i++)
  584. {
  585. #ifdef XMT_VIA_SKB
  586. p->tmd_skb[i] = NULL;
  587. #endif
  588. p->tmdbounce[i] = ni65_alloc_mem(dev,"XMIT",T_BUF_SIZE,0);
  589. if(!p->tmdbounce[i]) {
  590. ni65_free_buffer(p);
  591. return -ENOMEM;
  592. }
  593. }
  594. for(i=0;i<RMDNUM;i++)
  595. {
  596. #ifdef RCV_VIA_SKB
  597. p->recv_skb[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,1);
  598. if(!p->recv_skb[i]) {
  599. ni65_free_buffer(p);
  600. return -ENOMEM;
  601. }
  602. #else
  603. p->recvbounce[i] = ni65_alloc_mem(dev,"RECV",R_BUF_SIZE,0);
  604. if(!p->recvbounce[i]) {
  605. ni65_free_buffer(p);
  606. return -ENOMEM;
  607. }
  608. #endif
  609. }
  610. return 0; /* everything is OK */
  611. }
  612. /*
  613. * free buffers and private struct
  614. */
  615. static void ni65_free_buffer(struct priv *p)
  616. {
  617. int i;
  618. if(!p)
  619. return;
  620. for(i=0;i<TMDNUM;i++) {
  621. kfree(p->tmdbounce[i]);
  622. #ifdef XMT_VIA_SKB
  623. if(p->tmd_skb[i])
  624. dev_kfree_skb(p->tmd_skb[i]);
  625. #endif
  626. }
  627. for(i=0;i<RMDNUM;i++)
  628. {
  629. #ifdef RCV_VIA_SKB
  630. if(p->recv_skb[i])
  631. dev_kfree_skb(p->recv_skb[i]);
  632. #else
  633. kfree(p->recvbounce[i]);
  634. #endif
  635. }
  636. kfree(p->self);
  637. }
  638. /*
  639. * stop and (re)start lance .. e.g after an error
  640. */
  641. static void ni65_stop_start(struct net_device *dev,struct priv *p)
  642. {
  643. int csr0 = CSR0_INEA;
  644. writedatareg(CSR0_STOP);
  645. if(debuglevel > 1)
  646. printk(KERN_DEBUG "ni65_stop_start\n");
  647. if(p->features & INIT_RING_BEFORE_START) {
  648. int i;
  649. #ifdef XMT_VIA_SKB
  650. struct sk_buff *skb_save[TMDNUM];
  651. #endif
  652. unsigned long buffer[TMDNUM];
  653. short blen[TMDNUM];
  654. if(p->xmit_queued) {
  655. while(1) {
  656. if((p->tmdhead[p->tmdlast].u.s.status & XMIT_OWN))
  657. break;
  658. p->tmdlast = (p->tmdlast + 1) & (TMDNUM-1);
  659. if(p->tmdlast == p->tmdnum)
  660. break;
  661. }
  662. }
  663. for(i=0;i<TMDNUM;i++) {
  664. struct tmd *tmdp = p->tmdhead + i;
  665. #ifdef XMT_VIA_SKB
  666. skb_save[i] = p->tmd_skb[i];
  667. #endif
  668. buffer[i] = (u32) isa_bus_to_virt(tmdp->u.buffer);
  669. blen[i] = tmdp->blen;
  670. tmdp->u.s.status = 0x0;
  671. }
  672. for(i=0;i<RMDNUM;i++) {
  673. struct rmd *rmdp = p->rmdhead + i;
  674. rmdp->u.s.status = RCV_OWN;
  675. }
  676. p->tmdnum = p->xmit_queued = 0;
  677. writedatareg(CSR0_STRT | csr0);
  678. for(i=0;i<TMDNUM;i++) {
  679. int num = (i + p->tmdlast) & (TMDNUM-1);
  680. p->tmdhead[i].u.buffer = (u32) isa_virt_to_bus((char *)buffer[num]); /* status is part of buffer field */
  681. p->tmdhead[i].blen = blen[num];
  682. if(p->tmdhead[i].u.s.status & XMIT_OWN) {
  683. p->tmdnum = (p->tmdnum + 1) & (TMDNUM-1);
  684. p->xmit_queued = 1;
  685. writedatareg(CSR0_TDMD | CSR0_INEA | csr0);
  686. }
  687. #ifdef XMT_VIA_SKB
  688. p->tmd_skb[i] = skb_save[num];
  689. #endif
  690. }
  691. p->rmdnum = p->tmdlast = 0;
  692. if(!p->lock)
  693. if (p->tmdnum || !p->xmit_queued)
  694. netif_wake_queue(dev);
  695. dev->trans_start = jiffies;
  696. }
  697. else
  698. writedatareg(CSR0_STRT | csr0);
  699. }
  700. /*
  701. * init lance (write init-values .. init-buffers) (open-helper)
  702. */
  703. static int ni65_lance_reinit(struct net_device *dev)
  704. {
  705. int i;
  706. struct priv *p = dev->ml_priv;
  707. unsigned long flags;
  708. p->lock = 0;
  709. p->xmit_queued = 0;
  710. flags=claim_dma_lock();
  711. disable_dma(dev->dma); /* I've never worked with dma, but we do it like the packetdriver */
  712. set_dma_mode(dev->dma,DMA_MODE_CASCADE);
  713. enable_dma(dev->dma);
  714. release_dma_lock(flags);
  715. outw(inw(PORT+L_RESET),PORT+L_RESET); /* first: reset the card */
  716. if( (i=readreg(CSR0) ) != 0x4)
  717. {
  718. printk(KERN_ERR "%s: can't RESET %s card: %04x\n",dev->name,
  719. cards[p->cardno].cardname,(int) i);
  720. flags=claim_dma_lock();
  721. disable_dma(dev->dma);
  722. release_dma_lock(flags);
  723. return 0;
  724. }
  725. p->rmdnum = p->tmdnum = p->tmdlast = p->tmdbouncenum = 0;
  726. for(i=0;i<TMDNUM;i++)
  727. {
  728. struct tmd *tmdp = p->tmdhead + i;
  729. #ifdef XMT_VIA_SKB
  730. if(p->tmd_skb[i]) {
  731. dev_kfree_skb(p->tmd_skb[i]);
  732. p->tmd_skb[i] = NULL;
  733. }
  734. #endif
  735. tmdp->u.buffer = 0x0;
  736. tmdp->u.s.status = XMIT_START | XMIT_END;
  737. tmdp->blen = tmdp->status2 = 0;
  738. }
  739. for(i=0;i<RMDNUM;i++)
  740. {
  741. struct rmd *rmdp = p->rmdhead + i;
  742. #ifdef RCV_VIA_SKB
  743. rmdp->u.buffer = (u32) isa_virt_to_bus(p->recv_skb[i]->data);
  744. #else
  745. rmdp->u.buffer = (u32) isa_virt_to_bus(p->recvbounce[i]);
  746. #endif
  747. rmdp->blen = -(R_BUF_SIZE-8);
  748. rmdp->mlen = 0;
  749. rmdp->u.s.status = RCV_OWN;
  750. }
  751. if(dev->flags & IFF_PROMISC)
  752. ni65_init_lance(p,dev->dev_addr,0x00,M_PROM);
  753. else if(dev->mc_count || dev->flags & IFF_ALLMULTI)
  754. ni65_init_lance(p,dev->dev_addr,0xff,0x0);
  755. else
  756. ni65_init_lance(p,dev->dev_addr,0x00,0x00);
  757. /*
  758. * ni65_set_lance_mem() sets L_ADDRREG to CSR0
  759. * NOW, WE WILL NEVER CHANGE THE L_ADDRREG, CSR0 IS ALWAYS SELECTED
  760. */
  761. if(inw(PORT+L_DATAREG) & CSR0_IDON) {
  762. ni65_set_performance(p);
  763. /* init OK: start lance , enable interrupts */
  764. writedatareg(CSR0_CLRALL | CSR0_INEA | CSR0_STRT);
  765. return 1; /* ->OK */
  766. }
  767. printk(KERN_ERR "%s: can't init lance, status: %04x\n",dev->name,(int) inw(PORT+L_DATAREG));
  768. flags=claim_dma_lock();
  769. disable_dma(dev->dma);
  770. release_dma_lock(flags);
  771. return 0; /* ->Error */
  772. }
  773. /*
  774. * interrupt handler
  775. */
  776. static irqreturn_t ni65_interrupt(int irq, void * dev_id)
  777. {
  778. int csr0 = 0;
  779. struct net_device *dev = dev_id;
  780. struct priv *p;
  781. int bcnt = 32;
  782. p = dev->ml_priv;
  783. spin_lock(&p->ring_lock);
  784. while(--bcnt) {
  785. csr0 = inw(PORT+L_DATAREG);
  786. #if 0
  787. writedatareg( (csr0 & CSR0_CLRALL) ); /* ack interrupts, disable int. */
  788. #else
  789. writedatareg( (csr0 & CSR0_CLRALL) | CSR0_INEA ); /* ack interrupts, interrupts enabled */
  790. #endif
  791. if(!(csr0 & (CSR0_ERR | CSR0_RINT | CSR0_TINT)))
  792. break;
  793. if(csr0 & CSR0_RINT) /* RECV-int? */
  794. ni65_recv_intr(dev,csr0);
  795. if(csr0 & CSR0_TINT) /* XMIT-int? */
  796. ni65_xmit_intr(dev,csr0);
  797. if(csr0 & CSR0_ERR)
  798. {
  799. if(debuglevel > 1)
  800. printk(KERN_ERR "%s: general error: %04x.\n",dev->name,csr0);
  801. if(csr0 & CSR0_BABL)
  802. p->stats.tx_errors++;
  803. if(csr0 & CSR0_MISS) {
  804. int i;
  805. for(i=0;i<RMDNUM;i++)
  806. printk("%02x ",p->rmdhead[i].u.s.status);
  807. printk("\n");
  808. p->stats.rx_errors++;
  809. }
  810. if(csr0 & CSR0_MERR) {
  811. if(debuglevel > 1)
  812. printk(KERN_ERR "%s: Ooops .. memory error: %04x.\n",dev->name,csr0);
  813. ni65_stop_start(dev,p);
  814. }
  815. }
  816. }
  817. #ifdef RCV_PARANOIA_CHECK
  818. {
  819. int j;
  820. for(j=0;j<RMDNUM;j++)
  821. {
  822. int i, num2;
  823. for(i=RMDNUM-1;i>0;i--) {
  824. num2 = (p->rmdnum + i) & (RMDNUM-1);
  825. if(!(p->rmdhead[num2].u.s.status & RCV_OWN))
  826. break;
  827. }
  828. if(i) {
  829. int k, num1;
  830. for(k=0;k<RMDNUM;k++) {
  831. num1 = (p->rmdnum + k) & (RMDNUM-1);
  832. if(!(p->rmdhead[num1].u.s.status & RCV_OWN))
  833. break;
  834. }
  835. if(!k)
  836. break;
  837. if(debuglevel > 0)
  838. {
  839. char buf[256],*buf1;
  840. buf1 = buf;
  841. for(k=0;k<RMDNUM;k++) {
  842. sprintf(buf1,"%02x ",(p->rmdhead[k].u.s.status)); /* & RCV_OWN) ); */
  843. buf1 += 3;
  844. }
  845. *buf1 = 0;
  846. printk(KERN_ERR "%s: Ooops, receive ring corrupted %2d %2d | %s\n",dev->name,p->rmdnum,i,buf);
  847. }
  848. p->rmdnum = num1;
  849. ni65_recv_intr(dev,csr0);
  850. if((p->rmdhead[num2].u.s.status & RCV_OWN))
  851. break; /* ok, we are 'in sync' again */
  852. }
  853. else
  854. break;
  855. }
  856. }
  857. #endif
  858. if( (csr0 & (CSR0_RXON | CSR0_TXON)) != (CSR0_RXON | CSR0_TXON) ) {
  859. printk(KERN_DEBUG "%s: RX or TX was offline -> restart\n",dev->name);
  860. ni65_stop_start(dev,p);
  861. }
  862. else
  863. writedatareg(CSR0_INEA);
  864. spin_unlock(&p->ring_lock);
  865. return IRQ_HANDLED;
  866. }
  867. /*
  868. * We have received an Xmit-Interrupt ..
  869. * send a new packet if necessary
  870. */
  871. static void ni65_xmit_intr(struct net_device *dev,int csr0)
  872. {
  873. struct priv *p = dev->ml_priv;
  874. while(p->xmit_queued)
  875. {
  876. struct tmd *tmdp = p->tmdhead + p->tmdlast;
  877. int tmdstat = tmdp->u.s.status;
  878. if(tmdstat & XMIT_OWN)
  879. break;
  880. if(tmdstat & XMIT_ERR)
  881. {
  882. #if 0
  883. if(tmdp->status2 & XMIT_TDRMASK && debuglevel > 3)
  884. printk(KERN_ERR "%s: tdr-problems (e.g. no resistor)\n",dev->name);
  885. #endif
  886. /* checking some errors */
  887. if(tmdp->status2 & XMIT_RTRY)
  888. p->stats.tx_aborted_errors++;
  889. if(tmdp->status2 & XMIT_LCAR)
  890. p->stats.tx_carrier_errors++;
  891. if(tmdp->status2 & (XMIT_BUFF | XMIT_UFLO )) {
  892. /* this stops the xmitter */
  893. p->stats.tx_fifo_errors++;
  894. if(debuglevel > 0)
  895. printk(KERN_ERR "%s: Xmit FIFO/BUFF error\n",dev->name);
  896. if(p->features & INIT_RING_BEFORE_START) {
  897. tmdp->u.s.status = XMIT_OWN | XMIT_START | XMIT_END; /* test: resend this frame */
  898. ni65_stop_start(dev,p);
  899. break; /* no more Xmit processing .. */
  900. }
  901. else
  902. ni65_stop_start(dev,p);
  903. }
  904. if(debuglevel > 2)
  905. printk(KERN_ERR "%s: xmit-error: %04x %02x-%04x\n",dev->name,csr0,(int) tmdstat,(int) tmdp->status2);
  906. if(!(csr0 & CSR0_BABL)) /* don't count errors twice */
  907. p->stats.tx_errors++;
  908. tmdp->status2 = 0;
  909. }
  910. else {
  911. p->stats.tx_bytes -= (short)(tmdp->blen);
  912. p->stats.tx_packets++;
  913. }
  914. #ifdef XMT_VIA_SKB
  915. if(p->tmd_skb[p->tmdlast]) {
  916. dev_kfree_skb_irq(p->tmd_skb[p->tmdlast]);
  917. p->tmd_skb[p->tmdlast] = NULL;
  918. }
  919. #endif
  920. p->tmdlast = (p->tmdlast + 1) & (TMDNUM-1);
  921. if(p->tmdlast == p->tmdnum)
  922. p->xmit_queued = 0;
  923. }
  924. netif_wake_queue(dev);
  925. }
  926. /*
  927. * We have received a packet
  928. */
  929. static void ni65_recv_intr(struct net_device *dev,int csr0)
  930. {
  931. struct rmd *rmdp;
  932. int rmdstat,len;
  933. int cnt=0;
  934. struct priv *p = dev->ml_priv;
  935. rmdp = p->rmdhead + p->rmdnum;
  936. while(!( (rmdstat = rmdp->u.s.status) & RCV_OWN))
  937. {
  938. cnt++;
  939. if( (rmdstat & (RCV_START | RCV_END | RCV_ERR)) != (RCV_START | RCV_END) ) /* error or oversized? */
  940. {
  941. if(!(rmdstat & RCV_ERR)) {
  942. if(rmdstat & RCV_START)
  943. {
  944. p->stats.rx_length_errors++;
  945. printk(KERN_ERR "%s: recv, packet too long: %d\n",dev->name,rmdp->mlen & 0x0fff);
  946. }
  947. }
  948. else {
  949. if(debuglevel > 2)
  950. printk(KERN_ERR "%s: receive-error: %04x, lance-status: %04x/%04x\n",
  951. dev->name,(int) rmdstat,csr0,(int) inw(PORT+L_DATAREG) );
  952. if(rmdstat & RCV_FRAM)
  953. p->stats.rx_frame_errors++;
  954. if(rmdstat & RCV_OFLO)
  955. p->stats.rx_over_errors++;
  956. if(rmdstat & RCV_CRC)
  957. p->stats.rx_crc_errors++;
  958. if(rmdstat & RCV_BUF_ERR)
  959. p->stats.rx_fifo_errors++;
  960. }
  961. if(!(csr0 & CSR0_MISS)) /* don't count errors twice */
  962. p->stats.rx_errors++;
  963. }
  964. else if( (len = (rmdp->mlen & 0x0fff) - 4) >= 60)
  965. {
  966. #ifdef RCV_VIA_SKB
  967. struct sk_buff *skb = alloc_skb(R_BUF_SIZE+2+16,GFP_ATOMIC);
  968. if (skb)
  969. skb_reserve(skb,16);
  970. #else
  971. struct sk_buff *skb = dev_alloc_skb(len+2);
  972. #endif
  973. if(skb)
  974. {
  975. skb_reserve(skb,2);
  976. #ifdef RCV_VIA_SKB
  977. if( (unsigned long) (skb->data + R_BUF_SIZE) > 0x1000000) {
  978. skb_put(skb,len);
  979. skb_copy_to_linear_data(skb, (unsigned char *)(p->recv_skb[p->rmdnum]->data),len);
  980. }
  981. else {
  982. struct sk_buff *skb1 = p->recv_skb[p->rmdnum];
  983. skb_put(skb,R_BUF_SIZE);
  984. p->recv_skb[p->rmdnum] = skb;
  985. rmdp->u.buffer = (u32) isa_virt_to_bus(skb->data);
  986. skb = skb1;
  987. skb_trim(skb,len);
  988. }
  989. #else
  990. skb_put(skb,len);
  991. skb_copy_to_linear_data(skb, (unsigned char *) p->recvbounce[p->rmdnum],len);
  992. #endif
  993. p->stats.rx_packets++;
  994. p->stats.rx_bytes += len;
  995. skb->protocol=eth_type_trans(skb,dev);
  996. netif_rx(skb);
  997. }
  998. else
  999. {
  1000. printk(KERN_ERR "%s: can't alloc new sk_buff\n",dev->name);
  1001. p->stats.rx_dropped++;
  1002. }
  1003. }
  1004. else {
  1005. printk(KERN_INFO "%s: received runt packet\n",dev->name);
  1006. p->stats.rx_errors++;
  1007. }
  1008. rmdp->blen = -(R_BUF_SIZE-8);
  1009. rmdp->mlen = 0;
  1010. rmdp->u.s.status = RCV_OWN; /* change owner */
  1011. p->rmdnum = (p->rmdnum + 1) & (RMDNUM-1);
  1012. rmdp = p->rmdhead + p->rmdnum;
  1013. }
  1014. }
  1015. /*
  1016. * kick xmitter ..
  1017. */
  1018. static void ni65_timeout(struct net_device *dev)
  1019. {
  1020. int i;
  1021. struct priv *p = dev->ml_priv;
  1022. printk(KERN_ERR "%s: xmitter timed out, try to restart!\n",dev->name);
  1023. for(i=0;i<TMDNUM;i++)
  1024. printk("%02x ",p->tmdhead[i].u.s.status);
  1025. printk("\n");
  1026. ni65_lance_reinit(dev);
  1027. dev->trans_start = jiffies;
  1028. netif_wake_queue(dev);
  1029. }
  1030. /*
  1031. * Send a packet
  1032. */
  1033. static int ni65_send_packet(struct sk_buff *skb, struct net_device *dev)
  1034. {
  1035. struct priv *p = dev->ml_priv;
  1036. netif_stop_queue(dev);
  1037. if (test_and_set_bit(0, (void*)&p->lock)) {
  1038. printk(KERN_ERR "%s: Queue was locked.\n", dev->name);
  1039. return 1;
  1040. }
  1041. {
  1042. short len = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
  1043. struct tmd *tmdp;
  1044. unsigned long flags;
  1045. #ifdef XMT_VIA_SKB
  1046. if( (unsigned long) (skb->data + skb->len) > 0x1000000) {
  1047. #endif
  1048. skb_copy_from_linear_data(skb, p->tmdbounce[p->tmdbouncenum],
  1049. skb->len > T_BUF_SIZE ? T_BUF_SIZE :
  1050. skb->len);
  1051. if (len > skb->len)
  1052. memset((char *)p->tmdbounce[p->tmdbouncenum]+skb->len, 0, len-skb->len);
  1053. dev_kfree_skb (skb);
  1054. spin_lock_irqsave(&p->ring_lock, flags);
  1055. tmdp = p->tmdhead + p->tmdnum;
  1056. tmdp->u.buffer = (u32) isa_virt_to_bus(p->tmdbounce[p->tmdbouncenum]);
  1057. p->tmdbouncenum = (p->tmdbouncenum + 1) & (TMDNUM - 1);
  1058. #ifdef XMT_VIA_SKB
  1059. }
  1060. else {
  1061. spin_lock_irqsave(&p->ring_lock, flags);
  1062. tmdp = p->tmdhead + p->tmdnum;
  1063. tmdp->u.buffer = (u32) isa_virt_to_bus(skb->data);
  1064. p->tmd_skb[p->tmdnum] = skb;
  1065. }
  1066. #endif
  1067. tmdp->blen = -len;
  1068. tmdp->u.s.status = XMIT_OWN | XMIT_START | XMIT_END;
  1069. writedatareg(CSR0_TDMD | CSR0_INEA); /* enable xmit & interrupt */
  1070. p->xmit_queued = 1;
  1071. p->tmdnum = (p->tmdnum + 1) & (TMDNUM-1);
  1072. if(p->tmdnum != p->tmdlast)
  1073. netif_wake_queue(dev);
  1074. p->lock = 0;
  1075. dev->trans_start = jiffies;
  1076. spin_unlock_irqrestore(&p->ring_lock, flags);
  1077. }
  1078. return 0;
  1079. }
  1080. static struct net_device_stats *ni65_get_stats(struct net_device *dev)
  1081. {
  1082. #if 0
  1083. int i;
  1084. struct priv *p = dev->ml_priv;
  1085. for(i=0;i<RMDNUM;i++)
  1086. {
  1087. struct rmd *rmdp = p->rmdhead + ((p->rmdnum + i) & (RMDNUM-1));
  1088. printk("%02x ",rmdp->u.s.status);
  1089. }
  1090. printk("\n");
  1091. #endif
  1092. return &((struct priv *)dev->ml_priv)->stats;
  1093. }
  1094. static void set_multicast_list(struct net_device *dev)
  1095. {
  1096. if(!ni65_lance_reinit(dev))
  1097. printk(KERN_ERR "%s: Can't switch card into MC mode!\n",dev->name);
  1098. netif_wake_queue(dev);
  1099. }
  1100. #ifdef MODULE
  1101. static struct net_device *dev_ni65;
  1102. module_param(irq, int, 0);
  1103. module_param(io, int, 0);
  1104. module_param(dma, int, 0);
  1105. MODULE_PARM_DESC(irq, "ni6510 IRQ number (ignored for some cards)");
  1106. MODULE_PARM_DESC(io, "ni6510 I/O base address");
  1107. MODULE_PARM_DESC(dma, "ni6510 ISA DMA channel (ignored for some cards)");
  1108. int __init init_module(void)
  1109. {
  1110. dev_ni65 = ni65_probe(-1);
  1111. return IS_ERR(dev_ni65) ? PTR_ERR(dev_ni65) : 0;
  1112. }
  1113. void __exit cleanup_module(void)
  1114. {
  1115. unregister_netdev(dev_ni65);
  1116. cleanup_card(dev_ni65);
  1117. free_netdev(dev_ni65);
  1118. }
  1119. #endif /* MODULE */
  1120. MODULE_LICENSE("GPL");