mwl8k.c 96 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008-2009 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/sched.h>
  15. #include <linux/spinlock.h>
  16. #include <linux/list.h>
  17. #include <linux/pci.h>
  18. #include <linux/delay.h>
  19. #include <linux/completion.h>
  20. #include <linux/etherdevice.h>
  21. #include <net/mac80211.h>
  22. #include <linux/moduleparam.h>
  23. #include <linux/firmware.h>
  24. #include <linux/workqueue.h>
  25. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  26. #define MWL8K_NAME KBUILD_MODNAME
  27. #define MWL8K_VERSION "0.11"
  28. /* Register definitions */
  29. #define MWL8K_HIU_GEN_PTR 0x00000c10
  30. #define MWL8K_MODE_STA 0x0000005a
  31. #define MWL8K_MODE_AP 0x000000a5
  32. #define MWL8K_HIU_INT_CODE 0x00000c14
  33. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  34. #define MWL8K_FWAP_READY 0xf1f2f4a5
  35. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  36. #define MWL8K_HIU_SCRATCH 0x00000c40
  37. /* Host->device communications */
  38. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  39. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  40. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  41. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  42. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  43. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  44. #define MWL8K_H2A_INT_RESET (1 << 15)
  45. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  46. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  47. /* Device->host communications */
  48. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  49. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  50. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  51. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  52. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  53. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  54. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  55. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  56. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  57. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  58. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  59. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  60. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  61. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  62. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  63. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  64. MWL8K_A2H_INT_CHNL_SWITCHED | \
  65. MWL8K_A2H_INT_QUEUE_EMPTY | \
  66. MWL8K_A2H_INT_RADAR_DETECT | \
  67. MWL8K_A2H_INT_RADIO_ON | \
  68. MWL8K_A2H_INT_RADIO_OFF | \
  69. MWL8K_A2H_INT_MAC_EVENT | \
  70. MWL8K_A2H_INT_OPC_DONE | \
  71. MWL8K_A2H_INT_RX_READY | \
  72. MWL8K_A2H_INT_TX_DONE)
  73. #define MWL8K_RX_QUEUES 1
  74. #define MWL8K_TX_QUEUES 4
  75. struct rxd_ops {
  76. int rxd_size;
  77. void (*rxd_init)(void *rxd, dma_addr_t next_dma_addr);
  78. void (*rxd_refill)(void *rxd, dma_addr_t addr, int len);
  79. int (*rxd_process)(void *rxd, struct ieee80211_rx_status *status,
  80. __le16 *qos);
  81. };
  82. struct mwl8k_device_info {
  83. char *part_name;
  84. char *helper_image;
  85. char *fw_image;
  86. struct rxd_ops *ap_rxd_ops;
  87. };
  88. struct mwl8k_rx_queue {
  89. int rxd_count;
  90. /* hw receives here */
  91. int head;
  92. /* refill descs here */
  93. int tail;
  94. void *rxd;
  95. dma_addr_t rxd_dma;
  96. struct {
  97. struct sk_buff *skb;
  98. DECLARE_PCI_UNMAP_ADDR(dma)
  99. } *buf;
  100. };
  101. struct mwl8k_tx_queue {
  102. /* hw transmits here */
  103. int head;
  104. /* sw appends here */
  105. int tail;
  106. struct ieee80211_tx_queue_stats stats;
  107. struct mwl8k_tx_desc *txd;
  108. dma_addr_t txd_dma;
  109. struct sk_buff **skb;
  110. };
  111. struct mwl8k_priv {
  112. struct ieee80211_hw *hw;
  113. struct pci_dev *pdev;
  114. struct mwl8k_device_info *device_info;
  115. void __iomem *sram;
  116. void __iomem *regs;
  117. /* firmware */
  118. struct firmware *fw_helper;
  119. struct firmware *fw_ucode;
  120. /* hardware/firmware parameters */
  121. bool ap_fw;
  122. struct rxd_ops *rxd_ops;
  123. /* firmware access */
  124. struct mutex fw_mutex;
  125. struct task_struct *fw_mutex_owner;
  126. int fw_mutex_depth;
  127. struct completion *hostcmd_wait;
  128. /* lock held over TX and TX reap */
  129. spinlock_t tx_lock;
  130. /* TX quiesce completion, protected by fw_mutex and tx_lock */
  131. struct completion *tx_wait;
  132. struct ieee80211_vif *vif;
  133. /* power management status cookie from firmware */
  134. u32 *cookie;
  135. dma_addr_t cookie_dma;
  136. u16 num_mcaddrs;
  137. u8 hw_rev;
  138. u32 fw_rev;
  139. /*
  140. * Running count of TX packets in flight, to avoid
  141. * iterating over the transmit rings each time.
  142. */
  143. int pending_tx_pkts;
  144. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  145. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  146. /* PHY parameters */
  147. struct ieee80211_supported_band band;
  148. struct ieee80211_channel channels[14];
  149. struct ieee80211_rate rates[14];
  150. bool radio_on;
  151. bool radio_short_preamble;
  152. bool sniffer_enabled;
  153. bool wmm_enabled;
  154. struct work_struct sta_notify_worker;
  155. spinlock_t sta_notify_list_lock;
  156. struct list_head sta_notify_list;
  157. /* XXX need to convert this to handle multiple interfaces */
  158. bool capture_beacon;
  159. u8 capture_bssid[ETH_ALEN];
  160. struct sk_buff *beacon_skb;
  161. /*
  162. * This FJ worker has to be global as it is scheduled from the
  163. * RX handler. At this point we don't know which interface it
  164. * belongs to until the list of bssids waiting to complete join
  165. * is checked.
  166. */
  167. struct work_struct finalize_join_worker;
  168. /* Tasklet to perform TX reclaim. */
  169. struct tasklet_struct poll_tx_task;
  170. /* Tasklet to perform RX. */
  171. struct tasklet_struct poll_rx_task;
  172. };
  173. /* Per interface specific private data */
  174. struct mwl8k_vif {
  175. /* Non AMPDU sequence number assigned by driver. */
  176. u16 seqno;
  177. };
  178. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  179. struct mwl8k_sta {
  180. /* Index into station database. Returned by UPDATE_STADB. */
  181. u8 peer_id;
  182. };
  183. #define MWL8K_STA(_sta) ((struct mwl8k_sta *)&((_sta)->drv_priv))
  184. static const struct ieee80211_channel mwl8k_channels[] = {
  185. { .center_freq = 2412, .hw_value = 1, },
  186. { .center_freq = 2417, .hw_value = 2, },
  187. { .center_freq = 2422, .hw_value = 3, },
  188. { .center_freq = 2427, .hw_value = 4, },
  189. { .center_freq = 2432, .hw_value = 5, },
  190. { .center_freq = 2437, .hw_value = 6, },
  191. { .center_freq = 2442, .hw_value = 7, },
  192. { .center_freq = 2447, .hw_value = 8, },
  193. { .center_freq = 2452, .hw_value = 9, },
  194. { .center_freq = 2457, .hw_value = 10, },
  195. { .center_freq = 2462, .hw_value = 11, },
  196. { .center_freq = 2467, .hw_value = 12, },
  197. { .center_freq = 2472, .hw_value = 13, },
  198. { .center_freq = 2484, .hw_value = 14, },
  199. };
  200. static const struct ieee80211_rate mwl8k_rates[] = {
  201. { .bitrate = 10, .hw_value = 2, },
  202. { .bitrate = 20, .hw_value = 4, },
  203. { .bitrate = 55, .hw_value = 11, },
  204. { .bitrate = 110, .hw_value = 22, },
  205. { .bitrate = 220, .hw_value = 44, },
  206. { .bitrate = 60, .hw_value = 12, },
  207. { .bitrate = 90, .hw_value = 18, },
  208. { .bitrate = 120, .hw_value = 24, },
  209. { .bitrate = 180, .hw_value = 36, },
  210. { .bitrate = 240, .hw_value = 48, },
  211. { .bitrate = 360, .hw_value = 72, },
  212. { .bitrate = 480, .hw_value = 96, },
  213. { .bitrate = 540, .hw_value = 108, },
  214. { .bitrate = 720, .hw_value = 144, },
  215. };
  216. /* Set or get info from Firmware */
  217. #define MWL8K_CMD_SET 0x0001
  218. #define MWL8K_CMD_GET 0x0000
  219. /* Firmware command codes */
  220. #define MWL8K_CMD_CODE_DNLD 0x0001
  221. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  222. #define MWL8K_CMD_SET_HW_SPEC 0x0004
  223. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  224. #define MWL8K_CMD_GET_STAT 0x0014
  225. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  226. #define MWL8K_CMD_RF_TX_POWER 0x001e
  227. #define MWL8K_CMD_RF_ANTENNA 0x0020
  228. #define MWL8K_CMD_SET_BEACON 0x0100
  229. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  230. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  231. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  232. #define MWL8K_CMD_SET_AID 0x010d
  233. #define MWL8K_CMD_SET_RATE 0x0110
  234. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  235. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  236. #define MWL8K_CMD_SET_SLOT 0x0114
  237. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  238. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  239. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  240. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  241. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  242. #define MWL8K_CMD_SET_MAC_ADDR 0x0202
  243. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  244. #define MWL8K_CMD_BSS_START 0x1100
  245. #define MWL8K_CMD_SET_NEW_STN 0x1111
  246. #define MWL8K_CMD_UPDATE_STADB 0x1123
  247. static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
  248. {
  249. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  250. snprintf(buf, bufsize, "%s", #x);\
  251. return buf;\
  252. } while (0)
  253. switch (cmd & ~0x8000) {
  254. MWL8K_CMDNAME(CODE_DNLD);
  255. MWL8K_CMDNAME(GET_HW_SPEC);
  256. MWL8K_CMDNAME(SET_HW_SPEC);
  257. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  258. MWL8K_CMDNAME(GET_STAT);
  259. MWL8K_CMDNAME(RADIO_CONTROL);
  260. MWL8K_CMDNAME(RF_TX_POWER);
  261. MWL8K_CMDNAME(RF_ANTENNA);
  262. MWL8K_CMDNAME(SET_BEACON);
  263. MWL8K_CMDNAME(SET_PRE_SCAN);
  264. MWL8K_CMDNAME(SET_POST_SCAN);
  265. MWL8K_CMDNAME(SET_RF_CHANNEL);
  266. MWL8K_CMDNAME(SET_AID);
  267. MWL8K_CMDNAME(SET_RATE);
  268. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  269. MWL8K_CMDNAME(RTS_THRESHOLD);
  270. MWL8K_CMDNAME(SET_SLOT);
  271. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  272. MWL8K_CMDNAME(SET_WMM_MODE);
  273. MWL8K_CMDNAME(MIMO_CONFIG);
  274. MWL8K_CMDNAME(USE_FIXED_RATE);
  275. MWL8K_CMDNAME(ENABLE_SNIFFER);
  276. MWL8K_CMDNAME(SET_MAC_ADDR);
  277. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  278. MWL8K_CMDNAME(BSS_START);
  279. MWL8K_CMDNAME(SET_NEW_STN);
  280. MWL8K_CMDNAME(UPDATE_STADB);
  281. default:
  282. snprintf(buf, bufsize, "0x%x", cmd);
  283. }
  284. #undef MWL8K_CMDNAME
  285. return buf;
  286. }
  287. /* Hardware and firmware reset */
  288. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  289. {
  290. iowrite32(MWL8K_H2A_INT_RESET,
  291. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  292. iowrite32(MWL8K_H2A_INT_RESET,
  293. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  294. msleep(20);
  295. }
  296. /* Release fw image */
  297. static void mwl8k_release_fw(struct firmware **fw)
  298. {
  299. if (*fw == NULL)
  300. return;
  301. release_firmware(*fw);
  302. *fw = NULL;
  303. }
  304. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  305. {
  306. mwl8k_release_fw(&priv->fw_ucode);
  307. mwl8k_release_fw(&priv->fw_helper);
  308. }
  309. /* Request fw image */
  310. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  311. const char *fname, struct firmware **fw)
  312. {
  313. /* release current image */
  314. if (*fw != NULL)
  315. mwl8k_release_fw(fw);
  316. return request_firmware((const struct firmware **)fw,
  317. fname, &priv->pdev->dev);
  318. }
  319. static int mwl8k_request_firmware(struct mwl8k_priv *priv)
  320. {
  321. struct mwl8k_device_info *di = priv->device_info;
  322. int rc;
  323. if (di->helper_image != NULL) {
  324. rc = mwl8k_request_fw(priv, di->helper_image, &priv->fw_helper);
  325. if (rc) {
  326. printk(KERN_ERR "%s: Error requesting helper "
  327. "firmware file %s\n", pci_name(priv->pdev),
  328. di->helper_image);
  329. return rc;
  330. }
  331. }
  332. rc = mwl8k_request_fw(priv, di->fw_image, &priv->fw_ucode);
  333. if (rc) {
  334. printk(KERN_ERR "%s: Error requesting firmware file %s\n",
  335. pci_name(priv->pdev), di->fw_image);
  336. mwl8k_release_fw(&priv->fw_helper);
  337. return rc;
  338. }
  339. return 0;
  340. }
  341. struct mwl8k_cmd_pkt {
  342. __le16 code;
  343. __le16 length;
  344. __le16 seq_num;
  345. __le16 result;
  346. char payload[0];
  347. } __attribute__((packed));
  348. /*
  349. * Firmware loading.
  350. */
  351. static int
  352. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  353. {
  354. void __iomem *regs = priv->regs;
  355. dma_addr_t dma_addr;
  356. int loops;
  357. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  358. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  359. return -ENOMEM;
  360. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  361. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  362. iowrite32(MWL8K_H2A_INT_DOORBELL,
  363. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  364. iowrite32(MWL8K_H2A_INT_DUMMY,
  365. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  366. loops = 1000;
  367. do {
  368. u32 int_code;
  369. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  370. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  371. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  372. break;
  373. }
  374. cond_resched();
  375. udelay(1);
  376. } while (--loops);
  377. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  378. return loops ? 0 : -ETIMEDOUT;
  379. }
  380. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  381. const u8 *data, size_t length)
  382. {
  383. struct mwl8k_cmd_pkt *cmd;
  384. int done;
  385. int rc = 0;
  386. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  387. if (cmd == NULL)
  388. return -ENOMEM;
  389. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  390. cmd->seq_num = 0;
  391. cmd->result = 0;
  392. done = 0;
  393. while (length) {
  394. int block_size = length > 256 ? 256 : length;
  395. memcpy(cmd->payload, data + done, block_size);
  396. cmd->length = cpu_to_le16(block_size);
  397. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  398. sizeof(*cmd) + block_size);
  399. if (rc)
  400. break;
  401. done += block_size;
  402. length -= block_size;
  403. }
  404. if (!rc) {
  405. cmd->length = 0;
  406. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  407. }
  408. kfree(cmd);
  409. return rc;
  410. }
  411. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  412. const u8 *data, size_t length)
  413. {
  414. unsigned char *buffer;
  415. int may_continue, rc = 0;
  416. u32 done, prev_block_size;
  417. buffer = kmalloc(1024, GFP_KERNEL);
  418. if (buffer == NULL)
  419. return -ENOMEM;
  420. done = 0;
  421. prev_block_size = 0;
  422. may_continue = 1000;
  423. while (may_continue > 0) {
  424. u32 block_size;
  425. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  426. if (block_size & 1) {
  427. block_size &= ~1;
  428. may_continue--;
  429. } else {
  430. done += prev_block_size;
  431. length -= prev_block_size;
  432. }
  433. if (block_size > 1024 || block_size > length) {
  434. rc = -EOVERFLOW;
  435. break;
  436. }
  437. if (length == 0) {
  438. rc = 0;
  439. break;
  440. }
  441. if (block_size == 0) {
  442. rc = -EPROTO;
  443. may_continue--;
  444. udelay(1);
  445. continue;
  446. }
  447. prev_block_size = block_size;
  448. memcpy(buffer, data + done, block_size);
  449. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  450. if (rc)
  451. break;
  452. }
  453. if (!rc && length != 0)
  454. rc = -EREMOTEIO;
  455. kfree(buffer);
  456. return rc;
  457. }
  458. static int mwl8k_load_firmware(struct ieee80211_hw *hw)
  459. {
  460. struct mwl8k_priv *priv = hw->priv;
  461. struct firmware *fw = priv->fw_ucode;
  462. int rc;
  463. int loops;
  464. if (!memcmp(fw->data, "\x01\x00\x00\x00", 4)) {
  465. struct firmware *helper = priv->fw_helper;
  466. if (helper == NULL) {
  467. printk(KERN_ERR "%s: helper image needed but none "
  468. "given\n", pci_name(priv->pdev));
  469. return -EINVAL;
  470. }
  471. rc = mwl8k_load_fw_image(priv, helper->data, helper->size);
  472. if (rc) {
  473. printk(KERN_ERR "%s: unable to load firmware "
  474. "helper image\n", pci_name(priv->pdev));
  475. return rc;
  476. }
  477. msleep(5);
  478. rc = mwl8k_feed_fw_image(priv, fw->data, fw->size);
  479. } else {
  480. rc = mwl8k_load_fw_image(priv, fw->data, fw->size);
  481. }
  482. if (rc) {
  483. printk(KERN_ERR "%s: unable to load firmware image\n",
  484. pci_name(priv->pdev));
  485. return rc;
  486. }
  487. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  488. loops = 500000;
  489. do {
  490. u32 ready_code;
  491. ready_code = ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  492. if (ready_code == MWL8K_FWAP_READY) {
  493. priv->ap_fw = 1;
  494. break;
  495. } else if (ready_code == MWL8K_FWSTA_READY) {
  496. priv->ap_fw = 0;
  497. break;
  498. }
  499. cond_resched();
  500. udelay(1);
  501. } while (--loops);
  502. return loops ? 0 : -ETIMEDOUT;
  503. }
  504. /* DMA header used by firmware and hardware. */
  505. struct mwl8k_dma_data {
  506. __le16 fwlen;
  507. struct ieee80211_hdr wh;
  508. char data[0];
  509. } __attribute__((packed));
  510. /* Routines to add/remove DMA header from skb. */
  511. static inline void mwl8k_remove_dma_header(struct sk_buff *skb, __le16 qos)
  512. {
  513. struct mwl8k_dma_data *tr;
  514. int hdrlen;
  515. tr = (struct mwl8k_dma_data *)skb->data;
  516. hdrlen = ieee80211_hdrlen(tr->wh.frame_control);
  517. if (hdrlen != sizeof(tr->wh)) {
  518. if (ieee80211_is_data_qos(tr->wh.frame_control)) {
  519. memmove(tr->data - hdrlen, &tr->wh, hdrlen - 2);
  520. *((__le16 *)(tr->data - 2)) = qos;
  521. } else {
  522. memmove(tr->data - hdrlen, &tr->wh, hdrlen);
  523. }
  524. }
  525. if (hdrlen != sizeof(*tr))
  526. skb_pull(skb, sizeof(*tr) - hdrlen);
  527. }
  528. static inline void mwl8k_add_dma_header(struct sk_buff *skb)
  529. {
  530. struct ieee80211_hdr *wh;
  531. int hdrlen;
  532. struct mwl8k_dma_data *tr;
  533. /*
  534. * Add a firmware DMA header; the firmware requires that we
  535. * present a 2-byte payload length followed by a 4-address
  536. * header (without QoS field), followed (optionally) by any
  537. * WEP/ExtIV header (but only filled in for CCMP).
  538. */
  539. wh = (struct ieee80211_hdr *)skb->data;
  540. hdrlen = ieee80211_hdrlen(wh->frame_control);
  541. if (hdrlen != sizeof(*tr))
  542. skb_push(skb, sizeof(*tr) - hdrlen);
  543. if (ieee80211_is_data_qos(wh->frame_control))
  544. hdrlen -= 2;
  545. tr = (struct mwl8k_dma_data *)skb->data;
  546. if (wh != &tr->wh)
  547. memmove(&tr->wh, wh, hdrlen);
  548. if (hdrlen != sizeof(tr->wh))
  549. memset(((void *)&tr->wh) + hdrlen, 0, sizeof(tr->wh) - hdrlen);
  550. /*
  551. * Firmware length is the length of the fully formed "802.11
  552. * payload". That is, everything except for the 802.11 header.
  553. * This includes all crypto material including the MIC.
  554. */
  555. tr->fwlen = cpu_to_le16(skb->len - sizeof(*tr));
  556. }
  557. /*
  558. * Packet reception for 88w8366 AP firmware.
  559. */
  560. struct mwl8k_rxd_8366_ap {
  561. __le16 pkt_len;
  562. __u8 sq2;
  563. __u8 rate;
  564. __le32 pkt_phys_addr;
  565. __le32 next_rxd_phys_addr;
  566. __le16 qos_control;
  567. __le16 htsig2;
  568. __le32 hw_rssi_info;
  569. __le32 hw_noise_floor_info;
  570. __u8 noise_floor;
  571. __u8 pad0[3];
  572. __u8 rssi;
  573. __u8 rx_status;
  574. __u8 channel;
  575. __u8 rx_ctrl;
  576. } __attribute__((packed));
  577. #define MWL8K_8366_AP_RATE_INFO_MCS_FORMAT 0x80
  578. #define MWL8K_8366_AP_RATE_INFO_40MHZ 0x40
  579. #define MWL8K_8366_AP_RATE_INFO_RATEID(x) ((x) & 0x3f)
  580. #define MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST 0x80
  581. static void mwl8k_rxd_8366_ap_init(void *_rxd, dma_addr_t next_dma_addr)
  582. {
  583. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  584. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  585. rxd->rx_ctrl = MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST;
  586. }
  587. static void mwl8k_rxd_8366_ap_refill(void *_rxd, dma_addr_t addr, int len)
  588. {
  589. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  590. rxd->pkt_len = cpu_to_le16(len);
  591. rxd->pkt_phys_addr = cpu_to_le32(addr);
  592. wmb();
  593. rxd->rx_ctrl = 0;
  594. }
  595. static int
  596. mwl8k_rxd_8366_ap_process(void *_rxd, struct ieee80211_rx_status *status,
  597. __le16 *qos)
  598. {
  599. struct mwl8k_rxd_8366_ap *rxd = _rxd;
  600. if (!(rxd->rx_ctrl & MWL8K_8366_AP_RX_CTRL_OWNED_BY_HOST))
  601. return -1;
  602. rmb();
  603. memset(status, 0, sizeof(*status));
  604. status->signal = -rxd->rssi;
  605. status->noise = -rxd->noise_floor;
  606. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_MCS_FORMAT) {
  607. status->flag |= RX_FLAG_HT;
  608. if (rxd->rate & MWL8K_8366_AP_RATE_INFO_40MHZ)
  609. status->flag |= RX_FLAG_40MHZ;
  610. status->rate_idx = MWL8K_8366_AP_RATE_INFO_RATEID(rxd->rate);
  611. } else {
  612. int i;
  613. for (i = 0; i < ARRAY_SIZE(mwl8k_rates); i++) {
  614. if (mwl8k_rates[i].hw_value == rxd->rate) {
  615. status->rate_idx = i;
  616. break;
  617. }
  618. }
  619. }
  620. status->band = IEEE80211_BAND_2GHZ;
  621. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  622. *qos = rxd->qos_control;
  623. return le16_to_cpu(rxd->pkt_len);
  624. }
  625. static struct rxd_ops rxd_8366_ap_ops = {
  626. .rxd_size = sizeof(struct mwl8k_rxd_8366_ap),
  627. .rxd_init = mwl8k_rxd_8366_ap_init,
  628. .rxd_refill = mwl8k_rxd_8366_ap_refill,
  629. .rxd_process = mwl8k_rxd_8366_ap_process,
  630. };
  631. /*
  632. * Packet reception for STA firmware.
  633. */
  634. struct mwl8k_rxd_sta {
  635. __le16 pkt_len;
  636. __u8 link_quality;
  637. __u8 noise_level;
  638. __le32 pkt_phys_addr;
  639. __le32 next_rxd_phys_addr;
  640. __le16 qos_control;
  641. __le16 rate_info;
  642. __le32 pad0[4];
  643. __u8 rssi;
  644. __u8 channel;
  645. __le16 pad1;
  646. __u8 rx_ctrl;
  647. __u8 rx_status;
  648. __u8 pad2[2];
  649. } __attribute__((packed));
  650. #define MWL8K_STA_RATE_INFO_SHORTPRE 0x8000
  651. #define MWL8K_STA_RATE_INFO_ANTSELECT(x) (((x) >> 11) & 0x3)
  652. #define MWL8K_STA_RATE_INFO_RATEID(x) (((x) >> 3) & 0x3f)
  653. #define MWL8K_STA_RATE_INFO_40MHZ 0x0004
  654. #define MWL8K_STA_RATE_INFO_SHORTGI 0x0002
  655. #define MWL8K_STA_RATE_INFO_MCS_FORMAT 0x0001
  656. #define MWL8K_STA_RX_CTRL_OWNED_BY_HOST 0x02
  657. static void mwl8k_rxd_sta_init(void *_rxd, dma_addr_t next_dma_addr)
  658. {
  659. struct mwl8k_rxd_sta *rxd = _rxd;
  660. rxd->next_rxd_phys_addr = cpu_to_le32(next_dma_addr);
  661. rxd->rx_ctrl = MWL8K_STA_RX_CTRL_OWNED_BY_HOST;
  662. }
  663. static void mwl8k_rxd_sta_refill(void *_rxd, dma_addr_t addr, int len)
  664. {
  665. struct mwl8k_rxd_sta *rxd = _rxd;
  666. rxd->pkt_len = cpu_to_le16(len);
  667. rxd->pkt_phys_addr = cpu_to_le32(addr);
  668. wmb();
  669. rxd->rx_ctrl = 0;
  670. }
  671. static int
  672. mwl8k_rxd_sta_process(void *_rxd, struct ieee80211_rx_status *status,
  673. __le16 *qos)
  674. {
  675. struct mwl8k_rxd_sta *rxd = _rxd;
  676. u16 rate_info;
  677. if (!(rxd->rx_ctrl & MWL8K_STA_RX_CTRL_OWNED_BY_HOST))
  678. return -1;
  679. rmb();
  680. rate_info = le16_to_cpu(rxd->rate_info);
  681. memset(status, 0, sizeof(*status));
  682. status->signal = -rxd->rssi;
  683. status->noise = -rxd->noise_level;
  684. status->antenna = MWL8K_STA_RATE_INFO_ANTSELECT(rate_info);
  685. status->rate_idx = MWL8K_STA_RATE_INFO_RATEID(rate_info);
  686. if (rate_info & MWL8K_STA_RATE_INFO_SHORTPRE)
  687. status->flag |= RX_FLAG_SHORTPRE;
  688. if (rate_info & MWL8K_STA_RATE_INFO_40MHZ)
  689. status->flag |= RX_FLAG_40MHZ;
  690. if (rate_info & MWL8K_STA_RATE_INFO_SHORTGI)
  691. status->flag |= RX_FLAG_SHORT_GI;
  692. if (rate_info & MWL8K_STA_RATE_INFO_MCS_FORMAT)
  693. status->flag |= RX_FLAG_HT;
  694. status->band = IEEE80211_BAND_2GHZ;
  695. status->freq = ieee80211_channel_to_frequency(rxd->channel);
  696. *qos = rxd->qos_control;
  697. return le16_to_cpu(rxd->pkt_len);
  698. }
  699. static struct rxd_ops rxd_sta_ops = {
  700. .rxd_size = sizeof(struct mwl8k_rxd_sta),
  701. .rxd_init = mwl8k_rxd_sta_init,
  702. .rxd_refill = mwl8k_rxd_sta_refill,
  703. .rxd_process = mwl8k_rxd_sta_process,
  704. };
  705. #define MWL8K_RX_DESCS 256
  706. #define MWL8K_RX_MAXSZ 3800
  707. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  708. {
  709. struct mwl8k_priv *priv = hw->priv;
  710. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  711. int size;
  712. int i;
  713. rxq->rxd_count = 0;
  714. rxq->head = 0;
  715. rxq->tail = 0;
  716. size = MWL8K_RX_DESCS * priv->rxd_ops->rxd_size;
  717. rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma);
  718. if (rxq->rxd == NULL) {
  719. printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
  720. wiphy_name(hw->wiphy));
  721. return -ENOMEM;
  722. }
  723. memset(rxq->rxd, 0, size);
  724. rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL);
  725. if (rxq->buf == NULL) {
  726. printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
  727. wiphy_name(hw->wiphy));
  728. pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma);
  729. return -ENOMEM;
  730. }
  731. memset(rxq->buf, 0, MWL8K_RX_DESCS * sizeof(*rxq->buf));
  732. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  733. int desc_size;
  734. void *rxd;
  735. int nexti;
  736. dma_addr_t next_dma_addr;
  737. desc_size = priv->rxd_ops->rxd_size;
  738. rxd = rxq->rxd + (i * priv->rxd_ops->rxd_size);
  739. nexti = i + 1;
  740. if (nexti == MWL8K_RX_DESCS)
  741. nexti = 0;
  742. next_dma_addr = rxq->rxd_dma + (nexti * desc_size);
  743. priv->rxd_ops->rxd_init(rxd, next_dma_addr);
  744. }
  745. return 0;
  746. }
  747. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  748. {
  749. struct mwl8k_priv *priv = hw->priv;
  750. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  751. int refilled;
  752. refilled = 0;
  753. while (rxq->rxd_count < MWL8K_RX_DESCS && limit--) {
  754. struct sk_buff *skb;
  755. dma_addr_t addr;
  756. int rx;
  757. void *rxd;
  758. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  759. if (skb == NULL)
  760. break;
  761. addr = pci_map_single(priv->pdev, skb->data,
  762. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE);
  763. rxq->rxd_count++;
  764. rx = rxq->tail++;
  765. if (rxq->tail == MWL8K_RX_DESCS)
  766. rxq->tail = 0;
  767. rxq->buf[rx].skb = skb;
  768. pci_unmap_addr_set(&rxq->buf[rx], dma, addr);
  769. rxd = rxq->rxd + (rx * priv->rxd_ops->rxd_size);
  770. priv->rxd_ops->rxd_refill(rxd, addr, MWL8K_RX_MAXSZ);
  771. refilled++;
  772. }
  773. return refilled;
  774. }
  775. /* Must be called only when the card's reception is completely halted */
  776. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  777. {
  778. struct mwl8k_priv *priv = hw->priv;
  779. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  780. int i;
  781. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  782. if (rxq->buf[i].skb != NULL) {
  783. pci_unmap_single(priv->pdev,
  784. pci_unmap_addr(&rxq->buf[i], dma),
  785. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  786. pci_unmap_addr_set(&rxq->buf[i], dma, 0);
  787. kfree_skb(rxq->buf[i].skb);
  788. rxq->buf[i].skb = NULL;
  789. }
  790. }
  791. kfree(rxq->buf);
  792. rxq->buf = NULL;
  793. pci_free_consistent(priv->pdev,
  794. MWL8K_RX_DESCS * priv->rxd_ops->rxd_size,
  795. rxq->rxd, rxq->rxd_dma);
  796. rxq->rxd = NULL;
  797. }
  798. /*
  799. * Scan a list of BSSIDs to process for finalize join.
  800. * Allows for extension to process multiple BSSIDs.
  801. */
  802. static inline int
  803. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  804. {
  805. return priv->capture_beacon &&
  806. ieee80211_is_beacon(wh->frame_control) &&
  807. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  808. }
  809. static inline void mwl8k_save_beacon(struct ieee80211_hw *hw,
  810. struct sk_buff *skb)
  811. {
  812. struct mwl8k_priv *priv = hw->priv;
  813. priv->capture_beacon = false;
  814. memset(priv->capture_bssid, 0, ETH_ALEN);
  815. /*
  816. * Use GFP_ATOMIC as rxq_process is called from
  817. * the primary interrupt handler, memory allocation call
  818. * must not sleep.
  819. */
  820. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  821. if (priv->beacon_skb != NULL)
  822. ieee80211_queue_work(hw, &priv->finalize_join_worker);
  823. }
  824. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  825. {
  826. struct mwl8k_priv *priv = hw->priv;
  827. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  828. int processed;
  829. processed = 0;
  830. while (rxq->rxd_count && limit--) {
  831. struct sk_buff *skb;
  832. void *rxd;
  833. int pkt_len;
  834. struct ieee80211_rx_status status;
  835. __le16 qos;
  836. skb = rxq->buf[rxq->head].skb;
  837. if (skb == NULL)
  838. break;
  839. rxd = rxq->rxd + (rxq->head * priv->rxd_ops->rxd_size);
  840. pkt_len = priv->rxd_ops->rxd_process(rxd, &status, &qos);
  841. if (pkt_len < 0)
  842. break;
  843. rxq->buf[rxq->head].skb = NULL;
  844. pci_unmap_single(priv->pdev,
  845. pci_unmap_addr(&rxq->buf[rxq->head], dma),
  846. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  847. pci_unmap_addr_set(&rxq->buf[rxq->head], dma, 0);
  848. rxq->head++;
  849. if (rxq->head == MWL8K_RX_DESCS)
  850. rxq->head = 0;
  851. rxq->rxd_count--;
  852. skb_put(skb, pkt_len);
  853. mwl8k_remove_dma_header(skb, qos);
  854. /*
  855. * Check for a pending join operation. Save a
  856. * copy of the beacon and schedule a tasklet to
  857. * send a FINALIZE_JOIN command to the firmware.
  858. */
  859. if (mwl8k_capture_bssid(priv, (void *)skb->data))
  860. mwl8k_save_beacon(hw, skb);
  861. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  862. ieee80211_rx_irqsafe(hw, skb);
  863. processed++;
  864. }
  865. return processed;
  866. }
  867. /*
  868. * Packet transmission.
  869. */
  870. #define MWL8K_TXD_STATUS_OK 0x00000001
  871. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  872. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  873. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  874. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  875. #define MWL8K_QOS_QLEN_UNSPEC 0xff00
  876. #define MWL8K_QOS_ACK_POLICY_MASK 0x0060
  877. #define MWL8K_QOS_ACK_POLICY_NORMAL 0x0000
  878. #define MWL8K_QOS_ACK_POLICY_BLOCKACK 0x0060
  879. #define MWL8K_QOS_EOSP 0x0010
  880. struct mwl8k_tx_desc {
  881. __le32 status;
  882. __u8 data_rate;
  883. __u8 tx_priority;
  884. __le16 qos_control;
  885. __le32 pkt_phys_addr;
  886. __le16 pkt_len;
  887. __u8 dest_MAC_addr[ETH_ALEN];
  888. __le32 next_txd_phys_addr;
  889. __le32 reserved;
  890. __le16 rate_info;
  891. __u8 peer_id;
  892. __u8 tx_frag_cnt;
  893. } __attribute__((packed));
  894. #define MWL8K_TX_DESCS 128
  895. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  896. {
  897. struct mwl8k_priv *priv = hw->priv;
  898. struct mwl8k_tx_queue *txq = priv->txq + index;
  899. int size;
  900. int i;
  901. memset(&txq->stats, 0, sizeof(struct ieee80211_tx_queue_stats));
  902. txq->stats.limit = MWL8K_TX_DESCS;
  903. txq->head = 0;
  904. txq->tail = 0;
  905. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  906. txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma);
  907. if (txq->txd == NULL) {
  908. printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
  909. wiphy_name(hw->wiphy));
  910. return -ENOMEM;
  911. }
  912. memset(txq->txd, 0, size);
  913. txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL);
  914. if (txq->skb == NULL) {
  915. printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
  916. wiphy_name(hw->wiphy));
  917. pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma);
  918. return -ENOMEM;
  919. }
  920. memset(txq->skb, 0, MWL8K_TX_DESCS * sizeof(*txq->skb));
  921. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  922. struct mwl8k_tx_desc *tx_desc;
  923. int nexti;
  924. tx_desc = txq->txd + i;
  925. nexti = (i + 1) % MWL8K_TX_DESCS;
  926. tx_desc->status = 0;
  927. tx_desc->next_txd_phys_addr =
  928. cpu_to_le32(txq->txd_dma + nexti * sizeof(*tx_desc));
  929. }
  930. return 0;
  931. }
  932. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  933. {
  934. iowrite32(MWL8K_H2A_INT_PPA_READY,
  935. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  936. iowrite32(MWL8K_H2A_INT_DUMMY,
  937. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  938. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  939. }
  940. static void mwl8k_dump_tx_rings(struct ieee80211_hw *hw)
  941. {
  942. struct mwl8k_priv *priv = hw->priv;
  943. int i;
  944. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  945. struct mwl8k_tx_queue *txq = priv->txq + i;
  946. int fw_owned = 0;
  947. int drv_owned = 0;
  948. int unused = 0;
  949. int desc;
  950. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  951. struct mwl8k_tx_desc *tx_desc = txq->txd + desc;
  952. u32 status;
  953. status = le32_to_cpu(tx_desc->status);
  954. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  955. fw_owned++;
  956. else
  957. drv_owned++;
  958. if (tx_desc->pkt_len == 0)
  959. unused++;
  960. }
  961. printk(KERN_ERR "%s: txq[%d] len=%d head=%d tail=%d "
  962. "fw_owned=%d drv_owned=%d unused=%d\n",
  963. wiphy_name(hw->wiphy), i,
  964. txq->stats.len, txq->head, txq->tail,
  965. fw_owned, drv_owned, unused);
  966. }
  967. }
  968. /*
  969. * Must be called with priv->fw_mutex held and tx queues stopped.
  970. */
  971. #define MWL8K_TX_WAIT_TIMEOUT_MS 5000
  972. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw)
  973. {
  974. struct mwl8k_priv *priv = hw->priv;
  975. DECLARE_COMPLETION_ONSTACK(tx_wait);
  976. int retry;
  977. int rc;
  978. might_sleep();
  979. /*
  980. * The TX queues are stopped at this point, so this test
  981. * doesn't need to take ->tx_lock.
  982. */
  983. if (!priv->pending_tx_pkts)
  984. return 0;
  985. retry = 0;
  986. rc = 0;
  987. spin_lock_bh(&priv->tx_lock);
  988. priv->tx_wait = &tx_wait;
  989. while (!rc) {
  990. int oldcount;
  991. unsigned long timeout;
  992. oldcount = priv->pending_tx_pkts;
  993. spin_unlock_bh(&priv->tx_lock);
  994. timeout = wait_for_completion_timeout(&tx_wait,
  995. msecs_to_jiffies(MWL8K_TX_WAIT_TIMEOUT_MS));
  996. spin_lock_bh(&priv->tx_lock);
  997. if (timeout) {
  998. WARN_ON(priv->pending_tx_pkts);
  999. if (retry) {
  1000. printk(KERN_NOTICE "%s: tx rings drained\n",
  1001. wiphy_name(hw->wiphy));
  1002. }
  1003. break;
  1004. }
  1005. if (priv->pending_tx_pkts < oldcount) {
  1006. printk(KERN_NOTICE "%s: waiting for tx rings "
  1007. "to drain (%d -> %d pkts)\n",
  1008. wiphy_name(hw->wiphy), oldcount,
  1009. priv->pending_tx_pkts);
  1010. retry = 1;
  1011. continue;
  1012. }
  1013. priv->tx_wait = NULL;
  1014. printk(KERN_ERR "%s: tx rings stuck for %d ms\n",
  1015. wiphy_name(hw->wiphy), MWL8K_TX_WAIT_TIMEOUT_MS);
  1016. mwl8k_dump_tx_rings(hw);
  1017. rc = -ETIMEDOUT;
  1018. }
  1019. spin_unlock_bh(&priv->tx_lock);
  1020. return rc;
  1021. }
  1022. #define MWL8K_TXD_SUCCESS(status) \
  1023. ((status) & (MWL8K_TXD_STATUS_OK | \
  1024. MWL8K_TXD_STATUS_OK_RETRY | \
  1025. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1026. static int
  1027. mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int limit, int force)
  1028. {
  1029. struct mwl8k_priv *priv = hw->priv;
  1030. struct mwl8k_tx_queue *txq = priv->txq + index;
  1031. int processed;
  1032. processed = 0;
  1033. while (txq->stats.len > 0 && limit--) {
  1034. int tx;
  1035. struct mwl8k_tx_desc *tx_desc;
  1036. unsigned long addr;
  1037. int size;
  1038. struct sk_buff *skb;
  1039. struct ieee80211_tx_info *info;
  1040. u32 status;
  1041. tx = txq->head;
  1042. tx_desc = txq->txd + tx;
  1043. status = le32_to_cpu(tx_desc->status);
  1044. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1045. if (!force)
  1046. break;
  1047. tx_desc->status &=
  1048. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1049. }
  1050. txq->head = (tx + 1) % MWL8K_TX_DESCS;
  1051. BUG_ON(txq->stats.len == 0);
  1052. txq->stats.len--;
  1053. priv->pending_tx_pkts--;
  1054. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1055. size = le16_to_cpu(tx_desc->pkt_len);
  1056. skb = txq->skb[tx];
  1057. txq->skb[tx] = NULL;
  1058. BUG_ON(skb == NULL);
  1059. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1060. mwl8k_remove_dma_header(skb, tx_desc->qos_control);
  1061. /* Mark descriptor as unused */
  1062. tx_desc->pkt_phys_addr = 0;
  1063. tx_desc->pkt_len = 0;
  1064. info = IEEE80211_SKB_CB(skb);
  1065. ieee80211_tx_info_clear_status(info);
  1066. if (MWL8K_TXD_SUCCESS(status))
  1067. info->flags |= IEEE80211_TX_STAT_ACK;
  1068. ieee80211_tx_status_irqsafe(hw, skb);
  1069. processed++;
  1070. }
  1071. if (processed && priv->radio_on && !mutex_is_locked(&priv->fw_mutex))
  1072. ieee80211_wake_queue(hw, index);
  1073. return processed;
  1074. }
  1075. /* must be called only when the card's transmit is completely halted */
  1076. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1077. {
  1078. struct mwl8k_priv *priv = hw->priv;
  1079. struct mwl8k_tx_queue *txq = priv->txq + index;
  1080. mwl8k_txq_reclaim(hw, index, INT_MAX, 1);
  1081. kfree(txq->skb);
  1082. txq->skb = NULL;
  1083. pci_free_consistent(priv->pdev,
  1084. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1085. txq->txd, txq->txd_dma);
  1086. txq->txd = NULL;
  1087. }
  1088. static int
  1089. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1090. {
  1091. struct mwl8k_priv *priv = hw->priv;
  1092. struct ieee80211_tx_info *tx_info;
  1093. struct mwl8k_vif *mwl8k_vif;
  1094. struct ieee80211_hdr *wh;
  1095. struct mwl8k_tx_queue *txq;
  1096. struct mwl8k_tx_desc *tx;
  1097. dma_addr_t dma;
  1098. u32 txstatus;
  1099. u8 txdatarate;
  1100. u16 qos;
  1101. wh = (struct ieee80211_hdr *)skb->data;
  1102. if (ieee80211_is_data_qos(wh->frame_control))
  1103. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1104. else
  1105. qos = 0;
  1106. mwl8k_add_dma_header(skb);
  1107. wh = &((struct mwl8k_dma_data *)skb->data)->wh;
  1108. tx_info = IEEE80211_SKB_CB(skb);
  1109. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1110. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1111. u16 seqno = mwl8k_vif->seqno;
  1112. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1113. wh->seq_ctrl |= cpu_to_le16(seqno << 4);
  1114. mwl8k_vif->seqno = seqno++ % 4096;
  1115. }
  1116. /* Setup firmware control bit fields for each frame type. */
  1117. txstatus = 0;
  1118. txdatarate = 0;
  1119. if (ieee80211_is_mgmt(wh->frame_control) ||
  1120. ieee80211_is_ctl(wh->frame_control)) {
  1121. txdatarate = 0;
  1122. qos |= MWL8K_QOS_QLEN_UNSPEC | MWL8K_QOS_EOSP;
  1123. } else if (ieee80211_is_data(wh->frame_control)) {
  1124. txdatarate = 1;
  1125. if (is_multicast_ether_addr(wh->addr1))
  1126. txstatus |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1127. qos &= ~MWL8K_QOS_ACK_POLICY_MASK;
  1128. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU)
  1129. qos |= MWL8K_QOS_ACK_POLICY_BLOCKACK;
  1130. else
  1131. qos |= MWL8K_QOS_ACK_POLICY_NORMAL;
  1132. }
  1133. dma = pci_map_single(priv->pdev, skb->data,
  1134. skb->len, PCI_DMA_TODEVICE);
  1135. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1136. printk(KERN_DEBUG "%s: failed to dma map skb, "
  1137. "dropping TX frame.\n", wiphy_name(hw->wiphy));
  1138. dev_kfree_skb(skb);
  1139. return NETDEV_TX_OK;
  1140. }
  1141. spin_lock_bh(&priv->tx_lock);
  1142. txq = priv->txq + index;
  1143. BUG_ON(txq->skb[txq->tail] != NULL);
  1144. txq->skb[txq->tail] = skb;
  1145. tx = txq->txd + txq->tail;
  1146. tx->data_rate = txdatarate;
  1147. tx->tx_priority = index;
  1148. tx->qos_control = cpu_to_le16(qos);
  1149. tx->pkt_phys_addr = cpu_to_le32(dma);
  1150. tx->pkt_len = cpu_to_le16(skb->len);
  1151. tx->rate_info = 0;
  1152. if (!priv->ap_fw && tx_info->control.sta != NULL)
  1153. tx->peer_id = MWL8K_STA(tx_info->control.sta)->peer_id;
  1154. else
  1155. tx->peer_id = 0;
  1156. wmb();
  1157. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED | txstatus);
  1158. txq->stats.count++;
  1159. txq->stats.len++;
  1160. priv->pending_tx_pkts++;
  1161. txq->tail++;
  1162. if (txq->tail == MWL8K_TX_DESCS)
  1163. txq->tail = 0;
  1164. if (txq->head == txq->tail)
  1165. ieee80211_stop_queue(hw, index);
  1166. mwl8k_tx_start(priv);
  1167. spin_unlock_bh(&priv->tx_lock);
  1168. return NETDEV_TX_OK;
  1169. }
  1170. /*
  1171. * Firmware access.
  1172. *
  1173. * We have the following requirements for issuing firmware commands:
  1174. * - Some commands require that the packet transmit path is idle when
  1175. * the command is issued. (For simplicity, we'll just quiesce the
  1176. * transmit path for every command.)
  1177. * - There are certain sequences of commands that need to be issued to
  1178. * the hardware sequentially, with no other intervening commands.
  1179. *
  1180. * This leads to an implementation of a "firmware lock" as a mutex that
  1181. * can be taken recursively, and which is taken by both the low-level
  1182. * command submission function (mwl8k_post_cmd) as well as any users of
  1183. * that function that require issuing of an atomic sequence of commands,
  1184. * and quiesces the transmit path whenever it's taken.
  1185. */
  1186. static int mwl8k_fw_lock(struct ieee80211_hw *hw)
  1187. {
  1188. struct mwl8k_priv *priv = hw->priv;
  1189. if (priv->fw_mutex_owner != current) {
  1190. int rc;
  1191. mutex_lock(&priv->fw_mutex);
  1192. ieee80211_stop_queues(hw);
  1193. rc = mwl8k_tx_wait_empty(hw);
  1194. if (rc) {
  1195. ieee80211_wake_queues(hw);
  1196. mutex_unlock(&priv->fw_mutex);
  1197. return rc;
  1198. }
  1199. priv->fw_mutex_owner = current;
  1200. }
  1201. priv->fw_mutex_depth++;
  1202. return 0;
  1203. }
  1204. static void mwl8k_fw_unlock(struct ieee80211_hw *hw)
  1205. {
  1206. struct mwl8k_priv *priv = hw->priv;
  1207. if (!--priv->fw_mutex_depth) {
  1208. ieee80211_wake_queues(hw);
  1209. priv->fw_mutex_owner = NULL;
  1210. mutex_unlock(&priv->fw_mutex);
  1211. }
  1212. }
  1213. /*
  1214. * Command processing.
  1215. */
  1216. /* Timeout firmware commands after 10s */
  1217. #define MWL8K_CMD_TIMEOUT_MS 10000
  1218. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1219. {
  1220. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1221. struct mwl8k_priv *priv = hw->priv;
  1222. void __iomem *regs = priv->regs;
  1223. dma_addr_t dma_addr;
  1224. unsigned int dma_size;
  1225. int rc;
  1226. unsigned long timeout = 0;
  1227. u8 buf[32];
  1228. cmd->result = 0xffff;
  1229. dma_size = le16_to_cpu(cmd->length);
  1230. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1231. PCI_DMA_BIDIRECTIONAL);
  1232. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1233. return -ENOMEM;
  1234. rc = mwl8k_fw_lock(hw);
  1235. if (rc) {
  1236. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1237. PCI_DMA_BIDIRECTIONAL);
  1238. return rc;
  1239. }
  1240. priv->hostcmd_wait = &cmd_wait;
  1241. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1242. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1243. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1244. iowrite32(MWL8K_H2A_INT_DUMMY,
  1245. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1246. timeout = wait_for_completion_timeout(&cmd_wait,
  1247. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1248. priv->hostcmd_wait = NULL;
  1249. mwl8k_fw_unlock(hw);
  1250. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1251. PCI_DMA_BIDIRECTIONAL);
  1252. if (!timeout) {
  1253. printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
  1254. wiphy_name(hw->wiphy),
  1255. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1256. MWL8K_CMD_TIMEOUT_MS);
  1257. rc = -ETIMEDOUT;
  1258. } else {
  1259. int ms;
  1260. ms = MWL8K_CMD_TIMEOUT_MS - jiffies_to_msecs(timeout);
  1261. rc = cmd->result ? -EINVAL : 0;
  1262. if (rc)
  1263. printk(KERN_ERR "%s: Command %s error 0x%x\n",
  1264. wiphy_name(hw->wiphy),
  1265. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1266. le16_to_cpu(cmd->result));
  1267. else if (ms > 2000)
  1268. printk(KERN_NOTICE "%s: Command %s took %d ms\n",
  1269. wiphy_name(hw->wiphy),
  1270. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1271. ms);
  1272. }
  1273. return rc;
  1274. }
  1275. /*
  1276. * CMD_GET_HW_SPEC (STA version).
  1277. */
  1278. struct mwl8k_cmd_get_hw_spec_sta {
  1279. struct mwl8k_cmd_pkt header;
  1280. __u8 hw_rev;
  1281. __u8 host_interface;
  1282. __le16 num_mcaddrs;
  1283. __u8 perm_addr[ETH_ALEN];
  1284. __le16 region_code;
  1285. __le32 fw_rev;
  1286. __le32 ps_cookie;
  1287. __le32 caps;
  1288. __u8 mcs_bitmap[16];
  1289. __le32 rx_queue_ptr;
  1290. __le32 num_tx_queues;
  1291. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1292. __le32 caps2;
  1293. __le32 num_tx_desc_per_queue;
  1294. __le32 total_rxd;
  1295. } __attribute__((packed));
  1296. #define MWL8K_CAP_MAX_AMSDU 0x20000000
  1297. #define MWL8K_CAP_GREENFIELD 0x08000000
  1298. #define MWL8K_CAP_AMPDU 0x04000000
  1299. #define MWL8K_CAP_RX_STBC 0x01000000
  1300. #define MWL8K_CAP_TX_STBC 0x00800000
  1301. #define MWL8K_CAP_SHORTGI_40MHZ 0x00400000
  1302. #define MWL8K_CAP_SHORTGI_20MHZ 0x00200000
  1303. #define MWL8K_CAP_RX_ANTENNA_MASK 0x000e0000
  1304. #define MWL8K_CAP_TX_ANTENNA_MASK 0x0001c000
  1305. #define MWL8K_CAP_DELAY_BA 0x00003000
  1306. #define MWL8K_CAP_MIMO 0x00000200
  1307. #define MWL8K_CAP_40MHZ 0x00000100
  1308. static void mwl8k_set_ht_caps(struct ieee80211_hw *hw, u32 cap)
  1309. {
  1310. struct mwl8k_priv *priv = hw->priv;
  1311. int rx_streams;
  1312. int tx_streams;
  1313. priv->band.ht_cap.ht_supported = 1;
  1314. if (cap & MWL8K_CAP_MAX_AMSDU)
  1315. priv->band.ht_cap.cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  1316. if (cap & MWL8K_CAP_GREENFIELD)
  1317. priv->band.ht_cap.cap |= IEEE80211_HT_CAP_GRN_FLD;
  1318. if (cap & MWL8K_CAP_AMPDU) {
  1319. hw->flags |= IEEE80211_HW_AMPDU_AGGREGATION;
  1320. priv->band.ht_cap.ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
  1321. priv->band.ht_cap.ampdu_density =
  1322. IEEE80211_HT_MPDU_DENSITY_NONE;
  1323. }
  1324. if (cap & MWL8K_CAP_RX_STBC)
  1325. priv->band.ht_cap.cap |= IEEE80211_HT_CAP_RX_STBC;
  1326. if (cap & MWL8K_CAP_TX_STBC)
  1327. priv->band.ht_cap.cap |= IEEE80211_HT_CAP_TX_STBC;
  1328. if (cap & MWL8K_CAP_SHORTGI_40MHZ)
  1329. priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SGI_40;
  1330. if (cap & MWL8K_CAP_SHORTGI_20MHZ)
  1331. priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SGI_20;
  1332. if (cap & MWL8K_CAP_DELAY_BA)
  1333. priv->band.ht_cap.cap |= IEEE80211_HT_CAP_DELAY_BA;
  1334. if (cap & MWL8K_CAP_40MHZ)
  1335. priv->band.ht_cap.cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  1336. rx_streams = hweight32(cap & MWL8K_CAP_RX_ANTENNA_MASK);
  1337. tx_streams = hweight32(cap & MWL8K_CAP_TX_ANTENNA_MASK);
  1338. priv->band.ht_cap.mcs.rx_mask[0] = 0xff;
  1339. if (rx_streams >= 2)
  1340. priv->band.ht_cap.mcs.rx_mask[1] = 0xff;
  1341. if (rx_streams >= 3)
  1342. priv->band.ht_cap.mcs.rx_mask[2] = 0xff;
  1343. priv->band.ht_cap.mcs.rx_mask[4] = 0x01;
  1344. priv->band.ht_cap.mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  1345. if (rx_streams != tx_streams) {
  1346. priv->band.ht_cap.mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  1347. priv->band.ht_cap.mcs.tx_params |= (tx_streams - 1) <<
  1348. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  1349. }
  1350. }
  1351. static int mwl8k_cmd_get_hw_spec_sta(struct ieee80211_hw *hw)
  1352. {
  1353. struct mwl8k_priv *priv = hw->priv;
  1354. struct mwl8k_cmd_get_hw_spec_sta *cmd;
  1355. int rc;
  1356. int i;
  1357. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1358. if (cmd == NULL)
  1359. return -ENOMEM;
  1360. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1361. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1362. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1363. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1364. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1365. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1366. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1367. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1368. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1369. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1370. rc = mwl8k_post_cmd(hw, &cmd->header);
  1371. if (!rc) {
  1372. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1373. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1374. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1375. priv->hw_rev = cmd->hw_rev;
  1376. if (cmd->caps & cpu_to_le32(MWL8K_CAP_MIMO))
  1377. mwl8k_set_ht_caps(hw, le32_to_cpu(cmd->caps));
  1378. }
  1379. kfree(cmd);
  1380. return rc;
  1381. }
  1382. /*
  1383. * CMD_GET_HW_SPEC (AP version).
  1384. */
  1385. struct mwl8k_cmd_get_hw_spec_ap {
  1386. struct mwl8k_cmd_pkt header;
  1387. __u8 hw_rev;
  1388. __u8 host_interface;
  1389. __le16 num_wcb;
  1390. __le16 num_mcaddrs;
  1391. __u8 perm_addr[ETH_ALEN];
  1392. __le16 region_code;
  1393. __le16 num_antenna;
  1394. __le32 fw_rev;
  1395. __le32 wcbbase0;
  1396. __le32 rxwrptr;
  1397. __le32 rxrdptr;
  1398. __le32 ps_cookie;
  1399. __le32 wcbbase1;
  1400. __le32 wcbbase2;
  1401. __le32 wcbbase3;
  1402. } __attribute__((packed));
  1403. static int mwl8k_cmd_get_hw_spec_ap(struct ieee80211_hw *hw)
  1404. {
  1405. struct mwl8k_priv *priv = hw->priv;
  1406. struct mwl8k_cmd_get_hw_spec_ap *cmd;
  1407. int rc;
  1408. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1409. if (cmd == NULL)
  1410. return -ENOMEM;
  1411. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1412. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1413. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1414. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1415. rc = mwl8k_post_cmd(hw, &cmd->header);
  1416. if (!rc) {
  1417. int off;
  1418. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1419. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1420. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1421. priv->hw_rev = cmd->hw_rev;
  1422. off = le32_to_cpu(cmd->wcbbase0) & 0xffff;
  1423. iowrite32(cpu_to_le32(priv->txq[0].txd_dma), priv->sram + off);
  1424. off = le32_to_cpu(cmd->rxwrptr) & 0xffff;
  1425. iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
  1426. off = le32_to_cpu(cmd->rxrdptr) & 0xffff;
  1427. iowrite32(cpu_to_le32(priv->rxq[0].rxd_dma), priv->sram + off);
  1428. off = le32_to_cpu(cmd->wcbbase1) & 0xffff;
  1429. iowrite32(cpu_to_le32(priv->txq[1].txd_dma), priv->sram + off);
  1430. off = le32_to_cpu(cmd->wcbbase2) & 0xffff;
  1431. iowrite32(cpu_to_le32(priv->txq[2].txd_dma), priv->sram + off);
  1432. off = le32_to_cpu(cmd->wcbbase3) & 0xffff;
  1433. iowrite32(cpu_to_le32(priv->txq[3].txd_dma), priv->sram + off);
  1434. }
  1435. kfree(cmd);
  1436. return rc;
  1437. }
  1438. /*
  1439. * CMD_SET_HW_SPEC.
  1440. */
  1441. struct mwl8k_cmd_set_hw_spec {
  1442. struct mwl8k_cmd_pkt header;
  1443. __u8 hw_rev;
  1444. __u8 host_interface;
  1445. __le16 num_mcaddrs;
  1446. __u8 perm_addr[ETH_ALEN];
  1447. __le16 region_code;
  1448. __le32 fw_rev;
  1449. __le32 ps_cookie;
  1450. __le32 caps;
  1451. __le32 rx_queue_ptr;
  1452. __le32 num_tx_queues;
  1453. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1454. __le32 flags;
  1455. __le32 num_tx_desc_per_queue;
  1456. __le32 total_rxd;
  1457. } __attribute__((packed));
  1458. #define MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT 0x00000080
  1459. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP 0x00000020
  1460. #define MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON 0x00000010
  1461. static int mwl8k_cmd_set_hw_spec(struct ieee80211_hw *hw)
  1462. {
  1463. struct mwl8k_priv *priv = hw->priv;
  1464. struct mwl8k_cmd_set_hw_spec *cmd;
  1465. int rc;
  1466. int i;
  1467. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1468. if (cmd == NULL)
  1469. return -ENOMEM;
  1470. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_HW_SPEC);
  1471. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1472. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1473. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rxd_dma);
  1474. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1475. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1476. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].txd_dma);
  1477. cmd->flags = cpu_to_le32(MWL8K_SET_HW_SPEC_FLAG_HOST_DECR_MGMT |
  1478. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_PROBERESP |
  1479. MWL8K_SET_HW_SPEC_FLAG_HOSTFORM_BEACON);
  1480. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1481. cmd->total_rxd = cpu_to_le32(MWL8K_RX_DESCS);
  1482. rc = mwl8k_post_cmd(hw, &cmd->header);
  1483. kfree(cmd);
  1484. return rc;
  1485. }
  1486. /*
  1487. * CMD_MAC_MULTICAST_ADR.
  1488. */
  1489. struct mwl8k_cmd_mac_multicast_adr {
  1490. struct mwl8k_cmd_pkt header;
  1491. __le16 action;
  1492. __le16 numaddr;
  1493. __u8 addr[0][ETH_ALEN];
  1494. };
  1495. #define MWL8K_ENABLE_RX_DIRECTED 0x0001
  1496. #define MWL8K_ENABLE_RX_MULTICAST 0x0002
  1497. #define MWL8K_ENABLE_RX_ALL_MULTICAST 0x0004
  1498. #define MWL8K_ENABLE_RX_BROADCAST 0x0008
  1499. static struct mwl8k_cmd_pkt *
  1500. __mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw, int allmulti,
  1501. int mc_count, struct dev_addr_list *mclist)
  1502. {
  1503. struct mwl8k_priv *priv = hw->priv;
  1504. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1505. int size;
  1506. if (allmulti || mc_count > priv->num_mcaddrs) {
  1507. allmulti = 1;
  1508. mc_count = 0;
  1509. }
  1510. size = sizeof(*cmd) + mc_count * ETH_ALEN;
  1511. cmd = kzalloc(size, GFP_ATOMIC);
  1512. if (cmd == NULL)
  1513. return NULL;
  1514. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1515. cmd->header.length = cpu_to_le16(size);
  1516. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_DIRECTED |
  1517. MWL8K_ENABLE_RX_BROADCAST);
  1518. if (allmulti) {
  1519. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_ALL_MULTICAST);
  1520. } else if (mc_count) {
  1521. int i;
  1522. cmd->action |= cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1523. cmd->numaddr = cpu_to_le16(mc_count);
  1524. for (i = 0; i < mc_count && mclist; i++) {
  1525. if (mclist->da_addrlen != ETH_ALEN) {
  1526. kfree(cmd);
  1527. return NULL;
  1528. }
  1529. memcpy(cmd->addr[i], mclist->da_addr, ETH_ALEN);
  1530. mclist = mclist->next;
  1531. }
  1532. }
  1533. return &cmd->header;
  1534. }
  1535. /*
  1536. * CMD_GET_STAT.
  1537. */
  1538. struct mwl8k_cmd_get_stat {
  1539. struct mwl8k_cmd_pkt header;
  1540. __le32 stats[64];
  1541. } __attribute__((packed));
  1542. #define MWL8K_STAT_ACK_FAILURE 9
  1543. #define MWL8K_STAT_RTS_FAILURE 12
  1544. #define MWL8K_STAT_FCS_ERROR 24
  1545. #define MWL8K_STAT_RTS_SUCCESS 11
  1546. static int mwl8k_cmd_get_stat(struct ieee80211_hw *hw,
  1547. struct ieee80211_low_level_stats *stats)
  1548. {
  1549. struct mwl8k_cmd_get_stat *cmd;
  1550. int rc;
  1551. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1552. if (cmd == NULL)
  1553. return -ENOMEM;
  1554. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1555. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1556. rc = mwl8k_post_cmd(hw, &cmd->header);
  1557. if (!rc) {
  1558. stats->dot11ACKFailureCount =
  1559. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1560. stats->dot11RTSFailureCount =
  1561. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1562. stats->dot11FCSErrorCount =
  1563. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1564. stats->dot11RTSSuccessCount =
  1565. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1566. }
  1567. kfree(cmd);
  1568. return rc;
  1569. }
  1570. /*
  1571. * CMD_RADIO_CONTROL.
  1572. */
  1573. struct mwl8k_cmd_radio_control {
  1574. struct mwl8k_cmd_pkt header;
  1575. __le16 action;
  1576. __le16 control;
  1577. __le16 radio_on;
  1578. } __attribute__((packed));
  1579. static int
  1580. mwl8k_cmd_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  1581. {
  1582. struct mwl8k_priv *priv = hw->priv;
  1583. struct mwl8k_cmd_radio_control *cmd;
  1584. int rc;
  1585. if (enable == priv->radio_on && !force)
  1586. return 0;
  1587. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1588. if (cmd == NULL)
  1589. return -ENOMEM;
  1590. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1591. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1592. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1593. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  1594. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1595. rc = mwl8k_post_cmd(hw, &cmd->header);
  1596. kfree(cmd);
  1597. if (!rc)
  1598. priv->radio_on = enable;
  1599. return rc;
  1600. }
  1601. static int mwl8k_cmd_radio_disable(struct ieee80211_hw *hw)
  1602. {
  1603. return mwl8k_cmd_radio_control(hw, 0, 0);
  1604. }
  1605. static int mwl8k_cmd_radio_enable(struct ieee80211_hw *hw)
  1606. {
  1607. return mwl8k_cmd_radio_control(hw, 1, 0);
  1608. }
  1609. static int
  1610. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1611. {
  1612. struct mwl8k_priv *priv = hw->priv;
  1613. priv->radio_short_preamble = short_preamble;
  1614. return mwl8k_cmd_radio_control(hw, 1, 1);
  1615. }
  1616. /*
  1617. * CMD_RF_TX_POWER.
  1618. */
  1619. #define MWL8K_TX_POWER_LEVEL_TOTAL 8
  1620. struct mwl8k_cmd_rf_tx_power {
  1621. struct mwl8k_cmd_pkt header;
  1622. __le16 action;
  1623. __le16 support_level;
  1624. __le16 current_level;
  1625. __le16 reserved;
  1626. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1627. } __attribute__((packed));
  1628. static int mwl8k_cmd_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1629. {
  1630. struct mwl8k_cmd_rf_tx_power *cmd;
  1631. int rc;
  1632. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1633. if (cmd == NULL)
  1634. return -ENOMEM;
  1635. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1636. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1637. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1638. cmd->support_level = cpu_to_le16(dBm);
  1639. rc = mwl8k_post_cmd(hw, &cmd->header);
  1640. kfree(cmd);
  1641. return rc;
  1642. }
  1643. /*
  1644. * CMD_RF_ANTENNA.
  1645. */
  1646. struct mwl8k_cmd_rf_antenna {
  1647. struct mwl8k_cmd_pkt header;
  1648. __le16 antenna;
  1649. __le16 mode;
  1650. } __attribute__((packed));
  1651. #define MWL8K_RF_ANTENNA_RX 1
  1652. #define MWL8K_RF_ANTENNA_TX 2
  1653. static int
  1654. mwl8k_cmd_rf_antenna(struct ieee80211_hw *hw, int antenna, int mask)
  1655. {
  1656. struct mwl8k_cmd_rf_antenna *cmd;
  1657. int rc;
  1658. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1659. if (cmd == NULL)
  1660. return -ENOMEM;
  1661. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_ANTENNA);
  1662. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1663. cmd->antenna = cpu_to_le16(antenna);
  1664. cmd->mode = cpu_to_le16(mask);
  1665. rc = mwl8k_post_cmd(hw, &cmd->header);
  1666. kfree(cmd);
  1667. return rc;
  1668. }
  1669. /*
  1670. * CMD_SET_BEACON.
  1671. */
  1672. struct mwl8k_cmd_set_beacon {
  1673. struct mwl8k_cmd_pkt header;
  1674. __le16 beacon_len;
  1675. __u8 beacon[0];
  1676. };
  1677. static int mwl8k_cmd_set_beacon(struct ieee80211_hw *hw, u8 *beacon, int len)
  1678. {
  1679. struct mwl8k_cmd_set_beacon *cmd;
  1680. int rc;
  1681. cmd = kzalloc(sizeof(*cmd) + len, GFP_KERNEL);
  1682. if (cmd == NULL)
  1683. return -ENOMEM;
  1684. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_BEACON);
  1685. cmd->header.length = cpu_to_le16(sizeof(*cmd) + len);
  1686. cmd->beacon_len = cpu_to_le16(len);
  1687. memcpy(cmd->beacon, beacon, len);
  1688. rc = mwl8k_post_cmd(hw, &cmd->header);
  1689. kfree(cmd);
  1690. return rc;
  1691. }
  1692. /*
  1693. * CMD_SET_PRE_SCAN.
  1694. */
  1695. struct mwl8k_cmd_set_pre_scan {
  1696. struct mwl8k_cmd_pkt header;
  1697. } __attribute__((packed));
  1698. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1699. {
  1700. struct mwl8k_cmd_set_pre_scan *cmd;
  1701. int rc;
  1702. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1703. if (cmd == NULL)
  1704. return -ENOMEM;
  1705. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1706. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1707. rc = mwl8k_post_cmd(hw, &cmd->header);
  1708. kfree(cmd);
  1709. return rc;
  1710. }
  1711. /*
  1712. * CMD_SET_POST_SCAN.
  1713. */
  1714. struct mwl8k_cmd_set_post_scan {
  1715. struct mwl8k_cmd_pkt header;
  1716. __le32 isibss;
  1717. __u8 bssid[ETH_ALEN];
  1718. } __attribute__((packed));
  1719. static int
  1720. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, const __u8 *mac)
  1721. {
  1722. struct mwl8k_cmd_set_post_scan *cmd;
  1723. int rc;
  1724. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1725. if (cmd == NULL)
  1726. return -ENOMEM;
  1727. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1728. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1729. cmd->isibss = 0;
  1730. memcpy(cmd->bssid, mac, ETH_ALEN);
  1731. rc = mwl8k_post_cmd(hw, &cmd->header);
  1732. kfree(cmd);
  1733. return rc;
  1734. }
  1735. /*
  1736. * CMD_SET_RF_CHANNEL.
  1737. */
  1738. struct mwl8k_cmd_set_rf_channel {
  1739. struct mwl8k_cmd_pkt header;
  1740. __le16 action;
  1741. __u8 current_channel;
  1742. __le32 channel_flags;
  1743. } __attribute__((packed));
  1744. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1745. struct ieee80211_conf *conf)
  1746. {
  1747. struct ieee80211_channel *channel = conf->channel;
  1748. struct mwl8k_cmd_set_rf_channel *cmd;
  1749. int rc;
  1750. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1751. if (cmd == NULL)
  1752. return -ENOMEM;
  1753. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1754. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1755. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1756. cmd->current_channel = channel->hw_value;
  1757. if (channel->band == IEEE80211_BAND_2GHZ)
  1758. cmd->channel_flags |= cpu_to_le32(0x00000001);
  1759. if (conf->channel_type == NL80211_CHAN_NO_HT ||
  1760. conf->channel_type == NL80211_CHAN_HT20)
  1761. cmd->channel_flags |= cpu_to_le32(0x00000080);
  1762. else if (conf->channel_type == NL80211_CHAN_HT40MINUS)
  1763. cmd->channel_flags |= cpu_to_le32(0x000001900);
  1764. else if (conf->channel_type == NL80211_CHAN_HT40PLUS)
  1765. cmd->channel_flags |= cpu_to_le32(0x000000900);
  1766. rc = mwl8k_post_cmd(hw, &cmd->header);
  1767. kfree(cmd);
  1768. return rc;
  1769. }
  1770. /*
  1771. * CMD_SET_AID.
  1772. */
  1773. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1774. #define MWL8K_FRAME_PROT_11G 0x07
  1775. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1776. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1777. struct mwl8k_cmd_update_set_aid {
  1778. struct mwl8k_cmd_pkt header;
  1779. __le16 aid;
  1780. /* AP's MAC address (BSSID) */
  1781. __u8 bssid[ETH_ALEN];
  1782. __le16 protection_mode;
  1783. __u8 supp_rates[14];
  1784. } __attribute__((packed));
  1785. static void legacy_rate_mask_to_array(u8 *rates, u32 mask)
  1786. {
  1787. int i;
  1788. int j;
  1789. /*
  1790. * Clear nonstandard rates 4 and 13.
  1791. */
  1792. mask &= 0x1fef;
  1793. for (i = 0, j = 0; i < 14; i++) {
  1794. if (mask & (1 << i))
  1795. rates[j++] = mwl8k_rates[i].hw_value;
  1796. }
  1797. }
  1798. static int
  1799. mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  1800. struct ieee80211_vif *vif, u32 legacy_rate_mask)
  1801. {
  1802. struct mwl8k_cmd_update_set_aid *cmd;
  1803. u16 prot_mode;
  1804. int rc;
  1805. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1806. if (cmd == NULL)
  1807. return -ENOMEM;
  1808. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  1809. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1810. cmd->aid = cpu_to_le16(vif->bss_conf.aid);
  1811. memcpy(cmd->bssid, vif->bss_conf.bssid, ETH_ALEN);
  1812. if (vif->bss_conf.use_cts_prot) {
  1813. prot_mode = MWL8K_FRAME_PROT_11G;
  1814. } else {
  1815. switch (vif->bss_conf.ht_operation_mode &
  1816. IEEE80211_HT_OP_MODE_PROTECTION) {
  1817. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  1818. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  1819. break;
  1820. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  1821. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  1822. break;
  1823. default:
  1824. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1825. break;
  1826. }
  1827. }
  1828. cmd->protection_mode = cpu_to_le16(prot_mode);
  1829. legacy_rate_mask_to_array(cmd->supp_rates, legacy_rate_mask);
  1830. rc = mwl8k_post_cmd(hw, &cmd->header);
  1831. kfree(cmd);
  1832. return rc;
  1833. }
  1834. /*
  1835. * CMD_SET_RATE.
  1836. */
  1837. struct mwl8k_cmd_set_rate {
  1838. struct mwl8k_cmd_pkt header;
  1839. __u8 legacy_rates[14];
  1840. /* Bitmap for supported MCS codes. */
  1841. __u8 mcs_set[16];
  1842. __u8 reserved[16];
  1843. } __attribute__((packed));
  1844. static int
  1845. mwl8k_cmd_set_rate(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1846. u32 legacy_rate_mask, u8 *mcs_rates)
  1847. {
  1848. struct mwl8k_cmd_set_rate *cmd;
  1849. int rc;
  1850. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1851. if (cmd == NULL)
  1852. return -ENOMEM;
  1853. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  1854. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1855. legacy_rate_mask_to_array(cmd->legacy_rates, legacy_rate_mask);
  1856. memcpy(cmd->mcs_set, mcs_rates, 16);
  1857. rc = mwl8k_post_cmd(hw, &cmd->header);
  1858. kfree(cmd);
  1859. return rc;
  1860. }
  1861. /*
  1862. * CMD_FINALIZE_JOIN.
  1863. */
  1864. #define MWL8K_FJ_BEACON_MAXLEN 128
  1865. struct mwl8k_cmd_finalize_join {
  1866. struct mwl8k_cmd_pkt header;
  1867. __le32 sleep_interval; /* Number of beacon periods to sleep */
  1868. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  1869. } __attribute__((packed));
  1870. static int mwl8k_cmd_finalize_join(struct ieee80211_hw *hw, void *frame,
  1871. int framelen, int dtim)
  1872. {
  1873. struct mwl8k_cmd_finalize_join *cmd;
  1874. struct ieee80211_mgmt *payload = frame;
  1875. int payload_len;
  1876. int rc;
  1877. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1878. if (cmd == NULL)
  1879. return -ENOMEM;
  1880. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  1881. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1882. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  1883. payload_len = framelen - ieee80211_hdrlen(payload->frame_control);
  1884. if (payload_len < 0)
  1885. payload_len = 0;
  1886. else if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1887. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  1888. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  1889. rc = mwl8k_post_cmd(hw, &cmd->header);
  1890. kfree(cmd);
  1891. return rc;
  1892. }
  1893. /*
  1894. * CMD_SET_RTS_THRESHOLD.
  1895. */
  1896. struct mwl8k_cmd_set_rts_threshold {
  1897. struct mwl8k_cmd_pkt header;
  1898. __le16 action;
  1899. __le16 threshold;
  1900. } __attribute__((packed));
  1901. static int
  1902. mwl8k_cmd_set_rts_threshold(struct ieee80211_hw *hw, int rts_thresh)
  1903. {
  1904. struct mwl8k_cmd_set_rts_threshold *cmd;
  1905. int rc;
  1906. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1907. if (cmd == NULL)
  1908. return -ENOMEM;
  1909. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  1910. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1911. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1912. cmd->threshold = cpu_to_le16(rts_thresh);
  1913. rc = mwl8k_post_cmd(hw, &cmd->header);
  1914. kfree(cmd);
  1915. return rc;
  1916. }
  1917. /*
  1918. * CMD_SET_SLOT.
  1919. */
  1920. struct mwl8k_cmd_set_slot {
  1921. struct mwl8k_cmd_pkt header;
  1922. __le16 action;
  1923. __u8 short_slot;
  1924. } __attribute__((packed));
  1925. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, bool short_slot_time)
  1926. {
  1927. struct mwl8k_cmd_set_slot *cmd;
  1928. int rc;
  1929. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1930. if (cmd == NULL)
  1931. return -ENOMEM;
  1932. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  1933. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1934. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1935. cmd->short_slot = short_slot_time;
  1936. rc = mwl8k_post_cmd(hw, &cmd->header);
  1937. kfree(cmd);
  1938. return rc;
  1939. }
  1940. /*
  1941. * CMD_SET_EDCA_PARAMS.
  1942. */
  1943. struct mwl8k_cmd_set_edca_params {
  1944. struct mwl8k_cmd_pkt header;
  1945. /* See MWL8K_SET_EDCA_XXX below */
  1946. __le16 action;
  1947. /* TX opportunity in units of 32 us */
  1948. __le16 txop;
  1949. union {
  1950. struct {
  1951. /* Log exponent of max contention period: 0...15 */
  1952. __le32 log_cw_max;
  1953. /* Log exponent of min contention period: 0...15 */
  1954. __le32 log_cw_min;
  1955. /* Adaptive interframe spacing in units of 32us */
  1956. __u8 aifs;
  1957. /* TX queue to configure */
  1958. __u8 txq;
  1959. } ap;
  1960. struct {
  1961. /* Log exponent of max contention period: 0...15 */
  1962. __u8 log_cw_max;
  1963. /* Log exponent of min contention period: 0...15 */
  1964. __u8 log_cw_min;
  1965. /* Adaptive interframe spacing in units of 32us */
  1966. __u8 aifs;
  1967. /* TX queue to configure */
  1968. __u8 txq;
  1969. } sta;
  1970. };
  1971. } __attribute__((packed));
  1972. #define MWL8K_SET_EDCA_CW 0x01
  1973. #define MWL8K_SET_EDCA_TXOP 0x02
  1974. #define MWL8K_SET_EDCA_AIFS 0x04
  1975. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  1976. MWL8K_SET_EDCA_TXOP | \
  1977. MWL8K_SET_EDCA_AIFS)
  1978. static int
  1979. mwl8k_cmd_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  1980. __u16 cw_min, __u16 cw_max,
  1981. __u8 aifs, __u16 txop)
  1982. {
  1983. struct mwl8k_priv *priv = hw->priv;
  1984. struct mwl8k_cmd_set_edca_params *cmd;
  1985. int rc;
  1986. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1987. if (cmd == NULL)
  1988. return -ENOMEM;
  1989. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  1990. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1991. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  1992. cmd->txop = cpu_to_le16(txop);
  1993. if (priv->ap_fw) {
  1994. cmd->ap.log_cw_max = cpu_to_le32(ilog2(cw_max + 1));
  1995. cmd->ap.log_cw_min = cpu_to_le32(ilog2(cw_min + 1));
  1996. cmd->ap.aifs = aifs;
  1997. cmd->ap.txq = qnum;
  1998. } else {
  1999. cmd->sta.log_cw_max = (u8)ilog2(cw_max + 1);
  2000. cmd->sta.log_cw_min = (u8)ilog2(cw_min + 1);
  2001. cmd->sta.aifs = aifs;
  2002. cmd->sta.txq = qnum;
  2003. }
  2004. rc = mwl8k_post_cmd(hw, &cmd->header);
  2005. kfree(cmd);
  2006. return rc;
  2007. }
  2008. /*
  2009. * CMD_SET_WMM_MODE.
  2010. */
  2011. struct mwl8k_cmd_set_wmm_mode {
  2012. struct mwl8k_cmd_pkt header;
  2013. __le16 action;
  2014. } __attribute__((packed));
  2015. static int mwl8k_cmd_set_wmm_mode(struct ieee80211_hw *hw, bool enable)
  2016. {
  2017. struct mwl8k_priv *priv = hw->priv;
  2018. struct mwl8k_cmd_set_wmm_mode *cmd;
  2019. int rc;
  2020. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2021. if (cmd == NULL)
  2022. return -ENOMEM;
  2023. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  2024. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2025. cmd->action = cpu_to_le16(!!enable);
  2026. rc = mwl8k_post_cmd(hw, &cmd->header);
  2027. kfree(cmd);
  2028. if (!rc)
  2029. priv->wmm_enabled = enable;
  2030. return rc;
  2031. }
  2032. /*
  2033. * CMD_MIMO_CONFIG.
  2034. */
  2035. struct mwl8k_cmd_mimo_config {
  2036. struct mwl8k_cmd_pkt header;
  2037. __le32 action;
  2038. __u8 rx_antenna_map;
  2039. __u8 tx_antenna_map;
  2040. } __attribute__((packed));
  2041. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  2042. {
  2043. struct mwl8k_cmd_mimo_config *cmd;
  2044. int rc;
  2045. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2046. if (cmd == NULL)
  2047. return -ENOMEM;
  2048. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  2049. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2050. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  2051. cmd->rx_antenna_map = rx;
  2052. cmd->tx_antenna_map = tx;
  2053. rc = mwl8k_post_cmd(hw, &cmd->header);
  2054. kfree(cmd);
  2055. return rc;
  2056. }
  2057. /*
  2058. * CMD_USE_FIXED_RATE (STA version).
  2059. */
  2060. struct mwl8k_cmd_use_fixed_rate_sta {
  2061. struct mwl8k_cmd_pkt header;
  2062. __le32 action;
  2063. __le32 allow_rate_drop;
  2064. __le32 num_rates;
  2065. struct {
  2066. __le32 is_ht_rate;
  2067. __le32 enable_retry;
  2068. __le32 rate;
  2069. __le32 retry_count;
  2070. } rate_entry[8];
  2071. __le32 rate_type;
  2072. __le32 reserved1;
  2073. __le32 reserved2;
  2074. } __attribute__((packed));
  2075. #define MWL8K_USE_AUTO_RATE 0x0002
  2076. #define MWL8K_UCAST_RATE 0
  2077. static int mwl8k_cmd_use_fixed_rate_sta(struct ieee80211_hw *hw)
  2078. {
  2079. struct mwl8k_cmd_use_fixed_rate_sta *cmd;
  2080. int rc;
  2081. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2082. if (cmd == NULL)
  2083. return -ENOMEM;
  2084. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2085. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2086. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2087. cmd->rate_type = cpu_to_le32(MWL8K_UCAST_RATE);
  2088. rc = mwl8k_post_cmd(hw, &cmd->header);
  2089. kfree(cmd);
  2090. return rc;
  2091. }
  2092. /*
  2093. * CMD_USE_FIXED_RATE (AP version).
  2094. */
  2095. struct mwl8k_cmd_use_fixed_rate_ap {
  2096. struct mwl8k_cmd_pkt header;
  2097. __le32 action;
  2098. __le32 allow_rate_drop;
  2099. __le32 num_rates;
  2100. struct mwl8k_rate_entry_ap {
  2101. __le32 is_ht_rate;
  2102. __le32 enable_retry;
  2103. __le32 rate;
  2104. __le32 retry_count;
  2105. } rate_entry[4];
  2106. u8 multicast_rate;
  2107. u8 multicast_rate_type;
  2108. u8 management_rate;
  2109. } __attribute__((packed));
  2110. static int
  2111. mwl8k_cmd_use_fixed_rate_ap(struct ieee80211_hw *hw, int mcast, int mgmt)
  2112. {
  2113. struct mwl8k_cmd_use_fixed_rate_ap *cmd;
  2114. int rc;
  2115. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2116. if (cmd == NULL)
  2117. return -ENOMEM;
  2118. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2119. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2120. cmd->action = cpu_to_le32(MWL8K_USE_AUTO_RATE);
  2121. cmd->multicast_rate = mcast;
  2122. cmd->management_rate = mgmt;
  2123. rc = mwl8k_post_cmd(hw, &cmd->header);
  2124. kfree(cmd);
  2125. return rc;
  2126. }
  2127. /*
  2128. * CMD_ENABLE_SNIFFER.
  2129. */
  2130. struct mwl8k_cmd_enable_sniffer {
  2131. struct mwl8k_cmd_pkt header;
  2132. __le32 action;
  2133. } __attribute__((packed));
  2134. static int mwl8k_cmd_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  2135. {
  2136. struct mwl8k_cmd_enable_sniffer *cmd;
  2137. int rc;
  2138. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2139. if (cmd == NULL)
  2140. return -ENOMEM;
  2141. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  2142. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2143. cmd->action = cpu_to_le32(!!enable);
  2144. rc = mwl8k_post_cmd(hw, &cmd->header);
  2145. kfree(cmd);
  2146. return rc;
  2147. }
  2148. /*
  2149. * CMD_SET_MAC_ADDR.
  2150. */
  2151. struct mwl8k_cmd_set_mac_addr {
  2152. struct mwl8k_cmd_pkt header;
  2153. union {
  2154. struct {
  2155. __le16 mac_type;
  2156. __u8 mac_addr[ETH_ALEN];
  2157. } mbss;
  2158. __u8 mac_addr[ETH_ALEN];
  2159. };
  2160. } __attribute__((packed));
  2161. #define MWL8K_MAC_TYPE_PRIMARY_CLIENT 0
  2162. #define MWL8K_MAC_TYPE_PRIMARY_AP 2
  2163. static int mwl8k_cmd_set_mac_addr(struct ieee80211_hw *hw, u8 *mac)
  2164. {
  2165. struct mwl8k_priv *priv = hw->priv;
  2166. struct mwl8k_cmd_set_mac_addr *cmd;
  2167. int rc;
  2168. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2169. if (cmd == NULL)
  2170. return -ENOMEM;
  2171. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_MAC_ADDR);
  2172. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2173. if (priv->ap_fw) {
  2174. cmd->mbss.mac_type = cpu_to_le16(MWL8K_MAC_TYPE_PRIMARY_AP);
  2175. memcpy(cmd->mbss.mac_addr, mac, ETH_ALEN);
  2176. } else {
  2177. memcpy(cmd->mac_addr, mac, ETH_ALEN);
  2178. }
  2179. rc = mwl8k_post_cmd(hw, &cmd->header);
  2180. kfree(cmd);
  2181. return rc;
  2182. }
  2183. /*
  2184. * CMD_SET_RATEADAPT_MODE.
  2185. */
  2186. struct mwl8k_cmd_set_rate_adapt_mode {
  2187. struct mwl8k_cmd_pkt header;
  2188. __le16 action;
  2189. __le16 mode;
  2190. } __attribute__((packed));
  2191. static int mwl8k_cmd_set_rateadapt_mode(struct ieee80211_hw *hw, __u16 mode)
  2192. {
  2193. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  2194. int rc;
  2195. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2196. if (cmd == NULL)
  2197. return -ENOMEM;
  2198. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  2199. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2200. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  2201. cmd->mode = cpu_to_le16(mode);
  2202. rc = mwl8k_post_cmd(hw, &cmd->header);
  2203. kfree(cmd);
  2204. return rc;
  2205. }
  2206. /*
  2207. * CMD_BSS_START.
  2208. */
  2209. struct mwl8k_cmd_bss_start {
  2210. struct mwl8k_cmd_pkt header;
  2211. __le32 enable;
  2212. } __attribute__((packed));
  2213. static int mwl8k_cmd_bss_start(struct ieee80211_hw *hw, int enable)
  2214. {
  2215. struct mwl8k_cmd_bss_start *cmd;
  2216. int rc;
  2217. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2218. if (cmd == NULL)
  2219. return -ENOMEM;
  2220. cmd->header.code = cpu_to_le16(MWL8K_CMD_BSS_START);
  2221. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2222. cmd->enable = cpu_to_le32(enable);
  2223. rc = mwl8k_post_cmd(hw, &cmd->header);
  2224. kfree(cmd);
  2225. return rc;
  2226. }
  2227. /*
  2228. * CMD_SET_NEW_STN.
  2229. */
  2230. struct mwl8k_cmd_set_new_stn {
  2231. struct mwl8k_cmd_pkt header;
  2232. __le16 aid;
  2233. __u8 mac_addr[6];
  2234. __le16 stn_id;
  2235. __le16 action;
  2236. __le16 rsvd;
  2237. __le32 legacy_rates;
  2238. __u8 ht_rates[4];
  2239. __le16 cap_info;
  2240. __le16 ht_capabilities_info;
  2241. __u8 mac_ht_param_info;
  2242. __u8 rev;
  2243. __u8 control_channel;
  2244. __u8 add_channel;
  2245. __le16 op_mode;
  2246. __le16 stbc;
  2247. __u8 add_qos_info;
  2248. __u8 is_qos_sta;
  2249. __le32 fw_sta_ptr;
  2250. } __attribute__((packed));
  2251. #define MWL8K_STA_ACTION_ADD 0
  2252. #define MWL8K_STA_ACTION_REMOVE 2
  2253. static int mwl8k_cmd_set_new_stn_add(struct ieee80211_hw *hw,
  2254. struct ieee80211_vif *vif,
  2255. struct ieee80211_sta *sta)
  2256. {
  2257. struct mwl8k_cmd_set_new_stn *cmd;
  2258. int rc;
  2259. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2260. if (cmd == NULL)
  2261. return -ENOMEM;
  2262. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2263. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2264. cmd->aid = cpu_to_le16(sta->aid);
  2265. memcpy(cmd->mac_addr, sta->addr, ETH_ALEN);
  2266. cmd->stn_id = cpu_to_le16(sta->aid);
  2267. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_ADD);
  2268. cmd->legacy_rates = cpu_to_le32(sta->supp_rates[IEEE80211_BAND_2GHZ]);
  2269. if (sta->ht_cap.ht_supported) {
  2270. cmd->ht_rates[0] = sta->ht_cap.mcs.rx_mask[0];
  2271. cmd->ht_rates[1] = sta->ht_cap.mcs.rx_mask[1];
  2272. cmd->ht_rates[2] = sta->ht_cap.mcs.rx_mask[2];
  2273. cmd->ht_rates[3] = sta->ht_cap.mcs.rx_mask[3];
  2274. cmd->ht_capabilities_info = cpu_to_le16(sta->ht_cap.cap);
  2275. cmd->mac_ht_param_info = (sta->ht_cap.ampdu_factor & 3) |
  2276. ((sta->ht_cap.ampdu_density & 7) << 2);
  2277. cmd->is_qos_sta = 1;
  2278. }
  2279. rc = mwl8k_post_cmd(hw, &cmd->header);
  2280. kfree(cmd);
  2281. return rc;
  2282. }
  2283. static int mwl8k_cmd_set_new_stn_add_self(struct ieee80211_hw *hw,
  2284. struct ieee80211_vif *vif)
  2285. {
  2286. struct mwl8k_cmd_set_new_stn *cmd;
  2287. int rc;
  2288. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2289. if (cmd == NULL)
  2290. return -ENOMEM;
  2291. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2292. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2293. memcpy(cmd->mac_addr, vif->addr, ETH_ALEN);
  2294. rc = mwl8k_post_cmd(hw, &cmd->header);
  2295. kfree(cmd);
  2296. return rc;
  2297. }
  2298. static int mwl8k_cmd_set_new_stn_del(struct ieee80211_hw *hw,
  2299. struct ieee80211_vif *vif, u8 *addr)
  2300. {
  2301. struct mwl8k_cmd_set_new_stn *cmd;
  2302. int rc;
  2303. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2304. if (cmd == NULL)
  2305. return -ENOMEM;
  2306. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_NEW_STN);
  2307. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2308. memcpy(cmd->mac_addr, addr, ETH_ALEN);
  2309. cmd->action = cpu_to_le16(MWL8K_STA_ACTION_REMOVE);
  2310. rc = mwl8k_post_cmd(hw, &cmd->header);
  2311. kfree(cmd);
  2312. return rc;
  2313. }
  2314. /*
  2315. * CMD_UPDATE_STADB.
  2316. */
  2317. struct ewc_ht_info {
  2318. __le16 control1;
  2319. __le16 control2;
  2320. __le16 control3;
  2321. } __attribute__((packed));
  2322. struct peer_capability_info {
  2323. /* Peer type - AP vs. STA. */
  2324. __u8 peer_type;
  2325. /* Basic 802.11 capabilities from assoc resp. */
  2326. __le16 basic_caps;
  2327. /* Set if peer supports 802.11n high throughput (HT). */
  2328. __u8 ht_support;
  2329. /* Valid if HT is supported. */
  2330. __le16 ht_caps;
  2331. __u8 extended_ht_caps;
  2332. struct ewc_ht_info ewc_info;
  2333. /* Legacy rate table. Intersection of our rates and peer rates. */
  2334. __u8 legacy_rates[12];
  2335. /* HT rate table. Intersection of our rates and peer rates. */
  2336. __u8 ht_rates[16];
  2337. __u8 pad[16];
  2338. /* If set, interoperability mode, no proprietary extensions. */
  2339. __u8 interop;
  2340. __u8 pad2;
  2341. __u8 station_id;
  2342. __le16 amsdu_enabled;
  2343. } __attribute__((packed));
  2344. struct mwl8k_cmd_update_stadb {
  2345. struct mwl8k_cmd_pkt header;
  2346. /* See STADB_ACTION_TYPE */
  2347. __le32 action;
  2348. /* Peer MAC address */
  2349. __u8 peer_addr[ETH_ALEN];
  2350. __le32 reserved;
  2351. /* Peer info - valid during add/update. */
  2352. struct peer_capability_info peer_info;
  2353. } __attribute__((packed));
  2354. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  2355. #define MWL8K_STA_DB_DEL_ENTRY 2
  2356. /* Peer Entry flags - used to define the type of the peer node */
  2357. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  2358. static int mwl8k_cmd_update_stadb_add(struct ieee80211_hw *hw,
  2359. struct ieee80211_vif *vif,
  2360. struct ieee80211_sta *sta)
  2361. {
  2362. struct mwl8k_cmd_update_stadb *cmd;
  2363. struct peer_capability_info *p;
  2364. int rc;
  2365. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2366. if (cmd == NULL)
  2367. return -ENOMEM;
  2368. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2369. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2370. cmd->action = cpu_to_le32(MWL8K_STA_DB_MODIFY_ENTRY);
  2371. memcpy(cmd->peer_addr, sta->addr, ETH_ALEN);
  2372. p = &cmd->peer_info;
  2373. p->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  2374. p->basic_caps = cpu_to_le16(vif->bss_conf.assoc_capability);
  2375. p->ht_support = sta->ht_cap.ht_supported;
  2376. p->ht_caps = sta->ht_cap.cap;
  2377. p->extended_ht_caps = (sta->ht_cap.ampdu_factor & 3) |
  2378. ((sta->ht_cap.ampdu_density & 7) << 2);
  2379. legacy_rate_mask_to_array(p->legacy_rates,
  2380. sta->supp_rates[IEEE80211_BAND_2GHZ]);
  2381. memcpy(p->ht_rates, sta->ht_cap.mcs.rx_mask, 16);
  2382. p->interop = 1;
  2383. p->amsdu_enabled = 0;
  2384. rc = mwl8k_post_cmd(hw, &cmd->header);
  2385. kfree(cmd);
  2386. return rc ? rc : p->station_id;
  2387. }
  2388. static int mwl8k_cmd_update_stadb_del(struct ieee80211_hw *hw,
  2389. struct ieee80211_vif *vif, u8 *addr)
  2390. {
  2391. struct mwl8k_cmd_update_stadb *cmd;
  2392. int rc;
  2393. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2394. if (cmd == NULL)
  2395. return -ENOMEM;
  2396. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  2397. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2398. cmd->action = cpu_to_le32(MWL8K_STA_DB_DEL_ENTRY);
  2399. memcpy(cmd->peer_addr, addr, ETH_ALEN);
  2400. rc = mwl8k_post_cmd(hw, &cmd->header);
  2401. kfree(cmd);
  2402. return rc;
  2403. }
  2404. /*
  2405. * Interrupt handling.
  2406. */
  2407. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2408. {
  2409. struct ieee80211_hw *hw = dev_id;
  2410. struct mwl8k_priv *priv = hw->priv;
  2411. u32 status;
  2412. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2413. if (!status)
  2414. return IRQ_NONE;
  2415. if (status & MWL8K_A2H_INT_TX_DONE) {
  2416. status &= ~MWL8K_A2H_INT_TX_DONE;
  2417. tasklet_schedule(&priv->poll_tx_task);
  2418. }
  2419. if (status & MWL8K_A2H_INT_RX_READY) {
  2420. status &= ~MWL8K_A2H_INT_RX_READY;
  2421. tasklet_schedule(&priv->poll_rx_task);
  2422. }
  2423. if (status)
  2424. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2425. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2426. if (priv->hostcmd_wait != NULL)
  2427. complete(priv->hostcmd_wait);
  2428. }
  2429. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2430. if (!mutex_is_locked(&priv->fw_mutex) &&
  2431. priv->radio_on && priv->pending_tx_pkts)
  2432. mwl8k_tx_start(priv);
  2433. }
  2434. return IRQ_HANDLED;
  2435. }
  2436. static void mwl8k_tx_poll(unsigned long data)
  2437. {
  2438. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2439. struct mwl8k_priv *priv = hw->priv;
  2440. int limit;
  2441. int i;
  2442. limit = 32;
  2443. spin_lock_bh(&priv->tx_lock);
  2444. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2445. limit -= mwl8k_txq_reclaim(hw, i, limit, 0);
  2446. if (!priv->pending_tx_pkts && priv->tx_wait != NULL) {
  2447. complete(priv->tx_wait);
  2448. priv->tx_wait = NULL;
  2449. }
  2450. spin_unlock_bh(&priv->tx_lock);
  2451. if (limit) {
  2452. writel(~MWL8K_A2H_INT_TX_DONE,
  2453. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2454. } else {
  2455. tasklet_schedule(&priv->poll_tx_task);
  2456. }
  2457. }
  2458. static void mwl8k_rx_poll(unsigned long data)
  2459. {
  2460. struct ieee80211_hw *hw = (struct ieee80211_hw *)data;
  2461. struct mwl8k_priv *priv = hw->priv;
  2462. int limit;
  2463. limit = 32;
  2464. limit -= rxq_process(hw, 0, limit);
  2465. limit -= rxq_refill(hw, 0, limit);
  2466. if (limit) {
  2467. writel(~MWL8K_A2H_INT_RX_READY,
  2468. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2469. } else {
  2470. tasklet_schedule(&priv->poll_rx_task);
  2471. }
  2472. }
  2473. /*
  2474. * Core driver operations.
  2475. */
  2476. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2477. {
  2478. struct mwl8k_priv *priv = hw->priv;
  2479. int index = skb_get_queue_mapping(skb);
  2480. int rc;
  2481. if (!priv->radio_on) {
  2482. printk(KERN_DEBUG "%s: dropped TX frame since radio "
  2483. "disabled\n", wiphy_name(hw->wiphy));
  2484. dev_kfree_skb(skb);
  2485. return NETDEV_TX_OK;
  2486. }
  2487. rc = mwl8k_txq_xmit(hw, index, skb);
  2488. return rc;
  2489. }
  2490. static int mwl8k_start(struct ieee80211_hw *hw)
  2491. {
  2492. struct mwl8k_priv *priv = hw->priv;
  2493. int rc;
  2494. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  2495. IRQF_SHARED, MWL8K_NAME, hw);
  2496. if (rc) {
  2497. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2498. wiphy_name(hw->wiphy));
  2499. return -EIO;
  2500. }
  2501. /* Enable TX reclaim and RX tasklets. */
  2502. tasklet_enable(&priv->poll_tx_task);
  2503. tasklet_enable(&priv->poll_rx_task);
  2504. /* Enable interrupts */
  2505. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2506. rc = mwl8k_fw_lock(hw);
  2507. if (!rc) {
  2508. rc = mwl8k_cmd_radio_enable(hw);
  2509. if (!priv->ap_fw) {
  2510. if (!rc)
  2511. rc = mwl8k_cmd_enable_sniffer(hw, 0);
  2512. if (!rc)
  2513. rc = mwl8k_cmd_set_pre_scan(hw);
  2514. if (!rc)
  2515. rc = mwl8k_cmd_set_post_scan(hw,
  2516. "\x00\x00\x00\x00\x00\x00");
  2517. }
  2518. if (!rc)
  2519. rc = mwl8k_cmd_set_rateadapt_mode(hw, 0);
  2520. if (!rc)
  2521. rc = mwl8k_cmd_set_wmm_mode(hw, 0);
  2522. mwl8k_fw_unlock(hw);
  2523. }
  2524. if (rc) {
  2525. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2526. free_irq(priv->pdev->irq, hw);
  2527. tasklet_disable(&priv->poll_tx_task);
  2528. tasklet_disable(&priv->poll_rx_task);
  2529. }
  2530. return rc;
  2531. }
  2532. static void mwl8k_stop(struct ieee80211_hw *hw)
  2533. {
  2534. struct mwl8k_priv *priv = hw->priv;
  2535. int i;
  2536. mwl8k_cmd_radio_disable(hw);
  2537. ieee80211_stop_queues(hw);
  2538. /* Disable interrupts */
  2539. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2540. free_irq(priv->pdev->irq, hw);
  2541. /* Stop finalize join worker */
  2542. cancel_work_sync(&priv->finalize_join_worker);
  2543. if (priv->beacon_skb != NULL)
  2544. dev_kfree_skb(priv->beacon_skb);
  2545. /* Stop TX reclaim and RX tasklets. */
  2546. tasklet_disable(&priv->poll_tx_task);
  2547. tasklet_disable(&priv->poll_rx_task);
  2548. /* Return all skbs to mac80211 */
  2549. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2550. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  2551. }
  2552. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2553. struct ieee80211_vif *vif)
  2554. {
  2555. struct mwl8k_priv *priv = hw->priv;
  2556. struct mwl8k_vif *mwl8k_vif;
  2557. /*
  2558. * We only support one active interface at a time.
  2559. */
  2560. if (priv->vif != NULL)
  2561. return -EBUSY;
  2562. /*
  2563. * Reject interface creation if sniffer mode is active, as
  2564. * STA operation is mutually exclusive with hardware sniffer
  2565. * mode. (Sniffer mode is only used on STA firmware.)
  2566. */
  2567. if (priv->sniffer_enabled) {
  2568. printk(KERN_INFO "%s: unable to create STA "
  2569. "interface due to sniffer mode being enabled\n",
  2570. wiphy_name(hw->wiphy));
  2571. return -EINVAL;
  2572. }
  2573. /* Set the mac address. */
  2574. mwl8k_cmd_set_mac_addr(hw, vif->addr);
  2575. if (priv->ap_fw)
  2576. mwl8k_cmd_set_new_stn_add_self(hw, vif);
  2577. /* Clean out driver private area */
  2578. mwl8k_vif = MWL8K_VIF(vif);
  2579. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2580. /* Set Initial sequence number to zero */
  2581. mwl8k_vif->seqno = 0;
  2582. priv->vif = vif;
  2583. return 0;
  2584. }
  2585. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2586. struct ieee80211_vif *vif)
  2587. {
  2588. struct mwl8k_priv *priv = hw->priv;
  2589. if (priv->ap_fw)
  2590. mwl8k_cmd_set_new_stn_del(hw, vif, vif->addr);
  2591. mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
  2592. priv->vif = NULL;
  2593. }
  2594. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2595. {
  2596. struct ieee80211_conf *conf = &hw->conf;
  2597. struct mwl8k_priv *priv = hw->priv;
  2598. int rc;
  2599. if (conf->flags & IEEE80211_CONF_IDLE) {
  2600. mwl8k_cmd_radio_disable(hw);
  2601. return 0;
  2602. }
  2603. rc = mwl8k_fw_lock(hw);
  2604. if (rc)
  2605. return rc;
  2606. rc = mwl8k_cmd_radio_enable(hw);
  2607. if (rc)
  2608. goto out;
  2609. rc = mwl8k_cmd_set_rf_channel(hw, conf);
  2610. if (rc)
  2611. goto out;
  2612. if (conf->power_level > 18)
  2613. conf->power_level = 18;
  2614. rc = mwl8k_cmd_rf_tx_power(hw, conf->power_level);
  2615. if (rc)
  2616. goto out;
  2617. if (priv->ap_fw) {
  2618. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_RX, 0x7);
  2619. if (!rc)
  2620. rc = mwl8k_cmd_rf_antenna(hw, MWL8K_RF_ANTENNA_TX, 0x7);
  2621. } else {
  2622. rc = mwl8k_cmd_mimo_config(hw, 0x7, 0x7);
  2623. }
  2624. out:
  2625. mwl8k_fw_unlock(hw);
  2626. return rc;
  2627. }
  2628. static void
  2629. mwl8k_bss_info_changed_sta(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2630. struct ieee80211_bss_conf *info, u32 changed)
  2631. {
  2632. struct mwl8k_priv *priv = hw->priv;
  2633. u32 ap_legacy_rates;
  2634. u8 ap_mcs_rates[16];
  2635. int rc;
  2636. if (mwl8k_fw_lock(hw))
  2637. return;
  2638. /*
  2639. * No need to capture a beacon if we're no longer associated.
  2640. */
  2641. if ((changed & BSS_CHANGED_ASSOC) && !vif->bss_conf.assoc)
  2642. priv->capture_beacon = false;
  2643. /*
  2644. * Get the AP's legacy and MCS rates.
  2645. */
  2646. ap_legacy_rates = 0;
  2647. if (vif->bss_conf.assoc) {
  2648. struct ieee80211_sta *ap;
  2649. rcu_read_lock();
  2650. ap = ieee80211_find_sta(vif, vif->bss_conf.bssid);
  2651. if (ap == NULL) {
  2652. rcu_read_unlock();
  2653. goto out;
  2654. }
  2655. ap_legacy_rates = ap->supp_rates[IEEE80211_BAND_2GHZ];
  2656. memcpy(ap_mcs_rates, ap->ht_cap.mcs.rx_mask, 16);
  2657. rcu_read_unlock();
  2658. }
  2659. if ((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) {
  2660. rc = mwl8k_cmd_set_rate(hw, vif, ap_legacy_rates, ap_mcs_rates);
  2661. if (rc)
  2662. goto out;
  2663. rc = mwl8k_cmd_use_fixed_rate_sta(hw);
  2664. if (rc)
  2665. goto out;
  2666. }
  2667. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2668. rc = mwl8k_set_radio_preamble(hw,
  2669. vif->bss_conf.use_short_preamble);
  2670. if (rc)
  2671. goto out;
  2672. }
  2673. if (changed & BSS_CHANGED_ERP_SLOT) {
  2674. rc = mwl8k_cmd_set_slot(hw, vif->bss_conf.use_short_slot);
  2675. if (rc)
  2676. goto out;
  2677. }
  2678. if (((changed & BSS_CHANGED_ASSOC) && vif->bss_conf.assoc) ||
  2679. (changed & (BSS_CHANGED_ERP_CTS_PROT | BSS_CHANGED_HT))) {
  2680. rc = mwl8k_cmd_set_aid(hw, vif, ap_legacy_rates);
  2681. if (rc)
  2682. goto out;
  2683. }
  2684. if (vif->bss_conf.assoc &&
  2685. (changed & (BSS_CHANGED_ASSOC | BSS_CHANGED_BEACON_INT))) {
  2686. /*
  2687. * Finalize the join. Tell rx handler to process
  2688. * next beacon from our BSSID.
  2689. */
  2690. memcpy(priv->capture_bssid, vif->bss_conf.bssid, ETH_ALEN);
  2691. priv->capture_beacon = true;
  2692. }
  2693. out:
  2694. mwl8k_fw_unlock(hw);
  2695. }
  2696. static void
  2697. mwl8k_bss_info_changed_ap(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2698. struct ieee80211_bss_conf *info, u32 changed)
  2699. {
  2700. int rc;
  2701. if (mwl8k_fw_lock(hw))
  2702. return;
  2703. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  2704. rc = mwl8k_set_radio_preamble(hw,
  2705. vif->bss_conf.use_short_preamble);
  2706. if (rc)
  2707. goto out;
  2708. }
  2709. if (changed & BSS_CHANGED_BASIC_RATES) {
  2710. int idx;
  2711. int rate;
  2712. /*
  2713. * Use lowest supported basic rate for multicasts
  2714. * and management frames (such as probe responses --
  2715. * beacons will always go out at 1 Mb/s).
  2716. */
  2717. idx = ffs(vif->bss_conf.basic_rates);
  2718. rate = idx ? mwl8k_rates[idx - 1].hw_value : 2;
  2719. mwl8k_cmd_use_fixed_rate_ap(hw, rate, rate);
  2720. }
  2721. if (changed & (BSS_CHANGED_BEACON_INT | BSS_CHANGED_BEACON)) {
  2722. struct sk_buff *skb;
  2723. skb = ieee80211_beacon_get(hw, vif);
  2724. if (skb != NULL) {
  2725. mwl8k_cmd_set_beacon(hw, skb->data, skb->len);
  2726. kfree_skb(skb);
  2727. }
  2728. }
  2729. if (changed & BSS_CHANGED_BEACON_ENABLED)
  2730. mwl8k_cmd_bss_start(hw, info->enable_beacon);
  2731. out:
  2732. mwl8k_fw_unlock(hw);
  2733. }
  2734. static void
  2735. mwl8k_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2736. struct ieee80211_bss_conf *info, u32 changed)
  2737. {
  2738. struct mwl8k_priv *priv = hw->priv;
  2739. if (!priv->ap_fw)
  2740. mwl8k_bss_info_changed_sta(hw, vif, info, changed);
  2741. else
  2742. mwl8k_bss_info_changed_ap(hw, vif, info, changed);
  2743. }
  2744. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  2745. int mc_count, struct dev_addr_list *mclist)
  2746. {
  2747. struct mwl8k_cmd_pkt *cmd;
  2748. /*
  2749. * Synthesize and return a command packet that programs the
  2750. * hardware multicast address filter. At this point we don't
  2751. * know whether FIF_ALLMULTI is being requested, but if it is,
  2752. * we'll end up throwing this packet away and creating a new
  2753. * one in mwl8k_configure_filter().
  2754. */
  2755. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 0, mc_count, mclist);
  2756. return (unsigned long)cmd;
  2757. }
  2758. static int
  2759. mwl8k_configure_filter_sniffer(struct ieee80211_hw *hw,
  2760. unsigned int changed_flags,
  2761. unsigned int *total_flags)
  2762. {
  2763. struct mwl8k_priv *priv = hw->priv;
  2764. /*
  2765. * Hardware sniffer mode is mutually exclusive with STA
  2766. * operation, so refuse to enable sniffer mode if a STA
  2767. * interface is active.
  2768. */
  2769. if (priv->vif != NULL) {
  2770. if (net_ratelimit())
  2771. printk(KERN_INFO "%s: not enabling sniffer "
  2772. "mode because STA interface is active\n",
  2773. wiphy_name(hw->wiphy));
  2774. return 0;
  2775. }
  2776. if (!priv->sniffer_enabled) {
  2777. if (mwl8k_cmd_enable_sniffer(hw, 1))
  2778. return 0;
  2779. priv->sniffer_enabled = true;
  2780. }
  2781. *total_flags &= FIF_PROMISC_IN_BSS | FIF_ALLMULTI |
  2782. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL |
  2783. FIF_OTHER_BSS;
  2784. return 1;
  2785. }
  2786. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  2787. unsigned int changed_flags,
  2788. unsigned int *total_flags,
  2789. u64 multicast)
  2790. {
  2791. struct mwl8k_priv *priv = hw->priv;
  2792. struct mwl8k_cmd_pkt *cmd = (void *)(unsigned long)multicast;
  2793. /*
  2794. * AP firmware doesn't allow fine-grained control over
  2795. * the receive filter.
  2796. */
  2797. if (priv->ap_fw) {
  2798. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  2799. kfree(cmd);
  2800. return;
  2801. }
  2802. /*
  2803. * Enable hardware sniffer mode if FIF_CONTROL or
  2804. * FIF_OTHER_BSS is requested.
  2805. */
  2806. if (*total_flags & (FIF_CONTROL | FIF_OTHER_BSS) &&
  2807. mwl8k_configure_filter_sniffer(hw, changed_flags, total_flags)) {
  2808. kfree(cmd);
  2809. return;
  2810. }
  2811. /* Clear unsupported feature flags */
  2812. *total_flags &= FIF_ALLMULTI | FIF_BCN_PRBRESP_PROMISC;
  2813. if (mwl8k_fw_lock(hw)) {
  2814. kfree(cmd);
  2815. return;
  2816. }
  2817. if (priv->sniffer_enabled) {
  2818. mwl8k_cmd_enable_sniffer(hw, 0);
  2819. priv->sniffer_enabled = false;
  2820. }
  2821. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  2822. if (*total_flags & FIF_BCN_PRBRESP_PROMISC) {
  2823. /*
  2824. * Disable the BSS filter.
  2825. */
  2826. mwl8k_cmd_set_pre_scan(hw);
  2827. } else {
  2828. const u8 *bssid;
  2829. /*
  2830. * Enable the BSS filter.
  2831. *
  2832. * If there is an active STA interface, use that
  2833. * interface's BSSID, otherwise use a dummy one
  2834. * (where the OUI part needs to be nonzero for
  2835. * the BSSID to be accepted by POST_SCAN).
  2836. */
  2837. bssid = "\x01\x00\x00\x00\x00\x00";
  2838. if (priv->vif != NULL)
  2839. bssid = priv->vif->bss_conf.bssid;
  2840. mwl8k_cmd_set_post_scan(hw, bssid);
  2841. }
  2842. }
  2843. /*
  2844. * If FIF_ALLMULTI is being requested, throw away the command
  2845. * packet that ->prepare_multicast() built and replace it with
  2846. * a command packet that enables reception of all multicast
  2847. * packets.
  2848. */
  2849. if (*total_flags & FIF_ALLMULTI) {
  2850. kfree(cmd);
  2851. cmd = __mwl8k_cmd_mac_multicast_adr(hw, 1, 0, NULL);
  2852. }
  2853. if (cmd != NULL) {
  2854. mwl8k_post_cmd(hw, cmd);
  2855. kfree(cmd);
  2856. }
  2857. mwl8k_fw_unlock(hw);
  2858. }
  2859. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  2860. {
  2861. return mwl8k_cmd_set_rts_threshold(hw, value);
  2862. }
  2863. struct mwl8k_sta_notify_item
  2864. {
  2865. struct list_head list;
  2866. struct ieee80211_vif *vif;
  2867. enum sta_notify_cmd cmd;
  2868. struct ieee80211_sta sta;
  2869. };
  2870. static void
  2871. mwl8k_do_sta_notify(struct ieee80211_hw *hw, struct mwl8k_sta_notify_item *s)
  2872. {
  2873. struct mwl8k_priv *priv = hw->priv;
  2874. /*
  2875. * STA firmware uses UPDATE_STADB, AP firmware uses SET_NEW_STN.
  2876. */
  2877. if (!priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
  2878. int rc;
  2879. rc = mwl8k_cmd_update_stadb_add(hw, s->vif, &s->sta);
  2880. if (rc >= 0) {
  2881. struct ieee80211_sta *sta;
  2882. rcu_read_lock();
  2883. sta = ieee80211_find_sta(s->vif, s->sta.addr);
  2884. if (sta != NULL)
  2885. MWL8K_STA(sta)->peer_id = rc;
  2886. rcu_read_unlock();
  2887. }
  2888. } else if (!priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
  2889. mwl8k_cmd_update_stadb_del(hw, s->vif, s->sta.addr);
  2890. } else if (priv->ap_fw && s->cmd == STA_NOTIFY_ADD) {
  2891. mwl8k_cmd_set_new_stn_add(hw, s->vif, &s->sta);
  2892. } else if (priv->ap_fw && s->cmd == STA_NOTIFY_REMOVE) {
  2893. mwl8k_cmd_set_new_stn_del(hw, s->vif, s->sta.addr);
  2894. }
  2895. }
  2896. static void mwl8k_sta_notify_worker(struct work_struct *work)
  2897. {
  2898. struct mwl8k_priv *priv =
  2899. container_of(work, struct mwl8k_priv, sta_notify_worker);
  2900. struct ieee80211_hw *hw = priv->hw;
  2901. spin_lock_bh(&priv->sta_notify_list_lock);
  2902. while (!list_empty(&priv->sta_notify_list)) {
  2903. struct mwl8k_sta_notify_item *s;
  2904. s = list_entry(priv->sta_notify_list.next,
  2905. struct mwl8k_sta_notify_item, list);
  2906. list_del(&s->list);
  2907. spin_unlock_bh(&priv->sta_notify_list_lock);
  2908. mwl8k_do_sta_notify(hw, s);
  2909. kfree(s);
  2910. spin_lock_bh(&priv->sta_notify_list_lock);
  2911. }
  2912. spin_unlock_bh(&priv->sta_notify_list_lock);
  2913. }
  2914. static void
  2915. mwl8k_sta_notify(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2916. enum sta_notify_cmd cmd, struct ieee80211_sta *sta)
  2917. {
  2918. struct mwl8k_priv *priv = hw->priv;
  2919. struct mwl8k_sta_notify_item *s;
  2920. if (cmd != STA_NOTIFY_ADD && cmd != STA_NOTIFY_REMOVE)
  2921. return;
  2922. s = kmalloc(sizeof(*s), GFP_ATOMIC);
  2923. if (s != NULL) {
  2924. s->vif = vif;
  2925. s->cmd = cmd;
  2926. s->sta = *sta;
  2927. spin_lock(&priv->sta_notify_list_lock);
  2928. list_add_tail(&s->list, &priv->sta_notify_list);
  2929. spin_unlock(&priv->sta_notify_list_lock);
  2930. ieee80211_queue_work(hw, &priv->sta_notify_worker);
  2931. }
  2932. }
  2933. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  2934. const struct ieee80211_tx_queue_params *params)
  2935. {
  2936. struct mwl8k_priv *priv = hw->priv;
  2937. int rc;
  2938. rc = mwl8k_fw_lock(hw);
  2939. if (!rc) {
  2940. if (!priv->wmm_enabled)
  2941. rc = mwl8k_cmd_set_wmm_mode(hw, 1);
  2942. if (!rc)
  2943. rc = mwl8k_cmd_set_edca_params(hw, queue,
  2944. params->cw_min,
  2945. params->cw_max,
  2946. params->aifs,
  2947. params->txop);
  2948. mwl8k_fw_unlock(hw);
  2949. }
  2950. return rc;
  2951. }
  2952. static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
  2953. struct ieee80211_tx_queue_stats *stats)
  2954. {
  2955. struct mwl8k_priv *priv = hw->priv;
  2956. struct mwl8k_tx_queue *txq;
  2957. int index;
  2958. spin_lock_bh(&priv->tx_lock);
  2959. for (index = 0; index < MWL8K_TX_QUEUES; index++) {
  2960. txq = priv->txq + index;
  2961. memcpy(&stats[index], &txq->stats,
  2962. sizeof(struct ieee80211_tx_queue_stats));
  2963. }
  2964. spin_unlock_bh(&priv->tx_lock);
  2965. return 0;
  2966. }
  2967. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  2968. struct ieee80211_low_level_stats *stats)
  2969. {
  2970. return mwl8k_cmd_get_stat(hw, stats);
  2971. }
  2972. static int
  2973. mwl8k_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2974. enum ieee80211_ampdu_mlme_action action,
  2975. struct ieee80211_sta *sta, u16 tid, u16 *ssn)
  2976. {
  2977. switch (action) {
  2978. case IEEE80211_AMPDU_RX_START:
  2979. case IEEE80211_AMPDU_RX_STOP:
  2980. if (!(hw->flags & IEEE80211_HW_AMPDU_AGGREGATION))
  2981. return -ENOTSUPP;
  2982. return 0;
  2983. default:
  2984. return -ENOTSUPP;
  2985. }
  2986. }
  2987. static const struct ieee80211_ops mwl8k_ops = {
  2988. .tx = mwl8k_tx,
  2989. .start = mwl8k_start,
  2990. .stop = mwl8k_stop,
  2991. .add_interface = mwl8k_add_interface,
  2992. .remove_interface = mwl8k_remove_interface,
  2993. .config = mwl8k_config,
  2994. .bss_info_changed = mwl8k_bss_info_changed,
  2995. .prepare_multicast = mwl8k_prepare_multicast,
  2996. .configure_filter = mwl8k_configure_filter,
  2997. .set_rts_threshold = mwl8k_set_rts_threshold,
  2998. .sta_notify = mwl8k_sta_notify,
  2999. .conf_tx = mwl8k_conf_tx,
  3000. .get_tx_stats = mwl8k_get_tx_stats,
  3001. .get_stats = mwl8k_get_stats,
  3002. .ampdu_action = mwl8k_ampdu_action,
  3003. };
  3004. static void mwl8k_finalize_join_worker(struct work_struct *work)
  3005. {
  3006. struct mwl8k_priv *priv =
  3007. container_of(work, struct mwl8k_priv, finalize_join_worker);
  3008. struct sk_buff *skb = priv->beacon_skb;
  3009. mwl8k_cmd_finalize_join(priv->hw, skb->data, skb->len,
  3010. priv->vif->bss_conf.dtim_period);
  3011. dev_kfree_skb(skb);
  3012. priv->beacon_skb = NULL;
  3013. }
  3014. enum {
  3015. MWL8363 = 0,
  3016. MWL8687,
  3017. MWL8366,
  3018. };
  3019. static struct mwl8k_device_info mwl8k_info_tbl[] __devinitdata = {
  3020. [MWL8363] = {
  3021. .part_name = "88w8363",
  3022. .helper_image = "mwl8k/helper_8363.fw",
  3023. .fw_image = "mwl8k/fmimage_8363.fw",
  3024. },
  3025. [MWL8687] = {
  3026. .part_name = "88w8687",
  3027. .helper_image = "mwl8k/helper_8687.fw",
  3028. .fw_image = "mwl8k/fmimage_8687.fw",
  3029. },
  3030. [MWL8366] = {
  3031. .part_name = "88w8366",
  3032. .helper_image = "mwl8k/helper_8366.fw",
  3033. .fw_image = "mwl8k/fmimage_8366.fw",
  3034. .ap_rxd_ops = &rxd_8366_ap_ops,
  3035. },
  3036. };
  3037. MODULE_FIRMWARE("mwl8k/helper_8363.fw");
  3038. MODULE_FIRMWARE("mwl8k/fmimage_8363.fw");
  3039. MODULE_FIRMWARE("mwl8k/helper_8687.fw");
  3040. MODULE_FIRMWARE("mwl8k/fmimage_8687.fw");
  3041. MODULE_FIRMWARE("mwl8k/helper_8366.fw");
  3042. MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
  3043. static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
  3044. { PCI_VDEVICE(MARVELL, 0x2a0c), .driver_data = MWL8363, },
  3045. { PCI_VDEVICE(MARVELL, 0x2a24), .driver_data = MWL8363, },
  3046. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = MWL8687, },
  3047. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = MWL8687, },
  3048. { PCI_VDEVICE(MARVELL, 0x2a40), .driver_data = MWL8366, },
  3049. { },
  3050. };
  3051. MODULE_DEVICE_TABLE(pci, mwl8k_pci_id_table);
  3052. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  3053. const struct pci_device_id *id)
  3054. {
  3055. static int printed_version = 0;
  3056. struct ieee80211_hw *hw;
  3057. struct mwl8k_priv *priv;
  3058. int rc;
  3059. int i;
  3060. if (!printed_version) {
  3061. printk(KERN_INFO "%s version %s\n", MWL8K_DESC, MWL8K_VERSION);
  3062. printed_version = 1;
  3063. }
  3064. rc = pci_enable_device(pdev);
  3065. if (rc) {
  3066. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  3067. MWL8K_NAME);
  3068. return rc;
  3069. }
  3070. rc = pci_request_regions(pdev, MWL8K_NAME);
  3071. if (rc) {
  3072. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  3073. MWL8K_NAME);
  3074. goto err_disable_device;
  3075. }
  3076. pci_set_master(pdev);
  3077. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  3078. if (hw == NULL) {
  3079. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  3080. rc = -ENOMEM;
  3081. goto err_free_reg;
  3082. }
  3083. SET_IEEE80211_DEV(hw, &pdev->dev);
  3084. pci_set_drvdata(pdev, hw);
  3085. priv = hw->priv;
  3086. priv->hw = hw;
  3087. priv->pdev = pdev;
  3088. priv->device_info = &mwl8k_info_tbl[id->driver_data];
  3089. priv->sram = pci_iomap(pdev, 0, 0x10000);
  3090. if (priv->sram == NULL) {
  3091. printk(KERN_ERR "%s: Cannot map device SRAM\n",
  3092. wiphy_name(hw->wiphy));
  3093. goto err_iounmap;
  3094. }
  3095. /*
  3096. * If BAR0 is a 32 bit BAR, the register BAR will be BAR1.
  3097. * If BAR0 is a 64 bit BAR, the register BAR will be BAR2.
  3098. */
  3099. priv->regs = pci_iomap(pdev, 1, 0x10000);
  3100. if (priv->regs == NULL) {
  3101. priv->regs = pci_iomap(pdev, 2, 0x10000);
  3102. if (priv->regs == NULL) {
  3103. printk(KERN_ERR "%s: Cannot map device registers\n",
  3104. wiphy_name(hw->wiphy));
  3105. goto err_iounmap;
  3106. }
  3107. }
  3108. /* Reset firmware and hardware */
  3109. mwl8k_hw_reset(priv);
  3110. /* Ask userland hotplug daemon for the device firmware */
  3111. rc = mwl8k_request_firmware(priv);
  3112. if (rc) {
  3113. printk(KERN_ERR "%s: Firmware files not found\n",
  3114. wiphy_name(hw->wiphy));
  3115. goto err_stop_firmware;
  3116. }
  3117. /* Load firmware into hardware */
  3118. rc = mwl8k_load_firmware(hw);
  3119. if (rc) {
  3120. printk(KERN_ERR "%s: Cannot start firmware\n",
  3121. wiphy_name(hw->wiphy));
  3122. goto err_stop_firmware;
  3123. }
  3124. /* Reclaim memory once firmware is successfully loaded */
  3125. mwl8k_release_firmware(priv);
  3126. if (priv->ap_fw) {
  3127. priv->rxd_ops = priv->device_info->ap_rxd_ops;
  3128. if (priv->rxd_ops == NULL) {
  3129. printk(KERN_ERR "%s: Driver does not have AP "
  3130. "firmware image support for this hardware\n",
  3131. wiphy_name(hw->wiphy));
  3132. goto err_stop_firmware;
  3133. }
  3134. } else {
  3135. priv->rxd_ops = &rxd_sta_ops;
  3136. }
  3137. priv->sniffer_enabled = false;
  3138. priv->wmm_enabled = false;
  3139. priv->pending_tx_pkts = 0;
  3140. memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
  3141. priv->band.band = IEEE80211_BAND_2GHZ;
  3142. priv->band.channels = priv->channels;
  3143. priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
  3144. priv->band.bitrates = priv->rates;
  3145. priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
  3146. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
  3147. BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
  3148. memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
  3149. /*
  3150. * Extra headroom is the size of the required DMA header
  3151. * minus the size of the smallest 802.11 frame (CTS frame).
  3152. */
  3153. hw->extra_tx_headroom =
  3154. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  3155. hw->channel_change_time = 10;
  3156. hw->queues = MWL8K_TX_QUEUES;
  3157. /* Set rssi and noise values to dBm */
  3158. hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
  3159. hw->vif_data_size = sizeof(struct mwl8k_vif);
  3160. hw->sta_data_size = sizeof(struct mwl8k_sta);
  3161. priv->vif = NULL;
  3162. /* Set default radio state and preamble */
  3163. priv->radio_on = 0;
  3164. priv->radio_short_preamble = 0;
  3165. /* Station database handling */
  3166. INIT_WORK(&priv->sta_notify_worker, mwl8k_sta_notify_worker);
  3167. spin_lock_init(&priv->sta_notify_list_lock);
  3168. INIT_LIST_HEAD(&priv->sta_notify_list);
  3169. /* Finalize join worker */
  3170. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  3171. /* TX reclaim and RX tasklets. */
  3172. tasklet_init(&priv->poll_tx_task, mwl8k_tx_poll, (unsigned long)hw);
  3173. tasklet_disable(&priv->poll_tx_task);
  3174. tasklet_init(&priv->poll_rx_task, mwl8k_rx_poll, (unsigned long)hw);
  3175. tasklet_disable(&priv->poll_rx_task);
  3176. /* Power management cookie */
  3177. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  3178. if (priv->cookie == NULL)
  3179. goto err_stop_firmware;
  3180. rc = mwl8k_rxq_init(hw, 0);
  3181. if (rc)
  3182. goto err_free_cookie;
  3183. rxq_refill(hw, 0, INT_MAX);
  3184. mutex_init(&priv->fw_mutex);
  3185. priv->fw_mutex_owner = NULL;
  3186. priv->fw_mutex_depth = 0;
  3187. priv->hostcmd_wait = NULL;
  3188. spin_lock_init(&priv->tx_lock);
  3189. priv->tx_wait = NULL;
  3190. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  3191. rc = mwl8k_txq_init(hw, i);
  3192. if (rc)
  3193. goto err_free_queues;
  3194. }
  3195. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  3196. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3197. iowrite32(MWL8K_A2H_INT_TX_DONE | MWL8K_A2H_INT_RX_READY,
  3198. priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  3199. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  3200. rc = request_irq(priv->pdev->irq, mwl8k_interrupt,
  3201. IRQF_SHARED, MWL8K_NAME, hw);
  3202. if (rc) {
  3203. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  3204. wiphy_name(hw->wiphy));
  3205. goto err_free_queues;
  3206. }
  3207. /*
  3208. * Temporarily enable interrupts. Initial firmware host
  3209. * commands use interrupts and avoid polling. Disable
  3210. * interrupts when done.
  3211. */
  3212. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3213. /* Get config data, mac addrs etc */
  3214. if (priv->ap_fw) {
  3215. rc = mwl8k_cmd_get_hw_spec_ap(hw);
  3216. if (!rc)
  3217. rc = mwl8k_cmd_set_hw_spec(hw);
  3218. hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_AP);
  3219. } else {
  3220. rc = mwl8k_cmd_get_hw_spec_sta(hw);
  3221. hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
  3222. }
  3223. if (rc) {
  3224. printk(KERN_ERR "%s: Cannot initialise firmware\n",
  3225. wiphy_name(hw->wiphy));
  3226. goto err_free_irq;
  3227. }
  3228. /* Turn radio off */
  3229. rc = mwl8k_cmd_radio_disable(hw);
  3230. if (rc) {
  3231. printk(KERN_ERR "%s: Cannot disable\n", wiphy_name(hw->wiphy));
  3232. goto err_free_irq;
  3233. }
  3234. /* Clear MAC address */
  3235. rc = mwl8k_cmd_set_mac_addr(hw, "\x00\x00\x00\x00\x00\x00");
  3236. if (rc) {
  3237. printk(KERN_ERR "%s: Cannot clear MAC address\n",
  3238. wiphy_name(hw->wiphy));
  3239. goto err_free_irq;
  3240. }
  3241. /* Disable interrupts */
  3242. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3243. free_irq(priv->pdev->irq, hw);
  3244. rc = ieee80211_register_hw(hw);
  3245. if (rc) {
  3246. printk(KERN_ERR "%s: Cannot register device\n",
  3247. wiphy_name(hw->wiphy));
  3248. goto err_free_queues;
  3249. }
  3250. printk(KERN_INFO "%s: %s v%d, %pM, %s firmware %u.%u.%u.%u\n",
  3251. wiphy_name(hw->wiphy), priv->device_info->part_name,
  3252. priv->hw_rev, hw->wiphy->perm_addr,
  3253. priv->ap_fw ? "AP" : "STA",
  3254. (priv->fw_rev >> 24) & 0xff, (priv->fw_rev >> 16) & 0xff,
  3255. (priv->fw_rev >> 8) & 0xff, priv->fw_rev & 0xff);
  3256. return 0;
  3257. err_free_irq:
  3258. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  3259. free_irq(priv->pdev->irq, hw);
  3260. err_free_queues:
  3261. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3262. mwl8k_txq_deinit(hw, i);
  3263. mwl8k_rxq_deinit(hw, 0);
  3264. err_free_cookie:
  3265. if (priv->cookie != NULL)
  3266. pci_free_consistent(priv->pdev, 4,
  3267. priv->cookie, priv->cookie_dma);
  3268. err_stop_firmware:
  3269. mwl8k_hw_reset(priv);
  3270. mwl8k_release_firmware(priv);
  3271. err_iounmap:
  3272. if (priv->regs != NULL)
  3273. pci_iounmap(pdev, priv->regs);
  3274. if (priv->sram != NULL)
  3275. pci_iounmap(pdev, priv->sram);
  3276. pci_set_drvdata(pdev, NULL);
  3277. ieee80211_free_hw(hw);
  3278. err_free_reg:
  3279. pci_release_regions(pdev);
  3280. err_disable_device:
  3281. pci_disable_device(pdev);
  3282. return rc;
  3283. }
  3284. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  3285. {
  3286. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  3287. }
  3288. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  3289. {
  3290. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  3291. struct mwl8k_priv *priv;
  3292. int i;
  3293. if (hw == NULL)
  3294. return;
  3295. priv = hw->priv;
  3296. ieee80211_stop_queues(hw);
  3297. ieee80211_unregister_hw(hw);
  3298. /* Remove TX reclaim and RX tasklets. */
  3299. tasklet_kill(&priv->poll_tx_task);
  3300. tasklet_kill(&priv->poll_rx_task);
  3301. /* Stop hardware */
  3302. mwl8k_hw_reset(priv);
  3303. /* Return all skbs to mac80211 */
  3304. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3305. mwl8k_txq_reclaim(hw, i, INT_MAX, 1);
  3306. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3307. mwl8k_txq_deinit(hw, i);
  3308. mwl8k_rxq_deinit(hw, 0);
  3309. pci_free_consistent(priv->pdev, 4, priv->cookie, priv->cookie_dma);
  3310. pci_iounmap(pdev, priv->regs);
  3311. pci_iounmap(pdev, priv->sram);
  3312. pci_set_drvdata(pdev, NULL);
  3313. ieee80211_free_hw(hw);
  3314. pci_release_regions(pdev);
  3315. pci_disable_device(pdev);
  3316. }
  3317. static struct pci_driver mwl8k_driver = {
  3318. .name = MWL8K_NAME,
  3319. .id_table = mwl8k_pci_id_table,
  3320. .probe = mwl8k_probe,
  3321. .remove = __devexit_p(mwl8k_remove),
  3322. .shutdown = __devexit_p(mwl8k_shutdown),
  3323. };
  3324. static int __init mwl8k_init(void)
  3325. {
  3326. return pci_register_driver(&mwl8k_driver);
  3327. }
  3328. static void __exit mwl8k_exit(void)
  3329. {
  3330. pci_unregister_driver(&mwl8k_driver);
  3331. }
  3332. module_init(mwl8k_init);
  3333. module_exit(mwl8k_exit);
  3334. MODULE_DESCRIPTION(MWL8K_DESC);
  3335. MODULE_VERSION(MWL8K_VERSION);
  3336. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  3337. MODULE_LICENSE("GPL");