powerdomain.c 24 KB

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  1. /*
  2. * OMAP powerdomain control
  3. *
  4. * Copyright (C) 2007-2008 Texas Instruments, Inc.
  5. * Copyright (C) 2007-2009 Nokia Corporation
  6. *
  7. * Written by Paul Walmsley
  8. *
  9. * Added OMAP4 specific support by Abhijit Pagare <abhijitpagare@ti.com>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #undef DEBUG
  16. #include <linux/kernel.h>
  17. #include <linux/module.h>
  18. #include <linux/types.h>
  19. #include <linux/delay.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/list.h>
  22. #include <linux/errno.h>
  23. #include <linux/err.h>
  24. #include <linux/io.h>
  25. #include <asm/atomic.h>
  26. #include "cm.h"
  27. #include "cm-regbits-34xx.h"
  28. #include "cm-regbits-44xx.h"
  29. #include "prm.h"
  30. #include "prm-regbits-34xx.h"
  31. #include "prm-regbits-44xx.h"
  32. #include <plat/cpu.h>
  33. #include <plat/powerdomain.h>
  34. #include <plat/clockdomain.h>
  35. #include <plat/prcm.h>
  36. #include "pm.h"
  37. enum {
  38. PWRDM_STATE_NOW = 0,
  39. PWRDM_STATE_PREV,
  40. };
  41. /* Variable holding value of the CPU dependent PWRSTCTRL Register Offset */
  42. static u16 pwrstctrl_reg_offs;
  43. /* Variable holding value of the CPU dependent PWRSTST Register Offset */
  44. static u16 pwrstst_reg_offs;
  45. /* OMAP3 and OMAP4 specific register bit initialisations
  46. * Notice that the names here are not according to each power
  47. * domain but the bit mapping used applies to all of them
  48. */
  49. /* OMAP3 and OMAP4 Memory Onstate Masks (common across all power domains) */
  50. #define OMAP_MEM0_ONSTATE_MASK OMAP3430_SHAREDL1CACHEFLATONSTATE_MASK
  51. #define OMAP_MEM1_ONSTATE_MASK OMAP3430_L1FLATMEMONSTATE_MASK
  52. #define OMAP_MEM2_ONSTATE_MASK OMAP3430_SHAREDL2CACHEFLATONSTATE_MASK
  53. #define OMAP_MEM3_ONSTATE_MASK OMAP3430_L2FLATMEMONSTATE_MASK
  54. #define OMAP_MEM4_ONSTATE_MASK OMAP4430_OCP_NRET_BANK_ONSTATE_MASK
  55. /* OMAP3 and OMAP4 Memory Retstate Masks (common across all power domains) */
  56. #define OMAP_MEM0_RETSTATE_MASK OMAP3430_SHAREDL1CACHEFLATRETSTATE
  57. #define OMAP_MEM1_RETSTATE_MASK OMAP3430_L1FLATMEMRETSTATE
  58. #define OMAP_MEM2_RETSTATE_MASK OMAP3430_SHAREDL2CACHEFLATRETSTATE
  59. #define OMAP_MEM3_RETSTATE_MASK OMAP3430_L2FLATMEMRETSTATE
  60. #define OMAP_MEM4_RETSTATE_MASK OMAP4430_OCP_NRET_BANK_RETSTATE_MASK
  61. /* OMAP3 and OMAP4 Memory Status bits */
  62. #define OMAP_MEM0_STATEST_MASK OMAP3430_SHAREDL1CACHEFLATSTATEST_MASK
  63. #define OMAP_MEM1_STATEST_MASK OMAP3430_L1FLATMEMSTATEST_MASK
  64. #define OMAP_MEM2_STATEST_MASK OMAP3430_SHAREDL2CACHEFLATSTATEST_MASK
  65. #define OMAP_MEM3_STATEST_MASK OMAP3430_L2FLATMEMSTATEST_MASK
  66. #define OMAP_MEM4_STATEST_MASK OMAP4430_OCP_NRET_BANK_STATEST_MASK
  67. /* pwrdm_list contains all registered struct powerdomains */
  68. static LIST_HEAD(pwrdm_list);
  69. /* Private functions */
  70. static struct powerdomain *_pwrdm_lookup(const char *name)
  71. {
  72. struct powerdomain *pwrdm, *temp_pwrdm;
  73. pwrdm = NULL;
  74. list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
  75. if (!strcmp(name, temp_pwrdm->name)) {
  76. pwrdm = temp_pwrdm;
  77. break;
  78. }
  79. }
  80. return pwrdm;
  81. }
  82. /**
  83. * _pwrdm_register - register a powerdomain
  84. * @pwrdm: struct powerdomain * to register
  85. *
  86. * Adds a powerdomain to the internal powerdomain list. Returns
  87. * -EINVAL if given a null pointer, -EEXIST if a powerdomain is
  88. * already registered by the provided name, or 0 upon success.
  89. */
  90. static int _pwrdm_register(struct powerdomain *pwrdm)
  91. {
  92. int i;
  93. if (!pwrdm)
  94. return -EINVAL;
  95. if (!omap_chip_is(pwrdm->omap_chip))
  96. return -EINVAL;
  97. if (_pwrdm_lookup(pwrdm->name))
  98. return -EEXIST;
  99. list_add(&pwrdm->node, &pwrdm_list);
  100. /* Initialize the powerdomain's state counter */
  101. for (i = 0; i < PWRDM_MAX_PWRSTS; i++)
  102. pwrdm->state_counter[i] = 0;
  103. pwrdm_wait_transition(pwrdm);
  104. pwrdm->state = pwrdm_read_pwrst(pwrdm);
  105. pwrdm->state_counter[pwrdm->state] = 1;
  106. pr_debug("powerdomain: registered %s\n", pwrdm->name);
  107. return 0;
  108. }
  109. static int _pwrdm_state_switch(struct powerdomain *pwrdm, int flag)
  110. {
  111. int prev;
  112. int state;
  113. if (pwrdm == NULL)
  114. return -EINVAL;
  115. state = pwrdm_read_pwrst(pwrdm);
  116. switch (flag) {
  117. case PWRDM_STATE_NOW:
  118. prev = pwrdm->state;
  119. break;
  120. case PWRDM_STATE_PREV:
  121. prev = pwrdm_read_prev_pwrst(pwrdm);
  122. if (pwrdm->state != prev)
  123. pwrdm->state_counter[prev]++;
  124. break;
  125. default:
  126. return -EINVAL;
  127. }
  128. if (state != prev)
  129. pwrdm->state_counter[state]++;
  130. pm_dbg_update_time(pwrdm, prev);
  131. pwrdm->state = state;
  132. return 0;
  133. }
  134. static int _pwrdm_pre_transition_cb(struct powerdomain *pwrdm, void *unused)
  135. {
  136. pwrdm_clear_all_prev_pwrst(pwrdm);
  137. _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
  138. return 0;
  139. }
  140. static int _pwrdm_post_transition_cb(struct powerdomain *pwrdm, void *unused)
  141. {
  142. _pwrdm_state_switch(pwrdm, PWRDM_STATE_PREV);
  143. return 0;
  144. }
  145. /* Public functions */
  146. /**
  147. * pwrdm_init - set up the powerdomain layer
  148. *
  149. * Loop through the list of powerdomains, registering all that are
  150. * available on the current CPU. If pwrdm_list is supplied and not
  151. * null, all of the referenced powerdomains will be registered. No
  152. * return value.
  153. */
  154. void pwrdm_init(struct powerdomain **pwrdm_list)
  155. {
  156. struct powerdomain **p = NULL;
  157. if (cpu_is_omap24xx() | cpu_is_omap34xx()) {
  158. pwrstctrl_reg_offs = OMAP2_PM_PWSTCTRL;
  159. pwrstst_reg_offs = OMAP2_PM_PWSTST;
  160. } else if (cpu_is_omap44xx()) {
  161. pwrstctrl_reg_offs = OMAP4_PM_PWSTCTRL;
  162. pwrstst_reg_offs = OMAP4_PM_PWSTST;
  163. } else {
  164. printk(KERN_ERR "Power Domain struct not supported for " \
  165. "this CPU\n");
  166. return;
  167. }
  168. if (pwrdm_list) {
  169. for (p = pwrdm_list; *p; p++)
  170. _pwrdm_register(*p);
  171. }
  172. }
  173. /**
  174. * pwrdm_lookup - look up a powerdomain by name, return a pointer
  175. * @name: name of powerdomain
  176. *
  177. * Find a registered powerdomain by its name. Returns a pointer to the
  178. * struct powerdomain if found, or NULL otherwise.
  179. */
  180. struct powerdomain *pwrdm_lookup(const char *name)
  181. {
  182. struct powerdomain *pwrdm;
  183. if (!name)
  184. return NULL;
  185. pwrdm = _pwrdm_lookup(name);
  186. return pwrdm;
  187. }
  188. /**
  189. * pwrdm_for_each - call function on each registered clockdomain
  190. * @fn: callback function *
  191. *
  192. * Call the supplied function for each registered powerdomain. The
  193. * callback function can return anything but 0 to bail out early from
  194. * the iterator. Returns the last return value of the callback function, which
  195. * should be 0 for success or anything else to indicate failure; or -EINVAL if
  196. * the function pointer is null.
  197. */
  198. int pwrdm_for_each(int (*fn)(struct powerdomain *pwrdm, void *user),
  199. void *user)
  200. {
  201. struct powerdomain *temp_pwrdm;
  202. int ret = 0;
  203. if (!fn)
  204. return -EINVAL;
  205. list_for_each_entry(temp_pwrdm, &pwrdm_list, node) {
  206. ret = (*fn)(temp_pwrdm, user);
  207. if (ret)
  208. break;
  209. }
  210. return ret;
  211. }
  212. /**
  213. * pwrdm_add_clkdm - add a clockdomain to a powerdomain
  214. * @pwrdm: struct powerdomain * to add the clockdomain to
  215. * @clkdm: struct clockdomain * to associate with a powerdomain
  216. *
  217. * Associate the clockdomain 'clkdm' with a powerdomain 'pwrdm'. This
  218. * enables the use of pwrdm_for_each_clkdm(). Returns -EINVAL if
  219. * presented with invalid pointers; -ENOMEM if memory could not be allocated;
  220. * or 0 upon success.
  221. */
  222. int pwrdm_add_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm)
  223. {
  224. int i;
  225. int ret = -EINVAL;
  226. if (!pwrdm || !clkdm)
  227. return -EINVAL;
  228. pr_debug("powerdomain: associating clockdomain %s with powerdomain "
  229. "%s\n", clkdm->name, pwrdm->name);
  230. for (i = 0; i < PWRDM_MAX_CLKDMS; i++) {
  231. if (!pwrdm->pwrdm_clkdms[i])
  232. break;
  233. #ifdef DEBUG
  234. if (pwrdm->pwrdm_clkdms[i] == clkdm) {
  235. ret = -EINVAL;
  236. goto pac_exit;
  237. }
  238. #endif
  239. }
  240. if (i == PWRDM_MAX_CLKDMS) {
  241. pr_debug("powerdomain: increase PWRDM_MAX_CLKDMS for "
  242. "pwrdm %s clkdm %s\n", pwrdm->name, clkdm->name);
  243. WARN_ON(1);
  244. ret = -ENOMEM;
  245. goto pac_exit;
  246. }
  247. pwrdm->pwrdm_clkdms[i] = clkdm;
  248. ret = 0;
  249. pac_exit:
  250. return ret;
  251. }
  252. /**
  253. * pwrdm_del_clkdm - remove a clockdomain from a powerdomain
  254. * @pwrdm: struct powerdomain * to add the clockdomain to
  255. * @clkdm: struct clockdomain * to associate with a powerdomain
  256. *
  257. * Dissociate the clockdomain 'clkdm' from the powerdomain
  258. * 'pwrdm'. Returns -EINVAL if presented with invalid pointers;
  259. * -ENOENT if the clkdm was not associated with the powerdomain, or 0
  260. * upon success.
  261. */
  262. int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm)
  263. {
  264. int ret = -EINVAL;
  265. int i;
  266. if (!pwrdm || !clkdm)
  267. return -EINVAL;
  268. pr_debug("powerdomain: dissociating clockdomain %s from powerdomain "
  269. "%s\n", clkdm->name, pwrdm->name);
  270. for (i = 0; i < PWRDM_MAX_CLKDMS; i++)
  271. if (pwrdm->pwrdm_clkdms[i] == clkdm)
  272. break;
  273. if (i == PWRDM_MAX_CLKDMS) {
  274. pr_debug("powerdomain: clkdm %s not associated with pwrdm "
  275. "%s ?!\n", clkdm->name, pwrdm->name);
  276. ret = -ENOENT;
  277. goto pdc_exit;
  278. }
  279. pwrdm->pwrdm_clkdms[i] = NULL;
  280. ret = 0;
  281. pdc_exit:
  282. return ret;
  283. }
  284. /**
  285. * pwrdm_for_each_clkdm - call function on each clkdm in a pwrdm
  286. * @pwrdm: struct powerdomain * to iterate over
  287. * @fn: callback function *
  288. *
  289. * Call the supplied function for each clockdomain in the powerdomain
  290. * 'pwrdm'. The callback function can return anything but 0 to bail
  291. * out early from the iterator. Returns -EINVAL if presented with
  292. * invalid pointers; or passes along the last return value of the
  293. * callback function, which should be 0 for success or anything else
  294. * to indicate failure.
  295. */
  296. int pwrdm_for_each_clkdm(struct powerdomain *pwrdm,
  297. int (*fn)(struct powerdomain *pwrdm,
  298. struct clockdomain *clkdm))
  299. {
  300. int ret = 0;
  301. int i;
  302. if (!fn)
  303. return -EINVAL;
  304. for (i = 0; i < PWRDM_MAX_CLKDMS && !ret; i++)
  305. ret = (*fn)(pwrdm, pwrdm->pwrdm_clkdms[i]);
  306. return ret;
  307. }
  308. /**
  309. * pwrdm_get_mem_bank_count - get number of memory banks in this powerdomain
  310. * @pwrdm: struct powerdomain *
  311. *
  312. * Return the number of controllable memory banks in powerdomain pwrdm,
  313. * starting with 1. Returns -EINVAL if the powerdomain pointer is null.
  314. */
  315. int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm)
  316. {
  317. if (!pwrdm)
  318. return -EINVAL;
  319. return pwrdm->banks;
  320. }
  321. /**
  322. * pwrdm_set_next_pwrst - set next powerdomain power state
  323. * @pwrdm: struct powerdomain * to set
  324. * @pwrst: one of the PWRDM_POWER_* macros
  325. *
  326. * Set the powerdomain pwrdm's next power state to pwrst. The powerdomain
  327. * may not enter this state immediately if the preconditions for this state
  328. * have not been satisfied. Returns -EINVAL if the powerdomain pointer is
  329. * null or if the power state is invalid for the powerdomin, or returns 0
  330. * upon success.
  331. */
  332. int pwrdm_set_next_pwrst(struct powerdomain *pwrdm, u8 pwrst)
  333. {
  334. if (!pwrdm)
  335. return -EINVAL;
  336. if (!(pwrdm->pwrsts & (1 << pwrst)))
  337. return -EINVAL;
  338. pr_debug("powerdomain: setting next powerstate for %s to %0x\n",
  339. pwrdm->name, pwrst);
  340. prm_rmw_mod_reg_bits(OMAP_POWERSTATE_MASK,
  341. (pwrst << OMAP_POWERSTATE_SHIFT),
  342. pwrdm->prcm_offs, pwrstctrl_reg_offs);
  343. return 0;
  344. }
  345. /**
  346. * pwrdm_read_next_pwrst - get next powerdomain power state
  347. * @pwrdm: struct powerdomain * to get power state
  348. *
  349. * Return the powerdomain pwrdm's next power state. Returns -EINVAL
  350. * if the powerdomain pointer is null or returns the next power state
  351. * upon success.
  352. */
  353. int pwrdm_read_next_pwrst(struct powerdomain *pwrdm)
  354. {
  355. if (!pwrdm)
  356. return -EINVAL;
  357. return prm_read_mod_bits_shift(pwrdm->prcm_offs,
  358. pwrstctrl_reg_offs, OMAP_POWERSTATE_MASK);
  359. }
  360. /**
  361. * pwrdm_read_pwrst - get current powerdomain power state
  362. * @pwrdm: struct powerdomain * to get power state
  363. *
  364. * Return the powerdomain pwrdm's current power state. Returns -EINVAL
  365. * if the powerdomain pointer is null or returns the current power state
  366. * upon success.
  367. */
  368. int pwrdm_read_pwrst(struct powerdomain *pwrdm)
  369. {
  370. if (!pwrdm)
  371. return -EINVAL;
  372. return prm_read_mod_bits_shift(pwrdm->prcm_offs,
  373. pwrstst_reg_offs, OMAP_POWERSTATEST_MASK);
  374. }
  375. /**
  376. * pwrdm_read_prev_pwrst - get previous powerdomain power state
  377. * @pwrdm: struct powerdomain * to get previous power state
  378. *
  379. * Return the powerdomain pwrdm's previous power state. Returns -EINVAL
  380. * if the powerdomain pointer is null or returns the previous power state
  381. * upon success.
  382. */
  383. int pwrdm_read_prev_pwrst(struct powerdomain *pwrdm)
  384. {
  385. if (!pwrdm)
  386. return -EINVAL;
  387. return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST,
  388. OMAP3430_LASTPOWERSTATEENTERED_MASK);
  389. }
  390. /**
  391. * pwrdm_set_logic_retst - set powerdomain logic power state upon retention
  392. * @pwrdm: struct powerdomain * to set
  393. * @pwrst: one of the PWRDM_POWER_* macros
  394. *
  395. * Set the next power state that the logic portion of the powerdomain
  396. * pwrdm will enter when the powerdomain enters retention. This will
  397. * be either RETENTION or OFF, if supported. Returns -EINVAL if the
  398. * powerdomain pointer is null or the target power state is not not
  399. * supported, or returns 0 upon success.
  400. */
  401. int pwrdm_set_logic_retst(struct powerdomain *pwrdm, u8 pwrst)
  402. {
  403. if (!pwrdm)
  404. return -EINVAL;
  405. if (!(pwrdm->pwrsts_logic_ret & (1 << pwrst)))
  406. return -EINVAL;
  407. pr_debug("powerdomain: setting next logic powerstate for %s to %0x\n",
  408. pwrdm->name, pwrst);
  409. /*
  410. * The register bit names below may not correspond to the
  411. * actual names of the bits in each powerdomain's register,
  412. * but the type of value returned is the same for each
  413. * powerdomain.
  414. */
  415. prm_rmw_mod_reg_bits(OMAP3430_LOGICL1CACHERETSTATE,
  416. (pwrst << __ffs(OMAP3430_LOGICL1CACHERETSTATE)),
  417. pwrdm->prcm_offs, pwrstctrl_reg_offs);
  418. return 0;
  419. }
  420. /**
  421. * pwrdm_set_mem_onst - set memory power state while powerdomain ON
  422. * @pwrdm: struct powerdomain * to set
  423. * @bank: memory bank number to set (0-3)
  424. * @pwrst: one of the PWRDM_POWER_* macros
  425. *
  426. * Set the next power state that memory bank x of the powerdomain
  427. * pwrdm will enter when the powerdomain enters the ON state. Bank
  428. * will be a number from 0 to 3, and represents different types of
  429. * memory, depending on the powerdomain. Returns -EINVAL if the
  430. * powerdomain pointer is null or the target power state is not not
  431. * supported for this memory bank, -EEXIST if the target memory bank
  432. * does not exist or is not controllable, or returns 0 upon success.
  433. */
  434. int pwrdm_set_mem_onst(struct powerdomain *pwrdm, u8 bank, u8 pwrst)
  435. {
  436. u32 m;
  437. if (!pwrdm)
  438. return -EINVAL;
  439. if (pwrdm->banks < (bank + 1))
  440. return -EEXIST;
  441. if (!(pwrdm->pwrsts_mem_on[bank] & (1 << pwrst)))
  442. return -EINVAL;
  443. pr_debug("powerdomain: setting next memory powerstate for domain %s "
  444. "bank %0x while pwrdm-ON to %0x\n", pwrdm->name, bank, pwrst);
  445. /*
  446. * The register bit names below may not correspond to the
  447. * actual names of the bits in each powerdomain's register,
  448. * but the type of value returned is the same for each
  449. * powerdomain.
  450. */
  451. switch (bank) {
  452. case 0:
  453. m = OMAP_MEM0_ONSTATE_MASK;
  454. break;
  455. case 1:
  456. m = OMAP_MEM1_ONSTATE_MASK;
  457. break;
  458. case 2:
  459. m = OMAP_MEM2_ONSTATE_MASK;
  460. break;
  461. case 3:
  462. m = OMAP_MEM3_ONSTATE_MASK;
  463. break;
  464. case 4:
  465. m = OMAP_MEM4_ONSTATE_MASK;
  466. break;
  467. default:
  468. WARN_ON(1); /* should never happen */
  469. return -EEXIST;
  470. }
  471. prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)),
  472. pwrdm->prcm_offs, pwrstctrl_reg_offs);
  473. return 0;
  474. }
  475. /**
  476. * pwrdm_set_mem_retst - set memory power state while powerdomain in RET
  477. * @pwrdm: struct powerdomain * to set
  478. * @bank: memory bank number to set (0-3)
  479. * @pwrst: one of the PWRDM_POWER_* macros
  480. *
  481. * Set the next power state that memory bank x of the powerdomain
  482. * pwrdm will enter when the powerdomain enters the RETENTION state.
  483. * Bank will be a number from 0 to 3, and represents different types
  484. * of memory, depending on the powerdomain. pwrst will be either
  485. * RETENTION or OFF, if supported. Returns -EINVAL if the powerdomain
  486. * pointer is null or the target power state is not not supported for
  487. * this memory bank, -EEXIST if the target memory bank does not exist
  488. * or is not controllable, or returns 0 upon success.
  489. */
  490. int pwrdm_set_mem_retst(struct powerdomain *pwrdm, u8 bank, u8 pwrst)
  491. {
  492. u32 m;
  493. if (!pwrdm)
  494. return -EINVAL;
  495. if (pwrdm->banks < (bank + 1))
  496. return -EEXIST;
  497. if (!(pwrdm->pwrsts_mem_ret[bank] & (1 << pwrst)))
  498. return -EINVAL;
  499. pr_debug("powerdomain: setting next memory powerstate for domain %s "
  500. "bank %0x while pwrdm-RET to %0x\n", pwrdm->name, bank, pwrst);
  501. /*
  502. * The register bit names below may not correspond to the
  503. * actual names of the bits in each powerdomain's register,
  504. * but the type of value returned is the same for each
  505. * powerdomain.
  506. */
  507. switch (bank) {
  508. case 0:
  509. m = OMAP_MEM0_RETSTATE_MASK;
  510. break;
  511. case 1:
  512. m = OMAP_MEM1_RETSTATE_MASK;
  513. break;
  514. case 2:
  515. m = OMAP_MEM2_RETSTATE_MASK;
  516. break;
  517. case 3:
  518. m = OMAP_MEM3_RETSTATE_MASK;
  519. break;
  520. case 4:
  521. m = OMAP_MEM4_RETSTATE_MASK;
  522. break;
  523. default:
  524. WARN_ON(1); /* should never happen */
  525. return -EEXIST;
  526. }
  527. prm_rmw_mod_reg_bits(m, (pwrst << __ffs(m)), pwrdm->prcm_offs,
  528. pwrstctrl_reg_offs);
  529. return 0;
  530. }
  531. /**
  532. * pwrdm_read_logic_pwrst - get current powerdomain logic retention power state
  533. * @pwrdm: struct powerdomain * to get current logic retention power state
  534. *
  535. * Return the current power state that the logic portion of
  536. * powerdomain pwrdm will enter
  537. * Returns -EINVAL if the powerdomain pointer is null or returns the
  538. * current logic retention power state upon success.
  539. */
  540. int pwrdm_read_logic_pwrst(struct powerdomain *pwrdm)
  541. {
  542. if (!pwrdm)
  543. return -EINVAL;
  544. return prm_read_mod_bits_shift(pwrdm->prcm_offs,
  545. pwrstst_reg_offs, OMAP3430_LOGICSTATEST);
  546. }
  547. /**
  548. * pwrdm_read_prev_logic_pwrst - get previous powerdomain logic power state
  549. * @pwrdm: struct powerdomain * to get previous logic power state
  550. *
  551. * Return the powerdomain pwrdm's logic power state. Returns -EINVAL
  552. * if the powerdomain pointer is null or returns the previous logic
  553. * power state upon success.
  554. */
  555. int pwrdm_read_prev_logic_pwrst(struct powerdomain *pwrdm)
  556. {
  557. if (!pwrdm)
  558. return -EINVAL;
  559. /*
  560. * The register bit names below may not correspond to the
  561. * actual names of the bits in each powerdomain's register,
  562. * but the type of value returned is the same for each
  563. * powerdomain.
  564. */
  565. return prm_read_mod_bits_shift(pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST,
  566. OMAP3430_LASTLOGICSTATEENTERED);
  567. }
  568. /**
  569. * pwrdm_read_mem_pwrst - get current memory bank power state
  570. * @pwrdm: struct powerdomain * to get current memory bank power state
  571. * @bank: memory bank number (0-3)
  572. *
  573. * Return the powerdomain pwrdm's current memory power state for bank
  574. * x. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if
  575. * the target memory bank does not exist or is not controllable, or
  576. * returns the current memory power state upon success.
  577. */
  578. int pwrdm_read_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
  579. {
  580. u32 m;
  581. if (!pwrdm)
  582. return -EINVAL;
  583. if (pwrdm->banks < (bank + 1))
  584. return -EEXIST;
  585. if (pwrdm->flags & PWRDM_HAS_MPU_QUIRK)
  586. bank = 1;
  587. /*
  588. * The register bit names below may not correspond to the
  589. * actual names of the bits in each powerdomain's register,
  590. * but the type of value returned is the same for each
  591. * powerdomain.
  592. */
  593. switch (bank) {
  594. case 0:
  595. m = OMAP_MEM0_STATEST_MASK;
  596. break;
  597. case 1:
  598. m = OMAP_MEM1_STATEST_MASK;
  599. break;
  600. case 2:
  601. m = OMAP_MEM2_STATEST_MASK;
  602. break;
  603. case 3:
  604. m = OMAP_MEM3_STATEST_MASK;
  605. break;
  606. case 4:
  607. m = OMAP_MEM4_STATEST_MASK;
  608. break;
  609. default:
  610. WARN_ON(1); /* should never happen */
  611. return -EEXIST;
  612. }
  613. return prm_read_mod_bits_shift(pwrdm->prcm_offs,
  614. pwrstst_reg_offs, m);
  615. }
  616. /**
  617. * pwrdm_read_prev_mem_pwrst - get previous memory bank power state
  618. * @pwrdm: struct powerdomain * to get previous memory bank power state
  619. * @bank: memory bank number (0-3)
  620. *
  621. * Return the powerdomain pwrdm's previous memory power state for bank
  622. * x. Returns -EINVAL if the powerdomain pointer is null, -EEXIST if
  623. * the target memory bank does not exist or is not controllable, or
  624. * returns the previous memory power state upon success.
  625. */
  626. int pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank)
  627. {
  628. u32 m;
  629. if (!pwrdm)
  630. return -EINVAL;
  631. if (pwrdm->banks < (bank + 1))
  632. return -EEXIST;
  633. if (pwrdm->flags & PWRDM_HAS_MPU_QUIRK)
  634. bank = 1;
  635. /*
  636. * The register bit names below may not correspond to the
  637. * actual names of the bits in each powerdomain's register,
  638. * but the type of value returned is the same for each
  639. * powerdomain.
  640. */
  641. switch (bank) {
  642. case 0:
  643. m = OMAP3430_LASTMEM1STATEENTERED_MASK;
  644. break;
  645. case 1:
  646. m = OMAP3430_LASTMEM2STATEENTERED_MASK;
  647. break;
  648. case 2:
  649. m = OMAP3430_LASTSHAREDL2CACHEFLATSTATEENTERED_MASK;
  650. break;
  651. case 3:
  652. m = OMAP3430_LASTL2FLATMEMSTATEENTERED_MASK;
  653. break;
  654. default:
  655. WARN_ON(1); /* should never happen */
  656. return -EEXIST;
  657. }
  658. return prm_read_mod_bits_shift(pwrdm->prcm_offs,
  659. OMAP3430_PM_PREPWSTST, m);
  660. }
  661. /**
  662. * pwrdm_clear_all_prev_pwrst - clear previous powerstate register for a pwrdm
  663. * @pwrdm: struct powerdomain * to clear
  664. *
  665. * Clear the powerdomain's previous power state register. Clears the
  666. * entire register, including logic and memory bank previous power states.
  667. * Returns -EINVAL if the powerdomain pointer is null, or returns 0 upon
  668. * success.
  669. */
  670. int pwrdm_clear_all_prev_pwrst(struct powerdomain *pwrdm)
  671. {
  672. if (!pwrdm)
  673. return -EINVAL;
  674. /*
  675. * XXX should get the powerdomain's current state here;
  676. * warn & fail if it is not ON.
  677. */
  678. pr_debug("powerdomain: clearing previous power state reg for %s\n",
  679. pwrdm->name);
  680. prm_write_mod_reg(0, pwrdm->prcm_offs, OMAP3430_PM_PREPWSTST);
  681. return 0;
  682. }
  683. /**
  684. * pwrdm_enable_hdwr_sar - enable automatic hardware SAR for a pwrdm
  685. * @pwrdm: struct powerdomain *
  686. *
  687. * Enable automatic context save-and-restore upon power state change
  688. * for some devices in a powerdomain. Warning: this only affects a
  689. * subset of devices in a powerdomain; check the TRM closely. Returns
  690. * -EINVAL if the powerdomain pointer is null or if the powerdomain
  691. * does not support automatic save-and-restore, or returns 0 upon
  692. * success.
  693. */
  694. int pwrdm_enable_hdwr_sar(struct powerdomain *pwrdm)
  695. {
  696. if (!pwrdm)
  697. return -EINVAL;
  698. if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR))
  699. return -EINVAL;
  700. pr_debug("powerdomain: %s: setting SAVEANDRESTORE bit\n",
  701. pwrdm->name);
  702. prm_rmw_mod_reg_bits(0, 1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT,
  703. pwrdm->prcm_offs, pwrstctrl_reg_offs);
  704. return 0;
  705. }
  706. /**
  707. * pwrdm_disable_hdwr_sar - disable automatic hardware SAR for a pwrdm
  708. * @pwrdm: struct powerdomain *
  709. *
  710. * Disable automatic context save-and-restore upon power state change
  711. * for some devices in a powerdomain. Warning: this only affects a
  712. * subset of devices in a powerdomain; check the TRM closely. Returns
  713. * -EINVAL if the powerdomain pointer is null or if the powerdomain
  714. * does not support automatic save-and-restore, or returns 0 upon
  715. * success.
  716. */
  717. int pwrdm_disable_hdwr_sar(struct powerdomain *pwrdm)
  718. {
  719. if (!pwrdm)
  720. return -EINVAL;
  721. if (!(pwrdm->flags & PWRDM_HAS_HDWR_SAR))
  722. return -EINVAL;
  723. pr_debug("powerdomain: %s: clearing SAVEANDRESTORE bit\n",
  724. pwrdm->name);
  725. prm_rmw_mod_reg_bits(1 << OMAP3430ES2_SAVEANDRESTORE_SHIFT, 0,
  726. pwrdm->prcm_offs, pwrstctrl_reg_offs);
  727. return 0;
  728. }
  729. /**
  730. * pwrdm_has_hdwr_sar - test whether powerdomain supports hardware SAR
  731. * @pwrdm: struct powerdomain *
  732. *
  733. * Returns 1 if powerdomain 'pwrdm' supports hardware save-and-restore
  734. * for some devices, or 0 if it does not.
  735. */
  736. bool pwrdm_has_hdwr_sar(struct powerdomain *pwrdm)
  737. {
  738. return (pwrdm && pwrdm->flags & PWRDM_HAS_HDWR_SAR) ? 1 : 0;
  739. }
  740. /**
  741. * pwrdm_wait_transition - wait for powerdomain power transition to finish
  742. * @pwrdm: struct powerdomain * to wait for
  743. *
  744. * If the powerdomain pwrdm is in the process of a state transition,
  745. * spin until it completes the power transition, or until an iteration
  746. * bailout value is reached. Returns -EINVAL if the powerdomain
  747. * pointer is null, -EAGAIN if the bailout value was reached, or
  748. * returns 0 upon success.
  749. */
  750. int pwrdm_wait_transition(struct powerdomain *pwrdm)
  751. {
  752. u32 c = 0;
  753. if (!pwrdm)
  754. return -EINVAL;
  755. /*
  756. * REVISIT: pwrdm_wait_transition() may be better implemented
  757. * via a callback and a periodic timer check -- how long do we expect
  758. * powerdomain transitions to take?
  759. */
  760. /* XXX Is this udelay() value meaningful? */
  761. while ((prm_read_mod_reg(pwrdm->prcm_offs, pwrstst_reg_offs) &
  762. OMAP_INTRANSITION) &&
  763. (c++ < PWRDM_TRANSITION_BAILOUT))
  764. udelay(1);
  765. if (c > PWRDM_TRANSITION_BAILOUT) {
  766. printk(KERN_ERR "powerdomain: waited too long for "
  767. "powerdomain %s to complete transition\n", pwrdm->name);
  768. return -EAGAIN;
  769. }
  770. pr_debug("powerdomain: completed transition in %d loops\n", c);
  771. return 0;
  772. }
  773. int pwrdm_state_switch(struct powerdomain *pwrdm)
  774. {
  775. return _pwrdm_state_switch(pwrdm, PWRDM_STATE_NOW);
  776. }
  777. int pwrdm_clkdm_state_switch(struct clockdomain *clkdm)
  778. {
  779. if (clkdm != NULL && clkdm->pwrdm.ptr != NULL) {
  780. pwrdm_wait_transition(clkdm->pwrdm.ptr);
  781. return pwrdm_state_switch(clkdm->pwrdm.ptr);
  782. }
  783. return -EINVAL;
  784. }
  785. int pwrdm_pre_transition(void)
  786. {
  787. pwrdm_for_each(_pwrdm_pre_transition_cb, NULL);
  788. return 0;
  789. }
  790. int pwrdm_post_transition(void)
  791. {
  792. pwrdm_for_each(_pwrdm_post_transition_cb, NULL);
  793. return 0;
  794. }