mxser.c 81 KB

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  1. /*
  2. * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
  3. *
  4. * Copyright (C) 1999-2001 Moxa Technologies (support@moxa.com.tw).
  5. *
  6. * This code is loosely based on the Linux serial driver, written by
  7. * Linus Torvalds, Theodore T'so and others.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. *
  23. * Original release 10/26/00
  24. *
  25. * 02/06/01 Support MOXA Industio family boards.
  26. * 02/06/01 Support TIOCGICOUNT.
  27. * 02/06/01 Fix the problem for connecting to serial mouse.
  28. * 02/06/01 Fix the problem for H/W flow control.
  29. * 02/06/01 Fix the compling warning when CONFIG_PCI
  30. * don't be defined.
  31. *
  32. * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
  33. * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
  34. * - Fixed x86_64 cleanness
  35. * - Fixed sleep with spinlock held in mxser_send_break
  36. */
  37. #include <linux/module.h>
  38. #include <linux/errno.h>
  39. #include <linux/signal.h>
  40. #include <linux/sched.h>
  41. #include <linux/timer.h>
  42. #include <linux/interrupt.h>
  43. #include <linux/tty.h>
  44. #include <linux/tty_flip.h>
  45. #include <linux/serial.h>
  46. #include <linux/serial_reg.h>
  47. #include <linux/major.h>
  48. #include <linux/string.h>
  49. #include <linux/fcntl.h>
  50. #include <linux/ptrace.h>
  51. #include <linux/gfp.h>
  52. #include <linux/ioport.h>
  53. #include <linux/mm.h>
  54. #include <linux/delay.h>
  55. #include <linux/pci.h>
  56. #include <linux/bitops.h>
  57. #include <asm/system.h>
  58. #include <asm/io.h>
  59. #include <asm/irq.h>
  60. #include <asm/uaccess.h>
  61. #include "mxser.h"
  62. #define MXSER_VERSION "1.8"
  63. #define MXSERMAJOR 174
  64. #define MXSERCUMAJOR 175
  65. #define MXSER_EVENT_TXLOW 1
  66. #define MXSER_EVENT_HANGUP 2
  67. #define MXSER_BOARDS 4 /* Max. boards */
  68. #define MXSER_PORTS 32 /* Max. ports */
  69. #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
  70. #define MXSER_ISR_PASS_LIMIT 256
  71. #define MXSER_ERR_IOADDR -1
  72. #define MXSER_ERR_IRQ -2
  73. #define MXSER_ERR_IRQ_CONFLIT -3
  74. #define MXSER_ERR_VECTOR -4
  75. #define SERIAL_TYPE_NORMAL 1
  76. #define SERIAL_TYPE_CALLOUT 2
  77. #define WAKEUP_CHARS 256
  78. #define UART_MCR_AFE 0x20
  79. #define UART_LSR_SPECIAL 0x1E
  80. #define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED : IRQF_DISABLED)
  81. #define C168_ASIC_ID 1
  82. #define C104_ASIC_ID 2
  83. #define C102_ASIC_ID 0xB
  84. #define CI132_ASIC_ID 4
  85. #define CI134_ASIC_ID 3
  86. #define CI104J_ASIC_ID 5
  87. enum {
  88. MXSER_BOARD_C168_ISA = 1,
  89. MXSER_BOARD_C104_ISA,
  90. MXSER_BOARD_CI104J,
  91. MXSER_BOARD_C168_PCI,
  92. MXSER_BOARD_C104_PCI,
  93. MXSER_BOARD_C102_ISA,
  94. MXSER_BOARD_CI132,
  95. MXSER_BOARD_CI134,
  96. MXSER_BOARD_CP132,
  97. MXSER_BOARD_CP114,
  98. MXSER_BOARD_CT114,
  99. MXSER_BOARD_CP102,
  100. MXSER_BOARD_CP104U,
  101. MXSER_BOARD_CP168U,
  102. MXSER_BOARD_CP132U,
  103. MXSER_BOARD_CP134U,
  104. MXSER_BOARD_CP104JU,
  105. MXSER_BOARD_RC7000,
  106. MXSER_BOARD_CP118U,
  107. MXSER_BOARD_CP102UL,
  108. MXSER_BOARD_CP102U,
  109. };
  110. static char *mxser_brdname[] = {
  111. "C168 series",
  112. "C104 series",
  113. "CI-104J series",
  114. "C168H/PCI series",
  115. "C104H/PCI series",
  116. "C102 series",
  117. "CI-132 series",
  118. "CI-134 series",
  119. "CP-132 series",
  120. "CP-114 series",
  121. "CT-114 series",
  122. "CP-102 series",
  123. "CP-104U series",
  124. "CP-168U series",
  125. "CP-132U series",
  126. "CP-134U series",
  127. "CP-104JU series",
  128. "Moxa UC7000 Serial",
  129. "CP-118U series",
  130. "CP-102UL series",
  131. "CP-102U series",
  132. };
  133. static int mxser_numports[] = {
  134. 8, /* C168-ISA */
  135. 4, /* C104-ISA */
  136. 4, /* CI104J */
  137. 8, /* C168-PCI */
  138. 4, /* C104-PCI */
  139. 2, /* C102-ISA */
  140. 2, /* CI132 */
  141. 4, /* CI134 */
  142. 2, /* CP132 */
  143. 4, /* CP114 */
  144. 4, /* CT114 */
  145. 2, /* CP102 */
  146. 4, /* CP104U */
  147. 8, /* CP168U */
  148. 2, /* CP132U */
  149. 4, /* CP134U */
  150. 4, /* CP104JU */
  151. 8, /* RC7000 */
  152. 8, /* CP118U */
  153. 2, /* CP102UL */
  154. 2, /* CP102U */
  155. };
  156. #define UART_TYPE_NUM 2
  157. static const unsigned int Gmoxa_uart_id[UART_TYPE_NUM] = {
  158. MOXA_MUST_MU150_HWID,
  159. MOXA_MUST_MU860_HWID
  160. };
  161. /* This is only for PCI */
  162. #define UART_INFO_NUM 3
  163. struct mxpciuart_info {
  164. int type;
  165. int tx_fifo;
  166. int rx_fifo;
  167. int xmit_fifo_size;
  168. int rx_high_water;
  169. int rx_trigger;
  170. int rx_low_water;
  171. long max_baud;
  172. };
  173. static const struct mxpciuart_info Gpci_uart_info[UART_INFO_NUM] = {
  174. {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
  175. {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
  176. {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
  177. };
  178. #ifdef CONFIG_PCI
  179. static struct pci_device_id mxser_pcibrds[] = {
  180. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C168_PCI},
  181. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C104_PCI},
  182. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132},
  183. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP114},
  184. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CT114},
  185. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102},
  186. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104U},
  187. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP168U},
  188. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132U},
  189. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP134U},
  190. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104JU},
  191. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_RC7000},
  192. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP118U},
  193. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102UL},
  194. {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102U},
  195. {0}
  196. };
  197. MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
  198. #endif
  199. typedef struct _moxa_pci_info {
  200. unsigned short busNum;
  201. unsigned short devNum;
  202. struct pci_dev *pdev; /* add by Victor Yu. 06-23-2003 */
  203. } moxa_pci_info;
  204. static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
  205. static int ttymajor = MXSERMAJOR;
  206. static int calloutmajor = MXSERCUMAJOR;
  207. static int verbose = 0;
  208. /* Variables for insmod */
  209. MODULE_AUTHOR("Casper Yang");
  210. MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
  211. module_param_array(ioaddr, int, NULL, 0);
  212. module_param(ttymajor, int, 0);
  213. module_param(calloutmajor, int, 0);
  214. module_param(verbose, bool, 0);
  215. MODULE_LICENSE("GPL");
  216. struct mxser_log {
  217. int tick;
  218. unsigned long rxcnt[MXSER_PORTS];
  219. unsigned long txcnt[MXSER_PORTS];
  220. };
  221. struct mxser_mon {
  222. unsigned long rxcnt;
  223. unsigned long txcnt;
  224. unsigned long up_rxcnt;
  225. unsigned long up_txcnt;
  226. int modem_status;
  227. unsigned char hold_reason;
  228. };
  229. struct mxser_mon_ext {
  230. unsigned long rx_cnt[32];
  231. unsigned long tx_cnt[32];
  232. unsigned long up_rxcnt[32];
  233. unsigned long up_txcnt[32];
  234. int modem_status[32];
  235. long baudrate[32];
  236. int databits[32];
  237. int stopbits[32];
  238. int parity[32];
  239. int flowctrl[32];
  240. int fifo[32];
  241. int iftype[32];
  242. };
  243. struct mxser_hwconf {
  244. int board_type;
  245. int ports;
  246. int irq;
  247. int vector;
  248. int vector_mask;
  249. int uart_type;
  250. int ioaddr[MXSER_PORTS_PER_BOARD];
  251. int baud_base[MXSER_PORTS_PER_BOARD];
  252. moxa_pci_info pciInfo;
  253. int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
  254. int MaxCanSetBaudRate[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 09-04-2002 */
  255. int opmode_ioaddr[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 01-05-2004 */
  256. };
  257. struct mxser_struct {
  258. int port;
  259. int base; /* port base address */
  260. int irq; /* port using irq no. */
  261. int vector; /* port irq vector */
  262. int vectormask; /* port vector mask */
  263. int rx_high_water;
  264. int rx_trigger; /* Rx fifo trigger level */
  265. int rx_low_water;
  266. int baud_base; /* max. speed */
  267. int flags; /* defined in tty.h */
  268. int type; /* UART type */
  269. struct tty_struct *tty;
  270. int read_status_mask;
  271. int ignore_status_mask;
  272. int xmit_fifo_size;
  273. int custom_divisor;
  274. int x_char; /* xon/xoff character */
  275. int close_delay;
  276. unsigned short closing_wait;
  277. int IER; /* Interrupt Enable Register */
  278. int MCR; /* Modem control register */
  279. unsigned long event;
  280. int count; /* # of fd on device */
  281. int blocked_open; /* # of blocked opens */
  282. unsigned char *xmit_buf;
  283. int xmit_head;
  284. int xmit_tail;
  285. int xmit_cnt;
  286. struct work_struct tqueue;
  287. struct ktermios normal_termios;
  288. struct ktermios callout_termios;
  289. wait_queue_head_t open_wait;
  290. wait_queue_head_t close_wait;
  291. wait_queue_head_t delta_msr_wait;
  292. struct async_icount icount; /* kernel counters for the 4 input interrupts */
  293. int timeout;
  294. int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
  295. int MaxCanSetBaudRate; /* add by Victor Yu. 09-04-2002 */
  296. int opmode_ioaddr; /* add by Victor Yu. 01-05-2004 */
  297. unsigned char stop_rx;
  298. unsigned char ldisc_stop_rx;
  299. long realbaud;
  300. struct mxser_mon mon_data;
  301. unsigned char err_shadow;
  302. spinlock_t slock;
  303. };
  304. struct mxser_mstatus {
  305. tcflag_t cflag;
  306. int cts;
  307. int dsr;
  308. int ri;
  309. int dcd;
  310. };
  311. static struct mxser_mstatus GMStatus[MXSER_PORTS];
  312. static int mxserBoardCAP[MXSER_BOARDS] = {
  313. 0, 0, 0, 0
  314. /* 0x180, 0x280, 0x200, 0x320 */
  315. };
  316. static struct tty_driver *mxvar_sdriver;
  317. static struct mxser_struct mxvar_table[MXSER_PORTS];
  318. static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
  319. static struct ktermios *mxvar_termios[MXSER_PORTS + 1];
  320. static struct ktermios *mxvar_termios_locked[MXSER_PORTS + 1];
  321. static struct mxser_log mxvar_log;
  322. static int mxvar_diagflag;
  323. static unsigned char mxser_msr[MXSER_PORTS + 1];
  324. static struct mxser_mon_ext mon_data_ext;
  325. static int mxser_set_baud_method[MXSER_PORTS + 1];
  326. static spinlock_t gm_lock;
  327. /*
  328. * This is used to figure out the divisor speeds and the timeouts
  329. */
  330. static struct mxser_hwconf mxsercfg[MXSER_BOARDS];
  331. /*
  332. * static functions:
  333. */
  334. static void mxser_getcfg(int board, struct mxser_hwconf *hwconf);
  335. static int mxser_init(void);
  336. /* static void mxser_poll(unsigned long); */
  337. static int mxser_get_ISA_conf(int, struct mxser_hwconf *);
  338. static void mxser_do_softint(struct work_struct *);
  339. static int mxser_open(struct tty_struct *, struct file *);
  340. static void mxser_close(struct tty_struct *, struct file *);
  341. static int mxser_write(struct tty_struct *, const unsigned char *, int);
  342. static int mxser_write_room(struct tty_struct *);
  343. static void mxser_flush_buffer(struct tty_struct *);
  344. static int mxser_chars_in_buffer(struct tty_struct *);
  345. static void mxser_flush_chars(struct tty_struct *);
  346. static void mxser_put_char(struct tty_struct *, unsigned char);
  347. static int mxser_ioctl(struct tty_struct *, struct file *, uint, ulong);
  348. static int mxser_ioctl_special(unsigned int, void __user *);
  349. static void mxser_throttle(struct tty_struct *);
  350. static void mxser_unthrottle(struct tty_struct *);
  351. static void mxser_set_termios(struct tty_struct *, struct ktermios *);
  352. static void mxser_stop(struct tty_struct *);
  353. static void mxser_start(struct tty_struct *);
  354. static void mxser_hangup(struct tty_struct *);
  355. static void mxser_rs_break(struct tty_struct *, int);
  356. static irqreturn_t mxser_interrupt(int, void *);
  357. static void mxser_receive_chars(struct mxser_struct *, int *);
  358. static void mxser_transmit_chars(struct mxser_struct *);
  359. static void mxser_check_modem_status(struct mxser_struct *, int);
  360. static int mxser_block_til_ready(struct tty_struct *, struct file *, struct mxser_struct *);
  361. static int mxser_startup(struct mxser_struct *);
  362. static void mxser_shutdown(struct mxser_struct *);
  363. static int mxser_change_speed(struct mxser_struct *, struct ktermios *old_termios);
  364. static int mxser_get_serial_info(struct mxser_struct *, struct serial_struct __user *);
  365. static int mxser_set_serial_info(struct mxser_struct *, struct serial_struct __user *);
  366. static int mxser_get_lsr_info(struct mxser_struct *, unsigned int __user *);
  367. static void mxser_send_break(struct mxser_struct *, int);
  368. static int mxser_tiocmget(struct tty_struct *, struct file *);
  369. static int mxser_tiocmset(struct tty_struct *, struct file *, unsigned int, unsigned int);
  370. static int mxser_set_baud(struct mxser_struct *info, long newspd);
  371. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout);
  372. static void mxser_startrx(struct tty_struct *tty);
  373. static void mxser_stoprx(struct tty_struct *tty);
  374. #ifdef CONFIG_PCI
  375. static int CheckIsMoxaMust(int io)
  376. {
  377. u8 oldmcr, hwid;
  378. int i;
  379. outb(0, io + UART_LCR);
  380. DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
  381. oldmcr = inb(io + UART_MCR);
  382. outb(0, io + UART_MCR);
  383. SET_MOXA_MUST_XON1_VALUE(io, 0x11);
  384. if ((hwid = inb(io + UART_MCR)) != 0) {
  385. outb(oldmcr, io + UART_MCR);
  386. return MOXA_OTHER_UART;
  387. }
  388. GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
  389. for (i = 0; i < UART_TYPE_NUM; i++) {
  390. if (hwid == Gmoxa_uart_id[i])
  391. return (int)hwid;
  392. }
  393. return MOXA_OTHER_UART;
  394. }
  395. #endif
  396. /* above is modified by Victor Yu. 08-15-2002 */
  397. static const struct tty_operations mxser_ops = {
  398. .open = mxser_open,
  399. .close = mxser_close,
  400. .write = mxser_write,
  401. .put_char = mxser_put_char,
  402. .flush_chars = mxser_flush_chars,
  403. .write_room = mxser_write_room,
  404. .chars_in_buffer = mxser_chars_in_buffer,
  405. .flush_buffer = mxser_flush_buffer,
  406. .ioctl = mxser_ioctl,
  407. .throttle = mxser_throttle,
  408. .unthrottle = mxser_unthrottle,
  409. .set_termios = mxser_set_termios,
  410. .stop = mxser_stop,
  411. .start = mxser_start,
  412. .hangup = mxser_hangup,
  413. .break_ctl = mxser_rs_break,
  414. .wait_until_sent = mxser_wait_until_sent,
  415. .tiocmget = mxser_tiocmget,
  416. .tiocmset = mxser_tiocmset,
  417. };
  418. /*
  419. * The MOXA Smartio/Industio serial driver boot-time initialization code!
  420. */
  421. static int __init mxser_module_init(void)
  422. {
  423. int ret;
  424. if (verbose)
  425. printk(KERN_DEBUG "Loading module mxser ...\n");
  426. ret = mxser_init();
  427. if (verbose)
  428. printk(KERN_DEBUG "Done.\n");
  429. return ret;
  430. }
  431. static void __exit mxser_module_exit(void)
  432. {
  433. int i, err;
  434. if (verbose)
  435. printk(KERN_DEBUG "Unloading module mxser ...\n");
  436. err = tty_unregister_driver(mxvar_sdriver);
  437. if (!err)
  438. put_tty_driver(mxvar_sdriver);
  439. else
  440. printk(KERN_ERR "Couldn't unregister MOXA Smartio/Industio family serial driver\n");
  441. for (i = 0; i < MXSER_BOARDS; i++) {
  442. struct pci_dev *pdev;
  443. if (mxsercfg[i].board_type == -1)
  444. continue;
  445. else {
  446. pdev = mxsercfg[i].pciInfo.pdev;
  447. free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
  448. if (pdev != NULL) { /* PCI */
  449. release_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
  450. release_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3));
  451. pci_dev_put(pdev);
  452. } else {
  453. release_region(mxsercfg[i].ioaddr[0], 8 * mxsercfg[i].ports);
  454. release_region(mxsercfg[i].vector, 1);
  455. }
  456. }
  457. }
  458. if (verbose)
  459. printk(KERN_DEBUG "Done.\n");
  460. }
  461. static void process_txrx_fifo(struct mxser_struct *info)
  462. {
  463. int i;
  464. if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
  465. info->rx_trigger = 1;
  466. info->rx_high_water = 1;
  467. info->rx_low_water = 1;
  468. info->xmit_fifo_size = 1;
  469. } else {
  470. for (i = 0; i < UART_INFO_NUM; i++) {
  471. if (info->IsMoxaMustChipFlag == Gpci_uart_info[i].type) {
  472. info->rx_trigger = Gpci_uart_info[i].rx_trigger;
  473. info->rx_low_water = Gpci_uart_info[i].rx_low_water;
  474. info->rx_high_water = Gpci_uart_info[i].rx_high_water;
  475. info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
  476. break;
  477. }
  478. }
  479. }
  480. }
  481. static int mxser_initbrd(int board, struct mxser_hwconf *hwconf)
  482. {
  483. struct mxser_struct *info;
  484. int retval;
  485. int i, n;
  486. n = board * MXSER_PORTS_PER_BOARD;
  487. info = &mxvar_table[n];
  488. /*if (verbose) */ {
  489. printk(KERN_DEBUG " ttyMI%d - ttyMI%d ",
  490. n, n + hwconf->ports - 1);
  491. printk(" max. baud rate = %d bps.\n",
  492. hwconf->MaxCanSetBaudRate[0]);
  493. }
  494. for (i = 0; i < hwconf->ports; i++, n++, info++) {
  495. info->port = n;
  496. info->base = hwconf->ioaddr[i];
  497. info->irq = hwconf->irq;
  498. info->vector = hwconf->vector;
  499. info->vectormask = hwconf->vector_mask;
  500. info->opmode_ioaddr = hwconf->opmode_ioaddr[i]; /* add by Victor Yu. 01-05-2004 */
  501. info->stop_rx = 0;
  502. info->ldisc_stop_rx = 0;
  503. info->IsMoxaMustChipFlag = hwconf->IsMoxaMustChipFlag;
  504. /* Enhance mode enabled here */
  505. if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
  506. ENABLE_MOXA_MUST_ENCHANCE_MODE(info->base);
  507. }
  508. info->flags = ASYNC_SHARE_IRQ;
  509. info->type = hwconf->uart_type;
  510. info->baud_base = hwconf->baud_base[i];
  511. info->MaxCanSetBaudRate = hwconf->MaxCanSetBaudRate[i];
  512. process_txrx_fifo(info);
  513. info->custom_divisor = hwconf->baud_base[i] * 16;
  514. info->close_delay = 5 * HZ / 10;
  515. info->closing_wait = 30 * HZ;
  516. INIT_WORK(&info->tqueue, mxser_do_softint);
  517. info->normal_termios = mxvar_sdriver->init_termios;
  518. init_waitqueue_head(&info->open_wait);
  519. init_waitqueue_head(&info->close_wait);
  520. init_waitqueue_head(&info->delta_msr_wait);
  521. memset(&info->mon_data, 0, sizeof(struct mxser_mon));
  522. info->err_shadow = 0;
  523. spin_lock_init(&info->slock);
  524. }
  525. /*
  526. * Allocate the IRQ if necessary
  527. */
  528. /* before set INT ISR, disable all int */
  529. for (i = 0; i < hwconf->ports; i++) {
  530. outb(inb(hwconf->ioaddr[i] + UART_IER) & 0xf0,
  531. hwconf->ioaddr[i] + UART_IER);
  532. }
  533. n = board * MXSER_PORTS_PER_BOARD;
  534. info = &mxvar_table[n];
  535. retval = request_irq(hwconf->irq, mxser_interrupt, IRQ_T(info),
  536. "mxser", info);
  537. if (retval) {
  538. printk(KERN_ERR "Board %d: %s",
  539. board, mxser_brdname[hwconf->board_type - 1]);
  540. printk(" Request irq failed, IRQ (%d) may conflict with"
  541. " another device.\n", info->irq);
  542. return retval;
  543. }
  544. return 0;
  545. }
  546. static void mxser_getcfg(int board, struct mxser_hwconf *hwconf)
  547. {
  548. mxsercfg[board] = *hwconf;
  549. }
  550. #ifdef CONFIG_PCI
  551. static int mxser_get_PCI_conf(int busnum, int devnum, int board_type, struct mxser_hwconf *hwconf)
  552. {
  553. int i, j;
  554. /* unsigned int val; */
  555. unsigned int ioaddress;
  556. struct pci_dev *pdev = hwconf->pciInfo.pdev;
  557. /* io address */
  558. hwconf->board_type = board_type;
  559. hwconf->ports = mxser_numports[board_type - 1];
  560. ioaddress = pci_resource_start(pdev, 2);
  561. request_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2),
  562. "mxser(IO)");
  563. for (i = 0; i < hwconf->ports; i++)
  564. hwconf->ioaddr[i] = ioaddress + 8 * i;
  565. /* vector */
  566. ioaddress = pci_resource_start(pdev, 3);
  567. request_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3),
  568. "mxser(vector)");
  569. hwconf->vector = ioaddress;
  570. /* irq */
  571. hwconf->irq = hwconf->pciInfo.pdev->irq;
  572. hwconf->IsMoxaMustChipFlag = CheckIsMoxaMust(hwconf->ioaddr[0]);
  573. hwconf->uart_type = PORT_16550A;
  574. hwconf->vector_mask = 0;
  575. for (i = 0; i < hwconf->ports; i++) {
  576. for (j = 0; j < UART_INFO_NUM; j++) {
  577. if (Gpci_uart_info[j].type == hwconf->IsMoxaMustChipFlag) {
  578. hwconf->MaxCanSetBaudRate[i] = Gpci_uart_info[j].max_baud;
  579. /* exception....CP-102 */
  580. if (board_type == MXSER_BOARD_CP102)
  581. hwconf->MaxCanSetBaudRate[i] = 921600;
  582. break;
  583. }
  584. }
  585. }
  586. if (hwconf->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID) {
  587. for (i = 0; i < hwconf->ports; i++) {
  588. if (i < 4)
  589. hwconf->opmode_ioaddr[i] = ioaddress + 4;
  590. else
  591. hwconf->opmode_ioaddr[i] = ioaddress + 0x0c;
  592. }
  593. outb(0, ioaddress + 4); /* default set to RS232 mode */
  594. outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
  595. }
  596. for (i = 0; i < hwconf->ports; i++) {
  597. hwconf->vector_mask |= (1 << i);
  598. hwconf->baud_base[i] = 921600;
  599. }
  600. return 0;
  601. }
  602. #endif
  603. static int mxser_init(void)
  604. {
  605. int i, m, retval, b, n;
  606. struct pci_dev *pdev = NULL;
  607. int index;
  608. unsigned char busnum, devnum;
  609. struct mxser_hwconf hwconf;
  610. mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
  611. if (!mxvar_sdriver)
  612. return -ENOMEM;
  613. spin_lock_init(&gm_lock);
  614. for (i = 0; i < MXSER_BOARDS; i++) {
  615. mxsercfg[i].board_type = -1;
  616. }
  617. printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
  618. MXSER_VERSION);
  619. /* Initialize the tty_driver structure */
  620. memset(mxvar_sdriver, 0, sizeof(struct tty_driver));
  621. mxvar_sdriver->owner = THIS_MODULE;
  622. mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
  623. mxvar_sdriver->name = "ttyMI";
  624. mxvar_sdriver->major = ttymajor;
  625. mxvar_sdriver->minor_start = 0;
  626. mxvar_sdriver->num = MXSER_PORTS + 1;
  627. mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
  628. mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
  629. mxvar_sdriver->init_termios = tty_std_termios;
  630. mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
  631. mxvar_sdriver->init_termios.c_ispeed = 9600;
  632. mxvar_sdriver->init_termios.c_ospeed = 9600;
  633. mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW;
  634. tty_set_operations(mxvar_sdriver, &mxser_ops);
  635. mxvar_sdriver->ttys = mxvar_tty;
  636. mxvar_sdriver->termios = mxvar_termios;
  637. mxvar_sdriver->termios_locked = mxvar_termios_locked;
  638. mxvar_diagflag = 0;
  639. memset(mxvar_table, 0, MXSER_PORTS * sizeof(struct mxser_struct));
  640. memset(&mxvar_log, 0, sizeof(struct mxser_log));
  641. memset(&mxser_msr, 0, sizeof(unsigned char) * (MXSER_PORTS + 1));
  642. memset(&mon_data_ext, 0, sizeof(struct mxser_mon_ext));
  643. memset(&mxser_set_baud_method, 0, sizeof(int) * (MXSER_PORTS + 1));
  644. memset(&hwconf, 0, sizeof(struct mxser_hwconf));
  645. m = 0;
  646. /* Start finding ISA boards here */
  647. for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
  648. int cap;
  649. if (!(cap = mxserBoardCAP[b]))
  650. continue;
  651. retval = mxser_get_ISA_conf(cap, &hwconf);
  652. if (retval != 0)
  653. printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
  654. mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
  655. if (retval <= 0) {
  656. if (retval == MXSER_ERR_IRQ)
  657. printk(KERN_ERR "Invalid interrupt number, "
  658. "board not configured\n");
  659. else if (retval == MXSER_ERR_IRQ_CONFLIT)
  660. printk(KERN_ERR "Invalid interrupt number, "
  661. "board not configured\n");
  662. else if (retval == MXSER_ERR_VECTOR)
  663. printk(KERN_ERR "Invalid interrupt vector, "
  664. "board not configured\n");
  665. else if (retval == MXSER_ERR_IOADDR)
  666. printk(KERN_ERR "Invalid I/O address, "
  667. "board not configured\n");
  668. continue;
  669. }
  670. hwconf.pciInfo.busNum = 0;
  671. hwconf.pciInfo.devNum = 0;
  672. hwconf.pciInfo.pdev = NULL;
  673. mxser_getcfg(m, &hwconf);
  674. /*
  675. * init mxsercfg first,
  676. * or mxsercfg data is not correct on ISR.
  677. */
  678. /* mxser_initbrd will hook ISR. */
  679. if (mxser_initbrd(m, &hwconf) < 0)
  680. continue;
  681. m++;
  682. }
  683. /* Start finding ISA boards from module arg */
  684. for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
  685. int cap;
  686. if (!(cap = ioaddr[b]))
  687. continue;
  688. retval = mxser_get_ISA_conf(cap, &hwconf);
  689. if (retval != 0)
  690. printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
  691. mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
  692. if (retval <= 0) {
  693. if (retval == MXSER_ERR_IRQ)
  694. printk(KERN_ERR "Invalid interrupt number, "
  695. "board not configured\n");
  696. else if (retval == MXSER_ERR_IRQ_CONFLIT)
  697. printk(KERN_ERR "Invalid interrupt number, "
  698. "board not configured\n");
  699. else if (retval == MXSER_ERR_VECTOR)
  700. printk(KERN_ERR "Invalid interrupt vector, "
  701. "board not configured\n");
  702. else if (retval == MXSER_ERR_IOADDR)
  703. printk(KERN_ERR "Invalid I/O address, "
  704. "board not configured\n");
  705. continue;
  706. }
  707. hwconf.pciInfo.busNum = 0;
  708. hwconf.pciInfo.devNum = 0;
  709. hwconf.pciInfo.pdev = NULL;
  710. mxser_getcfg(m, &hwconf);
  711. /*
  712. * init mxsercfg first,
  713. * or mxsercfg data is not correct on ISR.
  714. */
  715. /* mxser_initbrd will hook ISR. */
  716. if (mxser_initbrd(m, &hwconf) < 0)
  717. continue;
  718. m++;
  719. }
  720. /* start finding PCI board here */
  721. #ifdef CONFIG_PCI
  722. n = ARRAY_SIZE(mxser_pcibrds) - 1;
  723. index = 0;
  724. b = 0;
  725. while (b < n) {
  726. pdev = pci_get_device(mxser_pcibrds[b].vendor,
  727. mxser_pcibrds[b].device, pdev);
  728. if (pdev == NULL) {
  729. b++;
  730. continue;
  731. }
  732. hwconf.pciInfo.busNum = busnum = pdev->bus->number;
  733. hwconf.pciInfo.devNum = devnum = PCI_SLOT(pdev->devfn) << 3;
  734. hwconf.pciInfo.pdev = pdev;
  735. printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n",
  736. mxser_brdname[(int) (mxser_pcibrds[b].driver_data) - 1],
  737. busnum, devnum >> 3);
  738. index++;
  739. if (m >= MXSER_BOARDS)
  740. printk(KERN_ERR
  741. "Too many Smartio/Industio family boards find "
  742. "(maximum %d), board not configured\n",
  743. MXSER_BOARDS);
  744. else {
  745. if (pci_enable_device(pdev)) {
  746. printk(KERN_ERR "Moxa SmartI/O PCI enable "
  747. "fail !\n");
  748. continue;
  749. }
  750. retval = mxser_get_PCI_conf(busnum, devnum,
  751. (int)mxser_pcibrds[b].driver_data,
  752. &hwconf);
  753. if (retval < 0) {
  754. if (retval == MXSER_ERR_IRQ)
  755. printk(KERN_ERR
  756. "Invalid interrupt number, "
  757. "board not configured\n");
  758. else if (retval == MXSER_ERR_IRQ_CONFLIT)
  759. printk(KERN_ERR
  760. "Invalid interrupt number, "
  761. "board not configured\n");
  762. else if (retval == MXSER_ERR_VECTOR)
  763. printk(KERN_ERR
  764. "Invalid interrupt vector, "
  765. "board not configured\n");
  766. else if (retval == MXSER_ERR_IOADDR)
  767. printk(KERN_ERR
  768. "Invalid I/O address, "
  769. "board not configured\n");
  770. continue;
  771. }
  772. mxser_getcfg(m, &hwconf);
  773. /* init mxsercfg first,
  774. * or mxsercfg data is not correct on ISR.
  775. */
  776. /* mxser_initbrd will hook ISR. */
  777. if (mxser_initbrd(m, &hwconf) < 0)
  778. continue;
  779. m++;
  780. /* Keep an extra reference if we succeeded. It will
  781. be returned at unload time */
  782. pci_dev_get(pdev);
  783. }
  784. }
  785. #endif
  786. retval = tty_register_driver(mxvar_sdriver);
  787. if (retval) {
  788. printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family"
  789. " driver !\n");
  790. put_tty_driver(mxvar_sdriver);
  791. for (i = 0; i < MXSER_BOARDS; i++) {
  792. if (mxsercfg[i].board_type == -1)
  793. continue;
  794. else {
  795. free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
  796. /* todo: release io, vector */
  797. }
  798. }
  799. return retval;
  800. }
  801. return 0;
  802. }
  803. static void mxser_do_softint(struct work_struct *work)
  804. {
  805. struct mxser_struct *info =
  806. container_of(work, struct mxser_struct, tqueue);
  807. struct tty_struct *tty;
  808. tty = info->tty;
  809. if (tty) {
  810. if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
  811. tty_wakeup(tty);
  812. if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
  813. tty_hangup(tty);
  814. }
  815. }
  816. static unsigned char mxser_get_msr(int baseaddr, int mode, int port, struct mxser_struct *info)
  817. {
  818. unsigned char status = 0;
  819. status = inb(baseaddr + UART_MSR);
  820. mxser_msr[port] &= 0x0F;
  821. mxser_msr[port] |= status;
  822. status = mxser_msr[port];
  823. if (mode)
  824. mxser_msr[port] = 0;
  825. return status;
  826. }
  827. /*
  828. * This routine is called whenever a serial port is opened. It
  829. * enables interrupts for a serial port, linking in its async structure into
  830. * the IRQ chain. It also performs the serial-specific
  831. * initialization for the tty structure.
  832. */
  833. static int mxser_open(struct tty_struct *tty, struct file *filp)
  834. {
  835. struct mxser_struct *info;
  836. int retval, line;
  837. /* initialize driver_data in case something fails */
  838. tty->driver_data = NULL;
  839. line = tty->index;
  840. if (line == MXSER_PORTS)
  841. return 0;
  842. if (line < 0 || line > MXSER_PORTS)
  843. return -ENODEV;
  844. info = mxvar_table + line;
  845. if (!info->base)
  846. return -ENODEV;
  847. tty->driver_data = info;
  848. info->tty = tty;
  849. /*
  850. * Start up serial port
  851. */
  852. retval = mxser_startup(info);
  853. if (retval)
  854. return retval;
  855. retval = mxser_block_til_ready(tty, filp, info);
  856. if (retval)
  857. return retval;
  858. info->count++;
  859. if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
  860. if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
  861. *tty->termios = info->normal_termios;
  862. else
  863. *tty->termios = info->callout_termios;
  864. mxser_change_speed(info, NULL);
  865. }
  866. /*
  867. status = mxser_get_msr(info->base, 0, info->port);
  868. mxser_check_modem_status(info, status);
  869. */
  870. /* unmark here for very high baud rate (ex. 921600 bps) used */
  871. tty->low_latency = 1;
  872. return 0;
  873. }
  874. /*
  875. * This routine is called when the serial port gets closed. First, we
  876. * wait for the last remaining data to be sent. Then, we unlink its
  877. * async structure from the interrupt chain if necessary, and we free
  878. * that IRQ if nothing is left in the chain.
  879. */
  880. static void mxser_close(struct tty_struct *tty, struct file *filp)
  881. {
  882. struct mxser_struct *info = tty->driver_data;
  883. unsigned long timeout;
  884. unsigned long flags;
  885. struct tty_ldisc *ld;
  886. if (tty->index == MXSER_PORTS)
  887. return;
  888. if (!info)
  889. return;
  890. spin_lock_irqsave(&info->slock, flags);
  891. if (tty_hung_up_p(filp)) {
  892. spin_unlock_irqrestore(&info->slock, flags);
  893. return;
  894. }
  895. if ((tty->count == 1) && (info->count != 1)) {
  896. /*
  897. * Uh, oh. tty->count is 1, which means that the tty
  898. * structure will be freed. Info->count should always
  899. * be one in these conditions. If it's greater than
  900. * one, we've got real problems, since it means the
  901. * serial port won't be shutdown.
  902. */
  903. printk(KERN_ERR "mxser_close: bad serial port count; "
  904. "tty->count is 1, info->count is %d\n", info->count);
  905. info->count = 1;
  906. }
  907. if (--info->count < 0) {
  908. printk(KERN_ERR "mxser_close: bad serial port count for "
  909. "ttys%d: %d\n", info->port, info->count);
  910. info->count = 0;
  911. }
  912. if (info->count) {
  913. spin_unlock_irqrestore(&info->slock, flags);
  914. return;
  915. }
  916. info->flags |= ASYNC_CLOSING;
  917. spin_unlock_irqrestore(&info->slock, flags);
  918. /*
  919. * Save the termios structure, since this port may have
  920. * separate termios for callout and dialin.
  921. */
  922. if (info->flags & ASYNC_NORMAL_ACTIVE)
  923. info->normal_termios = *tty->termios;
  924. /*
  925. * Now we wait for the transmit buffer to clear; and we notify
  926. * the line discipline to only process XON/XOFF characters.
  927. */
  928. tty->closing = 1;
  929. if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
  930. tty_wait_until_sent(tty, info->closing_wait);
  931. /*
  932. * At this point we stop accepting input. To do this, we
  933. * disable the receive line status interrupts, and tell the
  934. * interrupt driver to stop checking the data ready bit in the
  935. * line status register.
  936. */
  937. info->IER &= ~UART_IER_RLSI;
  938. if (info->IsMoxaMustChipFlag)
  939. info->IER &= ~MOXA_MUST_RECV_ISR;
  940. /* by William
  941. info->read_status_mask &= ~UART_LSR_DR;
  942. */
  943. if (info->flags & ASYNC_INITIALIZED) {
  944. outb(info->IER, info->base + UART_IER);
  945. /*
  946. * Before we drop DTR, make sure the UART transmitter
  947. * has completely drained; this is especially
  948. * important if there is a transmit FIFO!
  949. */
  950. timeout = jiffies + HZ;
  951. while (!(inb(info->base + UART_LSR) & UART_LSR_TEMT)) {
  952. schedule_timeout_interruptible(5);
  953. if (time_after(jiffies, timeout))
  954. break;
  955. }
  956. }
  957. mxser_shutdown(info);
  958. if (tty->driver->flush_buffer)
  959. tty->driver->flush_buffer(tty);
  960. ld = tty_ldisc_ref(tty);
  961. if (ld) {
  962. if (ld->flush_buffer)
  963. ld->flush_buffer(tty);
  964. tty_ldisc_deref(ld);
  965. }
  966. tty->closing = 0;
  967. info->event = 0;
  968. info->tty = NULL;
  969. if (info->blocked_open) {
  970. if (info->close_delay)
  971. schedule_timeout_interruptible(info->close_delay);
  972. wake_up_interruptible(&info->open_wait);
  973. }
  974. info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
  975. wake_up_interruptible(&info->close_wait);
  976. }
  977. static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
  978. {
  979. int c, total = 0;
  980. struct mxser_struct *info = tty->driver_data;
  981. unsigned long flags;
  982. if (!info->xmit_buf)
  983. return 0;
  984. while (1) {
  985. c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
  986. SERIAL_XMIT_SIZE - info->xmit_head));
  987. if (c <= 0)
  988. break;
  989. memcpy(info->xmit_buf + info->xmit_head, buf, c);
  990. spin_lock_irqsave(&info->slock, flags);
  991. info->xmit_head = (info->xmit_head + c) &
  992. (SERIAL_XMIT_SIZE - 1);
  993. info->xmit_cnt += c;
  994. spin_unlock_irqrestore(&info->slock, flags);
  995. buf += c;
  996. count -= c;
  997. total += c;
  998. }
  999. if (info->xmit_cnt && !tty->stopped && !(info->IER & UART_IER_THRI)) {
  1000. if (!tty->hw_stopped ||
  1001. (info->type == PORT_16550A) ||
  1002. (info->IsMoxaMustChipFlag)) {
  1003. spin_lock_irqsave(&info->slock, flags);
  1004. info->IER |= UART_IER_THRI;
  1005. outb(info->IER, info->base + UART_IER);
  1006. spin_unlock_irqrestore(&info->slock, flags);
  1007. }
  1008. }
  1009. return total;
  1010. }
  1011. static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
  1012. {
  1013. struct mxser_struct *info = tty->driver_data;
  1014. unsigned long flags;
  1015. if (!info->xmit_buf)
  1016. return;
  1017. if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  1018. return;
  1019. spin_lock_irqsave(&info->slock, flags);
  1020. info->xmit_buf[info->xmit_head++] = ch;
  1021. info->xmit_head &= SERIAL_XMIT_SIZE - 1;
  1022. info->xmit_cnt++;
  1023. spin_unlock_irqrestore(&info->slock, flags);
  1024. if (!tty->stopped && !(info->IER & UART_IER_THRI)) {
  1025. if (!tty->hw_stopped ||
  1026. (info->type == PORT_16550A) ||
  1027. info->IsMoxaMustChipFlag) {
  1028. spin_lock_irqsave(&info->slock, flags);
  1029. info->IER |= UART_IER_THRI;
  1030. outb(info->IER, info->base + UART_IER);
  1031. spin_unlock_irqrestore(&info->slock, flags);
  1032. }
  1033. }
  1034. }
  1035. static void mxser_flush_chars(struct tty_struct *tty)
  1036. {
  1037. struct mxser_struct *info = tty->driver_data;
  1038. unsigned long flags;
  1039. if (info->xmit_cnt <= 0 ||
  1040. tty->stopped ||
  1041. !info->xmit_buf ||
  1042. (tty->hw_stopped &&
  1043. (info->type != PORT_16550A) &&
  1044. (!info->IsMoxaMustChipFlag)
  1045. ))
  1046. return;
  1047. spin_lock_irqsave(&info->slock, flags);
  1048. info->IER |= UART_IER_THRI;
  1049. outb(info->IER, info->base + UART_IER);
  1050. spin_unlock_irqrestore(&info->slock, flags);
  1051. }
  1052. static int mxser_write_room(struct tty_struct *tty)
  1053. {
  1054. struct mxser_struct *info = tty->driver_data;
  1055. int ret;
  1056. ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
  1057. if (ret < 0)
  1058. ret = 0;
  1059. return ret;
  1060. }
  1061. static int mxser_chars_in_buffer(struct tty_struct *tty)
  1062. {
  1063. struct mxser_struct *info = tty->driver_data;
  1064. return info->xmit_cnt;
  1065. }
  1066. static void mxser_flush_buffer(struct tty_struct *tty)
  1067. {
  1068. struct mxser_struct *info = tty->driver_data;
  1069. char fcr;
  1070. unsigned long flags;
  1071. spin_lock_irqsave(&info->slock, flags);
  1072. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  1073. /* below added by shinhay */
  1074. fcr = inb(info->base + UART_FCR);
  1075. outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  1076. info->base + UART_FCR);
  1077. outb(fcr, info->base + UART_FCR);
  1078. spin_unlock_irqrestore(&info->slock, flags);
  1079. /* above added by shinhay */
  1080. tty_wakeup(tty);
  1081. }
  1082. static int mxser_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
  1083. {
  1084. struct mxser_struct *info = tty->driver_data;
  1085. int retval;
  1086. struct async_icount cprev, cnow; /* kernel counter temps */
  1087. struct serial_icounter_struct __user *p_cuser;
  1088. unsigned long templ;
  1089. unsigned long flags;
  1090. void __user *argp = (void __user *)arg;
  1091. if (tty->index == MXSER_PORTS)
  1092. return mxser_ioctl_special(cmd, argp);
  1093. /* following add by Victor Yu. 01-05-2004 */
  1094. if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
  1095. int opmode, p;
  1096. static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
  1097. int shiftbit;
  1098. unsigned char val, mask;
  1099. p = info->port % 4;
  1100. if (cmd == MOXA_SET_OP_MODE) {
  1101. if (get_user(opmode, (int __user *) argp))
  1102. return -EFAULT;
  1103. if (opmode != RS232_MODE &&
  1104. opmode != RS485_2WIRE_MODE &&
  1105. opmode != RS422_MODE &&
  1106. opmode != RS485_4WIRE_MODE)
  1107. return -EFAULT;
  1108. mask = ModeMask[p];
  1109. shiftbit = p * 2;
  1110. val = inb(info->opmode_ioaddr);
  1111. val &= mask;
  1112. val |= (opmode << shiftbit);
  1113. outb(val, info->opmode_ioaddr);
  1114. } else {
  1115. shiftbit = p * 2;
  1116. opmode = inb(info->opmode_ioaddr) >> shiftbit;
  1117. opmode &= OP_MODE_MASK;
  1118. if (copy_to_user(argp, &opmode, sizeof(int)))
  1119. return -EFAULT;
  1120. }
  1121. return 0;
  1122. }
  1123. /* above add by Victor Yu. 01-05-2004 */
  1124. if ((cmd != TIOCGSERIAL) && (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
  1125. if (tty->flags & (1 << TTY_IO_ERROR))
  1126. return -EIO;
  1127. }
  1128. switch (cmd) {
  1129. case TCSBRK: /* SVID version: non-zero arg --> no break */
  1130. retval = tty_check_change(tty);
  1131. if (retval)
  1132. return retval;
  1133. tty_wait_until_sent(tty, 0);
  1134. if (!arg)
  1135. mxser_send_break(info, HZ / 4); /* 1/4 second */
  1136. return 0;
  1137. case TCSBRKP: /* support for POSIX tcsendbreak() */
  1138. retval = tty_check_change(tty);
  1139. if (retval)
  1140. return retval;
  1141. tty_wait_until_sent(tty, 0);
  1142. mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
  1143. return 0;
  1144. case TIOCGSOFTCAR:
  1145. return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp);
  1146. case TIOCSSOFTCAR:
  1147. if (get_user(templ, (unsigned long __user *) argp))
  1148. return -EFAULT;
  1149. arg = templ;
  1150. tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
  1151. return 0;
  1152. case TIOCGSERIAL:
  1153. return mxser_get_serial_info(info, argp);
  1154. case TIOCSSERIAL:
  1155. return mxser_set_serial_info(info, argp);
  1156. case TIOCSERGETLSR: /* Get line status register */
  1157. return mxser_get_lsr_info(info, argp);
  1158. /*
  1159. * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  1160. * - mask passed in arg for lines of interest
  1161. * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  1162. * Caller should use TIOCGICOUNT to see which one it was
  1163. */
  1164. case TIOCMIWAIT:
  1165. spin_lock_irqsave(&info->slock, flags);
  1166. cnow = info->icount; /* note the counters on entry */
  1167. spin_unlock_irqrestore(&info->slock, flags);
  1168. wait_event_interruptible(info->delta_msr_wait, ({
  1169. cprev = cnow;
  1170. spin_lock_irqsave(&info->slock, flags);
  1171. cnow = info->icount; /* atomic copy */
  1172. spin_unlock_irqrestore(&info->slock, flags);
  1173. ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
  1174. ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
  1175. ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
  1176. ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts));
  1177. }));
  1178. break;
  1179. /*
  1180. * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  1181. * Return: write counters to the user passed counter struct
  1182. * NB: both 1->0 and 0->1 transitions are counted except for
  1183. * RI where only 0->1 is counted.
  1184. */
  1185. case TIOCGICOUNT:
  1186. spin_lock_irqsave(&info->slock, flags);
  1187. cnow = info->icount;
  1188. spin_unlock_irqrestore(&info->slock, flags);
  1189. p_cuser = argp;
  1190. /* modified by casper 1/11/2000 */
  1191. if (put_user(cnow.frame, &p_cuser->frame))
  1192. return -EFAULT;
  1193. if (put_user(cnow.brk, &p_cuser->brk))
  1194. return -EFAULT;
  1195. if (put_user(cnow.overrun, &p_cuser->overrun))
  1196. return -EFAULT;
  1197. if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
  1198. return -EFAULT;
  1199. if (put_user(cnow.parity, &p_cuser->parity))
  1200. return -EFAULT;
  1201. if (put_user(cnow.rx, &p_cuser->rx))
  1202. return -EFAULT;
  1203. if (put_user(cnow.tx, &p_cuser->tx))
  1204. return -EFAULT;
  1205. put_user(cnow.cts, &p_cuser->cts);
  1206. put_user(cnow.dsr, &p_cuser->dsr);
  1207. put_user(cnow.rng, &p_cuser->rng);
  1208. put_user(cnow.dcd, &p_cuser->dcd);
  1209. return 0;
  1210. case MOXA_HighSpeedOn:
  1211. return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
  1212. case MOXA_SDS_RSTICOUNTER: {
  1213. info->mon_data.rxcnt = 0;
  1214. info->mon_data.txcnt = 0;
  1215. return 0;
  1216. }
  1217. /* (above) added by James. */
  1218. case MOXA_ASPP_SETBAUD:{
  1219. long baud;
  1220. if (get_user(baud, (long __user *)argp))
  1221. return -EFAULT;
  1222. mxser_set_baud(info, baud);
  1223. return 0;
  1224. }
  1225. case MOXA_ASPP_GETBAUD:
  1226. if (copy_to_user(argp, &info->realbaud, sizeof(long)))
  1227. return -EFAULT;
  1228. return 0;
  1229. case MOXA_ASPP_OQUEUE:{
  1230. int len, lsr;
  1231. len = mxser_chars_in_buffer(tty);
  1232. lsr = inb(info->base + UART_LSR) & UART_LSR_TEMT;
  1233. len += (lsr ? 0 : 1);
  1234. if (copy_to_user(argp, &len, sizeof(int)))
  1235. return -EFAULT;
  1236. return 0;
  1237. }
  1238. case MOXA_ASPP_MON: {
  1239. int mcr, status;
  1240. /* info->mon_data.ser_param = tty->termios->c_cflag; */
  1241. status = mxser_get_msr(info->base, 1, info->port, info);
  1242. mxser_check_modem_status(info, status);
  1243. mcr = inb(info->base + UART_MCR);
  1244. if (mcr & MOXA_MUST_MCR_XON_FLAG)
  1245. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
  1246. else
  1247. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
  1248. if (mcr & MOXA_MUST_MCR_TX_XON)
  1249. info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
  1250. else
  1251. info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
  1252. if (info->tty->hw_stopped)
  1253. info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
  1254. else
  1255. info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
  1256. if (copy_to_user(argp, &info->mon_data,
  1257. sizeof(struct mxser_mon)))
  1258. return -EFAULT;
  1259. return 0;
  1260. }
  1261. case MOXA_ASPP_LSTATUS: {
  1262. if (copy_to_user(argp, &info->err_shadow,
  1263. sizeof(unsigned char)))
  1264. return -EFAULT;
  1265. info->err_shadow = 0;
  1266. return 0;
  1267. }
  1268. case MOXA_SET_BAUD_METHOD: {
  1269. int method;
  1270. if (get_user(method, (int __user *)argp))
  1271. return -EFAULT;
  1272. mxser_set_baud_method[info->port] = method;
  1273. if (copy_to_user(argp, &method, sizeof(int)))
  1274. return -EFAULT;
  1275. return 0;
  1276. }
  1277. default:
  1278. return -ENOIOCTLCMD;
  1279. }
  1280. return 0;
  1281. }
  1282. #ifndef CMSPAR
  1283. #define CMSPAR 010000000000
  1284. #endif
  1285. static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
  1286. {
  1287. int i, result, status;
  1288. switch (cmd) {
  1289. case MOXA_GET_CONF:
  1290. if (copy_to_user(argp, mxsercfg,
  1291. sizeof(struct mxser_hwconf) * 4))
  1292. return -EFAULT;
  1293. return 0;
  1294. case MOXA_GET_MAJOR:
  1295. if (copy_to_user(argp, &ttymajor, sizeof(int)))
  1296. return -EFAULT;
  1297. return 0;
  1298. case MOXA_GET_CUMAJOR:
  1299. if (copy_to_user(argp, &calloutmajor, sizeof(int)))
  1300. return -EFAULT;
  1301. return 0;
  1302. case MOXA_CHKPORTENABLE:
  1303. result = 0;
  1304. for (i = 0; i < MXSER_PORTS; i++) {
  1305. if (mxvar_table[i].base)
  1306. result |= (1 << i);
  1307. }
  1308. return put_user(result, (unsigned long __user *)argp);
  1309. case MOXA_GETDATACOUNT:
  1310. if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
  1311. return -EFAULT;
  1312. return 0;
  1313. case MOXA_GETMSTATUS:
  1314. for (i = 0; i < MXSER_PORTS; i++) {
  1315. GMStatus[i].ri = 0;
  1316. if (!mxvar_table[i].base) {
  1317. GMStatus[i].dcd = 0;
  1318. GMStatus[i].dsr = 0;
  1319. GMStatus[i].cts = 0;
  1320. continue;
  1321. }
  1322. if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios)
  1323. GMStatus[i].cflag = mxvar_table[i].normal_termios.c_cflag;
  1324. else
  1325. GMStatus[i].cflag = mxvar_table[i].tty->termios->c_cflag;
  1326. status = inb(mxvar_table[i].base + UART_MSR);
  1327. if (status & 0x80 /*UART_MSR_DCD */ )
  1328. GMStatus[i].dcd = 1;
  1329. else
  1330. GMStatus[i].dcd = 0;
  1331. if (status & 0x20 /*UART_MSR_DSR */ )
  1332. GMStatus[i].dsr = 1;
  1333. else
  1334. GMStatus[i].dsr = 0;
  1335. if (status & 0x10 /*UART_MSR_CTS */ )
  1336. GMStatus[i].cts = 1;
  1337. else
  1338. GMStatus[i].cts = 0;
  1339. }
  1340. if (copy_to_user(argp, GMStatus,
  1341. sizeof(struct mxser_mstatus) * MXSER_PORTS))
  1342. return -EFAULT;
  1343. return 0;
  1344. case MOXA_ASPP_MON_EXT: {
  1345. int status;
  1346. int opmode, p;
  1347. int shiftbit;
  1348. unsigned cflag, iflag;
  1349. for (i = 0; i < MXSER_PORTS; i++) {
  1350. if (!mxvar_table[i].base)
  1351. continue;
  1352. status = mxser_get_msr(mxvar_table[i].base, 0,
  1353. i, &(mxvar_table[i]));
  1354. /*
  1355. mxser_check_modem_status(&mxvar_table[i],
  1356. status);
  1357. */
  1358. if (status & UART_MSR_TERI)
  1359. mxvar_table[i].icount.rng++;
  1360. if (status & UART_MSR_DDSR)
  1361. mxvar_table[i].icount.dsr++;
  1362. if (status & UART_MSR_DDCD)
  1363. mxvar_table[i].icount.dcd++;
  1364. if (status & UART_MSR_DCTS)
  1365. mxvar_table[i].icount.cts++;
  1366. mxvar_table[i].mon_data.modem_status = status;
  1367. mon_data_ext.rx_cnt[i] = mxvar_table[i].mon_data.rxcnt;
  1368. mon_data_ext.tx_cnt[i] = mxvar_table[i].mon_data.txcnt;
  1369. mon_data_ext.up_rxcnt[i] = mxvar_table[i].mon_data.up_rxcnt;
  1370. mon_data_ext.up_txcnt[i] = mxvar_table[i].mon_data.up_txcnt;
  1371. mon_data_ext.modem_status[i] = mxvar_table[i].mon_data.modem_status;
  1372. mon_data_ext.baudrate[i] = mxvar_table[i].realbaud;
  1373. if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios) {
  1374. cflag = mxvar_table[i].normal_termios.c_cflag;
  1375. iflag = mxvar_table[i].normal_termios.c_iflag;
  1376. } else {
  1377. cflag = mxvar_table[i].tty->termios->c_cflag;
  1378. iflag = mxvar_table[i].tty->termios->c_iflag;
  1379. }
  1380. mon_data_ext.databits[i] = cflag & CSIZE;
  1381. mon_data_ext.stopbits[i] = cflag & CSTOPB;
  1382. mon_data_ext.parity[i] = cflag & (PARENB | PARODD | CMSPAR);
  1383. mon_data_ext.flowctrl[i] = 0x00;
  1384. if (cflag & CRTSCTS)
  1385. mon_data_ext.flowctrl[i] |= 0x03;
  1386. if (iflag & (IXON | IXOFF))
  1387. mon_data_ext.flowctrl[i] |= 0x0C;
  1388. if (mxvar_table[i].type == PORT_16550A)
  1389. mon_data_ext.fifo[i] = 1;
  1390. else
  1391. mon_data_ext.fifo[i] = 0;
  1392. p = i % 4;
  1393. shiftbit = p * 2;
  1394. opmode = inb(mxvar_table[i].opmode_ioaddr) >> shiftbit;
  1395. opmode &= OP_MODE_MASK;
  1396. mon_data_ext.iftype[i] = opmode;
  1397. }
  1398. if (copy_to_user(argp, &mon_data_ext, sizeof(struct mxser_mon_ext)))
  1399. return -EFAULT;
  1400. return 0;
  1401. }
  1402. default:
  1403. return -ENOIOCTLCMD;
  1404. }
  1405. return 0;
  1406. }
  1407. static void mxser_stoprx(struct tty_struct *tty)
  1408. {
  1409. struct mxser_struct *info = tty->driver_data;
  1410. /* unsigned long flags; */
  1411. info->ldisc_stop_rx = 1;
  1412. if (I_IXOFF(tty)) {
  1413. /* MX_LOCK(&info->slock); */
  1414. /* following add by Victor Yu. 09-02-2002 */
  1415. if (info->IsMoxaMustChipFlag) {
  1416. info->IER &= ~MOXA_MUST_RECV_ISR;
  1417. outb(info->IER, info->base + UART_IER);
  1418. } else {
  1419. /* above add by Victor Yu. 09-02-2002 */
  1420. info->x_char = STOP_CHAR(tty);
  1421. /* mask by Victor Yu. 09-02-2002 */
  1422. /* outb(info->IER, 0); */
  1423. outb(0, info->base + UART_IER);
  1424. info->IER |= UART_IER_THRI;
  1425. /* force Tx interrupt */
  1426. outb(info->IER, info->base + UART_IER);
  1427. } /* add by Victor Yu. 09-02-2002 */
  1428. /* MX_UNLOCK(&info->slock); */
  1429. }
  1430. if (info->tty->termios->c_cflag & CRTSCTS) {
  1431. /* MX_LOCK(&info->slock); */
  1432. info->MCR &= ~UART_MCR_RTS;
  1433. outb(info->MCR, info->base + UART_MCR);
  1434. /* MX_UNLOCK(&info->slock); */
  1435. }
  1436. }
  1437. static void mxser_startrx(struct tty_struct *tty)
  1438. {
  1439. struct mxser_struct *info = tty->driver_data;
  1440. /* unsigned long flags; */
  1441. info->ldisc_stop_rx = 0;
  1442. if (I_IXOFF(tty)) {
  1443. if (info->x_char)
  1444. info->x_char = 0;
  1445. else {
  1446. /* MX_LOCK(&info->slock); */
  1447. /* following add by Victor Yu. 09-02-2002 */
  1448. if (info->IsMoxaMustChipFlag) {
  1449. info->IER |= MOXA_MUST_RECV_ISR;
  1450. outb(info->IER, info->base + UART_IER);
  1451. } else {
  1452. /* above add by Victor Yu. 09-02-2002 */
  1453. info->x_char = START_CHAR(tty);
  1454. /* mask by Victor Yu. 09-02-2002 */
  1455. /* outb(info->IER, 0); */
  1456. /* add by Victor Yu. 09-02-2002 */
  1457. outb(0, info->base + UART_IER);
  1458. /* force Tx interrupt */
  1459. info->IER |= UART_IER_THRI;
  1460. outb(info->IER, info->base + UART_IER);
  1461. } /* add by Victor Yu. 09-02-2002 */
  1462. /* MX_UNLOCK(&info->slock); */
  1463. }
  1464. }
  1465. if (info->tty->termios->c_cflag & CRTSCTS) {
  1466. /* MX_LOCK(&info->slock); */
  1467. info->MCR |= UART_MCR_RTS;
  1468. outb(info->MCR, info->base + UART_MCR);
  1469. /* MX_UNLOCK(&info->slock); */
  1470. }
  1471. }
  1472. /*
  1473. * This routine is called by the upper-layer tty layer to signal that
  1474. * incoming characters should be throttled.
  1475. */
  1476. static void mxser_throttle(struct tty_struct *tty)
  1477. {
  1478. /* struct mxser_struct *info = tty->driver_data; */
  1479. /* unsigned long flags; */
  1480. /* MX_LOCK(&info->slock); */
  1481. mxser_stoprx(tty);
  1482. /* MX_UNLOCK(&info->slock); */
  1483. }
  1484. static void mxser_unthrottle(struct tty_struct *tty)
  1485. {
  1486. /* struct mxser_struct *info = tty->driver_data; */
  1487. /* unsigned long flags; */
  1488. /* MX_LOCK(&info->slock); */
  1489. mxser_startrx(tty);
  1490. /* MX_UNLOCK(&info->slock); */
  1491. }
  1492. static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
  1493. {
  1494. struct mxser_struct *info = tty->driver_data;
  1495. unsigned long flags;
  1496. mxser_change_speed(info, old_termios);
  1497. if ((old_termios->c_cflag & CRTSCTS) &&
  1498. !(tty->termios->c_cflag & CRTSCTS)) {
  1499. tty->hw_stopped = 0;
  1500. mxser_start(tty);
  1501. }
  1502. /* Handle sw stopped */
  1503. if ((old_termios->c_iflag & IXON) &&
  1504. !(tty->termios->c_iflag & IXON)) {
  1505. tty->stopped = 0;
  1506. /* following add by Victor Yu. 09-02-2002 */
  1507. if (info->IsMoxaMustChipFlag) {
  1508. spin_lock_irqsave(&info->slock, flags);
  1509. DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
  1510. spin_unlock_irqrestore(&info->slock, flags);
  1511. }
  1512. /* above add by Victor Yu. 09-02-2002 */
  1513. mxser_start(tty);
  1514. }
  1515. }
  1516. /*
  1517. * mxser_stop() and mxser_start()
  1518. *
  1519. * This routines are called before setting or resetting tty->stopped.
  1520. * They enable or disable transmitter interrupts, as necessary.
  1521. */
  1522. static void mxser_stop(struct tty_struct *tty)
  1523. {
  1524. struct mxser_struct *info = tty->driver_data;
  1525. unsigned long flags;
  1526. spin_lock_irqsave(&info->slock, flags);
  1527. if (info->IER & UART_IER_THRI) {
  1528. info->IER &= ~UART_IER_THRI;
  1529. outb(info->IER, info->base + UART_IER);
  1530. }
  1531. spin_unlock_irqrestore(&info->slock, flags);
  1532. }
  1533. static void mxser_start(struct tty_struct *tty)
  1534. {
  1535. struct mxser_struct *info = tty->driver_data;
  1536. unsigned long flags;
  1537. spin_lock_irqsave(&info->slock, flags);
  1538. if (info->xmit_cnt && info->xmit_buf && !(info->IER & UART_IER_THRI)) {
  1539. info->IER |= UART_IER_THRI;
  1540. outb(info->IER, info->base + UART_IER);
  1541. }
  1542. spin_unlock_irqrestore(&info->slock, flags);
  1543. }
  1544. /*
  1545. * mxser_wait_until_sent() --- wait until the transmitter is empty
  1546. */
  1547. static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
  1548. {
  1549. struct mxser_struct *info = tty->driver_data;
  1550. unsigned long orig_jiffies, char_time;
  1551. int lsr;
  1552. if (info->type == PORT_UNKNOWN)
  1553. return;
  1554. if (info->xmit_fifo_size == 0)
  1555. return; /* Just in case.... */
  1556. orig_jiffies = jiffies;
  1557. /*
  1558. * Set the check interval to be 1/5 of the estimated time to
  1559. * send a single character, and make it at least 1. The check
  1560. * interval should also be less than the timeout.
  1561. *
  1562. * Note: we have to use pretty tight timings here to satisfy
  1563. * the NIST-PCTS.
  1564. */
  1565. char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
  1566. char_time = char_time / 5;
  1567. if (char_time == 0)
  1568. char_time = 1;
  1569. if (timeout && timeout < char_time)
  1570. char_time = timeout;
  1571. /*
  1572. * If the transmitter hasn't cleared in twice the approximate
  1573. * amount of time to send the entire FIFO, it probably won't
  1574. * ever clear. This assumes the UART isn't doing flow
  1575. * control, which is currently the case. Hence, if it ever
  1576. * takes longer than info->timeout, this is probably due to a
  1577. * UART bug of some kind. So, we clamp the timeout parameter at
  1578. * 2*info->timeout.
  1579. */
  1580. if (!timeout || timeout > 2 * info->timeout)
  1581. timeout = 2 * info->timeout;
  1582. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1583. printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
  1584. timeout, char_time);
  1585. printk("jiff=%lu...", jiffies);
  1586. #endif
  1587. while (!((lsr = inb(info->base + UART_LSR)) & UART_LSR_TEMT)) {
  1588. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1589. printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
  1590. #endif
  1591. schedule_timeout_interruptible(char_time);
  1592. if (signal_pending(current))
  1593. break;
  1594. if (timeout && time_after(jiffies, orig_jiffies + timeout))
  1595. break;
  1596. }
  1597. set_current_state(TASK_RUNNING);
  1598. #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
  1599. printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
  1600. #endif
  1601. }
  1602. /*
  1603. * This routine is called by tty_hangup() when a hangup is signaled.
  1604. */
  1605. void mxser_hangup(struct tty_struct *tty)
  1606. {
  1607. struct mxser_struct *info = tty->driver_data;
  1608. mxser_flush_buffer(tty);
  1609. mxser_shutdown(info);
  1610. info->event = 0;
  1611. info->count = 0;
  1612. info->flags &= ~ASYNC_NORMAL_ACTIVE;
  1613. info->tty = NULL;
  1614. wake_up_interruptible(&info->open_wait);
  1615. }
  1616. /* added by James 03-12-2004. */
  1617. /*
  1618. * mxser_rs_break() --- routine which turns the break handling on or off
  1619. */
  1620. static void mxser_rs_break(struct tty_struct *tty, int break_state)
  1621. {
  1622. struct mxser_struct *info = tty->driver_data;
  1623. unsigned long flags;
  1624. spin_lock_irqsave(&info->slock, flags);
  1625. if (break_state == -1)
  1626. outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
  1627. info->base + UART_LCR);
  1628. else
  1629. outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
  1630. info->base + UART_LCR);
  1631. spin_unlock_irqrestore(&info->slock, flags);
  1632. }
  1633. /* (above) added by James. */
  1634. /*
  1635. * This is the serial driver's generic interrupt routine
  1636. */
  1637. static irqreturn_t mxser_interrupt(int irq, void *dev_id)
  1638. {
  1639. int status, iir, i;
  1640. struct mxser_struct *info;
  1641. struct mxser_struct *port;
  1642. int max, irqbits, bits, msr;
  1643. int pass_counter = 0;
  1644. int handled = IRQ_NONE;
  1645. port = NULL;
  1646. /* spin_lock(&gm_lock); */
  1647. for (i = 0; i < MXSER_BOARDS; i++) {
  1648. if (dev_id == &(mxvar_table[i * MXSER_PORTS_PER_BOARD])) {
  1649. port = dev_id;
  1650. break;
  1651. }
  1652. }
  1653. if (i == MXSER_BOARDS)
  1654. goto irq_stop;
  1655. if (port == 0)
  1656. goto irq_stop;
  1657. max = mxser_numports[mxsercfg[i].board_type - 1];
  1658. while (1) {
  1659. irqbits = inb(port->vector) & port->vectormask;
  1660. if (irqbits == port->vectormask)
  1661. break;
  1662. handled = IRQ_HANDLED;
  1663. for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
  1664. if (irqbits == port->vectormask)
  1665. break;
  1666. if (bits & irqbits)
  1667. continue;
  1668. info = port + i;
  1669. /* following add by Victor Yu. 09-13-2002 */
  1670. iir = inb(info->base + UART_IIR);
  1671. if (iir & UART_IIR_NO_INT)
  1672. continue;
  1673. iir &= MOXA_MUST_IIR_MASK;
  1674. if (!info->tty) {
  1675. status = inb(info->base + UART_LSR);
  1676. outb(0x27, info->base + UART_FCR);
  1677. inb(info->base + UART_MSR);
  1678. continue;
  1679. }
  1680. /* mask by Victor Yu. 09-13-2002
  1681. if ( !info->tty ||
  1682. (inb(info->base + UART_IIR) & UART_IIR_NO_INT) )
  1683. continue;
  1684. */
  1685. /* mask by Victor Yu. 09-02-2002
  1686. status = inb(info->base + UART_LSR) & info->read_status_mask;
  1687. */
  1688. /* following add by Victor Yu. 09-02-2002 */
  1689. status = inb(info->base + UART_LSR);
  1690. if (status & UART_LSR_PE)
  1691. info->err_shadow |= NPPI_NOTIFY_PARITY;
  1692. if (status & UART_LSR_FE)
  1693. info->err_shadow |= NPPI_NOTIFY_FRAMING;
  1694. if (status & UART_LSR_OE)
  1695. info->err_shadow |= NPPI_NOTIFY_HW_OVERRUN;
  1696. if (status & UART_LSR_BI)
  1697. info->err_shadow |= NPPI_NOTIFY_BREAK;
  1698. if (info->IsMoxaMustChipFlag) {
  1699. /*
  1700. if ( (status & 0x02) && !(status & 0x01) ) {
  1701. outb(info->base+UART_FCR, 0x23);
  1702. continue;
  1703. }
  1704. */
  1705. if (iir == MOXA_MUST_IIR_GDA ||
  1706. iir == MOXA_MUST_IIR_RDA ||
  1707. iir == MOXA_MUST_IIR_RTO ||
  1708. iir == MOXA_MUST_IIR_LSR)
  1709. mxser_receive_chars(info, &status);
  1710. } else {
  1711. /* above add by Victor Yu. 09-02-2002 */
  1712. status &= info->read_status_mask;
  1713. if (status & UART_LSR_DR)
  1714. mxser_receive_chars(info, &status);
  1715. }
  1716. msr = inb(info->base + UART_MSR);
  1717. if (msr & UART_MSR_ANY_DELTA) {
  1718. mxser_check_modem_status(info, msr);
  1719. }
  1720. /* following add by Victor Yu. 09-13-2002 */
  1721. if (info->IsMoxaMustChipFlag) {
  1722. if ((iir == 0x02) && (status & UART_LSR_THRE)) {
  1723. mxser_transmit_chars(info);
  1724. }
  1725. } else {
  1726. /* above add by Victor Yu. 09-13-2002 */
  1727. if (status & UART_LSR_THRE) {
  1728. /* 8-2-99 by William
  1729. if ( info->x_char || (info->xmit_cnt > 0) )
  1730. */
  1731. mxser_transmit_chars(info);
  1732. }
  1733. }
  1734. }
  1735. if (pass_counter++ > MXSER_ISR_PASS_LIMIT) {
  1736. break; /* Prevent infinite loops */
  1737. }
  1738. }
  1739. irq_stop:
  1740. /* spin_unlock(&gm_lock); */
  1741. return handled;
  1742. }
  1743. static void mxser_receive_chars(struct mxser_struct *info, int *status)
  1744. {
  1745. struct tty_struct *tty = info->tty;
  1746. unsigned char ch, gdl;
  1747. int ignored = 0;
  1748. int cnt = 0;
  1749. int recv_room;
  1750. int max = 256;
  1751. unsigned long flags;
  1752. spin_lock_irqsave(&info->slock, flags);
  1753. recv_room = tty->receive_room;
  1754. if ((recv_room == 0) && (!info->ldisc_stop_rx)) {
  1755. /* mxser_throttle(tty); */
  1756. mxser_stoprx(tty);
  1757. /* return; */
  1758. }
  1759. /* following add by Victor Yu. 09-02-2002 */
  1760. if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
  1761. if (*status & UART_LSR_SPECIAL) {
  1762. goto intr_old;
  1763. }
  1764. /* following add by Victor Yu. 02-11-2004 */
  1765. if (info->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID &&
  1766. (*status & MOXA_MUST_LSR_RERR))
  1767. goto intr_old;
  1768. /* above add by Victor Yu. 02-14-2004 */
  1769. if (*status & MOXA_MUST_LSR_RERR)
  1770. goto intr_old;
  1771. gdl = inb(info->base + MOXA_MUST_GDL_REGISTER);
  1772. /* add by Victor Yu. 02-11-2004 */
  1773. if (info->IsMoxaMustChipFlag == MOXA_MUST_MU150_HWID)
  1774. gdl &= MOXA_MUST_GDL_MASK;
  1775. if (gdl >= recv_room) {
  1776. if (!info->ldisc_stop_rx) {
  1777. /* mxser_throttle(tty); */
  1778. mxser_stoprx(tty);
  1779. }
  1780. /* return; */
  1781. }
  1782. while (gdl--) {
  1783. ch = inb(info->base + UART_RX);
  1784. tty_insert_flip_char(tty, ch, 0);
  1785. cnt++;
  1786. /*
  1787. if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
  1788. mxser_stoprx(tty);
  1789. info->stop_rx = 1;
  1790. break;
  1791. } */
  1792. }
  1793. goto end_intr;
  1794. }
  1795. intr_old:
  1796. /* above add by Victor Yu. 09-02-2002 */
  1797. do {
  1798. if (max-- < 0)
  1799. break;
  1800. /*
  1801. if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
  1802. mxser_stoprx(tty);
  1803. info->stop_rx=1;
  1804. break;
  1805. }
  1806. */
  1807. ch = inb(info->base + UART_RX);
  1808. /* following add by Victor Yu. 09-02-2002 */
  1809. if (info->IsMoxaMustChipFlag && (*status & UART_LSR_OE) /*&& !(*status&UART_LSR_DR) */ )
  1810. outb(0x23, info->base + UART_FCR);
  1811. *status &= info->read_status_mask;
  1812. /* above add by Victor Yu. 09-02-2002 */
  1813. if (*status & info->ignore_status_mask) {
  1814. if (++ignored > 100)
  1815. break;
  1816. } else {
  1817. char flag = 0;
  1818. if (*status & UART_LSR_SPECIAL) {
  1819. if (*status & UART_LSR_BI) {
  1820. flag = TTY_BREAK;
  1821. /* added by casper 1/11/2000 */
  1822. info->icount.brk++;
  1823. /* */
  1824. if (info->flags & ASYNC_SAK)
  1825. do_SAK(tty);
  1826. } else if (*status & UART_LSR_PE) {
  1827. flag = TTY_PARITY;
  1828. /* added by casper 1/11/2000 */
  1829. info->icount.parity++;
  1830. /* */
  1831. } else if (*status & UART_LSR_FE) {
  1832. flag = TTY_FRAME;
  1833. /* added by casper 1/11/2000 */
  1834. info->icount.frame++;
  1835. /* */
  1836. } else if (*status & UART_LSR_OE) {
  1837. flag = TTY_OVERRUN;
  1838. /* added by casper 1/11/2000 */
  1839. info->icount.overrun++;
  1840. /* */
  1841. }
  1842. }
  1843. tty_insert_flip_char(tty, ch, flag);
  1844. cnt++;
  1845. if (cnt >= recv_room) {
  1846. if (!info->ldisc_stop_rx) {
  1847. /* mxser_throttle(tty); */
  1848. mxser_stoprx(tty);
  1849. }
  1850. break;
  1851. }
  1852. }
  1853. /* following add by Victor Yu. 09-02-2002 */
  1854. if (info->IsMoxaMustChipFlag)
  1855. break;
  1856. /* above add by Victor Yu. 09-02-2002 */
  1857. /* mask by Victor Yu. 09-02-2002
  1858. *status = inb(info->base + UART_LSR) & info->read_status_mask;
  1859. */
  1860. /* following add by Victor Yu. 09-02-2002 */
  1861. *status = inb(info->base + UART_LSR);
  1862. /* above add by Victor Yu. 09-02-2002 */
  1863. } while (*status & UART_LSR_DR);
  1864. end_intr: /* add by Victor Yu. 09-02-2002 */
  1865. mxvar_log.rxcnt[info->port] += cnt;
  1866. info->mon_data.rxcnt += cnt;
  1867. info->mon_data.up_rxcnt += cnt;
  1868. spin_unlock_irqrestore(&info->slock, flags);
  1869. tty_flip_buffer_push(tty);
  1870. }
  1871. static void mxser_transmit_chars(struct mxser_struct *info)
  1872. {
  1873. int count, cnt;
  1874. unsigned long flags;
  1875. spin_lock_irqsave(&info->slock, flags);
  1876. if (info->x_char) {
  1877. outb(info->x_char, info->base + UART_TX);
  1878. info->x_char = 0;
  1879. mxvar_log.txcnt[info->port]++;
  1880. info->mon_data.txcnt++;
  1881. info->mon_data.up_txcnt++;
  1882. /* added by casper 1/11/2000 */
  1883. info->icount.tx++;
  1884. /* */
  1885. spin_unlock_irqrestore(&info->slock, flags);
  1886. return;
  1887. }
  1888. if (info->xmit_buf == 0) {
  1889. spin_unlock_irqrestore(&info->slock, flags);
  1890. return;
  1891. }
  1892. if ((info->xmit_cnt <= 0) || info->tty->stopped ||
  1893. (info->tty->hw_stopped &&
  1894. (info->type != PORT_16550A) &&
  1895. (!info->IsMoxaMustChipFlag))) {
  1896. info->IER &= ~UART_IER_THRI;
  1897. outb(info->IER, info->base + UART_IER);
  1898. spin_unlock_irqrestore(&info->slock, flags);
  1899. return;
  1900. }
  1901. cnt = info->xmit_cnt;
  1902. count = info->xmit_fifo_size;
  1903. do {
  1904. outb(info->xmit_buf[info->xmit_tail++],
  1905. info->base + UART_TX);
  1906. info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE - 1);
  1907. if (--info->xmit_cnt <= 0)
  1908. break;
  1909. } while (--count > 0);
  1910. mxvar_log.txcnt[info->port] += (cnt - info->xmit_cnt);
  1911. /* added by James 03-12-2004. */
  1912. info->mon_data.txcnt += (cnt - info->xmit_cnt);
  1913. info->mon_data.up_txcnt += (cnt - info->xmit_cnt);
  1914. /* (above) added by James. */
  1915. /* added by casper 1/11/2000 */
  1916. info->icount.tx += (cnt - info->xmit_cnt);
  1917. /* */
  1918. if (info->xmit_cnt < WAKEUP_CHARS) {
  1919. set_bit(MXSER_EVENT_TXLOW, &info->event);
  1920. schedule_work(&info->tqueue);
  1921. }
  1922. if (info->xmit_cnt <= 0) {
  1923. info->IER &= ~UART_IER_THRI;
  1924. outb(info->IER, info->base + UART_IER);
  1925. }
  1926. spin_unlock_irqrestore(&info->slock, flags);
  1927. }
  1928. static void mxser_check_modem_status(struct mxser_struct *info, int status)
  1929. {
  1930. /* update input line counters */
  1931. if (status & UART_MSR_TERI)
  1932. info->icount.rng++;
  1933. if (status & UART_MSR_DDSR)
  1934. info->icount.dsr++;
  1935. if (status & UART_MSR_DDCD)
  1936. info->icount.dcd++;
  1937. if (status & UART_MSR_DCTS)
  1938. info->icount.cts++;
  1939. info->mon_data.modem_status = status;
  1940. wake_up_interruptible(&info->delta_msr_wait);
  1941. if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
  1942. if (status & UART_MSR_DCD)
  1943. wake_up_interruptible(&info->open_wait);
  1944. schedule_work(&info->tqueue);
  1945. }
  1946. if (info->flags & ASYNC_CTS_FLOW) {
  1947. if (info->tty->hw_stopped) {
  1948. if (status & UART_MSR_CTS) {
  1949. info->tty->hw_stopped = 0;
  1950. if ((info->type != PORT_16550A) &&
  1951. (!info->IsMoxaMustChipFlag)) {
  1952. info->IER |= UART_IER_THRI;
  1953. outb(info->IER, info->base + UART_IER);
  1954. }
  1955. set_bit(MXSER_EVENT_TXLOW, &info->event);
  1956. schedule_work(&info->tqueue); }
  1957. } else {
  1958. if (!(status & UART_MSR_CTS)) {
  1959. info->tty->hw_stopped = 1;
  1960. if ((info->type != PORT_16550A) &&
  1961. (!info->IsMoxaMustChipFlag)) {
  1962. info->IER &= ~UART_IER_THRI;
  1963. outb(info->IER, info->base + UART_IER);
  1964. }
  1965. }
  1966. }
  1967. }
  1968. }
  1969. static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, struct mxser_struct *info)
  1970. {
  1971. DECLARE_WAITQUEUE(wait, current);
  1972. int retval;
  1973. int do_clocal = 0;
  1974. unsigned long flags;
  1975. /*
  1976. * If non-blocking mode is set, or the port is not enabled,
  1977. * then make the check up front and then exit.
  1978. */
  1979. if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
  1980. info->flags |= ASYNC_NORMAL_ACTIVE;
  1981. return 0;
  1982. }
  1983. if (tty->termios->c_cflag & CLOCAL)
  1984. do_clocal = 1;
  1985. /*
  1986. * Block waiting for the carrier detect and the line to become
  1987. * free (i.e., not in use by the callout). While we are in
  1988. * this loop, info->count is dropped by one, so that
  1989. * mxser_close() knows when to free things. We restore it upon
  1990. * exit, either normal or abnormal.
  1991. */
  1992. retval = 0;
  1993. add_wait_queue(&info->open_wait, &wait);
  1994. spin_lock_irqsave(&info->slock, flags);
  1995. if (!tty_hung_up_p(filp))
  1996. info->count--;
  1997. spin_unlock_irqrestore(&info->slock, flags);
  1998. info->blocked_open++;
  1999. while (1) {
  2000. spin_lock_irqsave(&info->slock, flags);
  2001. outb(inb(info->base + UART_MCR) |
  2002. UART_MCR_DTR | UART_MCR_RTS, info->base + UART_MCR);
  2003. spin_unlock_irqrestore(&info->slock, flags);
  2004. set_current_state(TASK_INTERRUPTIBLE);
  2005. if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)) {
  2006. if (info->flags & ASYNC_HUP_NOTIFY)
  2007. retval = -EAGAIN;
  2008. else
  2009. retval = -ERESTARTSYS;
  2010. break;
  2011. }
  2012. if (!(info->flags & ASYNC_CLOSING) &&
  2013. (do_clocal ||
  2014. (inb(info->base + UART_MSR) & UART_MSR_DCD)))
  2015. break;
  2016. if (signal_pending(current)) {
  2017. retval = -ERESTARTSYS;
  2018. break;
  2019. }
  2020. schedule();
  2021. }
  2022. set_current_state(TASK_RUNNING);
  2023. remove_wait_queue(&info->open_wait, &wait);
  2024. if (!tty_hung_up_p(filp))
  2025. info->count++;
  2026. info->blocked_open--;
  2027. if (retval)
  2028. return retval;
  2029. info->flags |= ASYNC_NORMAL_ACTIVE;
  2030. return 0;
  2031. }
  2032. static int mxser_startup(struct mxser_struct *info)
  2033. {
  2034. unsigned long page;
  2035. unsigned long flags;
  2036. page = __get_free_page(GFP_KERNEL);
  2037. if (!page)
  2038. return -ENOMEM;
  2039. spin_lock_irqsave(&info->slock, flags);
  2040. if (info->flags & ASYNC_INITIALIZED) {
  2041. free_page(page);
  2042. spin_unlock_irqrestore(&info->slock, flags);
  2043. return 0;
  2044. }
  2045. if (!info->base || !info->type) {
  2046. if (info->tty)
  2047. set_bit(TTY_IO_ERROR, &info->tty->flags);
  2048. free_page(page);
  2049. spin_unlock_irqrestore(&info->slock, flags);
  2050. return 0;
  2051. }
  2052. if (info->xmit_buf)
  2053. free_page(page);
  2054. else
  2055. info->xmit_buf = (unsigned char *) page;
  2056. /*
  2057. * Clear the FIFO buffers and disable them
  2058. * (they will be reenabled in mxser_change_speed())
  2059. */
  2060. if (info->IsMoxaMustChipFlag)
  2061. outb((UART_FCR_CLEAR_RCVR |
  2062. UART_FCR_CLEAR_XMIT |
  2063. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
  2064. else
  2065. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  2066. info->base + UART_FCR);
  2067. /*
  2068. * At this point there's no way the LSR could still be 0xFF;
  2069. * if it is, then bail out, because there's likely no UART
  2070. * here.
  2071. */
  2072. if (inb(info->base + UART_LSR) == 0xff) {
  2073. spin_unlock_irqrestore(&info->slock, flags);
  2074. if (capable(CAP_SYS_ADMIN)) {
  2075. if (info->tty)
  2076. set_bit(TTY_IO_ERROR, &info->tty->flags);
  2077. return 0;
  2078. } else
  2079. return -ENODEV;
  2080. }
  2081. /*
  2082. * Clear the interrupt registers.
  2083. */
  2084. (void) inb(info->base + UART_LSR);
  2085. (void) inb(info->base + UART_RX);
  2086. (void) inb(info->base + UART_IIR);
  2087. (void) inb(info->base + UART_MSR);
  2088. /*
  2089. * Now, initialize the UART
  2090. */
  2091. outb(UART_LCR_WLEN8, info->base + UART_LCR); /* reset DLAB */
  2092. info->MCR = UART_MCR_DTR | UART_MCR_RTS;
  2093. outb(info->MCR, info->base + UART_MCR);
  2094. /*
  2095. * Finally, enable interrupts
  2096. */
  2097. info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
  2098. /* info->IER = UART_IER_RLSI | UART_IER_RDI; */
  2099. /* following add by Victor Yu. 08-30-2002 */
  2100. if (info->IsMoxaMustChipFlag)
  2101. info->IER |= MOXA_MUST_IER_EGDAI;
  2102. /* above add by Victor Yu. 08-30-2002 */
  2103. outb(info->IER, info->base + UART_IER); /* enable interrupts */
  2104. /*
  2105. * And clear the interrupt registers again for luck.
  2106. */
  2107. (void) inb(info->base + UART_LSR);
  2108. (void) inb(info->base + UART_RX);
  2109. (void) inb(info->base + UART_IIR);
  2110. (void) inb(info->base + UART_MSR);
  2111. if (info->tty)
  2112. clear_bit(TTY_IO_ERROR, &info->tty->flags);
  2113. info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
  2114. /*
  2115. * and set the speed of the serial port
  2116. */
  2117. spin_unlock_irqrestore(&info->slock, flags);
  2118. mxser_change_speed(info, NULL);
  2119. info->flags |= ASYNC_INITIALIZED;
  2120. return 0;
  2121. }
  2122. /*
  2123. * This routine will shutdown a serial port; interrupts maybe disabled, and
  2124. * DTR is dropped if the hangup on close termio flag is on.
  2125. */
  2126. static void mxser_shutdown(struct mxser_struct *info)
  2127. {
  2128. unsigned long flags;
  2129. if (!(info->flags & ASYNC_INITIALIZED))
  2130. return;
  2131. spin_lock_irqsave(&info->slock, flags);
  2132. /*
  2133. * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
  2134. * here so the queue might never be waken up
  2135. */
  2136. wake_up_interruptible(&info->delta_msr_wait);
  2137. /*
  2138. * Free the IRQ, if necessary
  2139. */
  2140. if (info->xmit_buf) {
  2141. free_page((unsigned long) info->xmit_buf);
  2142. info->xmit_buf = NULL;
  2143. }
  2144. info->IER = 0;
  2145. outb(0x00, info->base + UART_IER);
  2146. if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
  2147. info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
  2148. outb(info->MCR, info->base + UART_MCR);
  2149. /* clear Rx/Tx FIFO's */
  2150. /* following add by Victor Yu. 08-30-2002 */
  2151. if (info->IsMoxaMustChipFlag)
  2152. outb((UART_FCR_CLEAR_RCVR |
  2153. UART_FCR_CLEAR_XMIT |
  2154. MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
  2155. else
  2156. /* above add by Victor Yu. 08-30-2002 */
  2157. outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
  2158. info->base + UART_FCR);
  2159. /* read data port to reset things */
  2160. (void) inb(info->base + UART_RX);
  2161. if (info->tty)
  2162. set_bit(TTY_IO_ERROR, &info->tty->flags);
  2163. info->flags &= ~ASYNC_INITIALIZED;
  2164. /* following add by Victor Yu. 09-23-2002 */
  2165. if (info->IsMoxaMustChipFlag)
  2166. SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->base);
  2167. /* above add by Victor Yu. 09-23-2002 */
  2168. spin_unlock_irqrestore(&info->slock, flags);
  2169. }
  2170. /*
  2171. * This routine is called to set the UART divisor registers to match
  2172. * the specified baud rate for a serial port.
  2173. */
  2174. static int mxser_change_speed(struct mxser_struct *info, struct ktermios *old_termios)
  2175. {
  2176. unsigned cflag, cval, fcr;
  2177. int ret = 0;
  2178. unsigned char status;
  2179. long baud;
  2180. unsigned long flags;
  2181. if (!info->tty || !info->tty->termios)
  2182. return ret;
  2183. cflag = info->tty->termios->c_cflag;
  2184. if (!(info->base))
  2185. return ret;
  2186. #ifndef B921600
  2187. #define B921600 (B460800 +1)
  2188. #endif
  2189. if (mxser_set_baud_method[info->port] == 0) {
  2190. baud = tty_get_baud_rate(info->tty);
  2191. mxser_set_baud(info, baud);
  2192. }
  2193. /* byte size and parity */
  2194. switch (cflag & CSIZE) {
  2195. case CS5:
  2196. cval = 0x00;
  2197. break;
  2198. case CS6:
  2199. cval = 0x01;
  2200. break;
  2201. case CS7:
  2202. cval = 0x02;
  2203. break;
  2204. case CS8:
  2205. cval = 0x03;
  2206. break;
  2207. default:
  2208. cval = 0x00;
  2209. break; /* too keep GCC shut... */
  2210. }
  2211. if (cflag & CSTOPB)
  2212. cval |= 0x04;
  2213. if (cflag & PARENB)
  2214. cval |= UART_LCR_PARITY;
  2215. if (!(cflag & PARODD))
  2216. cval |= UART_LCR_EPAR;
  2217. if (cflag & CMSPAR)
  2218. cval |= UART_LCR_SPAR;
  2219. if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
  2220. if (info->IsMoxaMustChipFlag) {
  2221. fcr = UART_FCR_ENABLE_FIFO;
  2222. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  2223. SET_MOXA_MUST_FIFO_VALUE(info);
  2224. } else
  2225. fcr = 0;
  2226. } else {
  2227. fcr = UART_FCR_ENABLE_FIFO;
  2228. /* following add by Victor Yu. 08-30-2002 */
  2229. if (info->IsMoxaMustChipFlag) {
  2230. fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
  2231. SET_MOXA_MUST_FIFO_VALUE(info);
  2232. } else {
  2233. /* above add by Victor Yu. 08-30-2002 */
  2234. switch (info->rx_trigger) {
  2235. case 1:
  2236. fcr |= UART_FCR_TRIGGER_1;
  2237. break;
  2238. case 4:
  2239. fcr |= UART_FCR_TRIGGER_4;
  2240. break;
  2241. case 8:
  2242. fcr |= UART_FCR_TRIGGER_8;
  2243. break;
  2244. default:
  2245. fcr |= UART_FCR_TRIGGER_14;
  2246. break;
  2247. }
  2248. }
  2249. }
  2250. /* CTS flow control flag and modem status interrupts */
  2251. info->IER &= ~UART_IER_MSI;
  2252. info->MCR &= ~UART_MCR_AFE;
  2253. if (cflag & CRTSCTS) {
  2254. info->flags |= ASYNC_CTS_FLOW;
  2255. info->IER |= UART_IER_MSI;
  2256. if ((info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
  2257. info->MCR |= UART_MCR_AFE;
  2258. } else {
  2259. status = inb(info->base + UART_MSR);
  2260. if (info->tty->hw_stopped) {
  2261. if (status & UART_MSR_CTS) {
  2262. info->tty->hw_stopped = 0;
  2263. if ((info->type != PORT_16550A) &&
  2264. (!info->IsMoxaMustChipFlag)) {
  2265. info->IER |= UART_IER_THRI;
  2266. outb(info->IER, info->base + UART_IER);
  2267. }
  2268. set_bit(MXSER_EVENT_TXLOW, &info->event);
  2269. schedule_work(&info->tqueue); }
  2270. } else {
  2271. if (!(status & UART_MSR_CTS)) {
  2272. info->tty->hw_stopped = 1;
  2273. if ((info->type != PORT_16550A) &&
  2274. (!info->IsMoxaMustChipFlag)) {
  2275. info->IER &= ~UART_IER_THRI;
  2276. outb(info->IER, info->base + UART_IER);
  2277. }
  2278. }
  2279. }
  2280. }
  2281. } else {
  2282. info->flags &= ~ASYNC_CTS_FLOW;
  2283. }
  2284. outb(info->MCR, info->base + UART_MCR);
  2285. if (cflag & CLOCAL) {
  2286. info->flags &= ~ASYNC_CHECK_CD;
  2287. } else {
  2288. info->flags |= ASYNC_CHECK_CD;
  2289. info->IER |= UART_IER_MSI;
  2290. }
  2291. outb(info->IER, info->base + UART_IER);
  2292. /*
  2293. * Set up parity check flag
  2294. */
  2295. info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  2296. if (I_INPCK(info->tty))
  2297. info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  2298. if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
  2299. info->read_status_mask |= UART_LSR_BI;
  2300. info->ignore_status_mask = 0;
  2301. if (I_IGNBRK(info->tty)) {
  2302. info->ignore_status_mask |= UART_LSR_BI;
  2303. info->read_status_mask |= UART_LSR_BI;
  2304. /*
  2305. * If we're ignore parity and break indicators, ignore
  2306. * overruns too. (For real raw support).
  2307. */
  2308. if (I_IGNPAR(info->tty)) {
  2309. info->ignore_status_mask |=
  2310. UART_LSR_OE |
  2311. UART_LSR_PE |
  2312. UART_LSR_FE;
  2313. info->read_status_mask |=
  2314. UART_LSR_OE |
  2315. UART_LSR_PE |
  2316. UART_LSR_FE;
  2317. }
  2318. }
  2319. /* following add by Victor Yu. 09-02-2002 */
  2320. if (info->IsMoxaMustChipFlag) {
  2321. spin_lock_irqsave(&info->slock, flags);
  2322. SET_MOXA_MUST_XON1_VALUE(info->base, START_CHAR(info->tty));
  2323. SET_MOXA_MUST_XOFF1_VALUE(info->base, STOP_CHAR(info->tty));
  2324. if (I_IXON(info->tty)) {
  2325. ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
  2326. } else {
  2327. DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
  2328. }
  2329. if (I_IXOFF(info->tty)) {
  2330. ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
  2331. } else {
  2332. DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
  2333. }
  2334. /*
  2335. if ( I_IXANY(info->tty) ) {
  2336. info->MCR |= MOXA_MUST_MCR_XON_ANY;
  2337. ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
  2338. } else {
  2339. info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
  2340. DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
  2341. }
  2342. */
  2343. spin_unlock_irqrestore(&info->slock, flags);
  2344. }
  2345. /* above add by Victor Yu. 09-02-2002 */
  2346. outb(fcr, info->base + UART_FCR); /* set fcr */
  2347. outb(cval, info->base + UART_LCR);
  2348. return ret;
  2349. }
  2350. static int mxser_set_baud(struct mxser_struct *info, long newspd)
  2351. {
  2352. int quot = 0;
  2353. unsigned char cval;
  2354. int ret = 0;
  2355. unsigned long flags;
  2356. if (!info->tty || !info->tty->termios)
  2357. return ret;
  2358. if (!(info->base))
  2359. return ret;
  2360. if (newspd > info->MaxCanSetBaudRate)
  2361. return 0;
  2362. info->realbaud = newspd;
  2363. if (newspd == 134) {
  2364. quot = (2 * info->baud_base / 269);
  2365. } else if (newspd) {
  2366. quot = info->baud_base / newspd;
  2367. if (quot == 0)
  2368. quot = 1;
  2369. } else {
  2370. quot = 0;
  2371. }
  2372. info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
  2373. info->timeout += HZ / 50; /* Add .02 seconds of slop */
  2374. if (quot) {
  2375. spin_lock_irqsave(&info->slock, flags);
  2376. info->MCR |= UART_MCR_DTR;
  2377. outb(info->MCR, info->base + UART_MCR);
  2378. spin_unlock_irqrestore(&info->slock, flags);
  2379. } else {
  2380. spin_lock_irqsave(&info->slock, flags);
  2381. info->MCR &= ~UART_MCR_DTR;
  2382. outb(info->MCR, info->base + UART_MCR);
  2383. spin_unlock_irqrestore(&info->slock, flags);
  2384. return ret;
  2385. }
  2386. cval = inb(info->base + UART_LCR);
  2387. outb(cval | UART_LCR_DLAB, info->base + UART_LCR); /* set DLAB */
  2388. outb(quot & 0xff, info->base + UART_DLL); /* LS of divisor */
  2389. outb(quot >> 8, info->base + UART_DLM); /* MS of divisor */
  2390. outb(cval, info->base + UART_LCR); /* reset DLAB */
  2391. return ret;
  2392. }
  2393. /*
  2394. * ------------------------------------------------------------
  2395. * friends of mxser_ioctl()
  2396. * ------------------------------------------------------------
  2397. */
  2398. static int mxser_get_serial_info(struct mxser_struct *info, struct serial_struct __user *retinfo)
  2399. {
  2400. struct serial_struct tmp;
  2401. if (!retinfo)
  2402. return -EFAULT;
  2403. memset(&tmp, 0, sizeof(tmp));
  2404. tmp.type = info->type;
  2405. tmp.line = info->port;
  2406. tmp.port = info->base;
  2407. tmp.irq = info->irq;
  2408. tmp.flags = info->flags;
  2409. tmp.baud_base = info->baud_base;
  2410. tmp.close_delay = info->close_delay;
  2411. tmp.closing_wait = info->closing_wait;
  2412. tmp.custom_divisor = info->custom_divisor;
  2413. tmp.hub6 = 0;
  2414. if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
  2415. return -EFAULT;
  2416. return 0;
  2417. }
  2418. static int mxser_set_serial_info(struct mxser_struct *info, struct serial_struct __user *new_info)
  2419. {
  2420. struct serial_struct new_serial;
  2421. unsigned int flags;
  2422. int retval = 0;
  2423. if (!new_info || !info->base)
  2424. return -EFAULT;
  2425. if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
  2426. return -EFAULT;
  2427. if ((new_serial.irq != info->irq) ||
  2428. (new_serial.port != info->base) ||
  2429. (new_serial.custom_divisor != info->custom_divisor) ||
  2430. (new_serial.baud_base != info->baud_base))
  2431. return -EPERM;
  2432. flags = info->flags & ASYNC_SPD_MASK;
  2433. if (!capable(CAP_SYS_ADMIN)) {
  2434. if ((new_serial.baud_base != info->baud_base) ||
  2435. (new_serial.close_delay != info->close_delay) ||
  2436. ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
  2437. return -EPERM;
  2438. info->flags = ((info->flags & ~ASYNC_USR_MASK) |
  2439. (new_serial.flags & ASYNC_USR_MASK));
  2440. } else {
  2441. /*
  2442. * OK, past this point, all the error checking has been done.
  2443. * At this point, we start making changes.....
  2444. */
  2445. info->flags = ((info->flags & ~ASYNC_FLAGS) |
  2446. (new_serial.flags & ASYNC_FLAGS));
  2447. info->close_delay = new_serial.close_delay * HZ / 100;
  2448. info->closing_wait = new_serial.closing_wait * HZ / 100;
  2449. info->tty->low_latency =
  2450. (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
  2451. info->tty->low_latency = 0; /* (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; */
  2452. }
  2453. /* added by casper, 3/17/2000, for mouse */
  2454. info->type = new_serial.type;
  2455. process_txrx_fifo(info);
  2456. if (info->flags & ASYNC_INITIALIZED) {
  2457. if (flags != (info->flags & ASYNC_SPD_MASK)) {
  2458. mxser_change_speed(info, NULL);
  2459. }
  2460. } else {
  2461. retval = mxser_startup(info);
  2462. }
  2463. return retval;
  2464. }
  2465. /*
  2466. * mxser_get_lsr_info - get line status register info
  2467. *
  2468. * Purpose: Let user call ioctl() to get info when the UART physically
  2469. * is emptied. On bus types like RS485, the transmitter must
  2470. * release the bus after transmitting. This must be done when
  2471. * the transmit shift register is empty, not be done when the
  2472. * transmit holding register is empty. This functionality
  2473. * allows an RS485 driver to be written in user space.
  2474. */
  2475. static int mxser_get_lsr_info(struct mxser_struct *info, unsigned int __user *value)
  2476. {
  2477. unsigned char status;
  2478. unsigned int result;
  2479. unsigned long flags;
  2480. spin_lock_irqsave(&info->slock, flags);
  2481. status = inb(info->base + UART_LSR);
  2482. spin_unlock_irqrestore(&info->slock, flags);
  2483. result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
  2484. return put_user(result, value);
  2485. }
  2486. /*
  2487. * This routine sends a break character out the serial port.
  2488. */
  2489. static void mxser_send_break(struct mxser_struct *info, int duration)
  2490. {
  2491. unsigned long flags;
  2492. if (!info->base)
  2493. return;
  2494. set_current_state(TASK_INTERRUPTIBLE);
  2495. spin_lock_irqsave(&info->slock, flags);
  2496. outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
  2497. info->base + UART_LCR);
  2498. spin_unlock_irqrestore(&info->slock, flags);
  2499. schedule_timeout(duration);
  2500. spin_lock_irqsave(&info->slock, flags);
  2501. outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
  2502. info->base + UART_LCR);
  2503. spin_unlock_irqrestore(&info->slock, flags);
  2504. }
  2505. static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
  2506. {
  2507. struct mxser_struct *info = tty->driver_data;
  2508. unsigned char control, status;
  2509. unsigned long flags;
  2510. if (tty->index == MXSER_PORTS)
  2511. return -ENOIOCTLCMD;
  2512. if (tty->flags & (1 << TTY_IO_ERROR))
  2513. return -EIO;
  2514. control = info->MCR;
  2515. spin_lock_irqsave(&info->slock, flags);
  2516. status = inb(info->base + UART_MSR);
  2517. if (status & UART_MSR_ANY_DELTA)
  2518. mxser_check_modem_status(info, status);
  2519. spin_unlock_irqrestore(&info->slock, flags);
  2520. return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
  2521. ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
  2522. ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
  2523. ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
  2524. ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
  2525. ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
  2526. }
  2527. static int mxser_tiocmset(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear)
  2528. {
  2529. struct mxser_struct *info = tty->driver_data;
  2530. unsigned long flags;
  2531. if (tty->index == MXSER_PORTS)
  2532. return -ENOIOCTLCMD;
  2533. if (tty->flags & (1 << TTY_IO_ERROR))
  2534. return -EIO;
  2535. spin_lock_irqsave(&info->slock, flags);
  2536. if (set & TIOCM_RTS)
  2537. info->MCR |= UART_MCR_RTS;
  2538. if (set & TIOCM_DTR)
  2539. info->MCR |= UART_MCR_DTR;
  2540. if (clear & TIOCM_RTS)
  2541. info->MCR &= ~UART_MCR_RTS;
  2542. if (clear & TIOCM_DTR)
  2543. info->MCR &= ~UART_MCR_DTR;
  2544. outb(info->MCR, info->base + UART_MCR);
  2545. spin_unlock_irqrestore(&info->slock, flags);
  2546. return 0;
  2547. }
  2548. static int mxser_read_register(int, unsigned short *);
  2549. static int mxser_program_mode(int);
  2550. static void mxser_normal_mode(int);
  2551. static int mxser_get_ISA_conf(int cap, struct mxser_hwconf *hwconf)
  2552. {
  2553. int id, i, bits;
  2554. unsigned short regs[16], irq;
  2555. unsigned char scratch, scratch2;
  2556. hwconf->IsMoxaMustChipFlag = MOXA_OTHER_UART;
  2557. id = mxser_read_register(cap, regs);
  2558. if (id == C168_ASIC_ID) {
  2559. hwconf->board_type = MXSER_BOARD_C168_ISA;
  2560. hwconf->ports = 8;
  2561. } else if (id == C104_ASIC_ID) {
  2562. hwconf->board_type = MXSER_BOARD_C104_ISA;
  2563. hwconf->ports = 4;
  2564. } else if (id == C102_ASIC_ID) {
  2565. hwconf->board_type = MXSER_BOARD_C102_ISA;
  2566. hwconf->ports = 2;
  2567. } else if (id == CI132_ASIC_ID) {
  2568. hwconf->board_type = MXSER_BOARD_CI132;
  2569. hwconf->ports = 2;
  2570. } else if (id == CI134_ASIC_ID) {
  2571. hwconf->board_type = MXSER_BOARD_CI134;
  2572. hwconf->ports = 4;
  2573. } else if (id == CI104J_ASIC_ID) {
  2574. hwconf->board_type = MXSER_BOARD_CI104J;
  2575. hwconf->ports = 4;
  2576. } else
  2577. return 0;
  2578. irq = 0;
  2579. if (hwconf->ports == 2) {
  2580. irq = regs[9] & 0xF000;
  2581. irq = irq | (irq >> 4);
  2582. if (irq != (regs[9] & 0xFF00))
  2583. return MXSER_ERR_IRQ_CONFLIT;
  2584. } else if (hwconf->ports == 4) {
  2585. irq = regs[9] & 0xF000;
  2586. irq = irq | (irq >> 4);
  2587. irq = irq | (irq >> 8);
  2588. if (irq != regs[9])
  2589. return MXSER_ERR_IRQ_CONFLIT;
  2590. } else if (hwconf->ports == 8) {
  2591. irq = regs[9] & 0xF000;
  2592. irq = irq | (irq >> 4);
  2593. irq = irq | (irq >> 8);
  2594. if ((irq != regs[9]) || (irq != regs[10]))
  2595. return MXSER_ERR_IRQ_CONFLIT;
  2596. }
  2597. if (!irq)
  2598. return MXSER_ERR_IRQ;
  2599. hwconf->irq = ((int)(irq & 0xF000) >> 12);
  2600. for (i = 0; i < 8; i++)
  2601. hwconf->ioaddr[i] = (int) regs[i + 1] & 0xFFF8;
  2602. if ((regs[12] & 0x80) == 0)
  2603. return MXSER_ERR_VECTOR;
  2604. hwconf->vector = (int)regs[11]; /* interrupt vector */
  2605. if (id == 1)
  2606. hwconf->vector_mask = 0x00FF;
  2607. else
  2608. hwconf->vector_mask = 0x000F;
  2609. for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
  2610. if (regs[12] & bits) {
  2611. hwconf->baud_base[i] = 921600;
  2612. hwconf->MaxCanSetBaudRate[i] = 921600; /* add by Victor Yu. 09-04-2002 */
  2613. } else {
  2614. hwconf->baud_base[i] = 115200;
  2615. hwconf->MaxCanSetBaudRate[i] = 115200; /* add by Victor Yu. 09-04-2002 */
  2616. }
  2617. }
  2618. scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
  2619. outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
  2620. outb(0, cap + UART_EFR); /* EFR is the same as FCR */
  2621. outb(scratch2, cap + UART_LCR);
  2622. outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
  2623. scratch = inb(cap + UART_IIR);
  2624. if (scratch & 0xC0)
  2625. hwconf->uart_type = PORT_16550A;
  2626. else
  2627. hwconf->uart_type = PORT_16450;
  2628. if (id == 1)
  2629. hwconf->ports = 8;
  2630. else
  2631. hwconf->ports = 4;
  2632. request_region(hwconf->ioaddr[0], 8 * hwconf->ports, "mxser(IO)");
  2633. request_region(hwconf->vector, 1, "mxser(vector)");
  2634. return hwconf->ports;
  2635. }
  2636. #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
  2637. #define CHIP_DO 0x02 /* Serial Data Output in Eprom */
  2638. #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
  2639. #define CHIP_DI 0x08 /* Serial Data Input in Eprom */
  2640. #define EN_CCMD 0x000 /* Chip's command register */
  2641. #define EN0_RSARLO 0x008 /* Remote start address reg 0 */
  2642. #define EN0_RSARHI 0x009 /* Remote start address reg 1 */
  2643. #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
  2644. #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
  2645. #define EN0_DCFG 0x00E /* Data configuration reg WR */
  2646. #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
  2647. #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
  2648. #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
  2649. static int mxser_read_register(int port, unsigned short *regs)
  2650. {
  2651. int i, k, value, id;
  2652. unsigned int j;
  2653. id = mxser_program_mode(port);
  2654. if (id < 0)
  2655. return id;
  2656. for (i = 0; i < 14; i++) {
  2657. k = (i & 0x3F) | 0x180;
  2658. for (j = 0x100; j > 0; j >>= 1) {
  2659. outb(CHIP_CS, port);
  2660. if (k & j) {
  2661. outb(CHIP_CS | CHIP_DO, port);
  2662. outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
  2663. } else {
  2664. outb(CHIP_CS, port);
  2665. outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
  2666. }
  2667. }
  2668. (void)inb(port);
  2669. value = 0;
  2670. for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
  2671. outb(CHIP_CS, port);
  2672. outb(CHIP_CS | CHIP_SK, port);
  2673. if (inb(port) & CHIP_DI)
  2674. value |= j;
  2675. }
  2676. regs[i] = value;
  2677. outb(0, port);
  2678. }
  2679. mxser_normal_mode(port);
  2680. return id;
  2681. }
  2682. static int mxser_program_mode(int port)
  2683. {
  2684. int id, i, j, n;
  2685. /* unsigned long flags; */
  2686. spin_lock(&gm_lock);
  2687. outb(0, port);
  2688. outb(0, port);
  2689. outb(0, port);
  2690. (void)inb(port);
  2691. (void)inb(port);
  2692. outb(0, port);
  2693. (void)inb(port);
  2694. /* restore_flags(flags); */
  2695. spin_unlock(&gm_lock);
  2696. id = inb(port + 1) & 0x1F;
  2697. if ((id != C168_ASIC_ID) &&
  2698. (id != C104_ASIC_ID) &&
  2699. (id != C102_ASIC_ID) &&
  2700. (id != CI132_ASIC_ID) &&
  2701. (id != CI134_ASIC_ID) &&
  2702. (id != CI104J_ASIC_ID))
  2703. return -1;
  2704. for (i = 0, j = 0; i < 4; i++) {
  2705. n = inb(port + 2);
  2706. if (n == 'M') {
  2707. j = 1;
  2708. } else if ((j == 1) && (n == 1)) {
  2709. j = 2;
  2710. break;
  2711. } else
  2712. j = 0;
  2713. }
  2714. if (j != 2)
  2715. id = -2;
  2716. return id;
  2717. }
  2718. static void mxser_normal_mode(int port)
  2719. {
  2720. int i, n;
  2721. outb(0xA5, port + 1);
  2722. outb(0x80, port + 3);
  2723. outb(12, port + 0); /* 9600 bps */
  2724. outb(0, port + 1);
  2725. outb(0x03, port + 3); /* 8 data bits */
  2726. outb(0x13, port + 4); /* loop back mode */
  2727. for (i = 0; i < 16; i++) {
  2728. n = inb(port + 5);
  2729. if ((n & 0x61) == 0x60)
  2730. break;
  2731. if ((n & 1) == 1)
  2732. (void)inb(port);
  2733. }
  2734. outb(0x00, port + 4);
  2735. }
  2736. module_init(mxser_module_init);
  2737. module_exit(mxser_module_exit);