setup.c 26 KB

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  1. /*
  2. * linux/arch/arm/kernel/setup.c
  3. *
  4. * Copyright (C) 1995-2001 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #include <linux/export.h>
  11. #include <linux/kernel.h>
  12. #include <linux/stddef.h>
  13. #include <linux/ioport.h>
  14. #include <linux/delay.h>
  15. #include <linux/utsname.h>
  16. #include <linux/initrd.h>
  17. #include <linux/console.h>
  18. #include <linux/bootmem.h>
  19. #include <linux/seq_file.h>
  20. #include <linux/screen_info.h>
  21. #include <linux/init.h>
  22. #include <linux/kexec.h>
  23. #include <linux/of_fdt.h>
  24. #include <linux/root_dev.h>
  25. #include <linux/cpu.h>
  26. #include <linux/interrupt.h>
  27. #include <linux/smp.h>
  28. #include <linux/fs.h>
  29. #include <linux/proc_fs.h>
  30. #include <linux/memblock.h>
  31. #include <linux/bug.h>
  32. #include <linux/compiler.h>
  33. #include <linux/sort.h>
  34. #include <asm/unified.h>
  35. #include <asm/cp15.h>
  36. #include <asm/cpu.h>
  37. #include <asm/cputype.h>
  38. #include <asm/elf.h>
  39. #include <asm/procinfo.h>
  40. #include <asm/sections.h>
  41. #include <asm/setup.h>
  42. #include <asm/smp_plat.h>
  43. #include <asm/mach-types.h>
  44. #include <asm/cacheflush.h>
  45. #include <asm/cachetype.h>
  46. #include <asm/tlbflush.h>
  47. #include <asm/prom.h>
  48. #include <asm/mach/arch.h>
  49. #include <asm/mach/irq.h>
  50. #include <asm/mach/time.h>
  51. #include <asm/system_info.h>
  52. #include <asm/system_misc.h>
  53. #include <asm/traps.h>
  54. #include <asm/unwind.h>
  55. #include <asm/memblock.h>
  56. #if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
  57. #include "compat.h"
  58. #endif
  59. #include "atags.h"
  60. #include "tcm.h"
  61. #ifndef MEM_SIZE
  62. #define MEM_SIZE (16*1024*1024)
  63. #endif
  64. #if defined(CONFIG_FPE_NWFPE) || defined(CONFIG_FPE_FASTFPE)
  65. char fpe_type[8];
  66. static int __init fpe_setup(char *line)
  67. {
  68. memcpy(fpe_type, line, 8);
  69. return 1;
  70. }
  71. __setup("fpe=", fpe_setup);
  72. #endif
  73. extern void paging_init(struct machine_desc *desc);
  74. extern void sanity_check_meminfo(void);
  75. extern void reboot_setup(char *str);
  76. unsigned int processor_id;
  77. EXPORT_SYMBOL(processor_id);
  78. unsigned int __machine_arch_type __read_mostly;
  79. EXPORT_SYMBOL(__machine_arch_type);
  80. unsigned int cacheid __read_mostly;
  81. EXPORT_SYMBOL(cacheid);
  82. unsigned int __atags_pointer __initdata;
  83. unsigned int system_rev;
  84. EXPORT_SYMBOL(system_rev);
  85. unsigned int system_serial_low;
  86. EXPORT_SYMBOL(system_serial_low);
  87. unsigned int system_serial_high;
  88. EXPORT_SYMBOL(system_serial_high);
  89. unsigned int elf_hwcap __read_mostly;
  90. EXPORT_SYMBOL(elf_hwcap);
  91. #ifdef MULTI_CPU
  92. struct processor processor __read_mostly;
  93. #endif
  94. #ifdef MULTI_TLB
  95. struct cpu_tlb_fns cpu_tlb __read_mostly;
  96. #endif
  97. #ifdef MULTI_USER
  98. struct cpu_user_fns cpu_user __read_mostly;
  99. #endif
  100. #ifdef MULTI_CACHE
  101. struct cpu_cache_fns cpu_cache __read_mostly;
  102. #endif
  103. #ifdef CONFIG_OUTER_CACHE
  104. struct outer_cache_fns outer_cache __read_mostly;
  105. EXPORT_SYMBOL(outer_cache);
  106. #endif
  107. /*
  108. * Cached cpu_architecture() result for use by assembler code.
  109. * C code should use the cpu_architecture() function instead of accessing this
  110. * variable directly.
  111. */
  112. int __cpu_architecture __read_mostly = CPU_ARCH_UNKNOWN;
  113. struct stack {
  114. u32 irq[3];
  115. u32 abt[3];
  116. u32 und[3];
  117. } ____cacheline_aligned;
  118. static struct stack stacks[NR_CPUS];
  119. char elf_platform[ELF_PLATFORM_SIZE];
  120. EXPORT_SYMBOL(elf_platform);
  121. static const char *cpu_name;
  122. static const char *machine_name;
  123. static char __initdata cmd_line[COMMAND_LINE_SIZE];
  124. struct machine_desc *machine_desc __initdata;
  125. static char default_command_line[COMMAND_LINE_SIZE] __initdata = CONFIG_CMDLINE;
  126. static union { char c[4]; unsigned long l; } endian_test __initdata = { { 'l', '?', '?', 'b' } };
  127. #define ENDIANNESS ((char)endian_test.l)
  128. DEFINE_PER_CPU(struct cpuinfo_arm, cpu_data);
  129. /*
  130. * Standard memory resources
  131. */
  132. static struct resource mem_res[] = {
  133. {
  134. .name = "Video RAM",
  135. .start = 0,
  136. .end = 0,
  137. .flags = IORESOURCE_MEM
  138. },
  139. {
  140. .name = "Kernel code",
  141. .start = 0,
  142. .end = 0,
  143. .flags = IORESOURCE_MEM
  144. },
  145. {
  146. .name = "Kernel data",
  147. .start = 0,
  148. .end = 0,
  149. .flags = IORESOURCE_MEM
  150. }
  151. };
  152. #define video_ram mem_res[0]
  153. #define kernel_code mem_res[1]
  154. #define kernel_data mem_res[2]
  155. static struct resource io_res[] = {
  156. {
  157. .name = "reserved",
  158. .start = 0x3bc,
  159. .end = 0x3be,
  160. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  161. },
  162. {
  163. .name = "reserved",
  164. .start = 0x378,
  165. .end = 0x37f,
  166. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  167. },
  168. {
  169. .name = "reserved",
  170. .start = 0x278,
  171. .end = 0x27f,
  172. .flags = IORESOURCE_IO | IORESOURCE_BUSY
  173. }
  174. };
  175. #define lp0 io_res[0]
  176. #define lp1 io_res[1]
  177. #define lp2 io_res[2]
  178. static const char *proc_arch[] = {
  179. "undefined/unknown",
  180. "3",
  181. "4",
  182. "4T",
  183. "5",
  184. "5T",
  185. "5TE",
  186. "5TEJ",
  187. "6TEJ",
  188. "7",
  189. "?(11)",
  190. "?(12)",
  191. "?(13)",
  192. "?(14)",
  193. "?(15)",
  194. "?(16)",
  195. "?(17)",
  196. };
  197. static int __get_cpu_architecture(void)
  198. {
  199. int cpu_arch;
  200. if ((read_cpuid_id() & 0x0008f000) == 0) {
  201. cpu_arch = CPU_ARCH_UNKNOWN;
  202. } else if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
  203. cpu_arch = (read_cpuid_id() & (1 << 23)) ? CPU_ARCH_ARMv4T : CPU_ARCH_ARMv3;
  204. } else if ((read_cpuid_id() & 0x00080000) == 0x00000000) {
  205. cpu_arch = (read_cpuid_id() >> 16) & 7;
  206. if (cpu_arch)
  207. cpu_arch += CPU_ARCH_ARMv3;
  208. } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
  209. unsigned int mmfr0;
  210. /* Revised CPUID format. Read the Memory Model Feature
  211. * Register 0 and check for VMSAv7 or PMSAv7 */
  212. asm("mrc p15, 0, %0, c0, c1, 4"
  213. : "=r" (mmfr0));
  214. if ((mmfr0 & 0x0000000f) >= 0x00000003 ||
  215. (mmfr0 & 0x000000f0) >= 0x00000030)
  216. cpu_arch = CPU_ARCH_ARMv7;
  217. else if ((mmfr0 & 0x0000000f) == 0x00000002 ||
  218. (mmfr0 & 0x000000f0) == 0x00000020)
  219. cpu_arch = CPU_ARCH_ARMv6;
  220. else
  221. cpu_arch = CPU_ARCH_UNKNOWN;
  222. } else
  223. cpu_arch = CPU_ARCH_UNKNOWN;
  224. return cpu_arch;
  225. }
  226. int __pure cpu_architecture(void)
  227. {
  228. BUG_ON(__cpu_architecture == CPU_ARCH_UNKNOWN);
  229. return __cpu_architecture;
  230. }
  231. static int cpu_has_aliasing_icache(unsigned int arch)
  232. {
  233. int aliasing_icache;
  234. unsigned int id_reg, num_sets, line_size;
  235. /* PIPT caches never alias. */
  236. if (icache_is_pipt())
  237. return 0;
  238. /* arch specifies the register format */
  239. switch (arch) {
  240. case CPU_ARCH_ARMv7:
  241. asm("mcr p15, 2, %0, c0, c0, 0 @ set CSSELR"
  242. : /* No output operands */
  243. : "r" (1));
  244. isb();
  245. asm("mrc p15, 1, %0, c0, c0, 0 @ read CCSIDR"
  246. : "=r" (id_reg));
  247. line_size = 4 << ((id_reg & 0x7) + 2);
  248. num_sets = ((id_reg >> 13) & 0x7fff) + 1;
  249. aliasing_icache = (line_size * num_sets) > PAGE_SIZE;
  250. break;
  251. case CPU_ARCH_ARMv6:
  252. aliasing_icache = read_cpuid_cachetype() & (1 << 11);
  253. break;
  254. default:
  255. /* I-cache aliases will be handled by D-cache aliasing code */
  256. aliasing_icache = 0;
  257. }
  258. return aliasing_icache;
  259. }
  260. static void __init cacheid_init(void)
  261. {
  262. unsigned int cachetype = read_cpuid_cachetype();
  263. unsigned int arch = cpu_architecture();
  264. if (arch >= CPU_ARCH_ARMv6) {
  265. if ((cachetype & (7 << 29)) == 4 << 29) {
  266. /* ARMv7 register format */
  267. arch = CPU_ARCH_ARMv7;
  268. cacheid = CACHEID_VIPT_NONALIASING;
  269. switch (cachetype & (3 << 14)) {
  270. case (1 << 14):
  271. cacheid |= CACHEID_ASID_TAGGED;
  272. break;
  273. case (3 << 14):
  274. cacheid |= CACHEID_PIPT;
  275. break;
  276. }
  277. } else {
  278. arch = CPU_ARCH_ARMv6;
  279. if (cachetype & (1 << 23))
  280. cacheid = CACHEID_VIPT_ALIASING;
  281. else
  282. cacheid = CACHEID_VIPT_NONALIASING;
  283. }
  284. if (cpu_has_aliasing_icache(arch))
  285. cacheid |= CACHEID_VIPT_I_ALIASING;
  286. } else {
  287. cacheid = CACHEID_VIVT;
  288. }
  289. printk("CPU: %s data cache, %s instruction cache\n",
  290. cache_is_vivt() ? "VIVT" :
  291. cache_is_vipt_aliasing() ? "VIPT aliasing" :
  292. cache_is_vipt_nonaliasing() ? "PIPT / VIPT nonaliasing" : "unknown",
  293. cache_is_vivt() ? "VIVT" :
  294. icache_is_vivt_asid_tagged() ? "VIVT ASID tagged" :
  295. icache_is_vipt_aliasing() ? "VIPT aliasing" :
  296. icache_is_pipt() ? "PIPT" :
  297. cache_is_vipt_nonaliasing() ? "VIPT nonaliasing" : "unknown");
  298. }
  299. /*
  300. * These functions re-use the assembly code in head.S, which
  301. * already provide the required functionality.
  302. */
  303. extern struct proc_info_list *lookup_processor_type(unsigned int);
  304. void __init early_print(const char *str, ...)
  305. {
  306. extern void printascii(const char *);
  307. char buf[256];
  308. va_list ap;
  309. va_start(ap, str);
  310. vsnprintf(buf, sizeof(buf), str, ap);
  311. va_end(ap);
  312. #ifdef CONFIG_DEBUG_LL
  313. printascii(buf);
  314. #endif
  315. printk("%s", buf);
  316. }
  317. static void __init feat_v6_fixup(void)
  318. {
  319. int id = read_cpuid_id();
  320. if ((id & 0xff0f0000) != 0x41070000)
  321. return;
  322. /*
  323. * HWCAP_TLS is available only on 1136 r1p0 and later,
  324. * see also kuser_get_tls_init.
  325. */
  326. if ((((id >> 4) & 0xfff) == 0xb36) && (((id >> 20) & 3) == 0))
  327. elf_hwcap &= ~HWCAP_TLS;
  328. }
  329. /*
  330. * cpu_init - initialise one CPU.
  331. *
  332. * cpu_init sets up the per-CPU stacks.
  333. */
  334. void cpu_init(void)
  335. {
  336. unsigned int cpu = smp_processor_id();
  337. struct stack *stk = &stacks[cpu];
  338. if (cpu >= NR_CPUS) {
  339. printk(KERN_CRIT "CPU%u: bad primary CPU number\n", cpu);
  340. BUG();
  341. }
  342. cpu_proc_init();
  343. /*
  344. * Define the placement constraint for the inline asm directive below.
  345. * In Thumb-2, msr with an immediate value is not allowed.
  346. */
  347. #ifdef CONFIG_THUMB2_KERNEL
  348. #define PLC "r"
  349. #else
  350. #define PLC "I"
  351. #endif
  352. /*
  353. * setup stacks for re-entrant exception handlers
  354. */
  355. __asm__ (
  356. "msr cpsr_c, %1\n\t"
  357. "add r14, %0, %2\n\t"
  358. "mov sp, r14\n\t"
  359. "msr cpsr_c, %3\n\t"
  360. "add r14, %0, %4\n\t"
  361. "mov sp, r14\n\t"
  362. "msr cpsr_c, %5\n\t"
  363. "add r14, %0, %6\n\t"
  364. "mov sp, r14\n\t"
  365. "msr cpsr_c, %7"
  366. :
  367. : "r" (stk),
  368. PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
  369. "I" (offsetof(struct stack, irq[0])),
  370. PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
  371. "I" (offsetof(struct stack, abt[0])),
  372. PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
  373. "I" (offsetof(struct stack, und[0])),
  374. PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
  375. : "r14");
  376. }
  377. int __cpu_logical_map[NR_CPUS];
  378. void __init smp_setup_processor_id(void)
  379. {
  380. int i;
  381. u32 cpu = is_smp() ? read_cpuid_mpidr() & 0xff : 0;
  382. cpu_logical_map(0) = cpu;
  383. for (i = 1; i < NR_CPUS; ++i)
  384. cpu_logical_map(i) = i == cpu ? 0 : i;
  385. printk(KERN_INFO "Booting Linux on physical CPU %d\n", cpu);
  386. }
  387. static void __init setup_processor(void)
  388. {
  389. struct proc_info_list *list;
  390. /*
  391. * locate processor in the list of supported processor
  392. * types. The linker builds this table for us from the
  393. * entries in arch/arm/mm/proc-*.S
  394. */
  395. list = lookup_processor_type(read_cpuid_id());
  396. if (!list) {
  397. printk("CPU configuration botched (ID %08x), unable "
  398. "to continue.\n", read_cpuid_id());
  399. while (1);
  400. }
  401. cpu_name = list->cpu_name;
  402. __cpu_architecture = __get_cpu_architecture();
  403. #ifdef MULTI_CPU
  404. processor = *list->proc;
  405. #endif
  406. #ifdef MULTI_TLB
  407. cpu_tlb = *list->tlb;
  408. #endif
  409. #ifdef MULTI_USER
  410. cpu_user = *list->user;
  411. #endif
  412. #ifdef MULTI_CACHE
  413. cpu_cache = *list->cache;
  414. #endif
  415. printk("CPU: %s [%08x] revision %d (ARMv%s), cr=%08lx\n",
  416. cpu_name, read_cpuid_id(), read_cpuid_id() & 15,
  417. proc_arch[cpu_architecture()], cr_alignment);
  418. snprintf(init_utsname()->machine, __NEW_UTS_LEN + 1, "%s%c",
  419. list->arch_name, ENDIANNESS);
  420. snprintf(elf_platform, ELF_PLATFORM_SIZE, "%s%c",
  421. list->elf_name, ENDIANNESS);
  422. elf_hwcap = list->elf_hwcap;
  423. #ifndef CONFIG_ARM_THUMB
  424. elf_hwcap &= ~HWCAP_THUMB;
  425. #endif
  426. feat_v6_fixup();
  427. cacheid_init();
  428. cpu_init();
  429. }
  430. void __init dump_machine_table(void)
  431. {
  432. struct machine_desc *p;
  433. early_print("Available machine support:\n\nID (hex)\tNAME\n");
  434. for_each_machine_desc(p)
  435. early_print("%08x\t%s\n", p->nr, p->name);
  436. early_print("\nPlease check your kernel config and/or bootloader.\n");
  437. while (true)
  438. /* can't use cpu_relax() here as it may require MMU setup */;
  439. }
  440. int __init arm_add_memory(phys_addr_t start, unsigned long size)
  441. {
  442. struct membank *bank = &meminfo.bank[meminfo.nr_banks];
  443. if (meminfo.nr_banks >= NR_BANKS) {
  444. printk(KERN_CRIT "NR_BANKS too low, "
  445. "ignoring memory at 0x%08llx\n", (long long)start);
  446. return -EINVAL;
  447. }
  448. /*
  449. * Ensure that start/size are aligned to a page boundary.
  450. * Size is appropriately rounded down, start is rounded up.
  451. */
  452. size -= start & ~PAGE_MASK;
  453. bank->start = PAGE_ALIGN(start);
  454. #ifndef CONFIG_LPAE
  455. if (bank->start + size < bank->start) {
  456. printk(KERN_CRIT "Truncating memory at 0x%08llx to fit in "
  457. "32-bit physical address space\n", (long long)start);
  458. /*
  459. * To ensure bank->start + bank->size is representable in
  460. * 32 bits, we use ULONG_MAX as the upper limit rather than 4GB.
  461. * This means we lose a page after masking.
  462. */
  463. size = ULONG_MAX - bank->start;
  464. }
  465. #endif
  466. bank->size = size & PAGE_MASK;
  467. /*
  468. * Check whether this memory region has non-zero size or
  469. * invalid node number.
  470. */
  471. if (bank->size == 0)
  472. return -EINVAL;
  473. meminfo.nr_banks++;
  474. return 0;
  475. }
  476. /*
  477. * Pick out the memory size. We look for mem=size@start,
  478. * where start and size are "size[KkMm]"
  479. */
  480. static int __init early_mem(char *p)
  481. {
  482. static int usermem __initdata = 0;
  483. unsigned long size;
  484. phys_addr_t start;
  485. char *endp;
  486. /*
  487. * If the user specifies memory size, we
  488. * blow away any automatically generated
  489. * size.
  490. */
  491. if (usermem == 0) {
  492. usermem = 1;
  493. meminfo.nr_banks = 0;
  494. }
  495. start = PHYS_OFFSET;
  496. size = memparse(p, &endp);
  497. if (*endp == '@')
  498. start = memparse(endp + 1, NULL);
  499. arm_add_memory(start, size);
  500. return 0;
  501. }
  502. early_param("mem", early_mem);
  503. static void __init
  504. setup_ramdisk(int doload, int prompt, int image_start, unsigned int rd_sz)
  505. {
  506. #ifdef CONFIG_BLK_DEV_RAM
  507. extern int rd_size, rd_image_start, rd_prompt, rd_doload;
  508. rd_image_start = image_start;
  509. rd_prompt = prompt;
  510. rd_doload = doload;
  511. if (rd_sz)
  512. rd_size = rd_sz;
  513. #endif
  514. }
  515. static void __init request_standard_resources(struct machine_desc *mdesc)
  516. {
  517. struct memblock_region *region;
  518. struct resource *res;
  519. kernel_code.start = virt_to_phys(_text);
  520. kernel_code.end = virt_to_phys(_etext - 1);
  521. kernel_data.start = virt_to_phys(_sdata);
  522. kernel_data.end = virt_to_phys(_end - 1);
  523. for_each_memblock(memory, region) {
  524. res = alloc_bootmem_low(sizeof(*res));
  525. res->name = "System RAM";
  526. res->start = __pfn_to_phys(memblock_region_memory_base_pfn(region));
  527. res->end = __pfn_to_phys(memblock_region_memory_end_pfn(region)) - 1;
  528. res->flags = IORESOURCE_MEM | IORESOURCE_BUSY;
  529. request_resource(&iomem_resource, res);
  530. if (kernel_code.start >= res->start &&
  531. kernel_code.end <= res->end)
  532. request_resource(res, &kernel_code);
  533. if (kernel_data.start >= res->start &&
  534. kernel_data.end <= res->end)
  535. request_resource(res, &kernel_data);
  536. }
  537. if (mdesc->video_start) {
  538. video_ram.start = mdesc->video_start;
  539. video_ram.end = mdesc->video_end;
  540. request_resource(&iomem_resource, &video_ram);
  541. }
  542. /*
  543. * Some machines don't have the possibility of ever
  544. * possessing lp0, lp1 or lp2
  545. */
  546. if (mdesc->reserve_lp0)
  547. request_resource(&ioport_resource, &lp0);
  548. if (mdesc->reserve_lp1)
  549. request_resource(&ioport_resource, &lp1);
  550. if (mdesc->reserve_lp2)
  551. request_resource(&ioport_resource, &lp2);
  552. }
  553. /*
  554. * Tag parsing.
  555. *
  556. * This is the new way of passing data to the kernel at boot time. Rather
  557. * than passing a fixed inflexible structure to the kernel, we pass a list
  558. * of variable-sized tags to the kernel. The first tag must be a ATAG_CORE
  559. * tag for the list to be recognised (to distinguish the tagged list from
  560. * a param_struct). The list is terminated with a zero-length tag (this tag
  561. * is not parsed in any way).
  562. */
  563. static int __init parse_tag_core(const struct tag *tag)
  564. {
  565. if (tag->hdr.size > 2) {
  566. if ((tag->u.core.flags & 1) == 0)
  567. root_mountflags &= ~MS_RDONLY;
  568. ROOT_DEV = old_decode_dev(tag->u.core.rootdev);
  569. }
  570. return 0;
  571. }
  572. __tagtable(ATAG_CORE, parse_tag_core);
  573. static int __init parse_tag_mem32(const struct tag *tag)
  574. {
  575. return arm_add_memory(tag->u.mem.start, tag->u.mem.size);
  576. }
  577. __tagtable(ATAG_MEM, parse_tag_mem32);
  578. #if defined(CONFIG_VGA_CONSOLE) || defined(CONFIG_DUMMY_CONSOLE)
  579. struct screen_info screen_info = {
  580. .orig_video_lines = 30,
  581. .orig_video_cols = 80,
  582. .orig_video_mode = 0,
  583. .orig_video_ega_bx = 0,
  584. .orig_video_isVGA = 1,
  585. .orig_video_points = 8
  586. };
  587. static int __init parse_tag_videotext(const struct tag *tag)
  588. {
  589. screen_info.orig_x = tag->u.videotext.x;
  590. screen_info.orig_y = tag->u.videotext.y;
  591. screen_info.orig_video_page = tag->u.videotext.video_page;
  592. screen_info.orig_video_mode = tag->u.videotext.video_mode;
  593. screen_info.orig_video_cols = tag->u.videotext.video_cols;
  594. screen_info.orig_video_ega_bx = tag->u.videotext.video_ega_bx;
  595. screen_info.orig_video_lines = tag->u.videotext.video_lines;
  596. screen_info.orig_video_isVGA = tag->u.videotext.video_isvga;
  597. screen_info.orig_video_points = tag->u.videotext.video_points;
  598. return 0;
  599. }
  600. __tagtable(ATAG_VIDEOTEXT, parse_tag_videotext);
  601. #endif
  602. static int __init parse_tag_ramdisk(const struct tag *tag)
  603. {
  604. setup_ramdisk((tag->u.ramdisk.flags & 1) == 0,
  605. (tag->u.ramdisk.flags & 2) == 0,
  606. tag->u.ramdisk.start, tag->u.ramdisk.size);
  607. return 0;
  608. }
  609. __tagtable(ATAG_RAMDISK, parse_tag_ramdisk);
  610. static int __init parse_tag_serialnr(const struct tag *tag)
  611. {
  612. system_serial_low = tag->u.serialnr.low;
  613. system_serial_high = tag->u.serialnr.high;
  614. return 0;
  615. }
  616. __tagtable(ATAG_SERIAL, parse_tag_serialnr);
  617. static int __init parse_tag_revision(const struct tag *tag)
  618. {
  619. system_rev = tag->u.revision.rev;
  620. return 0;
  621. }
  622. __tagtable(ATAG_REVISION, parse_tag_revision);
  623. static int __init parse_tag_cmdline(const struct tag *tag)
  624. {
  625. #if defined(CONFIG_CMDLINE_EXTEND)
  626. strlcat(default_command_line, " ", COMMAND_LINE_SIZE);
  627. strlcat(default_command_line, tag->u.cmdline.cmdline,
  628. COMMAND_LINE_SIZE);
  629. #elif defined(CONFIG_CMDLINE_FORCE)
  630. pr_warning("Ignoring tag cmdline (using the default kernel command line)\n");
  631. #else
  632. strlcpy(default_command_line, tag->u.cmdline.cmdline,
  633. COMMAND_LINE_SIZE);
  634. #endif
  635. return 0;
  636. }
  637. __tagtable(ATAG_CMDLINE, parse_tag_cmdline);
  638. /*
  639. * Scan the tag table for this tag, and call its parse function.
  640. * The tag table is built by the linker from all the __tagtable
  641. * declarations.
  642. */
  643. static int __init parse_tag(const struct tag *tag)
  644. {
  645. extern struct tagtable __tagtable_begin, __tagtable_end;
  646. struct tagtable *t;
  647. for (t = &__tagtable_begin; t < &__tagtable_end; t++)
  648. if (tag->hdr.tag == t->tag) {
  649. t->parse(tag);
  650. break;
  651. }
  652. return t < &__tagtable_end;
  653. }
  654. /*
  655. * Parse all tags in the list, checking both the global and architecture
  656. * specific tag tables.
  657. */
  658. static void __init parse_tags(const struct tag *t)
  659. {
  660. for (; t->hdr.size; t = tag_next(t))
  661. if (!parse_tag(t))
  662. printk(KERN_WARNING
  663. "Ignoring unrecognised tag 0x%08x\n",
  664. t->hdr.tag);
  665. }
  666. /*
  667. * This holds our defaults.
  668. */
  669. static struct init_tags {
  670. struct tag_header hdr1;
  671. struct tag_core core;
  672. struct tag_header hdr2;
  673. struct tag_mem32 mem;
  674. struct tag_header hdr3;
  675. } init_tags __initdata = {
  676. { tag_size(tag_core), ATAG_CORE },
  677. { 1, PAGE_SIZE, 0xff },
  678. { tag_size(tag_mem32), ATAG_MEM },
  679. { MEM_SIZE },
  680. { 0, ATAG_NONE }
  681. };
  682. static int __init customize_machine(void)
  683. {
  684. /* customizes platform devices, or adds new ones */
  685. if (machine_desc->init_machine)
  686. machine_desc->init_machine();
  687. return 0;
  688. }
  689. arch_initcall(customize_machine);
  690. static int __init init_machine_late(void)
  691. {
  692. if (machine_desc->init_late)
  693. machine_desc->init_late();
  694. return 0;
  695. }
  696. late_initcall(init_machine_late);
  697. #ifdef CONFIG_KEXEC
  698. static inline unsigned long long get_total_mem(void)
  699. {
  700. unsigned long total;
  701. total = max_low_pfn - min_low_pfn;
  702. return total << PAGE_SHIFT;
  703. }
  704. /**
  705. * reserve_crashkernel() - reserves memory are for crash kernel
  706. *
  707. * This function reserves memory area given in "crashkernel=" kernel command
  708. * line parameter. The memory reserved is used by a dump capture kernel when
  709. * primary kernel is crashing.
  710. */
  711. static void __init reserve_crashkernel(void)
  712. {
  713. unsigned long long crash_size, crash_base;
  714. unsigned long long total_mem;
  715. int ret;
  716. total_mem = get_total_mem();
  717. ret = parse_crashkernel(boot_command_line, total_mem,
  718. &crash_size, &crash_base);
  719. if (ret)
  720. return;
  721. ret = reserve_bootmem(crash_base, crash_size, BOOTMEM_EXCLUSIVE);
  722. if (ret < 0) {
  723. printk(KERN_WARNING "crashkernel reservation failed - "
  724. "memory is in use (0x%lx)\n", (unsigned long)crash_base);
  725. return;
  726. }
  727. printk(KERN_INFO "Reserving %ldMB of memory at %ldMB "
  728. "for crashkernel (System RAM: %ldMB)\n",
  729. (unsigned long)(crash_size >> 20),
  730. (unsigned long)(crash_base >> 20),
  731. (unsigned long)(total_mem >> 20));
  732. crashk_res.start = crash_base;
  733. crashk_res.end = crash_base + crash_size - 1;
  734. insert_resource(&iomem_resource, &crashk_res);
  735. }
  736. #else
  737. static inline void reserve_crashkernel(void) {}
  738. #endif /* CONFIG_KEXEC */
  739. static void __init squash_mem_tags(struct tag *tag)
  740. {
  741. for (; tag->hdr.size; tag = tag_next(tag))
  742. if (tag->hdr.tag == ATAG_MEM)
  743. tag->hdr.tag = ATAG_NONE;
  744. }
  745. static struct machine_desc * __init setup_machine_tags(unsigned int nr)
  746. {
  747. struct tag *tags = (struct tag *)&init_tags;
  748. struct machine_desc *mdesc = NULL, *p;
  749. char *from = default_command_line;
  750. init_tags.mem.start = PHYS_OFFSET;
  751. /*
  752. * locate machine in the list of supported machines.
  753. */
  754. for_each_machine_desc(p)
  755. if (nr == p->nr) {
  756. printk("Machine: %s\n", p->name);
  757. mdesc = p;
  758. break;
  759. }
  760. if (!mdesc) {
  761. early_print("\nError: unrecognized/unsupported machine ID"
  762. " (r1 = 0x%08x).\n\n", nr);
  763. dump_machine_table(); /* does not return */
  764. }
  765. if (__atags_pointer)
  766. tags = phys_to_virt(__atags_pointer);
  767. else if (mdesc->atag_offset)
  768. tags = (void *)(PAGE_OFFSET + mdesc->atag_offset);
  769. #if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
  770. /*
  771. * If we have the old style parameters, convert them to
  772. * a tag list.
  773. */
  774. if (tags->hdr.tag != ATAG_CORE)
  775. convert_to_tag_list(tags);
  776. #endif
  777. if (tags->hdr.tag != ATAG_CORE) {
  778. #if defined(CONFIG_OF)
  779. /*
  780. * If CONFIG_OF is set, then assume this is a reasonably
  781. * modern system that should pass boot parameters
  782. */
  783. early_print("Warning: Neither atags nor dtb found\n");
  784. #endif
  785. tags = (struct tag *)&init_tags;
  786. }
  787. if (mdesc->fixup)
  788. mdesc->fixup(tags, &from, &meminfo);
  789. if (tags->hdr.tag == ATAG_CORE) {
  790. if (meminfo.nr_banks != 0)
  791. squash_mem_tags(tags);
  792. save_atags(tags);
  793. parse_tags(tags);
  794. }
  795. /* parse_early_param needs a boot_command_line */
  796. strlcpy(boot_command_line, from, COMMAND_LINE_SIZE);
  797. return mdesc;
  798. }
  799. static int __init meminfo_cmp(const void *_a, const void *_b)
  800. {
  801. const struct membank *a = _a, *b = _b;
  802. long cmp = bank_pfn_start(a) - bank_pfn_start(b);
  803. return cmp < 0 ? -1 : cmp > 0 ? 1 : 0;
  804. }
  805. void __init setup_arch(char **cmdline_p)
  806. {
  807. struct machine_desc *mdesc;
  808. setup_processor();
  809. mdesc = setup_machine_fdt(__atags_pointer);
  810. if (!mdesc)
  811. mdesc = setup_machine_tags(machine_arch_type);
  812. machine_desc = mdesc;
  813. machine_name = mdesc->name;
  814. #ifdef CONFIG_ZONE_DMA
  815. if (mdesc->dma_zone_size) {
  816. extern unsigned long arm_dma_zone_size;
  817. arm_dma_zone_size = mdesc->dma_zone_size;
  818. }
  819. #endif
  820. if (mdesc->restart_mode)
  821. reboot_setup(&mdesc->restart_mode);
  822. init_mm.start_code = (unsigned long) _text;
  823. init_mm.end_code = (unsigned long) _etext;
  824. init_mm.end_data = (unsigned long) _edata;
  825. init_mm.brk = (unsigned long) _end;
  826. /* populate cmd_line too for later use, preserving boot_command_line */
  827. strlcpy(cmd_line, boot_command_line, COMMAND_LINE_SIZE);
  828. *cmdline_p = cmd_line;
  829. parse_early_param();
  830. sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), meminfo_cmp, NULL);
  831. sanity_check_meminfo();
  832. arm_memblock_init(&meminfo, mdesc);
  833. paging_init(mdesc);
  834. request_standard_resources(mdesc);
  835. if (mdesc->restart)
  836. arm_pm_restart = mdesc->restart;
  837. unflatten_device_tree();
  838. #ifdef CONFIG_SMP
  839. if (is_smp())
  840. smp_init_cpus();
  841. #endif
  842. reserve_crashkernel();
  843. tcm_init();
  844. #ifdef CONFIG_MULTI_IRQ_HANDLER
  845. handle_arch_irq = mdesc->handle_irq;
  846. #endif
  847. #ifdef CONFIG_VT
  848. #if defined(CONFIG_VGA_CONSOLE)
  849. conswitchp = &vga_con;
  850. #elif defined(CONFIG_DUMMY_CONSOLE)
  851. conswitchp = &dummy_con;
  852. #endif
  853. #endif
  854. if (mdesc->init_early)
  855. mdesc->init_early();
  856. }
  857. static int __init topology_init(void)
  858. {
  859. int cpu;
  860. for_each_possible_cpu(cpu) {
  861. struct cpuinfo_arm *cpuinfo = &per_cpu(cpu_data, cpu);
  862. cpuinfo->cpu.hotpluggable = 1;
  863. register_cpu(&cpuinfo->cpu, cpu);
  864. }
  865. return 0;
  866. }
  867. subsys_initcall(topology_init);
  868. #ifdef CONFIG_HAVE_PROC_CPU
  869. static int __init proc_cpu_init(void)
  870. {
  871. struct proc_dir_entry *res;
  872. res = proc_mkdir("cpu", NULL);
  873. if (!res)
  874. return -ENOMEM;
  875. return 0;
  876. }
  877. fs_initcall(proc_cpu_init);
  878. #endif
  879. static const char *hwcap_str[] = {
  880. "swp",
  881. "half",
  882. "thumb",
  883. "26bit",
  884. "fastmult",
  885. "fpa",
  886. "vfp",
  887. "edsp",
  888. "java",
  889. "iwmmxt",
  890. "crunch",
  891. "thumbee",
  892. "neon",
  893. "vfpv3",
  894. "vfpv3d16",
  895. "tls",
  896. "vfpv4",
  897. "idiva",
  898. "idivt",
  899. NULL
  900. };
  901. static int c_show(struct seq_file *m, void *v)
  902. {
  903. int i;
  904. seq_printf(m, "Processor\t: %s rev %d (%s)\n",
  905. cpu_name, read_cpuid_id() & 15, elf_platform);
  906. #if defined(CONFIG_SMP)
  907. for_each_online_cpu(i) {
  908. /*
  909. * glibc reads /proc/cpuinfo to determine the number of
  910. * online processors, looking for lines beginning with
  911. * "processor". Give glibc what it expects.
  912. */
  913. seq_printf(m, "processor\t: %d\n", i);
  914. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n\n",
  915. per_cpu(cpu_data, i).loops_per_jiffy / (500000UL/HZ),
  916. (per_cpu(cpu_data, i).loops_per_jiffy / (5000UL/HZ)) % 100);
  917. }
  918. #else /* CONFIG_SMP */
  919. seq_printf(m, "BogoMIPS\t: %lu.%02lu\n",
  920. loops_per_jiffy / (500000/HZ),
  921. (loops_per_jiffy / (5000/HZ)) % 100);
  922. #endif
  923. /* dump out the processor features */
  924. seq_puts(m, "Features\t: ");
  925. for (i = 0; hwcap_str[i]; i++)
  926. if (elf_hwcap & (1 << i))
  927. seq_printf(m, "%s ", hwcap_str[i]);
  928. seq_printf(m, "\nCPU implementer\t: 0x%02x\n", read_cpuid_id() >> 24);
  929. seq_printf(m, "CPU architecture: %s\n", proc_arch[cpu_architecture()]);
  930. if ((read_cpuid_id() & 0x0008f000) == 0x00000000) {
  931. /* pre-ARM7 */
  932. seq_printf(m, "CPU part\t: %07x\n", read_cpuid_id() >> 4);
  933. } else {
  934. if ((read_cpuid_id() & 0x0008f000) == 0x00007000) {
  935. /* ARM7 */
  936. seq_printf(m, "CPU variant\t: 0x%02x\n",
  937. (read_cpuid_id() >> 16) & 127);
  938. } else {
  939. /* post-ARM7 */
  940. seq_printf(m, "CPU variant\t: 0x%x\n",
  941. (read_cpuid_id() >> 20) & 15);
  942. }
  943. seq_printf(m, "CPU part\t: 0x%03x\n",
  944. (read_cpuid_id() >> 4) & 0xfff);
  945. }
  946. seq_printf(m, "CPU revision\t: %d\n", read_cpuid_id() & 15);
  947. seq_puts(m, "\n");
  948. seq_printf(m, "Hardware\t: %s\n", machine_name);
  949. seq_printf(m, "Revision\t: %04x\n", system_rev);
  950. seq_printf(m, "Serial\t\t: %08x%08x\n",
  951. system_serial_high, system_serial_low);
  952. return 0;
  953. }
  954. static void *c_start(struct seq_file *m, loff_t *pos)
  955. {
  956. return *pos < 1 ? (void *)1 : NULL;
  957. }
  958. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  959. {
  960. ++*pos;
  961. return NULL;
  962. }
  963. static void c_stop(struct seq_file *m, void *v)
  964. {
  965. }
  966. const struct seq_operations cpuinfo_op = {
  967. .start = c_start,
  968. .next = c_next,
  969. .stop = c_stop,
  970. .show = c_show
  971. };