mmu.c 35 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "kvm.h"
  21. #include <linux/types.h>
  22. #include <linux/string.h>
  23. #include <linux/mm.h>
  24. #include <linux/highmem.h>
  25. #include <linux/module.h>
  26. #include <asm/page.h>
  27. #include <asm/cmpxchg.h>
  28. #undef MMU_DEBUG
  29. #undef AUDIT
  30. #ifdef AUDIT
  31. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  32. #else
  33. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  34. #endif
  35. #ifdef MMU_DEBUG
  36. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  37. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  38. #else
  39. #define pgprintk(x...) do { } while (0)
  40. #define rmap_printk(x...) do { } while (0)
  41. #endif
  42. #if defined(MMU_DEBUG) || defined(AUDIT)
  43. static int dbg = 1;
  44. #endif
  45. #ifndef MMU_DEBUG
  46. #define ASSERT(x) do { } while (0)
  47. #else
  48. #define ASSERT(x) \
  49. if (!(x)) { \
  50. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  51. __FILE__, __LINE__, #x); \
  52. }
  53. #endif
  54. #define PT64_PT_BITS 9
  55. #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
  56. #define PT32_PT_BITS 10
  57. #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
  58. #define PT_WRITABLE_SHIFT 1
  59. #define PT_PRESENT_MASK (1ULL << 0)
  60. #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
  61. #define PT_USER_MASK (1ULL << 2)
  62. #define PT_PWT_MASK (1ULL << 3)
  63. #define PT_PCD_MASK (1ULL << 4)
  64. #define PT_ACCESSED_MASK (1ULL << 5)
  65. #define PT_DIRTY_MASK (1ULL << 6)
  66. #define PT_PAGE_SIZE_MASK (1ULL << 7)
  67. #define PT_PAT_MASK (1ULL << 7)
  68. #define PT_GLOBAL_MASK (1ULL << 8)
  69. #define PT64_NX_MASK (1ULL << 63)
  70. #define PT_PAT_SHIFT 7
  71. #define PT_DIR_PAT_SHIFT 12
  72. #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
  73. #define PT32_DIR_PSE36_SIZE 4
  74. #define PT32_DIR_PSE36_SHIFT 13
  75. #define PT32_DIR_PSE36_MASK (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
  76. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  77. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  78. #define PT_SHADOW_IO_MARK (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  79. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  80. #define PT64_LEVEL_BITS 9
  81. #define PT64_LEVEL_SHIFT(level) \
  82. ( PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS )
  83. #define PT64_LEVEL_MASK(level) \
  84. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  85. #define PT64_INDEX(address, level)\
  86. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  87. #define PT32_LEVEL_BITS 10
  88. #define PT32_LEVEL_SHIFT(level) \
  89. ( PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS )
  90. #define PT32_LEVEL_MASK(level) \
  91. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  92. #define PT32_INDEX(address, level)\
  93. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  94. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  95. #define PT64_DIR_BASE_ADDR_MASK \
  96. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  97. #define PT32_BASE_ADDR_MASK PAGE_MASK
  98. #define PT32_DIR_BASE_ADDR_MASK \
  99. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  100. #define PFERR_PRESENT_MASK (1U << 0)
  101. #define PFERR_WRITE_MASK (1U << 1)
  102. #define PFERR_USER_MASK (1U << 2)
  103. #define PFERR_FETCH_MASK (1U << 4)
  104. #define PT64_ROOT_LEVEL 4
  105. #define PT32_ROOT_LEVEL 2
  106. #define PT32E_ROOT_LEVEL 3
  107. #define PT_DIRECTORY_LEVEL 2
  108. #define PT_PAGE_TABLE_LEVEL 1
  109. #define RMAP_EXT 4
  110. struct kvm_rmap_desc {
  111. u64 *shadow_ptes[RMAP_EXT];
  112. struct kvm_rmap_desc *more;
  113. };
  114. static struct kmem_cache *pte_chain_cache;
  115. static struct kmem_cache *rmap_desc_cache;
  116. static struct kmem_cache *mmu_page_cache;
  117. static struct kmem_cache *mmu_page_header_cache;
  118. static int is_write_protection(struct kvm_vcpu *vcpu)
  119. {
  120. return vcpu->cr0 & CR0_WP_MASK;
  121. }
  122. static int is_cpuid_PSE36(void)
  123. {
  124. return 1;
  125. }
  126. static int is_nx(struct kvm_vcpu *vcpu)
  127. {
  128. return vcpu->shadow_efer & EFER_NX;
  129. }
  130. static int is_present_pte(unsigned long pte)
  131. {
  132. return pte & PT_PRESENT_MASK;
  133. }
  134. static int is_writeble_pte(unsigned long pte)
  135. {
  136. return pte & PT_WRITABLE_MASK;
  137. }
  138. static int is_io_pte(unsigned long pte)
  139. {
  140. return pte & PT_SHADOW_IO_MARK;
  141. }
  142. static int is_rmap_pte(u64 pte)
  143. {
  144. return (pte & (PT_WRITABLE_MASK | PT_PRESENT_MASK))
  145. == (PT_WRITABLE_MASK | PT_PRESENT_MASK);
  146. }
  147. static void set_shadow_pte(u64 *sptep, u64 spte)
  148. {
  149. #ifdef CONFIG_X86_64
  150. set_64bit((unsigned long *)sptep, spte);
  151. #else
  152. set_64bit((unsigned long long *)sptep, spte);
  153. #endif
  154. }
  155. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  156. struct kmem_cache *base_cache, int min,
  157. gfp_t gfp_flags)
  158. {
  159. void *obj;
  160. if (cache->nobjs >= min)
  161. return 0;
  162. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  163. obj = kmem_cache_zalloc(base_cache, gfp_flags);
  164. if (!obj)
  165. return -ENOMEM;
  166. cache->objects[cache->nobjs++] = obj;
  167. }
  168. return 0;
  169. }
  170. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  171. {
  172. while (mc->nobjs)
  173. kfree(mc->objects[--mc->nobjs]);
  174. }
  175. static int __mmu_topup_memory_caches(struct kvm_vcpu *vcpu, gfp_t gfp_flags)
  176. {
  177. int r;
  178. r = mmu_topup_memory_cache(&vcpu->mmu_pte_chain_cache,
  179. pte_chain_cache, 4, gfp_flags);
  180. if (r)
  181. goto out;
  182. r = mmu_topup_memory_cache(&vcpu->mmu_rmap_desc_cache,
  183. rmap_desc_cache, 1, gfp_flags);
  184. if (r)
  185. goto out;
  186. r = mmu_topup_memory_cache(&vcpu->mmu_page_cache,
  187. mmu_page_cache, 4, gfp_flags);
  188. if (r)
  189. goto out;
  190. r = mmu_topup_memory_cache(&vcpu->mmu_page_header_cache,
  191. mmu_page_header_cache, 4, gfp_flags);
  192. out:
  193. return r;
  194. }
  195. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  196. {
  197. int r;
  198. r = __mmu_topup_memory_caches(vcpu, GFP_NOWAIT);
  199. if (r < 0) {
  200. spin_unlock(&vcpu->kvm->lock);
  201. kvm_arch_ops->vcpu_put(vcpu);
  202. r = __mmu_topup_memory_caches(vcpu, GFP_KERNEL);
  203. kvm_arch_ops->vcpu_load(vcpu);
  204. spin_lock(&vcpu->kvm->lock);
  205. }
  206. return r;
  207. }
  208. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  209. {
  210. mmu_free_memory_cache(&vcpu->mmu_pte_chain_cache);
  211. mmu_free_memory_cache(&vcpu->mmu_rmap_desc_cache);
  212. mmu_free_memory_cache(&vcpu->mmu_page_cache);
  213. mmu_free_memory_cache(&vcpu->mmu_page_header_cache);
  214. }
  215. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  216. size_t size)
  217. {
  218. void *p;
  219. BUG_ON(!mc->nobjs);
  220. p = mc->objects[--mc->nobjs];
  221. memset(p, 0, size);
  222. return p;
  223. }
  224. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  225. {
  226. return mmu_memory_cache_alloc(&vcpu->mmu_pte_chain_cache,
  227. sizeof(struct kvm_pte_chain));
  228. }
  229. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  230. {
  231. kfree(pc);
  232. }
  233. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  234. {
  235. return mmu_memory_cache_alloc(&vcpu->mmu_rmap_desc_cache,
  236. sizeof(struct kvm_rmap_desc));
  237. }
  238. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  239. {
  240. kfree(rd);
  241. }
  242. /*
  243. * Reverse mapping data structures:
  244. *
  245. * If page->private bit zero is zero, then page->private points to the
  246. * shadow page table entry that points to page_address(page).
  247. *
  248. * If page->private bit zero is one, (then page->private & ~1) points
  249. * to a struct kvm_rmap_desc containing more mappings.
  250. */
  251. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte)
  252. {
  253. struct page *page;
  254. struct kvm_rmap_desc *desc;
  255. int i;
  256. if (!is_rmap_pte(*spte))
  257. return;
  258. page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
  259. if (!page_private(page)) {
  260. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  261. set_page_private(page,(unsigned long)spte);
  262. } else if (!(page_private(page) & 1)) {
  263. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  264. desc = mmu_alloc_rmap_desc(vcpu);
  265. desc->shadow_ptes[0] = (u64 *)page_private(page);
  266. desc->shadow_ptes[1] = spte;
  267. set_page_private(page,(unsigned long)desc | 1);
  268. } else {
  269. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  270. desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
  271. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  272. desc = desc->more;
  273. if (desc->shadow_ptes[RMAP_EXT-1]) {
  274. desc->more = mmu_alloc_rmap_desc(vcpu);
  275. desc = desc->more;
  276. }
  277. for (i = 0; desc->shadow_ptes[i]; ++i)
  278. ;
  279. desc->shadow_ptes[i] = spte;
  280. }
  281. }
  282. static void rmap_desc_remove_entry(struct page *page,
  283. struct kvm_rmap_desc *desc,
  284. int i,
  285. struct kvm_rmap_desc *prev_desc)
  286. {
  287. int j;
  288. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  289. ;
  290. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  291. desc->shadow_ptes[j] = NULL;
  292. if (j != 0)
  293. return;
  294. if (!prev_desc && !desc->more)
  295. set_page_private(page,(unsigned long)desc->shadow_ptes[0]);
  296. else
  297. if (prev_desc)
  298. prev_desc->more = desc->more;
  299. else
  300. set_page_private(page,(unsigned long)desc->more | 1);
  301. mmu_free_rmap_desc(desc);
  302. }
  303. static void rmap_remove(u64 *spte)
  304. {
  305. struct page *page;
  306. struct kvm_rmap_desc *desc;
  307. struct kvm_rmap_desc *prev_desc;
  308. int i;
  309. if (!is_rmap_pte(*spte))
  310. return;
  311. page = pfn_to_page((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT);
  312. if (!page_private(page)) {
  313. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  314. BUG();
  315. } else if (!(page_private(page) & 1)) {
  316. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  317. if ((u64 *)page_private(page) != spte) {
  318. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  319. spte, *spte);
  320. BUG();
  321. }
  322. set_page_private(page,0);
  323. } else {
  324. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  325. desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
  326. prev_desc = NULL;
  327. while (desc) {
  328. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  329. if (desc->shadow_ptes[i] == spte) {
  330. rmap_desc_remove_entry(page,
  331. desc, i,
  332. prev_desc);
  333. return;
  334. }
  335. prev_desc = desc;
  336. desc = desc->more;
  337. }
  338. BUG();
  339. }
  340. }
  341. static void rmap_write_protect(struct kvm_vcpu *vcpu, u64 gfn)
  342. {
  343. struct kvm *kvm = vcpu->kvm;
  344. struct page *page;
  345. struct kvm_rmap_desc *desc;
  346. u64 *spte;
  347. page = gfn_to_page(kvm, gfn);
  348. BUG_ON(!page);
  349. while (page_private(page)) {
  350. if (!(page_private(page) & 1))
  351. spte = (u64 *)page_private(page);
  352. else {
  353. desc = (struct kvm_rmap_desc *)(page_private(page) & ~1ul);
  354. spte = desc->shadow_ptes[0];
  355. }
  356. BUG_ON(!spte);
  357. BUG_ON((*spte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT
  358. != page_to_pfn(page));
  359. BUG_ON(!(*spte & PT_PRESENT_MASK));
  360. BUG_ON(!(*spte & PT_WRITABLE_MASK));
  361. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  362. rmap_remove(spte);
  363. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  364. kvm_flush_remote_tlbs(vcpu->kvm);
  365. }
  366. }
  367. #ifdef MMU_DEBUG
  368. static int is_empty_shadow_page(u64 *spt)
  369. {
  370. u64 *pos;
  371. u64 *end;
  372. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  373. if (*pos != 0) {
  374. printk(KERN_ERR "%s: %p %llx\n", __FUNCTION__,
  375. pos, *pos);
  376. return 0;
  377. }
  378. return 1;
  379. }
  380. #endif
  381. static void kvm_mmu_free_page(struct kvm *kvm,
  382. struct kvm_mmu_page *page_head)
  383. {
  384. ASSERT(is_empty_shadow_page(page_head->spt));
  385. list_del(&page_head->link);
  386. kfree(page_head->spt);
  387. kfree(page_head);
  388. ++kvm->n_free_mmu_pages;
  389. }
  390. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  391. {
  392. return gfn;
  393. }
  394. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  395. u64 *parent_pte)
  396. {
  397. struct kvm_mmu_page *page;
  398. if (!vcpu->kvm->n_free_mmu_pages)
  399. return NULL;
  400. page = mmu_memory_cache_alloc(&vcpu->mmu_page_header_cache,
  401. sizeof *page);
  402. page->spt = mmu_memory_cache_alloc(&vcpu->mmu_page_cache, PAGE_SIZE);
  403. set_page_private(virt_to_page(page->spt), (unsigned long)page);
  404. list_add(&page->link, &vcpu->kvm->active_mmu_pages);
  405. ASSERT(is_empty_shadow_page(page->spt));
  406. page->slot_bitmap = 0;
  407. page->multimapped = 0;
  408. page->parent_pte = parent_pte;
  409. --vcpu->kvm->n_free_mmu_pages;
  410. return page;
  411. }
  412. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  413. struct kvm_mmu_page *page, u64 *parent_pte)
  414. {
  415. struct kvm_pte_chain *pte_chain;
  416. struct hlist_node *node;
  417. int i;
  418. if (!parent_pte)
  419. return;
  420. if (!page->multimapped) {
  421. u64 *old = page->parent_pte;
  422. if (!old) {
  423. page->parent_pte = parent_pte;
  424. return;
  425. }
  426. page->multimapped = 1;
  427. pte_chain = mmu_alloc_pte_chain(vcpu);
  428. INIT_HLIST_HEAD(&page->parent_ptes);
  429. hlist_add_head(&pte_chain->link, &page->parent_ptes);
  430. pte_chain->parent_ptes[0] = old;
  431. }
  432. hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link) {
  433. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  434. continue;
  435. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  436. if (!pte_chain->parent_ptes[i]) {
  437. pte_chain->parent_ptes[i] = parent_pte;
  438. return;
  439. }
  440. }
  441. pte_chain = mmu_alloc_pte_chain(vcpu);
  442. BUG_ON(!pte_chain);
  443. hlist_add_head(&pte_chain->link, &page->parent_ptes);
  444. pte_chain->parent_ptes[0] = parent_pte;
  445. }
  446. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *page,
  447. u64 *parent_pte)
  448. {
  449. struct kvm_pte_chain *pte_chain;
  450. struct hlist_node *node;
  451. int i;
  452. if (!page->multimapped) {
  453. BUG_ON(page->parent_pte != parent_pte);
  454. page->parent_pte = NULL;
  455. return;
  456. }
  457. hlist_for_each_entry(pte_chain, node, &page->parent_ptes, link)
  458. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  459. if (!pte_chain->parent_ptes[i])
  460. break;
  461. if (pte_chain->parent_ptes[i] != parent_pte)
  462. continue;
  463. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  464. && pte_chain->parent_ptes[i + 1]) {
  465. pte_chain->parent_ptes[i]
  466. = pte_chain->parent_ptes[i + 1];
  467. ++i;
  468. }
  469. pte_chain->parent_ptes[i] = NULL;
  470. if (i == 0) {
  471. hlist_del(&pte_chain->link);
  472. mmu_free_pte_chain(pte_chain);
  473. if (hlist_empty(&page->parent_ptes)) {
  474. page->multimapped = 0;
  475. page->parent_pte = NULL;
  476. }
  477. }
  478. return;
  479. }
  480. BUG();
  481. }
  482. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm_vcpu *vcpu,
  483. gfn_t gfn)
  484. {
  485. unsigned index;
  486. struct hlist_head *bucket;
  487. struct kvm_mmu_page *page;
  488. struct hlist_node *node;
  489. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  490. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  491. bucket = &vcpu->kvm->mmu_page_hash[index];
  492. hlist_for_each_entry(page, node, bucket, hash_link)
  493. if (page->gfn == gfn && !page->role.metaphysical) {
  494. pgprintk("%s: found role %x\n",
  495. __FUNCTION__, page->role.word);
  496. return page;
  497. }
  498. return NULL;
  499. }
  500. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  501. gfn_t gfn,
  502. gva_t gaddr,
  503. unsigned level,
  504. int metaphysical,
  505. unsigned hugepage_access,
  506. u64 *parent_pte)
  507. {
  508. union kvm_mmu_page_role role;
  509. unsigned index;
  510. unsigned quadrant;
  511. struct hlist_head *bucket;
  512. struct kvm_mmu_page *page;
  513. struct hlist_node *node;
  514. role.word = 0;
  515. role.glevels = vcpu->mmu.root_level;
  516. role.level = level;
  517. role.metaphysical = metaphysical;
  518. role.hugepage_access = hugepage_access;
  519. if (vcpu->mmu.root_level <= PT32_ROOT_LEVEL) {
  520. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  521. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  522. role.quadrant = quadrant;
  523. }
  524. pgprintk("%s: looking gfn %lx role %x\n", __FUNCTION__,
  525. gfn, role.word);
  526. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  527. bucket = &vcpu->kvm->mmu_page_hash[index];
  528. hlist_for_each_entry(page, node, bucket, hash_link)
  529. if (page->gfn == gfn && page->role.word == role.word) {
  530. mmu_page_add_parent_pte(vcpu, page, parent_pte);
  531. pgprintk("%s: found\n", __FUNCTION__);
  532. return page;
  533. }
  534. page = kvm_mmu_alloc_page(vcpu, parent_pte);
  535. if (!page)
  536. return page;
  537. pgprintk("%s: adding gfn %lx role %x\n", __FUNCTION__, gfn, role.word);
  538. page->gfn = gfn;
  539. page->role = role;
  540. hlist_add_head(&page->hash_link, bucket);
  541. if (!metaphysical)
  542. rmap_write_protect(vcpu, gfn);
  543. return page;
  544. }
  545. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  546. struct kvm_mmu_page *page)
  547. {
  548. unsigned i;
  549. u64 *pt;
  550. u64 ent;
  551. pt = page->spt;
  552. if (page->role.level == PT_PAGE_TABLE_LEVEL) {
  553. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  554. if (pt[i] & PT_PRESENT_MASK)
  555. rmap_remove(&pt[i]);
  556. pt[i] = 0;
  557. }
  558. kvm_flush_remote_tlbs(kvm);
  559. return;
  560. }
  561. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  562. ent = pt[i];
  563. pt[i] = 0;
  564. if (!(ent & PT_PRESENT_MASK))
  565. continue;
  566. ent &= PT64_BASE_ADDR_MASK;
  567. mmu_page_remove_parent_pte(page_header(ent), &pt[i]);
  568. }
  569. kvm_flush_remote_tlbs(kvm);
  570. }
  571. static void kvm_mmu_put_page(struct kvm_mmu_page *page,
  572. u64 *parent_pte)
  573. {
  574. mmu_page_remove_parent_pte(page, parent_pte);
  575. }
  576. static void kvm_mmu_zap_page(struct kvm *kvm,
  577. struct kvm_mmu_page *page)
  578. {
  579. u64 *parent_pte;
  580. while (page->multimapped || page->parent_pte) {
  581. if (!page->multimapped)
  582. parent_pte = page->parent_pte;
  583. else {
  584. struct kvm_pte_chain *chain;
  585. chain = container_of(page->parent_ptes.first,
  586. struct kvm_pte_chain, link);
  587. parent_pte = chain->parent_ptes[0];
  588. }
  589. BUG_ON(!parent_pte);
  590. kvm_mmu_put_page(page, parent_pte);
  591. set_shadow_pte(parent_pte, 0);
  592. }
  593. kvm_mmu_page_unlink_children(kvm, page);
  594. if (!page->root_count) {
  595. hlist_del(&page->hash_link);
  596. kvm_mmu_free_page(kvm, page);
  597. } else
  598. list_move(&page->link, &kvm->active_mmu_pages);
  599. }
  600. static int kvm_mmu_unprotect_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  601. {
  602. unsigned index;
  603. struct hlist_head *bucket;
  604. struct kvm_mmu_page *page;
  605. struct hlist_node *node, *n;
  606. int r;
  607. pgprintk("%s: looking for gfn %lx\n", __FUNCTION__, gfn);
  608. r = 0;
  609. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  610. bucket = &vcpu->kvm->mmu_page_hash[index];
  611. hlist_for_each_entry_safe(page, node, n, bucket, hash_link)
  612. if (page->gfn == gfn && !page->role.metaphysical) {
  613. pgprintk("%s: gfn %lx role %x\n", __FUNCTION__, gfn,
  614. page->role.word);
  615. kvm_mmu_zap_page(vcpu->kvm, page);
  616. r = 1;
  617. }
  618. return r;
  619. }
  620. static void mmu_unshadow(struct kvm_vcpu *vcpu, gfn_t gfn)
  621. {
  622. struct kvm_mmu_page *page;
  623. while ((page = kvm_mmu_lookup_page(vcpu, gfn)) != NULL) {
  624. pgprintk("%s: zap %lx %x\n",
  625. __FUNCTION__, gfn, page->role.word);
  626. kvm_mmu_zap_page(vcpu->kvm, page);
  627. }
  628. }
  629. static void page_header_update_slot(struct kvm *kvm, void *pte, gpa_t gpa)
  630. {
  631. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gpa >> PAGE_SHIFT));
  632. struct kvm_mmu_page *page_head = page_header(__pa(pte));
  633. __set_bit(slot, &page_head->slot_bitmap);
  634. }
  635. hpa_t safe_gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
  636. {
  637. hpa_t hpa = gpa_to_hpa(vcpu, gpa);
  638. return is_error_hpa(hpa) ? bad_page_address | (gpa & ~PAGE_MASK): hpa;
  639. }
  640. hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa)
  641. {
  642. struct page *page;
  643. ASSERT((gpa & HPA_ERR_MASK) == 0);
  644. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  645. if (!page)
  646. return gpa | HPA_ERR_MASK;
  647. return ((hpa_t)page_to_pfn(page) << PAGE_SHIFT)
  648. | (gpa & (PAGE_SIZE-1));
  649. }
  650. hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva)
  651. {
  652. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  653. if (gpa == UNMAPPED_GVA)
  654. return UNMAPPED_GVA;
  655. return gpa_to_hpa(vcpu, gpa);
  656. }
  657. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  658. {
  659. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  660. if (gpa == UNMAPPED_GVA)
  661. return NULL;
  662. return pfn_to_page(gpa_to_hpa(vcpu, gpa) >> PAGE_SHIFT);
  663. }
  664. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  665. {
  666. }
  667. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, hpa_t p)
  668. {
  669. int level = PT32E_ROOT_LEVEL;
  670. hpa_t table_addr = vcpu->mmu.root_hpa;
  671. for (; ; level--) {
  672. u32 index = PT64_INDEX(v, level);
  673. u64 *table;
  674. u64 pte;
  675. ASSERT(VALID_PAGE(table_addr));
  676. table = __va(table_addr);
  677. if (level == 1) {
  678. pte = table[index];
  679. if (is_present_pte(pte) && is_writeble_pte(pte))
  680. return 0;
  681. mark_page_dirty(vcpu->kvm, v >> PAGE_SHIFT);
  682. page_header_update_slot(vcpu->kvm, table, v);
  683. table[index] = p | PT_PRESENT_MASK | PT_WRITABLE_MASK |
  684. PT_USER_MASK;
  685. rmap_add(vcpu, &table[index]);
  686. return 0;
  687. }
  688. if (table[index] == 0) {
  689. struct kvm_mmu_page *new_table;
  690. gfn_t pseudo_gfn;
  691. pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
  692. >> PAGE_SHIFT;
  693. new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
  694. v, level - 1,
  695. 1, 0, &table[index]);
  696. if (!new_table) {
  697. pgprintk("nonpaging_map: ENOMEM\n");
  698. return -ENOMEM;
  699. }
  700. table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
  701. | PT_WRITABLE_MASK | PT_USER_MASK;
  702. }
  703. table_addr = table[index] & PT64_BASE_ADDR_MASK;
  704. }
  705. }
  706. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  707. {
  708. int i;
  709. struct kvm_mmu_page *page;
  710. if (!VALID_PAGE(vcpu->mmu.root_hpa))
  711. return;
  712. #ifdef CONFIG_X86_64
  713. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  714. hpa_t root = vcpu->mmu.root_hpa;
  715. page = page_header(root);
  716. --page->root_count;
  717. vcpu->mmu.root_hpa = INVALID_PAGE;
  718. return;
  719. }
  720. #endif
  721. for (i = 0; i < 4; ++i) {
  722. hpa_t root = vcpu->mmu.pae_root[i];
  723. if (root) {
  724. root &= PT64_BASE_ADDR_MASK;
  725. page = page_header(root);
  726. --page->root_count;
  727. }
  728. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  729. }
  730. vcpu->mmu.root_hpa = INVALID_PAGE;
  731. }
  732. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  733. {
  734. int i;
  735. gfn_t root_gfn;
  736. struct kvm_mmu_page *page;
  737. root_gfn = vcpu->cr3 >> PAGE_SHIFT;
  738. #ifdef CONFIG_X86_64
  739. if (vcpu->mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  740. hpa_t root = vcpu->mmu.root_hpa;
  741. ASSERT(!VALID_PAGE(root));
  742. page = kvm_mmu_get_page(vcpu, root_gfn, 0,
  743. PT64_ROOT_LEVEL, 0, 0, NULL);
  744. root = __pa(page->spt);
  745. ++page->root_count;
  746. vcpu->mmu.root_hpa = root;
  747. return;
  748. }
  749. #endif
  750. for (i = 0; i < 4; ++i) {
  751. hpa_t root = vcpu->mmu.pae_root[i];
  752. ASSERT(!VALID_PAGE(root));
  753. if (vcpu->mmu.root_level == PT32E_ROOT_LEVEL) {
  754. if (!is_present_pte(vcpu->pdptrs[i])) {
  755. vcpu->mmu.pae_root[i] = 0;
  756. continue;
  757. }
  758. root_gfn = vcpu->pdptrs[i] >> PAGE_SHIFT;
  759. } else if (vcpu->mmu.root_level == 0)
  760. root_gfn = 0;
  761. page = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  762. PT32_ROOT_LEVEL, !is_paging(vcpu),
  763. 0, NULL);
  764. root = __pa(page->spt);
  765. ++page->root_count;
  766. vcpu->mmu.pae_root[i] = root | PT_PRESENT_MASK;
  767. }
  768. vcpu->mmu.root_hpa = __pa(vcpu->mmu.pae_root);
  769. }
  770. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  771. {
  772. return vaddr;
  773. }
  774. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  775. u32 error_code)
  776. {
  777. gpa_t addr = gva;
  778. hpa_t paddr;
  779. int r;
  780. r = mmu_topup_memory_caches(vcpu);
  781. if (r)
  782. return r;
  783. ASSERT(vcpu);
  784. ASSERT(VALID_PAGE(vcpu->mmu.root_hpa));
  785. paddr = gpa_to_hpa(vcpu , addr & PT64_BASE_ADDR_MASK);
  786. if (is_error_hpa(paddr))
  787. return 1;
  788. return nonpaging_map(vcpu, addr & PAGE_MASK, paddr);
  789. }
  790. static void nonpaging_free(struct kvm_vcpu *vcpu)
  791. {
  792. mmu_free_roots(vcpu);
  793. }
  794. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  795. {
  796. struct kvm_mmu *context = &vcpu->mmu;
  797. context->new_cr3 = nonpaging_new_cr3;
  798. context->page_fault = nonpaging_page_fault;
  799. context->gva_to_gpa = nonpaging_gva_to_gpa;
  800. context->free = nonpaging_free;
  801. context->root_level = 0;
  802. context->shadow_root_level = PT32E_ROOT_LEVEL;
  803. context->root_hpa = INVALID_PAGE;
  804. return 0;
  805. }
  806. static void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  807. {
  808. ++vcpu->stat.tlb_flush;
  809. kvm_arch_ops->tlb_flush(vcpu);
  810. }
  811. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  812. {
  813. pgprintk("%s: cr3 %lx\n", __FUNCTION__, vcpu->cr3);
  814. mmu_free_roots(vcpu);
  815. }
  816. static void inject_page_fault(struct kvm_vcpu *vcpu,
  817. u64 addr,
  818. u32 err_code)
  819. {
  820. kvm_arch_ops->inject_page_fault(vcpu, addr, err_code);
  821. }
  822. static void paging_free(struct kvm_vcpu *vcpu)
  823. {
  824. nonpaging_free(vcpu);
  825. }
  826. #define PTTYPE 64
  827. #include "paging_tmpl.h"
  828. #undef PTTYPE
  829. #define PTTYPE 32
  830. #include "paging_tmpl.h"
  831. #undef PTTYPE
  832. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  833. {
  834. struct kvm_mmu *context = &vcpu->mmu;
  835. ASSERT(is_pae(vcpu));
  836. context->new_cr3 = paging_new_cr3;
  837. context->page_fault = paging64_page_fault;
  838. context->gva_to_gpa = paging64_gva_to_gpa;
  839. context->free = paging_free;
  840. context->root_level = level;
  841. context->shadow_root_level = level;
  842. context->root_hpa = INVALID_PAGE;
  843. return 0;
  844. }
  845. static int paging64_init_context(struct kvm_vcpu *vcpu)
  846. {
  847. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  848. }
  849. static int paging32_init_context(struct kvm_vcpu *vcpu)
  850. {
  851. struct kvm_mmu *context = &vcpu->mmu;
  852. context->new_cr3 = paging_new_cr3;
  853. context->page_fault = paging32_page_fault;
  854. context->gva_to_gpa = paging32_gva_to_gpa;
  855. context->free = paging_free;
  856. context->root_level = PT32_ROOT_LEVEL;
  857. context->shadow_root_level = PT32E_ROOT_LEVEL;
  858. context->root_hpa = INVALID_PAGE;
  859. return 0;
  860. }
  861. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  862. {
  863. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  864. }
  865. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  866. {
  867. ASSERT(vcpu);
  868. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  869. if (!is_paging(vcpu))
  870. return nonpaging_init_context(vcpu);
  871. else if (is_long_mode(vcpu))
  872. return paging64_init_context(vcpu);
  873. else if (is_pae(vcpu))
  874. return paging32E_init_context(vcpu);
  875. else
  876. return paging32_init_context(vcpu);
  877. }
  878. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  879. {
  880. ASSERT(vcpu);
  881. if (VALID_PAGE(vcpu->mmu.root_hpa)) {
  882. vcpu->mmu.free(vcpu);
  883. vcpu->mmu.root_hpa = INVALID_PAGE;
  884. }
  885. }
  886. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  887. {
  888. destroy_kvm_mmu(vcpu);
  889. return init_kvm_mmu(vcpu);
  890. }
  891. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  892. {
  893. int r;
  894. spin_lock(&vcpu->kvm->lock);
  895. r = mmu_topup_memory_caches(vcpu);
  896. if (r)
  897. goto out;
  898. mmu_alloc_roots(vcpu);
  899. kvm_arch_ops->set_cr3(vcpu, vcpu->mmu.root_hpa);
  900. kvm_mmu_flush_tlb(vcpu);
  901. out:
  902. spin_unlock(&vcpu->kvm->lock);
  903. return r;
  904. }
  905. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  906. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  907. {
  908. mmu_free_roots(vcpu);
  909. }
  910. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  911. struct kvm_mmu_page *page,
  912. u64 *spte)
  913. {
  914. u64 pte;
  915. struct kvm_mmu_page *child;
  916. pte = *spte;
  917. if (is_present_pte(pte)) {
  918. if (page->role.level == PT_PAGE_TABLE_LEVEL)
  919. rmap_remove(spte);
  920. else {
  921. child = page_header(pte & PT64_BASE_ADDR_MASK);
  922. mmu_page_remove_parent_pte(child, spte);
  923. }
  924. }
  925. *spte = 0;
  926. kvm_flush_remote_tlbs(vcpu->kvm);
  927. }
  928. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  929. struct kvm_mmu_page *page,
  930. u64 *spte,
  931. const void *new, int bytes)
  932. {
  933. if (page->role.level != PT_PAGE_TABLE_LEVEL)
  934. return;
  935. if (page->role.glevels == PT32_ROOT_LEVEL)
  936. paging32_update_pte(vcpu, page, spte, new, bytes);
  937. else
  938. paging64_update_pte(vcpu, page, spte, new, bytes);
  939. }
  940. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  941. const u8 *old, const u8 *new, int bytes)
  942. {
  943. gfn_t gfn = gpa >> PAGE_SHIFT;
  944. struct kvm_mmu_page *page;
  945. struct hlist_node *node, *n;
  946. struct hlist_head *bucket;
  947. unsigned index;
  948. u64 *spte;
  949. unsigned offset = offset_in_page(gpa);
  950. unsigned pte_size;
  951. unsigned page_offset;
  952. unsigned misaligned;
  953. unsigned quadrant;
  954. int level;
  955. int flooded = 0;
  956. int npte;
  957. pgprintk("%s: gpa %llx bytes %d\n", __FUNCTION__, gpa, bytes);
  958. if (gfn == vcpu->last_pt_write_gfn) {
  959. ++vcpu->last_pt_write_count;
  960. if (vcpu->last_pt_write_count >= 3)
  961. flooded = 1;
  962. } else {
  963. vcpu->last_pt_write_gfn = gfn;
  964. vcpu->last_pt_write_count = 1;
  965. }
  966. index = kvm_page_table_hashfn(gfn) % KVM_NUM_MMU_PAGES;
  967. bucket = &vcpu->kvm->mmu_page_hash[index];
  968. hlist_for_each_entry_safe(page, node, n, bucket, hash_link) {
  969. if (page->gfn != gfn || page->role.metaphysical)
  970. continue;
  971. pte_size = page->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  972. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  973. misaligned |= bytes < 4;
  974. if (misaligned || flooded) {
  975. /*
  976. * Misaligned accesses are too much trouble to fix
  977. * up; also, they usually indicate a page is not used
  978. * as a page table.
  979. *
  980. * If we're seeing too many writes to a page,
  981. * it may no longer be a page table, or we may be
  982. * forking, in which case it is better to unmap the
  983. * page.
  984. */
  985. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  986. gpa, bytes, page->role.word);
  987. kvm_mmu_zap_page(vcpu->kvm, page);
  988. continue;
  989. }
  990. page_offset = offset;
  991. level = page->role.level;
  992. npte = 1;
  993. if (page->role.glevels == PT32_ROOT_LEVEL) {
  994. page_offset <<= 1; /* 32->64 */
  995. /*
  996. * A 32-bit pde maps 4MB while the shadow pdes map
  997. * only 2MB. So we need to double the offset again
  998. * and zap two pdes instead of one.
  999. */
  1000. if (level == PT32_ROOT_LEVEL) {
  1001. page_offset &= ~7; /* kill rounding error */
  1002. page_offset <<= 1;
  1003. npte = 2;
  1004. }
  1005. quadrant = page_offset >> PAGE_SHIFT;
  1006. page_offset &= ~PAGE_MASK;
  1007. if (quadrant != page->role.quadrant)
  1008. continue;
  1009. }
  1010. spte = &page->spt[page_offset / sizeof(*spte)];
  1011. while (npte--) {
  1012. mmu_pte_write_zap_pte(vcpu, page, spte);
  1013. mmu_pte_write_new_pte(vcpu, page, spte, new, bytes);
  1014. ++spte;
  1015. }
  1016. }
  1017. }
  1018. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1019. {
  1020. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, gva);
  1021. return kvm_mmu_unprotect_page(vcpu, gpa >> PAGE_SHIFT);
  1022. }
  1023. void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1024. {
  1025. while (vcpu->kvm->n_free_mmu_pages < KVM_REFILL_PAGES) {
  1026. struct kvm_mmu_page *page;
  1027. page = container_of(vcpu->kvm->active_mmu_pages.prev,
  1028. struct kvm_mmu_page, link);
  1029. kvm_mmu_zap_page(vcpu->kvm, page);
  1030. }
  1031. }
  1032. EXPORT_SYMBOL_GPL(kvm_mmu_free_some_pages);
  1033. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  1034. {
  1035. struct kvm_mmu_page *page;
  1036. while (!list_empty(&vcpu->kvm->active_mmu_pages)) {
  1037. page = container_of(vcpu->kvm->active_mmu_pages.next,
  1038. struct kvm_mmu_page, link);
  1039. kvm_mmu_zap_page(vcpu->kvm, page);
  1040. }
  1041. free_page((unsigned long)vcpu->mmu.pae_root);
  1042. }
  1043. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  1044. {
  1045. struct page *page;
  1046. int i;
  1047. ASSERT(vcpu);
  1048. vcpu->kvm->n_free_mmu_pages = KVM_NUM_MMU_PAGES;
  1049. /*
  1050. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  1051. * Therefore we need to allocate shadow page tables in the first
  1052. * 4GB of memory, which happens to fit the DMA32 zone.
  1053. */
  1054. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  1055. if (!page)
  1056. goto error_1;
  1057. vcpu->mmu.pae_root = page_address(page);
  1058. for (i = 0; i < 4; ++i)
  1059. vcpu->mmu.pae_root[i] = INVALID_PAGE;
  1060. return 0;
  1061. error_1:
  1062. free_mmu_pages(vcpu);
  1063. return -ENOMEM;
  1064. }
  1065. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  1066. {
  1067. ASSERT(vcpu);
  1068. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1069. return alloc_mmu_pages(vcpu);
  1070. }
  1071. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  1072. {
  1073. ASSERT(vcpu);
  1074. ASSERT(!VALID_PAGE(vcpu->mmu.root_hpa));
  1075. return init_kvm_mmu(vcpu);
  1076. }
  1077. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  1078. {
  1079. ASSERT(vcpu);
  1080. destroy_kvm_mmu(vcpu);
  1081. free_mmu_pages(vcpu);
  1082. mmu_free_memory_caches(vcpu);
  1083. }
  1084. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  1085. {
  1086. struct kvm_mmu_page *page;
  1087. list_for_each_entry(page, &kvm->active_mmu_pages, link) {
  1088. int i;
  1089. u64 *pt;
  1090. if (!test_bit(slot, &page->slot_bitmap))
  1091. continue;
  1092. pt = page->spt;
  1093. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1094. /* avoid RMW */
  1095. if (pt[i] & PT_WRITABLE_MASK) {
  1096. rmap_remove(&pt[i]);
  1097. pt[i] &= ~PT_WRITABLE_MASK;
  1098. }
  1099. }
  1100. }
  1101. void kvm_mmu_zap_all(struct kvm *kvm)
  1102. {
  1103. struct kvm_mmu_page *page, *node;
  1104. list_for_each_entry_safe(page, node, &kvm->active_mmu_pages, link)
  1105. kvm_mmu_zap_page(kvm, page);
  1106. kvm_flush_remote_tlbs(kvm);
  1107. }
  1108. void kvm_mmu_module_exit(void)
  1109. {
  1110. if (pte_chain_cache)
  1111. kmem_cache_destroy(pte_chain_cache);
  1112. if (rmap_desc_cache)
  1113. kmem_cache_destroy(rmap_desc_cache);
  1114. if (mmu_page_cache)
  1115. kmem_cache_destroy(mmu_page_cache);
  1116. if (mmu_page_header_cache)
  1117. kmem_cache_destroy(mmu_page_header_cache);
  1118. }
  1119. int kvm_mmu_module_init(void)
  1120. {
  1121. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  1122. sizeof(struct kvm_pte_chain),
  1123. 0, 0, NULL);
  1124. if (!pte_chain_cache)
  1125. goto nomem;
  1126. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  1127. sizeof(struct kvm_rmap_desc),
  1128. 0, 0, NULL);
  1129. if (!rmap_desc_cache)
  1130. goto nomem;
  1131. mmu_page_cache = kmem_cache_create("kvm_mmu_page",
  1132. PAGE_SIZE,
  1133. PAGE_SIZE, 0, NULL);
  1134. if (!mmu_page_cache)
  1135. goto nomem;
  1136. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  1137. sizeof(struct kvm_mmu_page),
  1138. 0, 0, NULL);
  1139. if (!mmu_page_header_cache)
  1140. goto nomem;
  1141. return 0;
  1142. nomem:
  1143. kvm_mmu_module_exit();
  1144. return -ENOMEM;
  1145. }
  1146. #ifdef AUDIT
  1147. static const char *audit_msg;
  1148. static gva_t canonicalize(gva_t gva)
  1149. {
  1150. #ifdef CONFIG_X86_64
  1151. gva = (long long)(gva << 16) >> 16;
  1152. #endif
  1153. return gva;
  1154. }
  1155. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  1156. gva_t va, int level)
  1157. {
  1158. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  1159. int i;
  1160. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  1161. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  1162. u64 ent = pt[i];
  1163. if (!(ent & PT_PRESENT_MASK))
  1164. continue;
  1165. va = canonicalize(va);
  1166. if (level > 1)
  1167. audit_mappings_page(vcpu, ent, va, level - 1);
  1168. else {
  1169. gpa_t gpa = vcpu->mmu.gva_to_gpa(vcpu, va);
  1170. hpa_t hpa = gpa_to_hpa(vcpu, gpa);
  1171. if ((ent & PT_PRESENT_MASK)
  1172. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  1173. printk(KERN_ERR "audit error: (%s) levels %d"
  1174. " gva %lx gpa %llx hpa %llx ent %llx\n",
  1175. audit_msg, vcpu->mmu.root_level,
  1176. va, gpa, hpa, ent);
  1177. }
  1178. }
  1179. }
  1180. static void audit_mappings(struct kvm_vcpu *vcpu)
  1181. {
  1182. unsigned i;
  1183. if (vcpu->mmu.root_level == 4)
  1184. audit_mappings_page(vcpu, vcpu->mmu.root_hpa, 0, 4);
  1185. else
  1186. for (i = 0; i < 4; ++i)
  1187. if (vcpu->mmu.pae_root[i] & PT_PRESENT_MASK)
  1188. audit_mappings_page(vcpu,
  1189. vcpu->mmu.pae_root[i],
  1190. i << 30,
  1191. 2);
  1192. }
  1193. static int count_rmaps(struct kvm_vcpu *vcpu)
  1194. {
  1195. int nmaps = 0;
  1196. int i, j, k;
  1197. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  1198. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  1199. struct kvm_rmap_desc *d;
  1200. for (j = 0; j < m->npages; ++j) {
  1201. struct page *page = m->phys_mem[j];
  1202. if (!page->private)
  1203. continue;
  1204. if (!(page->private & 1)) {
  1205. ++nmaps;
  1206. continue;
  1207. }
  1208. d = (struct kvm_rmap_desc *)(page->private & ~1ul);
  1209. while (d) {
  1210. for (k = 0; k < RMAP_EXT; ++k)
  1211. if (d->shadow_ptes[k])
  1212. ++nmaps;
  1213. else
  1214. break;
  1215. d = d->more;
  1216. }
  1217. }
  1218. }
  1219. return nmaps;
  1220. }
  1221. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  1222. {
  1223. int nmaps = 0;
  1224. struct kvm_mmu_page *page;
  1225. int i;
  1226. list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
  1227. u64 *pt = page->spt;
  1228. if (page->role.level != PT_PAGE_TABLE_LEVEL)
  1229. continue;
  1230. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1231. u64 ent = pt[i];
  1232. if (!(ent & PT_PRESENT_MASK))
  1233. continue;
  1234. if (!(ent & PT_WRITABLE_MASK))
  1235. continue;
  1236. ++nmaps;
  1237. }
  1238. }
  1239. return nmaps;
  1240. }
  1241. static void audit_rmap(struct kvm_vcpu *vcpu)
  1242. {
  1243. int n_rmap = count_rmaps(vcpu);
  1244. int n_actual = count_writable_mappings(vcpu);
  1245. if (n_rmap != n_actual)
  1246. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  1247. __FUNCTION__, audit_msg, n_rmap, n_actual);
  1248. }
  1249. static void audit_write_protection(struct kvm_vcpu *vcpu)
  1250. {
  1251. struct kvm_mmu_page *page;
  1252. list_for_each_entry(page, &vcpu->kvm->active_mmu_pages, link) {
  1253. hfn_t hfn;
  1254. struct page *pg;
  1255. if (page->role.metaphysical)
  1256. continue;
  1257. hfn = gpa_to_hpa(vcpu, (gpa_t)page->gfn << PAGE_SHIFT)
  1258. >> PAGE_SHIFT;
  1259. pg = pfn_to_page(hfn);
  1260. if (pg->private)
  1261. printk(KERN_ERR "%s: (%s) shadow page has writable"
  1262. " mappings: gfn %lx role %x\n",
  1263. __FUNCTION__, audit_msg, page->gfn,
  1264. page->role.word);
  1265. }
  1266. }
  1267. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  1268. {
  1269. int olddbg = dbg;
  1270. dbg = 0;
  1271. audit_msg = msg;
  1272. audit_rmap(vcpu);
  1273. audit_write_protection(vcpu);
  1274. audit_mappings(vcpu);
  1275. dbg = olddbg;
  1276. }
  1277. #endif