en_netdev.c 52 KB

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  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/etherdevice.h>
  34. #include <linux/tcp.h>
  35. #include <linux/if_vlan.h>
  36. #include <linux/delay.h>
  37. #include <linux/slab.h>
  38. #include <linux/hash.h>
  39. #include <net/ip.h>
  40. #include <linux/mlx4/driver.h>
  41. #include <linux/mlx4/device.h>
  42. #include <linux/mlx4/cmd.h>
  43. #include <linux/mlx4/cq.h>
  44. #include "mlx4_en.h"
  45. #include "en_port.h"
  46. int mlx4_en_setup_tc(struct net_device *dev, u8 up)
  47. {
  48. struct mlx4_en_priv *priv = netdev_priv(dev);
  49. int i;
  50. unsigned int offset = 0;
  51. if (up && up != MLX4_EN_NUM_UP)
  52. return -EINVAL;
  53. netdev_set_num_tc(dev, up);
  54. /* Partition Tx queues evenly amongst UP's */
  55. for (i = 0; i < up; i++) {
  56. netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
  57. offset += priv->num_tx_rings_p_up;
  58. }
  59. return 0;
  60. }
  61. #ifdef CONFIG_RFS_ACCEL
  62. struct mlx4_en_filter {
  63. struct list_head next;
  64. struct work_struct work;
  65. __be32 src_ip;
  66. __be32 dst_ip;
  67. __be16 src_port;
  68. __be16 dst_port;
  69. int rxq_index;
  70. struct mlx4_en_priv *priv;
  71. u32 flow_id; /* RFS infrastructure id */
  72. int id; /* mlx4_en driver id */
  73. u64 reg_id; /* Flow steering API id */
  74. u8 activated; /* Used to prevent expiry before filter
  75. * is attached
  76. */
  77. struct hlist_node filter_chain;
  78. };
  79. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
  80. static void mlx4_en_filter_work(struct work_struct *work)
  81. {
  82. struct mlx4_en_filter *filter = container_of(work,
  83. struct mlx4_en_filter,
  84. work);
  85. struct mlx4_en_priv *priv = filter->priv;
  86. struct mlx4_spec_list spec_tcp = {
  87. .id = MLX4_NET_TRANS_RULE_ID_TCP,
  88. {
  89. .tcp_udp = {
  90. .dst_port = filter->dst_port,
  91. .dst_port_msk = (__force __be16)-1,
  92. .src_port = filter->src_port,
  93. .src_port_msk = (__force __be16)-1,
  94. },
  95. },
  96. };
  97. struct mlx4_spec_list spec_ip = {
  98. .id = MLX4_NET_TRANS_RULE_ID_IPV4,
  99. {
  100. .ipv4 = {
  101. .dst_ip = filter->dst_ip,
  102. .dst_ip_msk = (__force __be32)-1,
  103. .src_ip = filter->src_ip,
  104. .src_ip_msk = (__force __be32)-1,
  105. },
  106. },
  107. };
  108. struct mlx4_spec_list spec_eth = {
  109. .id = MLX4_NET_TRANS_RULE_ID_ETH,
  110. };
  111. struct mlx4_net_trans_rule rule = {
  112. .list = LIST_HEAD_INIT(rule.list),
  113. .queue_mode = MLX4_NET_TRANS_Q_LIFO,
  114. .exclusive = 1,
  115. .allow_loopback = 1,
  116. .promisc_mode = MLX4_FS_PROMISC_NONE,
  117. .port = priv->port,
  118. .priority = MLX4_DOMAIN_RFS,
  119. };
  120. int rc;
  121. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  122. list_add_tail(&spec_eth.list, &rule.list);
  123. list_add_tail(&spec_ip.list, &rule.list);
  124. list_add_tail(&spec_tcp.list, &rule.list);
  125. rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
  126. memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
  127. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  128. filter->activated = 0;
  129. if (filter->reg_id) {
  130. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  131. if (rc && rc != -ENOENT)
  132. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  133. }
  134. rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
  135. if (rc)
  136. en_err(priv, "Error attaching flow. err = %d\n", rc);
  137. mlx4_en_filter_rfs_expire(priv);
  138. filter->activated = 1;
  139. }
  140. static inline struct hlist_head *
  141. filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  142. __be16 src_port, __be16 dst_port)
  143. {
  144. unsigned long l;
  145. int bucket_idx;
  146. l = (__force unsigned long)src_port |
  147. ((__force unsigned long)dst_port << 2);
  148. l ^= (__force unsigned long)(src_ip ^ dst_ip);
  149. bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
  150. return &priv->filter_hash[bucket_idx];
  151. }
  152. static struct mlx4_en_filter *
  153. mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
  154. __be32 dst_ip, __be16 src_port, __be16 dst_port,
  155. u32 flow_id)
  156. {
  157. struct mlx4_en_filter *filter = NULL;
  158. filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
  159. if (!filter)
  160. return NULL;
  161. filter->priv = priv;
  162. filter->rxq_index = rxq_index;
  163. INIT_WORK(&filter->work, mlx4_en_filter_work);
  164. filter->src_ip = src_ip;
  165. filter->dst_ip = dst_ip;
  166. filter->src_port = src_port;
  167. filter->dst_port = dst_port;
  168. filter->flow_id = flow_id;
  169. filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
  170. list_add_tail(&filter->next, &priv->filters);
  171. hlist_add_head(&filter->filter_chain,
  172. filter_hash_bucket(priv, src_ip, dst_ip, src_port,
  173. dst_port));
  174. return filter;
  175. }
  176. static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
  177. {
  178. struct mlx4_en_priv *priv = filter->priv;
  179. int rc;
  180. list_del(&filter->next);
  181. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  182. if (rc && rc != -ENOENT)
  183. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  184. kfree(filter);
  185. }
  186. static inline struct mlx4_en_filter *
  187. mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  188. __be16 src_port, __be16 dst_port)
  189. {
  190. struct hlist_node *elem;
  191. struct mlx4_en_filter *filter;
  192. struct mlx4_en_filter *ret = NULL;
  193. hlist_for_each_entry(filter, elem,
  194. filter_hash_bucket(priv, src_ip, dst_ip,
  195. src_port, dst_port),
  196. filter_chain) {
  197. if (filter->src_ip == src_ip &&
  198. filter->dst_ip == dst_ip &&
  199. filter->src_port == src_port &&
  200. filter->dst_port == dst_port) {
  201. ret = filter;
  202. break;
  203. }
  204. }
  205. return ret;
  206. }
  207. static int
  208. mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  209. u16 rxq_index, u32 flow_id)
  210. {
  211. struct mlx4_en_priv *priv = netdev_priv(net_dev);
  212. struct mlx4_en_filter *filter;
  213. const struct iphdr *ip;
  214. const __be16 *ports;
  215. __be32 src_ip;
  216. __be32 dst_ip;
  217. __be16 src_port;
  218. __be16 dst_port;
  219. int nhoff = skb_network_offset(skb);
  220. int ret = 0;
  221. if (skb->protocol != htons(ETH_P_IP))
  222. return -EPROTONOSUPPORT;
  223. ip = (const struct iphdr *)(skb->data + nhoff);
  224. if (ip_is_fragment(ip))
  225. return -EPROTONOSUPPORT;
  226. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  227. src_ip = ip->saddr;
  228. dst_ip = ip->daddr;
  229. src_port = ports[0];
  230. dst_port = ports[1];
  231. if (ip->protocol != IPPROTO_TCP)
  232. return -EPROTONOSUPPORT;
  233. spin_lock_bh(&priv->filters_lock);
  234. filter = mlx4_en_filter_find(priv, src_ip, dst_ip, src_port, dst_port);
  235. if (filter) {
  236. if (filter->rxq_index == rxq_index)
  237. goto out;
  238. filter->rxq_index = rxq_index;
  239. } else {
  240. filter = mlx4_en_filter_alloc(priv, rxq_index,
  241. src_ip, dst_ip,
  242. src_port, dst_port, flow_id);
  243. if (!filter) {
  244. ret = -ENOMEM;
  245. goto err;
  246. }
  247. }
  248. queue_work(priv->mdev->workqueue, &filter->work);
  249. out:
  250. ret = filter->id;
  251. err:
  252. spin_unlock_bh(&priv->filters_lock);
  253. return ret;
  254. }
  255. void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv,
  256. struct mlx4_en_rx_ring *rx_ring)
  257. {
  258. struct mlx4_en_filter *filter, *tmp;
  259. LIST_HEAD(del_list);
  260. spin_lock_bh(&priv->filters_lock);
  261. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  262. list_move(&filter->next, &del_list);
  263. hlist_del(&filter->filter_chain);
  264. }
  265. spin_unlock_bh(&priv->filters_lock);
  266. list_for_each_entry_safe(filter, tmp, &del_list, next) {
  267. cancel_work_sync(&filter->work);
  268. mlx4_en_filter_free(filter);
  269. }
  270. }
  271. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
  272. {
  273. struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
  274. LIST_HEAD(del_list);
  275. int i = 0;
  276. spin_lock_bh(&priv->filters_lock);
  277. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  278. if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
  279. break;
  280. if (filter->activated &&
  281. !work_pending(&filter->work) &&
  282. rps_may_expire_flow(priv->dev,
  283. filter->rxq_index, filter->flow_id,
  284. filter->id)) {
  285. list_move(&filter->next, &del_list);
  286. hlist_del(&filter->filter_chain);
  287. } else
  288. last_filter = filter;
  289. i++;
  290. }
  291. if (last_filter && (&last_filter->next != priv->filters.next))
  292. list_move(&priv->filters, &last_filter->next);
  293. spin_unlock_bh(&priv->filters_lock);
  294. list_for_each_entry_safe(filter, tmp, &del_list, next)
  295. mlx4_en_filter_free(filter);
  296. }
  297. #endif
  298. static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
  299. {
  300. struct mlx4_en_priv *priv = netdev_priv(dev);
  301. struct mlx4_en_dev *mdev = priv->mdev;
  302. int err;
  303. int idx;
  304. en_dbg(HW, priv, "adding VLAN:%d\n", vid);
  305. set_bit(vid, priv->active_vlans);
  306. /* Add VID to port VLAN filter */
  307. mutex_lock(&mdev->state_lock);
  308. if (mdev->device_up && priv->port_up) {
  309. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  310. if (err)
  311. en_err(priv, "Failed configuring VLAN filter\n");
  312. }
  313. if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
  314. en_err(priv, "failed adding vlan %d\n", vid);
  315. mutex_unlock(&mdev->state_lock);
  316. return 0;
  317. }
  318. static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
  319. {
  320. struct mlx4_en_priv *priv = netdev_priv(dev);
  321. struct mlx4_en_dev *mdev = priv->mdev;
  322. int err;
  323. int idx;
  324. en_dbg(HW, priv, "Killing VID:%d\n", vid);
  325. clear_bit(vid, priv->active_vlans);
  326. /* Remove VID from port VLAN filter */
  327. mutex_lock(&mdev->state_lock);
  328. if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx))
  329. mlx4_unregister_vlan(mdev->dev, priv->port, idx);
  330. else
  331. en_err(priv, "could not find vid %d in cache\n", vid);
  332. if (mdev->device_up && priv->port_up) {
  333. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  334. if (err)
  335. en_err(priv, "Failed configuring VLAN filter\n");
  336. }
  337. mutex_unlock(&mdev->state_lock);
  338. return 0;
  339. }
  340. static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
  341. {
  342. unsigned int i;
  343. for (i = ETH_ALEN - 1; i; --i) {
  344. dst_mac[i] = src_mac & 0xff;
  345. src_mac >>= 8;
  346. }
  347. memset(&dst_mac[ETH_ALEN], 0, 2);
  348. }
  349. static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
  350. unsigned char *mac, int *qpn, u64 *reg_id)
  351. {
  352. struct mlx4_en_dev *mdev = priv->mdev;
  353. struct mlx4_dev *dev = mdev->dev;
  354. int err;
  355. switch (dev->caps.steering_mode) {
  356. case MLX4_STEERING_MODE_B0: {
  357. struct mlx4_qp qp;
  358. u8 gid[16] = {0};
  359. qp.qpn = *qpn;
  360. memcpy(&gid[10], mac, ETH_ALEN);
  361. gid[5] = priv->port;
  362. err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
  363. break;
  364. }
  365. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  366. struct mlx4_spec_list spec_eth = { {NULL} };
  367. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  368. struct mlx4_net_trans_rule rule = {
  369. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  370. .exclusive = 0,
  371. .allow_loopback = 1,
  372. .promisc_mode = MLX4_FS_PROMISC_NONE,
  373. .priority = MLX4_DOMAIN_NIC,
  374. };
  375. rule.port = priv->port;
  376. rule.qpn = *qpn;
  377. INIT_LIST_HEAD(&rule.list);
  378. spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
  379. memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
  380. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  381. list_add_tail(&spec_eth.list, &rule.list);
  382. err = mlx4_flow_attach(dev, &rule, reg_id);
  383. break;
  384. }
  385. default:
  386. return -EINVAL;
  387. }
  388. if (err)
  389. en_warn(priv, "Failed Attaching Unicast\n");
  390. return err;
  391. }
  392. static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
  393. unsigned char *mac, int qpn, u64 reg_id)
  394. {
  395. struct mlx4_en_dev *mdev = priv->mdev;
  396. struct mlx4_dev *dev = mdev->dev;
  397. switch (dev->caps.steering_mode) {
  398. case MLX4_STEERING_MODE_B0: {
  399. struct mlx4_qp qp;
  400. u8 gid[16] = {0};
  401. qp.qpn = qpn;
  402. memcpy(&gid[10], mac, ETH_ALEN);
  403. gid[5] = priv->port;
  404. mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
  405. break;
  406. }
  407. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  408. mlx4_flow_detach(dev, reg_id);
  409. break;
  410. }
  411. default:
  412. en_err(priv, "Invalid steering mode.\n");
  413. }
  414. }
  415. static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
  416. {
  417. struct mlx4_en_dev *mdev = priv->mdev;
  418. struct mlx4_dev *dev = mdev->dev;
  419. struct mlx4_mac_entry *entry;
  420. int index = 0;
  421. int err = 0;
  422. u64 reg_id;
  423. int *qpn = &priv->base_qpn;
  424. u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
  425. en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
  426. priv->dev->dev_addr);
  427. index = mlx4_register_mac(dev, priv->port, mac);
  428. if (index < 0) {
  429. err = index;
  430. en_err(priv, "Failed adding MAC: %pM\n",
  431. priv->dev->dev_addr);
  432. return err;
  433. }
  434. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  435. int base_qpn = mlx4_get_base_qpn(dev, priv->port);
  436. *qpn = base_qpn + index;
  437. return 0;
  438. }
  439. err = mlx4_qp_reserve_range(dev, 1, 1, qpn);
  440. en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
  441. if (err) {
  442. en_err(priv, "Failed to reserve qp for mac registration\n");
  443. goto qp_err;
  444. }
  445. err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
  446. if (err)
  447. goto steer_err;
  448. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  449. if (!entry) {
  450. err = -ENOMEM;
  451. goto alloc_err;
  452. }
  453. memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
  454. entry->reg_id = reg_id;
  455. err = radix_tree_insert(&priv->mac_tree, *qpn, entry);
  456. if (err)
  457. goto insert_err;
  458. return 0;
  459. insert_err:
  460. kfree(entry);
  461. alloc_err:
  462. mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
  463. steer_err:
  464. mlx4_qp_release_range(dev, *qpn, 1);
  465. qp_err:
  466. mlx4_unregister_mac(dev, priv->port, mac);
  467. return err;
  468. }
  469. static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
  470. {
  471. struct mlx4_en_dev *mdev = priv->mdev;
  472. struct mlx4_dev *dev = mdev->dev;
  473. struct mlx4_mac_entry *entry;
  474. int qpn = priv->base_qpn;
  475. u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
  476. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  477. priv->dev->dev_addr);
  478. mlx4_unregister_mac(dev, priv->port, mac);
  479. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  480. entry = radix_tree_lookup(&priv->mac_tree, qpn);
  481. if (entry) {
  482. en_dbg(DRV, priv, "Releasing qp: port %d, MAC %pM, qpn %d\n",
  483. priv->port, entry->mac, qpn);
  484. mlx4_en_uc_steer_release(priv, entry->mac,
  485. qpn, entry->reg_id);
  486. mlx4_qp_release_range(dev, qpn, 1);
  487. radix_tree_delete(&priv->mac_tree, qpn);
  488. kfree(entry);
  489. }
  490. }
  491. }
  492. static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
  493. unsigned char *new_mac, unsigned char *prev_mac)
  494. {
  495. struct mlx4_en_dev *mdev = priv->mdev;
  496. struct mlx4_dev *dev = mdev->dev;
  497. struct mlx4_mac_entry *entry;
  498. int err = 0;
  499. u64 new_mac_u64 = mlx4_en_mac_to_u64(new_mac);
  500. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  501. u64 prev_mac_u64;
  502. entry = radix_tree_lookup(&priv->mac_tree, qpn);
  503. if (!entry)
  504. return -EINVAL;
  505. prev_mac_u64 = mlx4_en_mac_to_u64(entry->mac);
  506. mlx4_en_uc_steer_release(priv, entry->mac,
  507. qpn, entry->reg_id);
  508. mlx4_unregister_mac(dev, priv->port, prev_mac_u64);
  509. memcpy(entry->mac, new_mac, ETH_ALEN);
  510. entry->reg_id = 0;
  511. mlx4_register_mac(dev, priv->port, new_mac_u64);
  512. err = mlx4_en_uc_steer_add(priv, new_mac,
  513. &qpn, &entry->reg_id);
  514. return err;
  515. }
  516. return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
  517. }
  518. u64 mlx4_en_mac_to_u64(u8 *addr)
  519. {
  520. u64 mac = 0;
  521. int i;
  522. for (i = 0; i < ETH_ALEN; i++) {
  523. mac <<= 8;
  524. mac |= addr[i];
  525. }
  526. return mac;
  527. }
  528. static int mlx4_en_set_mac(struct net_device *dev, void *addr)
  529. {
  530. struct mlx4_en_priv *priv = netdev_priv(dev);
  531. struct mlx4_en_dev *mdev = priv->mdev;
  532. struct sockaddr *saddr = addr;
  533. if (!is_valid_ether_addr(saddr->sa_data))
  534. return -EADDRNOTAVAIL;
  535. memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
  536. queue_work(mdev->workqueue, &priv->mac_task);
  537. return 0;
  538. }
  539. static void mlx4_en_do_set_mac(struct work_struct *work)
  540. {
  541. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  542. mac_task);
  543. struct mlx4_en_dev *mdev = priv->mdev;
  544. int err = 0;
  545. mutex_lock(&mdev->state_lock);
  546. if (priv->port_up) {
  547. /* Remove old MAC and insert the new one */
  548. err = mlx4_en_replace_mac(priv, priv->base_qpn,
  549. priv->dev->dev_addr, priv->prev_mac);
  550. if (err)
  551. en_err(priv, "Failed changing HW MAC address\n");
  552. memcpy(priv->prev_mac, priv->dev->dev_addr,
  553. sizeof(priv->prev_mac));
  554. } else
  555. en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
  556. mutex_unlock(&mdev->state_lock);
  557. }
  558. static void mlx4_en_clear_list(struct net_device *dev)
  559. {
  560. struct mlx4_en_priv *priv = netdev_priv(dev);
  561. struct mlx4_en_mc_list *tmp, *mc_to_del;
  562. list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
  563. list_del(&mc_to_del->list);
  564. kfree(mc_to_del);
  565. }
  566. }
  567. static void mlx4_en_cache_mclist(struct net_device *dev)
  568. {
  569. struct mlx4_en_priv *priv = netdev_priv(dev);
  570. struct netdev_hw_addr *ha;
  571. struct mlx4_en_mc_list *tmp;
  572. mlx4_en_clear_list(dev);
  573. netdev_for_each_mc_addr(ha, dev) {
  574. tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
  575. if (!tmp) {
  576. en_err(priv, "failed to allocate multicast list\n");
  577. mlx4_en_clear_list(dev);
  578. return;
  579. }
  580. memcpy(tmp->addr, ha->addr, ETH_ALEN);
  581. list_add_tail(&tmp->list, &priv->mc_list);
  582. }
  583. }
  584. static void update_mclist_flags(struct mlx4_en_priv *priv,
  585. struct list_head *dst,
  586. struct list_head *src)
  587. {
  588. struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
  589. bool found;
  590. /* Find all the entries that should be removed from dst,
  591. * These are the entries that are not found in src
  592. */
  593. list_for_each_entry(dst_tmp, dst, list) {
  594. found = false;
  595. list_for_each_entry(src_tmp, src, list) {
  596. if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
  597. found = true;
  598. break;
  599. }
  600. }
  601. if (!found)
  602. dst_tmp->action = MCLIST_REM;
  603. }
  604. /* Add entries that exist in src but not in dst
  605. * mark them as need to add
  606. */
  607. list_for_each_entry(src_tmp, src, list) {
  608. found = false;
  609. list_for_each_entry(dst_tmp, dst, list) {
  610. if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
  611. dst_tmp->action = MCLIST_NONE;
  612. found = true;
  613. break;
  614. }
  615. }
  616. if (!found) {
  617. new_mc = kmalloc(sizeof(struct mlx4_en_mc_list),
  618. GFP_KERNEL);
  619. if (!new_mc) {
  620. en_err(priv, "Failed to allocate current multicast list\n");
  621. return;
  622. }
  623. memcpy(new_mc, src_tmp,
  624. sizeof(struct mlx4_en_mc_list));
  625. new_mc->action = MCLIST_ADD;
  626. list_add_tail(&new_mc->list, dst);
  627. }
  628. }
  629. }
  630. static void mlx4_en_set_rx_mode(struct net_device *dev)
  631. {
  632. struct mlx4_en_priv *priv = netdev_priv(dev);
  633. if (!priv->port_up)
  634. return;
  635. queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
  636. }
  637. static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
  638. struct mlx4_en_dev *mdev)
  639. {
  640. int err = 0;
  641. if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
  642. if (netif_msg_rx_status(priv))
  643. en_warn(priv, "Entering promiscuous mode\n");
  644. priv->flags |= MLX4_EN_FLAG_PROMISC;
  645. /* Enable promiscouos mode */
  646. switch (mdev->dev->caps.steering_mode) {
  647. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  648. err = mlx4_flow_steer_promisc_add(mdev->dev,
  649. priv->port,
  650. priv->base_qpn,
  651. MLX4_FS_PROMISC_UPLINK);
  652. if (err)
  653. en_err(priv, "Failed enabling promiscuous mode\n");
  654. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  655. break;
  656. case MLX4_STEERING_MODE_B0:
  657. err = mlx4_unicast_promisc_add(mdev->dev,
  658. priv->base_qpn,
  659. priv->port);
  660. if (err)
  661. en_err(priv, "Failed enabling unicast promiscuous mode\n");
  662. /* Add the default qp number as multicast
  663. * promisc
  664. */
  665. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  666. err = mlx4_multicast_promisc_add(mdev->dev,
  667. priv->base_qpn,
  668. priv->port);
  669. if (err)
  670. en_err(priv, "Failed enabling multicast promiscuous mode\n");
  671. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  672. }
  673. break;
  674. case MLX4_STEERING_MODE_A0:
  675. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  676. priv->port,
  677. priv->base_qpn,
  678. 1);
  679. if (err)
  680. en_err(priv, "Failed enabling promiscuous mode\n");
  681. break;
  682. }
  683. /* Disable port multicast filter (unconditionally) */
  684. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  685. 0, MLX4_MCAST_DISABLE);
  686. if (err)
  687. en_err(priv, "Failed disabling multicast filter\n");
  688. /* Disable port VLAN filter */
  689. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  690. if (err)
  691. en_err(priv, "Failed disabling VLAN filter\n");
  692. }
  693. }
  694. static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
  695. struct mlx4_en_dev *mdev)
  696. {
  697. int err = 0;
  698. if (netif_msg_rx_status(priv))
  699. en_warn(priv, "Leaving promiscuous mode\n");
  700. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  701. /* Disable promiscouos mode */
  702. switch (mdev->dev->caps.steering_mode) {
  703. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  704. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  705. priv->port,
  706. MLX4_FS_PROMISC_UPLINK);
  707. if (err)
  708. en_err(priv, "Failed disabling promiscuous mode\n");
  709. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  710. break;
  711. case MLX4_STEERING_MODE_B0:
  712. err = mlx4_unicast_promisc_remove(mdev->dev,
  713. priv->base_qpn,
  714. priv->port);
  715. if (err)
  716. en_err(priv, "Failed disabling unicast promiscuous mode\n");
  717. /* Disable Multicast promisc */
  718. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  719. err = mlx4_multicast_promisc_remove(mdev->dev,
  720. priv->base_qpn,
  721. priv->port);
  722. if (err)
  723. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  724. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  725. }
  726. break;
  727. case MLX4_STEERING_MODE_A0:
  728. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  729. priv->port,
  730. priv->base_qpn, 0);
  731. if (err)
  732. en_err(priv, "Failed disabling promiscuous mode\n");
  733. break;
  734. }
  735. /* Enable port VLAN filter */
  736. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  737. if (err)
  738. en_err(priv, "Failed enabling VLAN filter\n");
  739. }
  740. static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
  741. struct net_device *dev,
  742. struct mlx4_en_dev *mdev)
  743. {
  744. struct mlx4_en_mc_list *mclist, *tmp;
  745. u64 mcast_addr = 0;
  746. u8 mc_list[16] = {0};
  747. int err = 0;
  748. /* Enable/disable the multicast filter according to IFF_ALLMULTI */
  749. if (dev->flags & IFF_ALLMULTI) {
  750. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  751. 0, MLX4_MCAST_DISABLE);
  752. if (err)
  753. en_err(priv, "Failed disabling multicast filter\n");
  754. /* Add the default qp number as multicast promisc */
  755. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  756. switch (mdev->dev->caps.steering_mode) {
  757. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  758. err = mlx4_flow_steer_promisc_add(mdev->dev,
  759. priv->port,
  760. priv->base_qpn,
  761. MLX4_FS_PROMISC_ALL_MULTI);
  762. break;
  763. case MLX4_STEERING_MODE_B0:
  764. err = mlx4_multicast_promisc_add(mdev->dev,
  765. priv->base_qpn,
  766. priv->port);
  767. break;
  768. case MLX4_STEERING_MODE_A0:
  769. break;
  770. }
  771. if (err)
  772. en_err(priv, "Failed entering multicast promisc mode\n");
  773. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  774. }
  775. } else {
  776. /* Disable Multicast promisc */
  777. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  778. switch (mdev->dev->caps.steering_mode) {
  779. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  780. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  781. priv->port,
  782. MLX4_FS_PROMISC_ALL_MULTI);
  783. break;
  784. case MLX4_STEERING_MODE_B0:
  785. err = mlx4_multicast_promisc_remove(mdev->dev,
  786. priv->base_qpn,
  787. priv->port);
  788. break;
  789. case MLX4_STEERING_MODE_A0:
  790. break;
  791. }
  792. if (err)
  793. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  794. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  795. }
  796. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  797. 0, MLX4_MCAST_DISABLE);
  798. if (err)
  799. en_err(priv, "Failed disabling multicast filter\n");
  800. /* Flush mcast filter and init it with broadcast address */
  801. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
  802. 1, MLX4_MCAST_CONFIG);
  803. /* Update multicast list - we cache all addresses so they won't
  804. * change while HW is updated holding the command semaphor */
  805. netif_addr_lock_bh(dev);
  806. mlx4_en_cache_mclist(dev);
  807. netif_addr_unlock_bh(dev);
  808. list_for_each_entry(mclist, &priv->mc_list, list) {
  809. mcast_addr = mlx4_en_mac_to_u64(mclist->addr);
  810. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
  811. mcast_addr, 0, MLX4_MCAST_CONFIG);
  812. }
  813. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  814. 0, MLX4_MCAST_ENABLE);
  815. if (err)
  816. en_err(priv, "Failed enabling multicast filter\n");
  817. update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
  818. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  819. if (mclist->action == MCLIST_REM) {
  820. /* detach this address and delete from list */
  821. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  822. mc_list[5] = priv->port;
  823. err = mlx4_multicast_detach(mdev->dev,
  824. &priv->rss_map.indir_qp,
  825. mc_list,
  826. MLX4_PROT_ETH,
  827. mclist->reg_id);
  828. if (err)
  829. en_err(priv, "Fail to detach multicast address\n");
  830. /* remove from list */
  831. list_del(&mclist->list);
  832. kfree(mclist);
  833. } else if (mclist->action == MCLIST_ADD) {
  834. /* attach the address */
  835. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  836. /* needed for B0 steering support */
  837. mc_list[5] = priv->port;
  838. err = mlx4_multicast_attach(mdev->dev,
  839. &priv->rss_map.indir_qp,
  840. mc_list,
  841. priv->port, 0,
  842. MLX4_PROT_ETH,
  843. &mclist->reg_id);
  844. if (err)
  845. en_err(priv, "Fail to attach multicast address\n");
  846. }
  847. }
  848. }
  849. }
  850. static void mlx4_en_do_set_rx_mode(struct work_struct *work)
  851. {
  852. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  853. rx_mode_task);
  854. struct mlx4_en_dev *mdev = priv->mdev;
  855. struct net_device *dev = priv->dev;
  856. mutex_lock(&mdev->state_lock);
  857. if (!mdev->device_up) {
  858. en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
  859. goto out;
  860. }
  861. if (!priv->port_up) {
  862. en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
  863. goto out;
  864. }
  865. if (!netif_carrier_ok(dev)) {
  866. if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
  867. if (priv->port_state.link_state) {
  868. priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
  869. netif_carrier_on(dev);
  870. en_dbg(LINK, priv, "Link Up\n");
  871. }
  872. }
  873. }
  874. /* Promsicuous mode: disable all filters */
  875. if (dev->flags & IFF_PROMISC) {
  876. mlx4_en_set_promisc_mode(priv, mdev);
  877. goto out;
  878. }
  879. /* Not in promiscuous mode */
  880. if (priv->flags & MLX4_EN_FLAG_PROMISC)
  881. mlx4_en_clear_promisc_mode(priv, mdev);
  882. mlx4_en_do_multicast(priv, dev, mdev);
  883. out:
  884. mutex_unlock(&mdev->state_lock);
  885. }
  886. #ifdef CONFIG_NET_POLL_CONTROLLER
  887. static void mlx4_en_netpoll(struct net_device *dev)
  888. {
  889. struct mlx4_en_priv *priv = netdev_priv(dev);
  890. struct mlx4_en_cq *cq;
  891. unsigned long flags;
  892. int i;
  893. for (i = 0; i < priv->rx_ring_num; i++) {
  894. cq = &priv->rx_cq[i];
  895. spin_lock_irqsave(&cq->lock, flags);
  896. napi_synchronize(&cq->napi);
  897. mlx4_en_process_rx_cq(dev, cq, 0);
  898. spin_unlock_irqrestore(&cq->lock, flags);
  899. }
  900. }
  901. #endif
  902. static void mlx4_en_tx_timeout(struct net_device *dev)
  903. {
  904. struct mlx4_en_priv *priv = netdev_priv(dev);
  905. struct mlx4_en_dev *mdev = priv->mdev;
  906. if (netif_msg_timer(priv))
  907. en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
  908. priv->port_stats.tx_timeout++;
  909. en_dbg(DRV, priv, "Scheduling watchdog\n");
  910. queue_work(mdev->workqueue, &priv->watchdog_task);
  911. }
  912. static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
  913. {
  914. struct mlx4_en_priv *priv = netdev_priv(dev);
  915. spin_lock_bh(&priv->stats_lock);
  916. memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
  917. spin_unlock_bh(&priv->stats_lock);
  918. return &priv->ret_stats;
  919. }
  920. static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
  921. {
  922. struct mlx4_en_cq *cq;
  923. int i;
  924. /* If we haven't received a specific coalescing setting
  925. * (module param), we set the moderation parameters as follows:
  926. * - moder_cnt is set to the number of mtu sized packets to
  927. * satisfy our coalescing target.
  928. * - moder_time is set to a fixed value.
  929. */
  930. priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
  931. priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
  932. priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
  933. priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
  934. en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
  935. priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
  936. /* Setup cq moderation params */
  937. for (i = 0; i < priv->rx_ring_num; i++) {
  938. cq = &priv->rx_cq[i];
  939. cq->moder_cnt = priv->rx_frames;
  940. cq->moder_time = priv->rx_usecs;
  941. priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  942. priv->last_moder_packets[i] = 0;
  943. priv->last_moder_bytes[i] = 0;
  944. }
  945. for (i = 0; i < priv->tx_ring_num; i++) {
  946. cq = &priv->tx_cq[i];
  947. cq->moder_cnt = priv->tx_frames;
  948. cq->moder_time = priv->tx_usecs;
  949. }
  950. /* Reset auto-moderation params */
  951. priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
  952. priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
  953. priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
  954. priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
  955. priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
  956. priv->adaptive_rx_coal = 1;
  957. priv->last_moder_jiffies = 0;
  958. priv->last_moder_tx_packets = 0;
  959. }
  960. static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
  961. {
  962. unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
  963. struct mlx4_en_cq *cq;
  964. unsigned long packets;
  965. unsigned long rate;
  966. unsigned long avg_pkt_size;
  967. unsigned long rx_packets;
  968. unsigned long rx_bytes;
  969. unsigned long rx_pkt_diff;
  970. int moder_time;
  971. int ring, err;
  972. if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
  973. return;
  974. for (ring = 0; ring < priv->rx_ring_num; ring++) {
  975. spin_lock_bh(&priv->stats_lock);
  976. rx_packets = priv->rx_ring[ring].packets;
  977. rx_bytes = priv->rx_ring[ring].bytes;
  978. spin_unlock_bh(&priv->stats_lock);
  979. rx_pkt_diff = ((unsigned long) (rx_packets -
  980. priv->last_moder_packets[ring]));
  981. packets = rx_pkt_diff;
  982. rate = packets * HZ / period;
  983. avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
  984. priv->last_moder_bytes[ring])) / packets : 0;
  985. /* Apply auto-moderation only when packet rate
  986. * exceeds a rate that it matters */
  987. if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
  988. avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
  989. if (rate < priv->pkt_rate_low)
  990. moder_time = priv->rx_usecs_low;
  991. else if (rate > priv->pkt_rate_high)
  992. moder_time = priv->rx_usecs_high;
  993. else
  994. moder_time = (rate - priv->pkt_rate_low) *
  995. (priv->rx_usecs_high - priv->rx_usecs_low) /
  996. (priv->pkt_rate_high - priv->pkt_rate_low) +
  997. priv->rx_usecs_low;
  998. } else {
  999. moder_time = priv->rx_usecs_low;
  1000. }
  1001. if (moder_time != priv->last_moder_time[ring]) {
  1002. priv->last_moder_time[ring] = moder_time;
  1003. cq = &priv->rx_cq[ring];
  1004. cq->moder_time = moder_time;
  1005. err = mlx4_en_set_cq_moder(priv, cq);
  1006. if (err)
  1007. en_err(priv, "Failed modifying moderation for cq:%d\n",
  1008. ring);
  1009. }
  1010. priv->last_moder_packets[ring] = rx_packets;
  1011. priv->last_moder_bytes[ring] = rx_bytes;
  1012. }
  1013. priv->last_moder_jiffies = jiffies;
  1014. }
  1015. static void mlx4_en_do_get_stats(struct work_struct *work)
  1016. {
  1017. struct delayed_work *delay = to_delayed_work(work);
  1018. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1019. stats_task);
  1020. struct mlx4_en_dev *mdev = priv->mdev;
  1021. int err;
  1022. mutex_lock(&mdev->state_lock);
  1023. if (mdev->device_up) {
  1024. err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
  1025. if (err)
  1026. en_dbg(HW, priv, "Could not update stats\n");
  1027. if (priv->port_up)
  1028. mlx4_en_auto_moderation(priv);
  1029. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1030. }
  1031. if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
  1032. queue_work(mdev->workqueue, &priv->mac_task);
  1033. mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
  1034. }
  1035. mutex_unlock(&mdev->state_lock);
  1036. }
  1037. static void mlx4_en_linkstate(struct work_struct *work)
  1038. {
  1039. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1040. linkstate_task);
  1041. struct mlx4_en_dev *mdev = priv->mdev;
  1042. int linkstate = priv->link_state;
  1043. mutex_lock(&mdev->state_lock);
  1044. /* If observable port state changed set carrier state and
  1045. * report to system log */
  1046. if (priv->last_link_state != linkstate) {
  1047. if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
  1048. en_info(priv, "Link Down\n");
  1049. netif_carrier_off(priv->dev);
  1050. } else {
  1051. en_info(priv, "Link Up\n");
  1052. netif_carrier_on(priv->dev);
  1053. }
  1054. }
  1055. priv->last_link_state = linkstate;
  1056. mutex_unlock(&mdev->state_lock);
  1057. }
  1058. int mlx4_en_start_port(struct net_device *dev)
  1059. {
  1060. struct mlx4_en_priv *priv = netdev_priv(dev);
  1061. struct mlx4_en_dev *mdev = priv->mdev;
  1062. struct mlx4_en_cq *cq;
  1063. struct mlx4_en_tx_ring *tx_ring;
  1064. int rx_index = 0;
  1065. int tx_index = 0;
  1066. int err = 0;
  1067. int i;
  1068. int j;
  1069. u8 mc_list[16] = {0};
  1070. if (priv->port_up) {
  1071. en_dbg(DRV, priv, "start port called while port already up\n");
  1072. return 0;
  1073. }
  1074. INIT_LIST_HEAD(&priv->mc_list);
  1075. INIT_LIST_HEAD(&priv->curr_list);
  1076. INIT_LIST_HEAD(&priv->ethtool_list);
  1077. memset(&priv->ethtool_rules[0], 0,
  1078. sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
  1079. /* Calculate Rx buf size */
  1080. dev->mtu = min(dev->mtu, priv->max_mtu);
  1081. mlx4_en_calc_rx_buf(dev);
  1082. en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
  1083. /* Configure rx cq's and rings */
  1084. err = mlx4_en_activate_rx_rings(priv);
  1085. if (err) {
  1086. en_err(priv, "Failed to activate RX rings\n");
  1087. return err;
  1088. }
  1089. for (i = 0; i < priv->rx_ring_num; i++) {
  1090. cq = &priv->rx_cq[i];
  1091. err = mlx4_en_activate_cq(priv, cq, i);
  1092. if (err) {
  1093. en_err(priv, "Failed activating Rx CQ\n");
  1094. goto cq_err;
  1095. }
  1096. for (j = 0; j < cq->size; j++)
  1097. cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
  1098. err = mlx4_en_set_cq_moder(priv, cq);
  1099. if (err) {
  1100. en_err(priv, "Failed setting cq moderation parameters");
  1101. mlx4_en_deactivate_cq(priv, cq);
  1102. goto cq_err;
  1103. }
  1104. mlx4_en_arm_cq(priv, cq);
  1105. priv->rx_ring[i].cqn = cq->mcq.cqn;
  1106. ++rx_index;
  1107. }
  1108. /* Set qp number */
  1109. en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
  1110. err = mlx4_en_get_qp(priv);
  1111. if (err) {
  1112. en_err(priv, "Failed getting eth qp\n");
  1113. goto cq_err;
  1114. }
  1115. mdev->mac_removed[priv->port] = 0;
  1116. err = mlx4_en_config_rss_steer(priv);
  1117. if (err) {
  1118. en_err(priv, "Failed configuring rss steering\n");
  1119. goto mac_err;
  1120. }
  1121. err = mlx4_en_create_drop_qp(priv);
  1122. if (err)
  1123. goto rss_err;
  1124. /* Configure tx cq's and rings */
  1125. for (i = 0; i < priv->tx_ring_num; i++) {
  1126. /* Configure cq */
  1127. cq = &priv->tx_cq[i];
  1128. err = mlx4_en_activate_cq(priv, cq, i);
  1129. if (err) {
  1130. en_err(priv, "Failed allocating Tx CQ\n");
  1131. goto tx_err;
  1132. }
  1133. err = mlx4_en_set_cq_moder(priv, cq);
  1134. if (err) {
  1135. en_err(priv, "Failed setting cq moderation parameters");
  1136. mlx4_en_deactivate_cq(priv, cq);
  1137. goto tx_err;
  1138. }
  1139. en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
  1140. cq->buf->wqe_index = cpu_to_be16(0xffff);
  1141. /* Configure ring */
  1142. tx_ring = &priv->tx_ring[i];
  1143. err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
  1144. i / priv->num_tx_rings_p_up);
  1145. if (err) {
  1146. en_err(priv, "Failed allocating Tx ring\n");
  1147. mlx4_en_deactivate_cq(priv, cq);
  1148. goto tx_err;
  1149. }
  1150. tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
  1151. /* Arm CQ for TX completions */
  1152. mlx4_en_arm_cq(priv, cq);
  1153. /* Set initial ownership of all Tx TXBBs to SW (1) */
  1154. for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
  1155. *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
  1156. ++tx_index;
  1157. }
  1158. /* Configure port */
  1159. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1160. priv->rx_skb_size + ETH_FCS_LEN,
  1161. priv->prof->tx_pause,
  1162. priv->prof->tx_ppp,
  1163. priv->prof->rx_pause,
  1164. priv->prof->rx_ppp);
  1165. if (err) {
  1166. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  1167. priv->port, err);
  1168. goto tx_err;
  1169. }
  1170. /* Set default qp number */
  1171. err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
  1172. if (err) {
  1173. en_err(priv, "Failed setting default qp numbers\n");
  1174. goto tx_err;
  1175. }
  1176. /* Init port */
  1177. en_dbg(HW, priv, "Initializing port\n");
  1178. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1179. if (err) {
  1180. en_err(priv, "Failed Initializing port\n");
  1181. goto tx_err;
  1182. }
  1183. /* Attach rx QP to bradcast address */
  1184. memset(&mc_list[10], 0xff, ETH_ALEN);
  1185. mc_list[5] = priv->port; /* needed for B0 steering support */
  1186. if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1187. priv->port, 0, MLX4_PROT_ETH,
  1188. &priv->broadcast_id))
  1189. mlx4_warn(mdev, "Failed Attaching Broadcast\n");
  1190. /* Must redo promiscuous mode setup. */
  1191. priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
  1192. /* Schedule multicast task to populate multicast list */
  1193. queue_work(mdev->workqueue, &priv->rx_mode_task);
  1194. mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
  1195. priv->port_up = true;
  1196. netif_tx_start_all_queues(dev);
  1197. netif_device_attach(dev);
  1198. return 0;
  1199. tx_err:
  1200. while (tx_index--) {
  1201. mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]);
  1202. mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]);
  1203. }
  1204. mlx4_en_destroy_drop_qp(priv);
  1205. rss_err:
  1206. mlx4_en_release_rss_steer(priv);
  1207. mac_err:
  1208. mlx4_en_put_qp(priv);
  1209. cq_err:
  1210. while (rx_index--)
  1211. mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]);
  1212. for (i = 0; i < priv->rx_ring_num; i++)
  1213. mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
  1214. return err; /* need to close devices */
  1215. }
  1216. void mlx4_en_stop_port(struct net_device *dev, int detach)
  1217. {
  1218. struct mlx4_en_priv *priv = netdev_priv(dev);
  1219. struct mlx4_en_dev *mdev = priv->mdev;
  1220. struct mlx4_en_mc_list *mclist, *tmp;
  1221. struct ethtool_flow_id *flow, *tmp_flow;
  1222. int i;
  1223. u8 mc_list[16] = {0};
  1224. if (!priv->port_up) {
  1225. en_dbg(DRV, priv, "stop port called while port already down\n");
  1226. return;
  1227. }
  1228. /* Synchronize with tx routine */
  1229. netif_tx_lock_bh(dev);
  1230. if (detach)
  1231. netif_device_detach(dev);
  1232. netif_tx_stop_all_queues(dev);
  1233. netif_tx_unlock_bh(dev);
  1234. netif_tx_disable(dev);
  1235. /* Set port as not active */
  1236. priv->port_up = false;
  1237. /* Promsicuous mode */
  1238. if (mdev->dev->caps.steering_mode ==
  1239. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1240. priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
  1241. MLX4_EN_FLAG_MC_PROMISC);
  1242. mlx4_flow_steer_promisc_remove(mdev->dev,
  1243. priv->port,
  1244. MLX4_FS_PROMISC_UPLINK);
  1245. mlx4_flow_steer_promisc_remove(mdev->dev,
  1246. priv->port,
  1247. MLX4_FS_PROMISC_ALL_MULTI);
  1248. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  1249. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  1250. /* Disable promiscouos mode */
  1251. mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
  1252. priv->port);
  1253. /* Disable Multicast promisc */
  1254. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  1255. mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
  1256. priv->port);
  1257. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  1258. }
  1259. }
  1260. /* Detach All multicasts */
  1261. memset(&mc_list[10], 0xff, ETH_ALEN);
  1262. mc_list[5] = priv->port; /* needed for B0 steering support */
  1263. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
  1264. MLX4_PROT_ETH, priv->broadcast_id);
  1265. list_for_each_entry(mclist, &priv->curr_list, list) {
  1266. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  1267. mc_list[5] = priv->port;
  1268. mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
  1269. mc_list, MLX4_PROT_ETH, mclist->reg_id);
  1270. }
  1271. mlx4_en_clear_list(dev);
  1272. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  1273. list_del(&mclist->list);
  1274. kfree(mclist);
  1275. }
  1276. /* Flush multicast filter */
  1277. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
  1278. mlx4_en_destroy_drop_qp(priv);
  1279. /* Free TX Rings */
  1280. for (i = 0; i < priv->tx_ring_num; i++) {
  1281. mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]);
  1282. mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]);
  1283. }
  1284. msleep(10);
  1285. for (i = 0; i < priv->tx_ring_num; i++)
  1286. mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]);
  1287. /* Free RSS qps */
  1288. mlx4_en_release_rss_steer(priv);
  1289. /* Unregister Mac address for the port */
  1290. mlx4_en_put_qp(priv);
  1291. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN))
  1292. mdev->mac_removed[priv->port] = 1;
  1293. /* Remove flow steering rules for the port*/
  1294. if (mdev->dev->caps.steering_mode ==
  1295. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1296. ASSERT_RTNL();
  1297. list_for_each_entry_safe(flow, tmp_flow,
  1298. &priv->ethtool_list, list) {
  1299. mlx4_flow_detach(mdev->dev, flow->id);
  1300. list_del(&flow->list);
  1301. }
  1302. }
  1303. /* Free RX Rings */
  1304. for (i = 0; i < priv->rx_ring_num; i++) {
  1305. mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
  1306. while (test_bit(NAPI_STATE_SCHED, &priv->rx_cq[i].napi.state))
  1307. msleep(1);
  1308. mlx4_en_deactivate_cq(priv, &priv->rx_cq[i]);
  1309. }
  1310. /* close port*/
  1311. mlx4_CLOSE_PORT(mdev->dev, priv->port);
  1312. }
  1313. static void mlx4_en_restart(struct work_struct *work)
  1314. {
  1315. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1316. watchdog_task);
  1317. struct mlx4_en_dev *mdev = priv->mdev;
  1318. struct net_device *dev = priv->dev;
  1319. int i;
  1320. en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
  1321. mutex_lock(&mdev->state_lock);
  1322. if (priv->port_up) {
  1323. mlx4_en_stop_port(dev, 1);
  1324. for (i = 0; i < priv->tx_ring_num; i++)
  1325. netdev_tx_reset_queue(priv->tx_ring[i].tx_queue);
  1326. if (mlx4_en_start_port(dev))
  1327. en_err(priv, "Failed restarting port %d\n", priv->port);
  1328. }
  1329. mutex_unlock(&mdev->state_lock);
  1330. }
  1331. static void mlx4_en_clear_stats(struct net_device *dev)
  1332. {
  1333. struct mlx4_en_priv *priv = netdev_priv(dev);
  1334. struct mlx4_en_dev *mdev = priv->mdev;
  1335. int i;
  1336. if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
  1337. en_dbg(HW, priv, "Failed dumping statistics\n");
  1338. memset(&priv->stats, 0, sizeof(priv->stats));
  1339. memset(&priv->pstats, 0, sizeof(priv->pstats));
  1340. memset(&priv->pkstats, 0, sizeof(priv->pkstats));
  1341. memset(&priv->port_stats, 0, sizeof(priv->port_stats));
  1342. for (i = 0; i < priv->tx_ring_num; i++) {
  1343. priv->tx_ring[i].bytes = 0;
  1344. priv->tx_ring[i].packets = 0;
  1345. priv->tx_ring[i].tx_csum = 0;
  1346. }
  1347. for (i = 0; i < priv->rx_ring_num; i++) {
  1348. priv->rx_ring[i].bytes = 0;
  1349. priv->rx_ring[i].packets = 0;
  1350. priv->rx_ring[i].csum_ok = 0;
  1351. priv->rx_ring[i].csum_none = 0;
  1352. }
  1353. }
  1354. static int mlx4_en_open(struct net_device *dev)
  1355. {
  1356. struct mlx4_en_priv *priv = netdev_priv(dev);
  1357. struct mlx4_en_dev *mdev = priv->mdev;
  1358. int err = 0;
  1359. mutex_lock(&mdev->state_lock);
  1360. if (!mdev->device_up) {
  1361. en_err(priv, "Cannot open - device down/disabled\n");
  1362. err = -EBUSY;
  1363. goto out;
  1364. }
  1365. /* Reset HW statistics and SW counters */
  1366. mlx4_en_clear_stats(dev);
  1367. err = mlx4_en_start_port(dev);
  1368. if (err)
  1369. en_err(priv, "Failed starting port:%d\n", priv->port);
  1370. out:
  1371. mutex_unlock(&mdev->state_lock);
  1372. return err;
  1373. }
  1374. static int mlx4_en_close(struct net_device *dev)
  1375. {
  1376. struct mlx4_en_priv *priv = netdev_priv(dev);
  1377. struct mlx4_en_dev *mdev = priv->mdev;
  1378. en_dbg(IFDOWN, priv, "Close port called\n");
  1379. mutex_lock(&mdev->state_lock);
  1380. mlx4_en_stop_port(dev, 0);
  1381. netif_carrier_off(dev);
  1382. mutex_unlock(&mdev->state_lock);
  1383. return 0;
  1384. }
  1385. void mlx4_en_free_resources(struct mlx4_en_priv *priv)
  1386. {
  1387. int i;
  1388. #ifdef CONFIG_RFS_ACCEL
  1389. free_irq_cpu_rmap(priv->dev->rx_cpu_rmap);
  1390. priv->dev->rx_cpu_rmap = NULL;
  1391. #endif
  1392. for (i = 0; i < priv->tx_ring_num; i++) {
  1393. if (priv->tx_ring[i].tx_info)
  1394. mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
  1395. if (priv->tx_cq[i].buf)
  1396. mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
  1397. }
  1398. for (i = 0; i < priv->rx_ring_num; i++) {
  1399. if (priv->rx_ring[i].rx_info)
  1400. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1401. priv->prof->rx_ring_size, priv->stride);
  1402. if (priv->rx_cq[i].buf)
  1403. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1404. }
  1405. if (priv->base_tx_qpn) {
  1406. mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num);
  1407. priv->base_tx_qpn = 0;
  1408. }
  1409. }
  1410. int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
  1411. {
  1412. struct mlx4_en_port_profile *prof = priv->prof;
  1413. int i;
  1414. int err;
  1415. err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn);
  1416. if (err) {
  1417. en_err(priv, "failed reserving range for TX rings\n");
  1418. return err;
  1419. }
  1420. /* Create tx Rings */
  1421. for (i = 0; i < priv->tx_ring_num; i++) {
  1422. if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
  1423. prof->tx_ring_size, i, TX))
  1424. goto err;
  1425. if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], priv->base_tx_qpn + i,
  1426. prof->tx_ring_size, TXBB_SIZE))
  1427. goto err;
  1428. }
  1429. /* Create rx Rings */
  1430. for (i = 0; i < priv->rx_ring_num; i++) {
  1431. if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
  1432. prof->rx_ring_size, i, RX))
  1433. goto err;
  1434. if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
  1435. prof->rx_ring_size, priv->stride))
  1436. goto err;
  1437. }
  1438. #ifdef CONFIG_RFS_ACCEL
  1439. priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->rx_ring_num);
  1440. if (!priv->dev->rx_cpu_rmap)
  1441. goto err;
  1442. #endif
  1443. return 0;
  1444. err:
  1445. en_err(priv, "Failed to allocate NIC resources\n");
  1446. return -ENOMEM;
  1447. }
  1448. void mlx4_en_destroy_netdev(struct net_device *dev)
  1449. {
  1450. struct mlx4_en_priv *priv = netdev_priv(dev);
  1451. struct mlx4_en_dev *mdev = priv->mdev;
  1452. en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
  1453. /* Unregister device - this will close the port if it was up */
  1454. if (priv->registered)
  1455. unregister_netdev(dev);
  1456. if (priv->allocated)
  1457. mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
  1458. cancel_delayed_work(&priv->stats_task);
  1459. /* flush any pending task for this netdev */
  1460. flush_workqueue(mdev->workqueue);
  1461. /* Detach the netdev so tasks would not attempt to access it */
  1462. mutex_lock(&mdev->state_lock);
  1463. mdev->pndev[priv->port] = NULL;
  1464. mutex_unlock(&mdev->state_lock);
  1465. mlx4_en_free_resources(priv);
  1466. kfree(priv->tx_ring);
  1467. kfree(priv->tx_cq);
  1468. free_netdev(dev);
  1469. }
  1470. static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
  1471. {
  1472. struct mlx4_en_priv *priv = netdev_priv(dev);
  1473. struct mlx4_en_dev *mdev = priv->mdev;
  1474. int err = 0;
  1475. en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
  1476. dev->mtu, new_mtu);
  1477. if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
  1478. en_err(priv, "Bad MTU size:%d.\n", new_mtu);
  1479. return -EPERM;
  1480. }
  1481. dev->mtu = new_mtu;
  1482. if (netif_running(dev)) {
  1483. mutex_lock(&mdev->state_lock);
  1484. if (!mdev->device_up) {
  1485. /* NIC is probably restarting - let watchdog task reset
  1486. * the port */
  1487. en_dbg(DRV, priv, "Change MTU called with card down!?\n");
  1488. } else {
  1489. mlx4_en_stop_port(dev, 1);
  1490. err = mlx4_en_start_port(dev);
  1491. if (err) {
  1492. en_err(priv, "Failed restarting port:%d\n",
  1493. priv->port);
  1494. queue_work(mdev->workqueue, &priv->watchdog_task);
  1495. }
  1496. }
  1497. mutex_unlock(&mdev->state_lock);
  1498. }
  1499. return 0;
  1500. }
  1501. static int mlx4_en_set_features(struct net_device *netdev,
  1502. netdev_features_t features)
  1503. {
  1504. struct mlx4_en_priv *priv = netdev_priv(netdev);
  1505. if (features & NETIF_F_LOOPBACK)
  1506. priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1507. else
  1508. priv->ctrl_flags &=
  1509. cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK);
  1510. mlx4_en_update_loopback_state(netdev, features);
  1511. return 0;
  1512. }
  1513. static const struct net_device_ops mlx4_netdev_ops = {
  1514. .ndo_open = mlx4_en_open,
  1515. .ndo_stop = mlx4_en_close,
  1516. .ndo_start_xmit = mlx4_en_xmit,
  1517. .ndo_select_queue = mlx4_en_select_queue,
  1518. .ndo_get_stats = mlx4_en_get_stats,
  1519. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  1520. .ndo_set_mac_address = mlx4_en_set_mac,
  1521. .ndo_validate_addr = eth_validate_addr,
  1522. .ndo_change_mtu = mlx4_en_change_mtu,
  1523. .ndo_tx_timeout = mlx4_en_tx_timeout,
  1524. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  1525. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  1526. #ifdef CONFIG_NET_POLL_CONTROLLER
  1527. .ndo_poll_controller = mlx4_en_netpoll,
  1528. #endif
  1529. .ndo_set_features = mlx4_en_set_features,
  1530. .ndo_setup_tc = mlx4_en_setup_tc,
  1531. #ifdef CONFIG_RFS_ACCEL
  1532. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  1533. #endif
  1534. };
  1535. int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
  1536. struct mlx4_en_port_profile *prof)
  1537. {
  1538. struct net_device *dev;
  1539. struct mlx4_en_priv *priv;
  1540. int err;
  1541. dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
  1542. MAX_TX_RINGS, MAX_RX_RINGS);
  1543. if (dev == NULL)
  1544. return -ENOMEM;
  1545. netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
  1546. netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
  1547. SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev);
  1548. dev->dev_id = port - 1;
  1549. /*
  1550. * Initialize driver private data
  1551. */
  1552. priv = netdev_priv(dev);
  1553. memset(priv, 0, sizeof(struct mlx4_en_priv));
  1554. priv->dev = dev;
  1555. priv->mdev = mdev;
  1556. priv->ddev = &mdev->pdev->dev;
  1557. priv->prof = prof;
  1558. priv->port = port;
  1559. priv->port_up = false;
  1560. priv->flags = prof->flags;
  1561. priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
  1562. MLX4_WQE_CTRL_SOLICITED);
  1563. priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
  1564. priv->tx_ring_num = prof->tx_ring_num;
  1565. priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) * MAX_TX_RINGS,
  1566. GFP_KERNEL);
  1567. if (!priv->tx_ring) {
  1568. err = -ENOMEM;
  1569. goto out;
  1570. }
  1571. priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * MAX_RX_RINGS,
  1572. GFP_KERNEL);
  1573. if (!priv->tx_cq) {
  1574. err = -ENOMEM;
  1575. goto out;
  1576. }
  1577. priv->rx_ring_num = prof->rx_ring_num;
  1578. priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
  1579. priv->mac_index = -1;
  1580. priv->msg_enable = MLX4_EN_MSG_LEVEL;
  1581. spin_lock_init(&priv->stats_lock);
  1582. INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
  1583. INIT_WORK(&priv->mac_task, mlx4_en_do_set_mac);
  1584. INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
  1585. INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
  1586. INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
  1587. #ifdef CONFIG_MLX4_EN_DCB
  1588. if (!mlx4_is_slave(priv->mdev->dev))
  1589. dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
  1590. #endif
  1591. INIT_RADIX_TREE(&priv->mac_tree, GFP_KERNEL);
  1592. /* Query for default mac and max mtu */
  1593. priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
  1594. /* Set default MAC */
  1595. dev->addr_len = ETH_ALEN;
  1596. mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
  1597. if (!is_valid_ether_addr(dev->dev_addr)) {
  1598. en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
  1599. priv->port, dev->dev_addr);
  1600. err = -EINVAL;
  1601. goto out;
  1602. }
  1603. memcpy(priv->prev_mac, dev->dev_addr, sizeof(priv->prev_mac));
  1604. priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  1605. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  1606. err = mlx4_en_alloc_resources(priv);
  1607. if (err)
  1608. goto out;
  1609. #ifdef CONFIG_RFS_ACCEL
  1610. INIT_LIST_HEAD(&priv->filters);
  1611. spin_lock_init(&priv->filters_lock);
  1612. #endif
  1613. /* Allocate page for receive rings */
  1614. err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
  1615. MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
  1616. if (err) {
  1617. en_err(priv, "Failed to allocate page for rx qps\n");
  1618. goto out;
  1619. }
  1620. priv->allocated = 1;
  1621. /*
  1622. * Initialize netdev entry points
  1623. */
  1624. dev->netdev_ops = &mlx4_netdev_ops;
  1625. dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
  1626. netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
  1627. netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
  1628. SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops);
  1629. /*
  1630. * Set driver features
  1631. */
  1632. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
  1633. if (mdev->LSO_support)
  1634. dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
  1635. dev->vlan_features = dev->hw_features;
  1636. dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
  1637. dev->features = dev->hw_features | NETIF_F_HIGHDMA |
  1638. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
  1639. NETIF_F_HW_VLAN_FILTER;
  1640. dev->hw_features |= NETIF_F_LOOPBACK;
  1641. if (mdev->dev->caps.steering_mode ==
  1642. MLX4_STEERING_MODE_DEVICE_MANAGED)
  1643. dev->hw_features |= NETIF_F_NTUPLE;
  1644. mdev->pndev[port] = dev;
  1645. netif_carrier_off(dev);
  1646. err = register_netdev(dev);
  1647. if (err) {
  1648. en_err(priv, "Netdev registration failed for port %d\n", port);
  1649. goto out;
  1650. }
  1651. priv->registered = 1;
  1652. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
  1653. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  1654. mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
  1655. /* Configure port */
  1656. mlx4_en_calc_rx_buf(dev);
  1657. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1658. priv->rx_skb_size + ETH_FCS_LEN,
  1659. prof->tx_pause, prof->tx_ppp,
  1660. prof->rx_pause, prof->rx_ppp);
  1661. if (err) {
  1662. en_err(priv, "Failed setting port general configurations "
  1663. "for port %d, with error %d\n", priv->port, err);
  1664. goto out;
  1665. }
  1666. /* Init port */
  1667. en_warn(priv, "Initializing port\n");
  1668. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1669. if (err) {
  1670. en_err(priv, "Failed Initializing port\n");
  1671. goto out;
  1672. }
  1673. mlx4_en_set_default_moderation(priv);
  1674. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1675. return 0;
  1676. out:
  1677. mlx4_en_destroy_netdev(dev);
  1678. return err;
  1679. }