iwl3945-base.c 239 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102510351045105510651075108510951105111511251135114511551165117511851195120512151225123512451255126512751285129513051315132513351345135513651375138513951405141514251435144514551465147514851495150515151525153515451555156515751585159516051615162516351645165516651675168516951705171517251735174517551765177517851795180518151825183518451855186518751885189519051915192519351945195519651975198519952005201520252035204520552065207520852095210521152125213521452155216521752185219522052215222522352245225522652275228522952305231523252335234523552365237523852395240524152425243524452455246524752485249525052515252525352545255525652575258525952605261526252635264526552665267526852695270527152725273527452755276527752785279528052815282528352845285528652875288528952905291529252935294529552965297529852995300530153025303530453055306530753085309531053115312531353145315531653175318531953205321532253235324532553265327532853295330533153325333533453355336533753385339534053415342534353445345534653475348534953505351535253535354535553565357535853595360536153625363536453655366536753685369537053715372537353745375537653775378537953805381538253835384538553865387538853895390539153925393539453955396539753985399540054015402540354045405540654075408540954105411541254135414541554165417541854195420542154225423542454255426542754285429543054315432543354345435543654375438543954405441544254435444544554465447544854495450545154525453545454555456545754585459546054615462546354645465546654675468546954705471547254735474547554765477547854795480548154825483548454855486548754885489549054915492549354945495549654975498549955005501550255035504550555065507550855095510551155125513551455155516551755185519552055215522552355245525552655275528552955305531553255335534553555365537553855395540554155425543554455455546554755485549555055515552555355545555555655575558555955605561556255635564556555665567556855695570557155725573557455755576557755785579558055815582558355845585558655875588558955905591559255935594559555965597559855995600560156025603560456055606560756085609561056115612561356145615561656175618561956205621562256235624562556265627562856295630563156325633563456355636563756385639564056415642564356445645564656475648564956505651565256535654565556565657565856595660566156625663566456655666566756685669567056715672567356745675567656775678567956805681568256835684568556865687568856895690569156925693569456955696569756985699570057015702570357045705570657075708570957105711571257135714571557165717571857195720572157225723572457255726572757285729573057315732573357345735573657375738573957405741574257435744574557465747574857495750575157525753575457555756575757585759576057615762576357645765576657675768576957705771577257735774577557765777577857795780578157825783578457855786578757885789579057915792579357945795579657975798579958005801580258035804580558065807580858095810581158125813581458155816581758185819582058215822582358245825582658275828582958305831583258335834583558365837583858395840584158425843584458455846584758485849585058515852585358545855585658575858585958605861586258635864586558665867586858695870587158725873587458755876587758785879588058815882588358845885588658875888588958905891589258935894589558965897589858995900590159025903590459055906590759085909591059115912591359145915591659175918591959205921592259235924592559265927592859295930593159325933593459355936593759385939594059415942594359445945594659475948594959505951595259535954595559565957595859595960596159625963596459655966596759685969597059715972597359745975597659775978597959805981598259835984598559865987598859895990599159925993599459955996599759985999600060016002600360046005600660076008600960106011601260136014601560166017601860196020602160226023602460256026602760286029603060316032603360346035603660376038603960406041604260436044604560466047604860496050605160526053605460556056605760586059606060616062606360646065606660676068606960706071607260736074607560766077607860796080608160826083608460856086608760886089609060916092609360946095609660976098609961006101610261036104610561066107610861096110611161126113611461156116611761186119612061216122612361246125612661276128612961306131613261336134613561366137613861396140614161426143614461456146614761486149615061516152615361546155615661576158615961606161616261636164616561666167616861696170617161726173617461756176617761786179618061816182618361846185618661876188618961906191619261936194619561966197619861996200620162026203620462056206620762086209621062116212621362146215621662176218621962206221622262236224622562266227622862296230623162326233623462356236623762386239624062416242624362446245624662476248624962506251625262536254625562566257625862596260626162626263626462656266626762686269627062716272627362746275627662776278627962806281628262836284628562866287628862896290629162926293629462956296629762986299630063016302630363046305630663076308630963106311631263136314631563166317631863196320632163226323632463256326632763286329633063316332633363346335633663376338633963406341634263436344634563466347634863496350635163526353635463556356635763586359636063616362636363646365636663676368636963706371637263736374637563766377637863796380638163826383638463856386638763886389639063916392639363946395639663976398639964006401640264036404640564066407640864096410641164126413641464156416641764186419642064216422642364246425642664276428642964306431643264336434643564366437643864396440644164426443644464456446644764486449645064516452645364546455645664576458645964606461646264636464646564666467646864696470647164726473647464756476647764786479648064816482648364846485648664876488648964906491649264936494649564966497649864996500650165026503650465056506650765086509651065116512651365146515651665176518651965206521652265236524652565266527652865296530653165326533653465356536653765386539654065416542654365446545654665476548654965506551655265536554655565566557655865596560656165626563656465656566656765686569657065716572657365746575657665776578657965806581658265836584658565866587658865896590659165926593659465956596659765986599660066016602660366046605660666076608660966106611661266136614661566166617661866196620662166226623662466256626662766286629663066316632663366346635663666376638663966406641664266436644664566466647664866496650665166526653665466556656665766586659666066616662666366646665666666676668666966706671667266736674667566766677667866796680668166826683668466856686668766886689669066916692669366946695669666976698669967006701670267036704670567066707670867096710671167126713671467156716671767186719672067216722672367246725672667276728672967306731673267336734673567366737673867396740674167426743674467456746674767486749675067516752675367546755675667576758675967606761676267636764676567666767676867696770677167726773677467756776677767786779678067816782678367846785678667876788678967906791679267936794679567966797679867996800680168026803680468056806680768086809681068116812681368146815681668176818681968206821682268236824682568266827682868296830683168326833683468356836683768386839684068416842684368446845684668476848684968506851685268536854685568566857685868596860686168626863686468656866686768686869687068716872687368746875687668776878687968806881688268836884688568866887688868896890689168926893689468956896689768986899690069016902690369046905690669076908690969106911691269136914691569166917691869196920692169226923692469256926692769286929693069316932693369346935693669376938693969406941694269436944694569466947694869496950695169526953695469556956695769586959696069616962696369646965696669676968696969706971697269736974697569766977697869796980698169826983698469856986698769886989699069916992699369946995699669976998699970007001700270037004700570067007700870097010701170127013701470157016701770187019702070217022702370247025702670277028702970307031703270337034703570367037703870397040704170427043704470457046704770487049705070517052705370547055705670577058705970607061706270637064706570667067706870697070707170727073707470757076707770787079708070817082708370847085708670877088708970907091709270937094709570967097709870997100710171027103710471057106710771087109711071117112711371147115711671177118711971207121712271237124712571267127712871297130713171327133713471357136713771387139714071417142714371447145714671477148714971507151715271537154715571567157715871597160716171627163716471657166716771687169717071717172717371747175717671777178717971807181718271837184718571867187718871897190719171927193719471957196719771987199720072017202720372047205720672077208720972107211721272137214721572167217721872197220722172227223722472257226722772287229723072317232723372347235723672377238723972407241724272437244724572467247724872497250725172527253725472557256725772587259726072617262726372647265726672677268726972707271727272737274727572767277727872797280728172827283728472857286728772887289729072917292729372947295729672977298729973007301730273037304730573067307730873097310731173127313731473157316731773187319732073217322732373247325732673277328732973307331733273337334733573367337733873397340734173427343734473457346734773487349735073517352735373547355735673577358735973607361736273637364736573667367736873697370737173727373737473757376737773787379738073817382738373847385738673877388738973907391739273937394739573967397739873997400740174027403740474057406740774087409741074117412741374147415741674177418741974207421742274237424742574267427742874297430743174327433743474357436743774387439744074417442744374447445744674477448744974507451745274537454745574567457745874597460746174627463746474657466746774687469747074717472747374747475747674777478747974807481748274837484748574867487748874897490749174927493749474957496749774987499750075017502750375047505750675077508750975107511751275137514751575167517751875197520752175227523752475257526752775287529753075317532753375347535753675377538753975407541754275437544754575467547754875497550755175527553755475557556755775587559756075617562756375647565756675677568756975707571757275737574757575767577757875797580758175827583758475857586758775887589759075917592759375947595759675977598759976007601760276037604760576067607760876097610761176127613761476157616761776187619762076217622762376247625762676277628762976307631763276337634763576367637763876397640764176427643764476457646764776487649765076517652765376547655765676577658765976607661766276637664766576667667766876697670767176727673767476757676767776787679768076817682768376847685768676877688768976907691769276937694769576967697769876997700770177027703770477057706770777087709771077117712771377147715771677177718771977207721772277237724772577267727772877297730773177327733773477357736773777387739774077417742774377447745774677477748774977507751775277537754775577567757775877597760776177627763776477657766776777687769777077717772777377747775777677777778777977807781778277837784778577867787778877897790779177927793779477957796779777987799780078017802780378047805780678077808780978107811781278137814781578167817781878197820782178227823782478257826782778287829783078317832783378347835783678377838783978407841784278437844784578467847784878497850785178527853785478557856785778587859786078617862786378647865786678677868786978707871787278737874787578767877787878797880788178827883788478857886788778887889789078917892789378947895789678977898789979007901790279037904790579067907790879097910791179127913791479157916791779187919792079217922792379247925792679277928792979307931793279337934793579367937793879397940794179427943794479457946794779487949795079517952795379547955795679577958795979607961796279637964796579667967796879697970797179727973797479757976797779787979798079817982798379847985798679877988798979907991799279937994799579967997799879998000800180028003800480058006800780088009801080118012801380148015801680178018801980208021802280238024802580268027802880298030803180328033803480358036803780388039804080418042804380448045804680478048804980508051805280538054805580568057805880598060806180628063806480658066806780688069807080718072807380748075807680778078807980808081808280838084808580868087808880898090809180928093809480958096809780988099810081018102810381048105810681078108810981108111811281138114811581168117811881198120812181228123812481258126812781288129813081318132813381348135813681378138813981408141814281438144814581468147814881498150815181528153815481558156815781588159816081618162816381648165816681678168816981708171817281738174817581768177817881798180818181828183818481858186818781888189819081918192819381948195819681978198819982008201820282038204820582068207820882098210821182128213821482158216821782188219822082218222822382248225822682278228822982308231823282338234823582368237823882398240824182428243824482458246824782488249825082518252825382548255825682578258825982608261826282638264826582668267826882698270827182728273827482758276827782788279828082818282828382848285828682878288828982908291829282938294829582968297829882998300830183028303830483058306830783088309831083118312831383148315831683178318831983208321832283238324832583268327832883298330833183328333833483358336833783388339834083418342834383448345834683478348834983508351835283538354835583568357835883598360836183628363836483658366836783688369837083718372837383748375837683778378837983808381838283838384838583868387838883898390839183928393839483958396839783988399840084018402840384048405840684078408840984108411841284138414841584168417841884198420842184228423842484258426842784288429843084318432843384348435843684378438843984408441844284438444844584468447844884498450845184528453845484558456845784588459846084618462846384648465846684678468846984708471847284738474847584768477847884798480848184828483848484858486848784888489849084918492849384948495849684978498849985008501850285038504850585068507850885098510851185128513851485158516851785188519852085218522852385248525852685278528852985308531853285338534853585368537853885398540854185428543854485458546854785488549855085518552855385548555855685578558855985608561856285638564856585668567856885698570857185728573857485758576857785788579858085818582858385848585858685878588858985908591859285938594859585968597859885998600860186028603860486058606860786088609861086118612861386148615861686178618861986208621862286238624862586268627862886298630863186328633863486358636863786388639864086418642864386448645864686478648864986508651865286538654865586568657865886598660866186628663866486658666866786688669867086718672867386748675867686778678867986808681868286838684868586868687868886898690869186928693869486958696869786988699870087018702870387048705870687078708870987108711871287138714871587168717871887198720872187228723872487258726872787288729873087318732873387348735873687378738873987408741874287438744
  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. /*
  30. * NOTE: This file (iwl-base.c) is used to build to multiple hardware targets
  31. * by defining IWL to either 3945 or 4965. The Makefile used when building
  32. * the base targets will create base-3945.o and base-4965.o
  33. *
  34. * The eventual goal is to move as many of the #if IWL / #endif blocks out of
  35. * this file and into the hardware specific implementation files (iwl-XXXX.c)
  36. * and leave only the common (non #ifdef sprinkled) code in this file
  37. */
  38. #include <linux/kernel.h>
  39. #include <linux/module.h>
  40. #include <linux/version.h>
  41. #include <linux/init.h>
  42. #include <linux/pci.h>
  43. #include <linux/dma-mapping.h>
  44. #include <linux/delay.h>
  45. #include <linux/skbuff.h>
  46. #include <linux/netdevice.h>
  47. #include <linux/wireless.h>
  48. #include <linux/firmware.h>
  49. #include <linux/etherdevice.h>
  50. #include <linux/if_arp.h>
  51. #include <net/ieee80211_radiotap.h>
  52. #include <net/mac80211.h>
  53. #include <asm/div64.h>
  54. #define IWL 3945
  55. #include "iwlwifi.h"
  56. #include "iwl-3945.h"
  57. #include "iwl-helpers.h"
  58. #ifdef CONFIG_IWLWIFI_DEBUG
  59. u32 iwl_debug_level;
  60. #endif
  61. /******************************************************************************
  62. *
  63. * module boiler plate
  64. *
  65. ******************************************************************************/
  66. /* module parameters */
  67. int iwl_param_disable_hw_scan;
  68. int iwl_param_debug;
  69. int iwl_param_disable; /* def: enable radio */
  70. int iwl_param_antenna; /* def: 0 = both antennas (use diversity) */
  71. int iwl_param_hwcrypto; /* def: using software encryption */
  72. int iwl_param_qos_enable = 1;
  73. int iwl_param_queues_num = IWL_MAX_NUM_QUEUES;
  74. /*
  75. * module name, copyright, version, etc.
  76. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  77. */
  78. #define DRV_DESCRIPTION \
  79. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  80. #ifdef CONFIG_IWLWIFI_DEBUG
  81. #define VD "d"
  82. #else
  83. #define VD
  84. #endif
  85. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  86. #define VS "s"
  87. #else
  88. #define VS
  89. #endif
  90. #define IWLWIFI_VERSION "1.1.17k" VD VS
  91. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  92. #define DRV_VERSION IWLWIFI_VERSION
  93. /* Change firmware file name, using "-" and incrementing number,
  94. * *only* when uCode interface or architecture changes so that it
  95. * is not compatible with earlier drivers.
  96. * This number will also appear in << 8 position of 1st dword of uCode file */
  97. #define IWL3945_UCODE_API "-1"
  98. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  99. MODULE_VERSION(DRV_VERSION);
  100. MODULE_AUTHOR(DRV_COPYRIGHT);
  101. MODULE_LICENSE("GPL");
  102. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  103. {
  104. u16 fc = le16_to_cpu(hdr->frame_control);
  105. int hdr_len = ieee80211_get_hdrlen(fc);
  106. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  107. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  108. return NULL;
  109. }
  110. static const struct ieee80211_hw_mode *iwl_get_hw_mode(
  111. struct iwl_priv *priv, int mode)
  112. {
  113. int i;
  114. for (i = 0; i < 3; i++)
  115. if (priv->modes[i].mode == mode)
  116. return &priv->modes[i];
  117. return NULL;
  118. }
  119. static int iwl_is_empty_essid(const char *essid, int essid_len)
  120. {
  121. /* Single white space is for Linksys APs */
  122. if (essid_len == 1 && essid[0] == ' ')
  123. return 1;
  124. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  125. while (essid_len) {
  126. essid_len--;
  127. if (essid[essid_len] != '\0')
  128. return 0;
  129. }
  130. return 1;
  131. }
  132. static const char *iwl_escape_essid(const char *essid, u8 essid_len)
  133. {
  134. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  135. const char *s = essid;
  136. char *d = escaped;
  137. if (iwl_is_empty_essid(essid, essid_len)) {
  138. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  139. return escaped;
  140. }
  141. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  142. while (essid_len--) {
  143. if (*s == '\0') {
  144. *d++ = '\\';
  145. *d++ = '0';
  146. s++;
  147. } else
  148. *d++ = *s++;
  149. }
  150. *d = '\0';
  151. return escaped;
  152. }
  153. static void iwl_print_hex_dump(int level, void *p, u32 len)
  154. {
  155. #ifdef CONFIG_IWLWIFI_DEBUG
  156. if (!(iwl_debug_level & level))
  157. return;
  158. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  159. p, len, 1);
  160. #endif
  161. }
  162. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  163. * DMA services
  164. *
  165. * Theory of operation
  166. *
  167. * A queue is a circular buffers with 'Read' and 'Write' pointers.
  168. * 2 empty entries always kept in the buffer to protect from overflow.
  169. *
  170. * For Tx queue, there are low mark and high mark limits. If, after queuing
  171. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  172. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  173. * Tx queue resumed.
  174. *
  175. * The IWL operates with six queues, one receive queue in the device's
  176. * sram, one transmit queue for sending commands to the device firmware,
  177. * and four transmit queues for data.
  178. ***************************************************/
  179. static int iwl_queue_space(const struct iwl_queue *q)
  180. {
  181. int s = q->last_used - q->first_empty;
  182. if (q->last_used > q->first_empty)
  183. s -= q->n_bd;
  184. if (s <= 0)
  185. s += q->n_window;
  186. /* keep some reserve to not confuse empty and full situations */
  187. s -= 2;
  188. if (s < 0)
  189. s = 0;
  190. return s;
  191. }
  192. /* XXX: n_bd must be power-of-two size */
  193. static inline int iwl_queue_inc_wrap(int index, int n_bd)
  194. {
  195. return ++index & (n_bd - 1);
  196. }
  197. /* XXX: n_bd must be power-of-two size */
  198. static inline int iwl_queue_dec_wrap(int index, int n_bd)
  199. {
  200. return --index & (n_bd - 1);
  201. }
  202. static inline int x2_queue_used(const struct iwl_queue *q, int i)
  203. {
  204. return q->first_empty > q->last_used ?
  205. (i >= q->last_used && i < q->first_empty) :
  206. !(i < q->last_used && i >= q->first_empty);
  207. }
  208. static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
  209. {
  210. if (is_huge)
  211. return q->n_window;
  212. return index & (q->n_window - 1);
  213. }
  214. static int iwl_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
  215. int count, int slots_num, u32 id)
  216. {
  217. q->n_bd = count;
  218. q->n_window = slots_num;
  219. q->id = id;
  220. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  221. * and iwl_queue_dec_wrap are broken. */
  222. BUG_ON(!is_power_of_2(count));
  223. /* slots_num must be power-of-two size, otherwise
  224. * get_cmd_index is broken. */
  225. BUG_ON(!is_power_of_2(slots_num));
  226. q->low_mark = q->n_window / 4;
  227. if (q->low_mark < 4)
  228. q->low_mark = 4;
  229. q->high_mark = q->n_window / 8;
  230. if (q->high_mark < 2)
  231. q->high_mark = 2;
  232. q->first_empty = q->last_used = 0;
  233. return 0;
  234. }
  235. static int iwl_tx_queue_alloc(struct iwl_priv *priv,
  236. struct iwl_tx_queue *txq, u32 id)
  237. {
  238. struct pci_dev *dev = priv->pci_dev;
  239. if (id != IWL_CMD_QUEUE_NUM) {
  240. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  241. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  242. if (!txq->txb) {
  243. IWL_ERROR("kmalloc for auxilary BD "
  244. "structures failed\n");
  245. goto error;
  246. }
  247. } else
  248. txq->txb = NULL;
  249. txq->bd = pci_alloc_consistent(dev,
  250. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  251. &txq->q.dma_addr);
  252. if (!txq->bd) {
  253. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  254. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  255. goto error;
  256. }
  257. txq->q.id = id;
  258. return 0;
  259. error:
  260. if (txq->txb) {
  261. kfree(txq->txb);
  262. txq->txb = NULL;
  263. }
  264. return -ENOMEM;
  265. }
  266. int iwl_tx_queue_init(struct iwl_priv *priv,
  267. struct iwl_tx_queue *txq, int slots_num, u32 txq_id)
  268. {
  269. struct pci_dev *dev = priv->pci_dev;
  270. int len;
  271. int rc = 0;
  272. /* alocate command space + one big command for scan since scan
  273. * command is very huge the system will not have two scan at the
  274. * same time */
  275. len = sizeof(struct iwl_cmd) * slots_num;
  276. if (txq_id == IWL_CMD_QUEUE_NUM)
  277. len += IWL_MAX_SCAN_SIZE;
  278. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  279. if (!txq->cmd)
  280. return -ENOMEM;
  281. rc = iwl_tx_queue_alloc(priv, txq, txq_id);
  282. if (rc) {
  283. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  284. return -ENOMEM;
  285. }
  286. txq->need_update = 0;
  287. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  288. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  289. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  290. iwl_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  291. iwl_hw_tx_queue_init(priv, txq);
  292. return 0;
  293. }
  294. /**
  295. * iwl_tx_queue_free - Deallocate DMA queue.
  296. * @txq: Transmit queue to deallocate.
  297. *
  298. * Empty queue by removing and destroying all BD's.
  299. * Free all buffers. txq itself is not freed.
  300. *
  301. */
  302. void iwl_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
  303. {
  304. struct iwl_queue *q = &txq->q;
  305. struct pci_dev *dev = priv->pci_dev;
  306. int len;
  307. if (q->n_bd == 0)
  308. return;
  309. /* first, empty all BD's */
  310. for (; q->first_empty != q->last_used;
  311. q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd))
  312. iwl_hw_txq_free_tfd(priv, txq);
  313. len = sizeof(struct iwl_cmd) * q->n_window;
  314. if (q->id == IWL_CMD_QUEUE_NUM)
  315. len += IWL_MAX_SCAN_SIZE;
  316. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  317. /* free buffers belonging to queue itself */
  318. if (txq->q.n_bd)
  319. pci_free_consistent(dev, sizeof(struct iwl_tfd_frame) *
  320. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  321. if (txq->txb) {
  322. kfree(txq->txb);
  323. txq->txb = NULL;
  324. }
  325. /* 0 fill whole structure */
  326. memset(txq, 0, sizeof(*txq));
  327. }
  328. const u8 BROADCAST_ADDR[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  329. /*************** STATION TABLE MANAGEMENT ****
  330. *
  331. * NOTE: This needs to be overhauled to better synchronize between
  332. * how the iwl-4965.c is using iwl_hw_find_station vs. iwl-3945.c
  333. *
  334. * mac80211 should also be examined to determine if sta_info is duplicating
  335. * the functionality provided here
  336. */
  337. /**************************************************************/
  338. #if 0 /* temparary disable till we add real remove station */
  339. static u8 iwl_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  340. {
  341. int index = IWL_INVALID_STATION;
  342. int i;
  343. unsigned long flags;
  344. spin_lock_irqsave(&priv->sta_lock, flags);
  345. if (is_ap)
  346. index = IWL_AP_ID;
  347. else if (is_broadcast_ether_addr(addr))
  348. index = priv->hw_setting.bcast_sta_id;
  349. else
  350. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  351. if (priv->stations[i].used &&
  352. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  353. addr)) {
  354. index = i;
  355. break;
  356. }
  357. if (unlikely(index == IWL_INVALID_STATION))
  358. goto out;
  359. if (priv->stations[index].used) {
  360. priv->stations[index].used = 0;
  361. priv->num_stations--;
  362. }
  363. BUG_ON(priv->num_stations < 0);
  364. out:
  365. spin_unlock_irqrestore(&priv->sta_lock, flags);
  366. return 0;
  367. }
  368. #endif
  369. static void iwl_clear_stations_table(struct iwl_priv *priv)
  370. {
  371. unsigned long flags;
  372. spin_lock_irqsave(&priv->sta_lock, flags);
  373. priv->num_stations = 0;
  374. memset(priv->stations, 0, sizeof(priv->stations));
  375. spin_unlock_irqrestore(&priv->sta_lock, flags);
  376. }
  377. u8 iwl_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  378. {
  379. int i;
  380. int index = IWL_INVALID_STATION;
  381. struct iwl_station_entry *station;
  382. unsigned long flags_spin;
  383. DECLARE_MAC_BUF(mac);
  384. u8 rate;
  385. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  386. if (is_ap)
  387. index = IWL_AP_ID;
  388. else if (is_broadcast_ether_addr(addr))
  389. index = priv->hw_setting.bcast_sta_id;
  390. else
  391. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  392. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  393. addr)) {
  394. index = i;
  395. break;
  396. }
  397. if (!priv->stations[i].used &&
  398. index == IWL_INVALID_STATION)
  399. index = i;
  400. }
  401. /* These twh conditions has the same outcome but keep them separate
  402. since they have different meaning */
  403. if (unlikely(index == IWL_INVALID_STATION)) {
  404. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  405. return index;
  406. }
  407. if (priv->stations[index].used &&
  408. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  409. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  410. return index;
  411. }
  412. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  413. station = &priv->stations[index];
  414. station->used = 1;
  415. priv->num_stations++;
  416. memset(&station->sta, 0, sizeof(struct iwl_addsta_cmd));
  417. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  418. station->sta.mode = 0;
  419. station->sta.sta.sta_id = index;
  420. station->sta.station_flags = 0;
  421. rate = (priv->phymode == MODE_IEEE80211A) ? IWL_RATE_6M_PLCP :
  422. IWL_RATE_1M_PLCP | priv->hw_setting.cck_flag;
  423. /* Turn on both antennas for the station... */
  424. station->sta.rate_n_flags =
  425. iwl_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
  426. station->current_rate.rate_n_flags =
  427. le16_to_cpu(station->sta.rate_n_flags);
  428. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  429. iwl_send_add_station(priv, &station->sta, flags);
  430. return index;
  431. }
  432. /*************** DRIVER STATUS FUNCTIONS *****/
  433. static inline int iwl_is_ready(struct iwl_priv *priv)
  434. {
  435. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  436. * set but EXIT_PENDING is not */
  437. return test_bit(STATUS_READY, &priv->status) &&
  438. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  439. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  440. }
  441. static inline int iwl_is_alive(struct iwl_priv *priv)
  442. {
  443. return test_bit(STATUS_ALIVE, &priv->status);
  444. }
  445. static inline int iwl_is_init(struct iwl_priv *priv)
  446. {
  447. return test_bit(STATUS_INIT, &priv->status);
  448. }
  449. static inline int iwl_is_rfkill(struct iwl_priv *priv)
  450. {
  451. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  452. test_bit(STATUS_RF_KILL_SW, &priv->status);
  453. }
  454. static inline int iwl_is_ready_rf(struct iwl_priv *priv)
  455. {
  456. if (iwl_is_rfkill(priv))
  457. return 0;
  458. return iwl_is_ready(priv);
  459. }
  460. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  461. #define IWL_CMD(x) case x : return #x
  462. static const char *get_cmd_string(u8 cmd)
  463. {
  464. switch (cmd) {
  465. IWL_CMD(REPLY_ALIVE);
  466. IWL_CMD(REPLY_ERROR);
  467. IWL_CMD(REPLY_RXON);
  468. IWL_CMD(REPLY_RXON_ASSOC);
  469. IWL_CMD(REPLY_QOS_PARAM);
  470. IWL_CMD(REPLY_RXON_TIMING);
  471. IWL_CMD(REPLY_ADD_STA);
  472. IWL_CMD(REPLY_REMOVE_STA);
  473. IWL_CMD(REPLY_REMOVE_ALL_STA);
  474. IWL_CMD(REPLY_3945_RX);
  475. IWL_CMD(REPLY_TX);
  476. IWL_CMD(REPLY_RATE_SCALE);
  477. IWL_CMD(REPLY_LEDS_CMD);
  478. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  479. IWL_CMD(RADAR_NOTIFICATION);
  480. IWL_CMD(REPLY_QUIET_CMD);
  481. IWL_CMD(REPLY_CHANNEL_SWITCH);
  482. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  483. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  484. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  485. IWL_CMD(POWER_TABLE_CMD);
  486. IWL_CMD(PM_SLEEP_NOTIFICATION);
  487. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  488. IWL_CMD(REPLY_SCAN_CMD);
  489. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  490. IWL_CMD(SCAN_START_NOTIFICATION);
  491. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  492. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  493. IWL_CMD(BEACON_NOTIFICATION);
  494. IWL_CMD(REPLY_TX_BEACON);
  495. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  496. IWL_CMD(QUIET_NOTIFICATION);
  497. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  498. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  499. IWL_CMD(REPLY_BT_CONFIG);
  500. IWL_CMD(REPLY_STATISTICS_CMD);
  501. IWL_CMD(STATISTICS_NOTIFICATION);
  502. IWL_CMD(REPLY_CARD_STATE_CMD);
  503. IWL_CMD(CARD_STATE_NOTIFICATION);
  504. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  505. default:
  506. return "UNKNOWN";
  507. }
  508. }
  509. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  510. /**
  511. * iwl_enqueue_hcmd - enqueue a uCode command
  512. * @priv: device private data point
  513. * @cmd: a point to the ucode command structure
  514. *
  515. * The function returns < 0 values to indicate the operation is
  516. * failed. On success, it turns the index (> 0) of command in the
  517. * command queue.
  518. */
  519. static int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  520. {
  521. struct iwl_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  522. struct iwl_queue *q = &txq->q;
  523. struct iwl_tfd_frame *tfd;
  524. u32 *control_flags;
  525. struct iwl_cmd *out_cmd;
  526. u32 idx;
  527. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  528. dma_addr_t phys_addr;
  529. int pad;
  530. u16 count;
  531. int ret;
  532. unsigned long flags;
  533. /* If any of the command structures end up being larger than
  534. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  535. * we will need to increase the size of the TFD entries */
  536. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  537. !(cmd->meta.flags & CMD_SIZE_HUGE));
  538. if (iwl_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  539. IWL_ERROR("No space for Tx\n");
  540. return -ENOSPC;
  541. }
  542. spin_lock_irqsave(&priv->hcmd_lock, flags);
  543. tfd = &txq->bd[q->first_empty];
  544. memset(tfd, 0, sizeof(*tfd));
  545. control_flags = (u32 *) tfd;
  546. idx = get_cmd_index(q, q->first_empty, cmd->meta.flags & CMD_SIZE_HUGE);
  547. out_cmd = &txq->cmd[idx];
  548. out_cmd->hdr.cmd = cmd->id;
  549. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  550. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  551. /* At this point, the out_cmd now has all of the incoming cmd
  552. * information */
  553. out_cmd->hdr.flags = 0;
  554. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  555. INDEX_TO_SEQ(q->first_empty));
  556. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  557. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  558. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  559. offsetof(struct iwl_cmd, hdr);
  560. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  561. pad = U32_PAD(cmd->len);
  562. count = TFD_CTL_COUNT_GET(*control_flags);
  563. *control_flags = TFD_CTL_COUNT_SET(count) | TFD_CTL_PAD_SET(pad);
  564. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  565. "%d bytes at %d[%d]:%d\n",
  566. get_cmd_string(out_cmd->hdr.cmd),
  567. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  568. fix_size, q->first_empty, idx, IWL_CMD_QUEUE_NUM);
  569. txq->need_update = 1;
  570. q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
  571. ret = iwl_tx_queue_update_write_ptr(priv, txq);
  572. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  573. return ret ? ret : idx;
  574. }
  575. int iwl_send_cmd_async(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  576. {
  577. int ret;
  578. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  579. /* An asynchronous command can not expect an SKB to be set. */
  580. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  581. /* An asynchronous command MUST have a callback. */
  582. BUG_ON(!cmd->meta.u.callback);
  583. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  584. return -EBUSY;
  585. ret = iwl_enqueue_hcmd(priv, cmd);
  586. if (ret < 0) {
  587. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  588. get_cmd_string(cmd->id), ret);
  589. return ret;
  590. }
  591. return 0;
  592. }
  593. int iwl_send_cmd_sync(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  594. {
  595. int cmd_idx;
  596. int ret;
  597. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  598. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  599. /* A synchronous command can not have a callback set. */
  600. BUG_ON(cmd->meta.u.callback != NULL);
  601. if (atomic_xchg(&entry, 1)) {
  602. IWL_ERROR("Error sending %s: Already sending a host command\n",
  603. get_cmd_string(cmd->id));
  604. return -EBUSY;
  605. }
  606. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  607. if (cmd->meta.flags & CMD_WANT_SKB)
  608. cmd->meta.source = &cmd->meta;
  609. cmd_idx = iwl_enqueue_hcmd(priv, cmd);
  610. if (cmd_idx < 0) {
  611. ret = cmd_idx;
  612. IWL_ERROR("Error sending %s: iwl_enqueue_hcmd failed: %d\n",
  613. get_cmd_string(cmd->id), ret);
  614. goto out;
  615. }
  616. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  617. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  618. HOST_COMPLETE_TIMEOUT);
  619. if (!ret) {
  620. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  621. IWL_ERROR("Error sending %s: time out after %dms.\n",
  622. get_cmd_string(cmd->id),
  623. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  624. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  625. ret = -ETIMEDOUT;
  626. goto cancel;
  627. }
  628. }
  629. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  630. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  631. get_cmd_string(cmd->id));
  632. ret = -ECANCELED;
  633. goto fail;
  634. }
  635. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  636. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  637. get_cmd_string(cmd->id));
  638. ret = -EIO;
  639. goto fail;
  640. }
  641. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  642. IWL_ERROR("Error: Response NULL in '%s'\n",
  643. get_cmd_string(cmd->id));
  644. ret = -EIO;
  645. goto out;
  646. }
  647. ret = 0;
  648. goto out;
  649. cancel:
  650. if (cmd->meta.flags & CMD_WANT_SKB) {
  651. struct iwl_cmd *qcmd;
  652. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  653. * TX cmd queue. Otherwise in case the cmd comes
  654. * in later, it will possibly set an invalid
  655. * address (cmd->meta.source). */
  656. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  657. qcmd->meta.flags &= ~CMD_WANT_SKB;
  658. }
  659. fail:
  660. if (cmd->meta.u.skb) {
  661. dev_kfree_skb_any(cmd->meta.u.skb);
  662. cmd->meta.u.skb = NULL;
  663. }
  664. out:
  665. atomic_set(&entry, 0);
  666. return ret;
  667. }
  668. int iwl_send_cmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  669. {
  670. /* A command can not be asynchronous AND expect an SKB to be set. */
  671. BUG_ON((cmd->meta.flags & CMD_ASYNC) &&
  672. (cmd->meta.flags & CMD_WANT_SKB));
  673. if (cmd->meta.flags & CMD_ASYNC)
  674. return iwl_send_cmd_async(priv, cmd);
  675. return iwl_send_cmd_sync(priv, cmd);
  676. }
  677. int iwl_send_cmd_pdu(struct iwl_priv *priv, u8 id, u16 len, const void *data)
  678. {
  679. struct iwl_host_cmd cmd = {
  680. .id = id,
  681. .len = len,
  682. .data = data,
  683. };
  684. return iwl_send_cmd_sync(priv, &cmd);
  685. }
  686. static int __must_check iwl_send_cmd_u32(struct iwl_priv *priv, u8 id, u32 val)
  687. {
  688. struct iwl_host_cmd cmd = {
  689. .id = id,
  690. .len = sizeof(val),
  691. .data = &val,
  692. };
  693. return iwl_send_cmd_sync(priv, &cmd);
  694. }
  695. int iwl_send_statistics_request(struct iwl_priv *priv)
  696. {
  697. return iwl_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  698. }
  699. /**
  700. * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
  701. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  702. * @channel: Any channel valid for the requested phymode
  703. * In addition to setting the staging RXON, priv->phymode is also set.
  704. *
  705. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  706. * in the staging RXON flag structure based on the phymode
  707. */
  708. static int iwl_set_rxon_channel(struct iwl_priv *priv, u8 phymode, u16 channel)
  709. {
  710. if (!iwl_get_channel_info(priv, phymode, channel)) {
  711. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  712. channel, phymode);
  713. return -EINVAL;
  714. }
  715. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  716. (priv->phymode == phymode))
  717. return 0;
  718. priv->staging_rxon.channel = cpu_to_le16(channel);
  719. if (phymode == MODE_IEEE80211A)
  720. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  721. else
  722. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  723. priv->phymode = phymode;
  724. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, phymode);
  725. return 0;
  726. }
  727. /**
  728. * iwl_check_rxon_cmd - validate RXON structure is valid
  729. *
  730. * NOTE: This is really only useful during development and can eventually
  731. * be #ifdef'd out once the driver is stable and folks aren't actively
  732. * making changes
  733. */
  734. static int iwl_check_rxon_cmd(struct iwl_rxon_cmd *rxon)
  735. {
  736. int error = 0;
  737. int counter = 1;
  738. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  739. error |= le32_to_cpu(rxon->flags &
  740. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  741. RXON_FLG_RADAR_DETECT_MSK));
  742. if (error)
  743. IWL_WARNING("check 24G fields %d | %d\n",
  744. counter++, error);
  745. } else {
  746. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  747. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  748. if (error)
  749. IWL_WARNING("check 52 fields %d | %d\n",
  750. counter++, error);
  751. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  752. if (error)
  753. IWL_WARNING("check 52 CCK %d | %d\n",
  754. counter++, error);
  755. }
  756. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  757. if (error)
  758. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  759. /* make sure basic rates 6Mbps and 1Mbps are supported */
  760. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  761. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  762. if (error)
  763. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  764. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  765. if (error)
  766. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  767. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  768. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  769. if (error)
  770. IWL_WARNING("check CCK and short slot %d | %d\n",
  771. counter++, error);
  772. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  773. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  774. if (error)
  775. IWL_WARNING("check CCK & auto detect %d | %d\n",
  776. counter++, error);
  777. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  778. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  779. if (error)
  780. IWL_WARNING("check TGG and auto detect %d | %d\n",
  781. counter++, error);
  782. if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
  783. error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
  784. RXON_FLG_ANT_A_MSK)) == 0);
  785. if (error)
  786. IWL_WARNING("check antenna %d %d\n", counter++, error);
  787. if (error)
  788. IWL_WARNING("Tuning to channel %d\n",
  789. le16_to_cpu(rxon->channel));
  790. if (error) {
  791. IWL_ERROR("Not a valid iwl_rxon_assoc_cmd field values\n");
  792. return -1;
  793. }
  794. return 0;
  795. }
  796. /**
  797. * iwl_full_rxon_required - determine if RXON_ASSOC can be used in RXON commit
  798. * @priv: staging_rxon is comapred to active_rxon
  799. *
  800. * If the RXON structure is changing sufficient to require a new
  801. * tune or to clear and reset the RXON_FILTER_ASSOC_MSK then return 1
  802. * to indicate a new tune is required.
  803. */
  804. static int iwl_full_rxon_required(struct iwl_priv *priv)
  805. {
  806. /* These items are only settable from the full RXON command */
  807. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  808. compare_ether_addr(priv->staging_rxon.bssid_addr,
  809. priv->active_rxon.bssid_addr) ||
  810. compare_ether_addr(priv->staging_rxon.node_addr,
  811. priv->active_rxon.node_addr) ||
  812. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  813. priv->active_rxon.wlap_bssid_addr) ||
  814. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  815. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  816. (priv->staging_rxon.air_propagation !=
  817. priv->active_rxon.air_propagation) ||
  818. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  819. return 1;
  820. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  821. * be updated with the RXON_ASSOC command -- however only some
  822. * flag transitions are allowed using RXON_ASSOC */
  823. /* Check if we are not switching bands */
  824. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  825. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  826. return 1;
  827. /* Check if we are switching association toggle */
  828. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  829. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  830. return 1;
  831. return 0;
  832. }
  833. static int iwl_send_rxon_assoc(struct iwl_priv *priv)
  834. {
  835. int rc = 0;
  836. struct iwl_rx_packet *res = NULL;
  837. struct iwl_rxon_assoc_cmd rxon_assoc;
  838. struct iwl_host_cmd cmd = {
  839. .id = REPLY_RXON_ASSOC,
  840. .len = sizeof(rxon_assoc),
  841. .meta.flags = CMD_WANT_SKB,
  842. .data = &rxon_assoc,
  843. };
  844. const struct iwl_rxon_cmd *rxon1 = &priv->staging_rxon;
  845. const struct iwl_rxon_cmd *rxon2 = &priv->active_rxon;
  846. if ((rxon1->flags == rxon2->flags) &&
  847. (rxon1->filter_flags == rxon2->filter_flags) &&
  848. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  849. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  850. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  851. return 0;
  852. }
  853. rxon_assoc.flags = priv->staging_rxon.flags;
  854. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  855. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  856. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  857. rxon_assoc.reserved = 0;
  858. rc = iwl_send_cmd_sync(priv, &cmd);
  859. if (rc)
  860. return rc;
  861. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  862. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  863. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  864. rc = -EIO;
  865. }
  866. priv->alloc_rxb_skb--;
  867. dev_kfree_skb_any(cmd.meta.u.skb);
  868. return rc;
  869. }
  870. /**
  871. * iwl_commit_rxon - commit staging_rxon to hardware
  872. *
  873. * The RXON command in staging_rxon is commited to the hardware and
  874. * the active_rxon structure is updated with the new data. This
  875. * function correctly transitions out of the RXON_ASSOC_MSK state if
  876. * a HW tune is required based on the RXON structure changes.
  877. */
  878. static int iwl_commit_rxon(struct iwl_priv *priv)
  879. {
  880. /* cast away the const for active_rxon in this function */
  881. struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  882. int rc = 0;
  883. DECLARE_MAC_BUF(mac);
  884. if (!iwl_is_alive(priv))
  885. return -1;
  886. /* always get timestamp with Rx frame */
  887. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  888. /* select antenna */
  889. priv->staging_rxon.flags &=
  890. ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
  891. priv->staging_rxon.flags |= iwl3945_get_antenna_flags(priv);
  892. rc = iwl_check_rxon_cmd(&priv->staging_rxon);
  893. if (rc) {
  894. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  895. return -EINVAL;
  896. }
  897. /* If we don't need to send a full RXON, we can use
  898. * iwl_rxon_assoc_cmd which is used to reconfigure filter
  899. * and other flags for the current radio configuration. */
  900. if (!iwl_full_rxon_required(priv)) {
  901. rc = iwl_send_rxon_assoc(priv);
  902. if (rc) {
  903. IWL_ERROR("Error setting RXON_ASSOC "
  904. "configuration (%d).\n", rc);
  905. return rc;
  906. }
  907. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  908. return 0;
  909. }
  910. /* If we are currently associated and the new config requires
  911. * an RXON_ASSOC and the new config wants the associated mask enabled,
  912. * we must clear the associated from the active configuration
  913. * before we apply the new config */
  914. if (iwl_is_associated(priv) &&
  915. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  916. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  917. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  918. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  919. sizeof(struct iwl_rxon_cmd),
  920. &priv->active_rxon);
  921. /* If the mask clearing failed then we set
  922. * active_rxon back to what it was previously */
  923. if (rc) {
  924. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  925. IWL_ERROR("Error clearing ASSOC_MSK on current "
  926. "configuration (%d).\n", rc);
  927. return rc;
  928. }
  929. }
  930. IWL_DEBUG_INFO("Sending RXON\n"
  931. "* with%s RXON_FILTER_ASSOC_MSK\n"
  932. "* channel = %d\n"
  933. "* bssid = %s\n",
  934. ((priv->staging_rxon.filter_flags &
  935. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  936. le16_to_cpu(priv->staging_rxon.channel),
  937. print_mac(mac, priv->staging_rxon.bssid_addr));
  938. /* Apply the new configuration */
  939. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  940. sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
  941. if (rc) {
  942. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  943. return rc;
  944. }
  945. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  946. iwl_clear_stations_table(priv);
  947. /* If we issue a new RXON command which required a tune then we must
  948. * send a new TXPOWER command or we won't be able to Tx any frames */
  949. rc = iwl_hw_reg_send_txpower(priv);
  950. if (rc) {
  951. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  952. return rc;
  953. }
  954. /* Add the broadcast address so we can send broadcast frames */
  955. if (iwl_add_station(priv, BROADCAST_ADDR, 0, 0) ==
  956. IWL_INVALID_STATION) {
  957. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  958. return -EIO;
  959. }
  960. /* If we have set the ASSOC_MSK and we are in BSS mode then
  961. * add the IWL_AP_ID to the station rate table */
  962. if (iwl_is_associated(priv) &&
  963. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  964. if (iwl_add_station(priv, priv->active_rxon.bssid_addr, 1, 0)
  965. == IWL_INVALID_STATION) {
  966. IWL_ERROR("Error adding AP address for transmit.\n");
  967. return -EIO;
  968. }
  969. /* Init the hardware's rate fallback order based on the
  970. * phymode */
  971. rc = iwl3945_init_hw_rate_table(priv);
  972. if (rc) {
  973. IWL_ERROR("Error setting HW rate table: %02X\n", rc);
  974. return -EIO;
  975. }
  976. return 0;
  977. }
  978. static int iwl_send_bt_config(struct iwl_priv *priv)
  979. {
  980. struct iwl_bt_cmd bt_cmd = {
  981. .flags = 3,
  982. .lead_time = 0xAA,
  983. .max_kill = 1,
  984. .kill_ack_mask = 0,
  985. .kill_cts_mask = 0,
  986. };
  987. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  988. sizeof(struct iwl_bt_cmd), &bt_cmd);
  989. }
  990. static int iwl_send_scan_abort(struct iwl_priv *priv)
  991. {
  992. int rc = 0;
  993. struct iwl_rx_packet *res;
  994. struct iwl_host_cmd cmd = {
  995. .id = REPLY_SCAN_ABORT_CMD,
  996. .meta.flags = CMD_WANT_SKB,
  997. };
  998. /* If there isn't a scan actively going on in the hardware
  999. * then we are in between scan bands and not actually
  1000. * actively scanning, so don't send the abort command */
  1001. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1002. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1003. return 0;
  1004. }
  1005. rc = iwl_send_cmd_sync(priv, &cmd);
  1006. if (rc) {
  1007. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1008. return rc;
  1009. }
  1010. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1011. if (res->u.status != CAN_ABORT_STATUS) {
  1012. /* The scan abort will return 1 for success or
  1013. * 2 for "failure". A failure condition can be
  1014. * due to simply not being in an active scan which
  1015. * can occur if we send the scan abort before we
  1016. * the microcode has notified us that a scan is
  1017. * completed. */
  1018. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1019. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1020. clear_bit(STATUS_SCAN_HW, &priv->status);
  1021. }
  1022. dev_kfree_skb_any(cmd.meta.u.skb);
  1023. return rc;
  1024. }
  1025. static int iwl_card_state_sync_callback(struct iwl_priv *priv,
  1026. struct iwl_cmd *cmd,
  1027. struct sk_buff *skb)
  1028. {
  1029. return 1;
  1030. }
  1031. /*
  1032. * CARD_STATE_CMD
  1033. *
  1034. * Use: Sets the internal card state to enable, disable, or halt
  1035. *
  1036. * When in the 'enable' state the card operates as normal.
  1037. * When in the 'disable' state, the card enters into a low power mode.
  1038. * When in the 'halt' state, the card is shut down and must be fully
  1039. * restarted to come back on.
  1040. */
  1041. static int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  1042. {
  1043. struct iwl_host_cmd cmd = {
  1044. .id = REPLY_CARD_STATE_CMD,
  1045. .len = sizeof(u32),
  1046. .data = &flags,
  1047. .meta.flags = meta_flag,
  1048. };
  1049. if (meta_flag & CMD_ASYNC)
  1050. cmd.meta.u.callback = iwl_card_state_sync_callback;
  1051. return iwl_send_cmd(priv, &cmd);
  1052. }
  1053. static int iwl_add_sta_sync_callback(struct iwl_priv *priv,
  1054. struct iwl_cmd *cmd, struct sk_buff *skb)
  1055. {
  1056. struct iwl_rx_packet *res = NULL;
  1057. if (!skb) {
  1058. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1059. return 1;
  1060. }
  1061. res = (struct iwl_rx_packet *)skb->data;
  1062. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1063. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1064. res->hdr.flags);
  1065. return 1;
  1066. }
  1067. switch (res->u.add_sta.status) {
  1068. case ADD_STA_SUCCESS_MSK:
  1069. break;
  1070. default:
  1071. break;
  1072. }
  1073. /* We didn't cache the SKB; let the caller free it */
  1074. return 1;
  1075. }
  1076. int iwl_send_add_station(struct iwl_priv *priv,
  1077. struct iwl_addsta_cmd *sta, u8 flags)
  1078. {
  1079. struct iwl_rx_packet *res = NULL;
  1080. int rc = 0;
  1081. struct iwl_host_cmd cmd = {
  1082. .id = REPLY_ADD_STA,
  1083. .len = sizeof(struct iwl_addsta_cmd),
  1084. .meta.flags = flags,
  1085. .data = sta,
  1086. };
  1087. if (flags & CMD_ASYNC)
  1088. cmd.meta.u.callback = iwl_add_sta_sync_callback;
  1089. else
  1090. cmd.meta.flags |= CMD_WANT_SKB;
  1091. rc = iwl_send_cmd(priv, &cmd);
  1092. if (rc || (flags & CMD_ASYNC))
  1093. return rc;
  1094. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1095. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1096. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1097. res->hdr.flags);
  1098. rc = -EIO;
  1099. }
  1100. if (rc == 0) {
  1101. switch (res->u.add_sta.status) {
  1102. case ADD_STA_SUCCESS_MSK:
  1103. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1104. break;
  1105. default:
  1106. rc = -EIO;
  1107. IWL_WARNING("REPLY_ADD_STA failed\n");
  1108. break;
  1109. }
  1110. }
  1111. priv->alloc_rxb_skb--;
  1112. dev_kfree_skb_any(cmd.meta.u.skb);
  1113. return rc;
  1114. }
  1115. static int iwl_update_sta_key_info(struct iwl_priv *priv,
  1116. struct ieee80211_key_conf *keyconf,
  1117. u8 sta_id)
  1118. {
  1119. unsigned long flags;
  1120. __le16 key_flags = 0;
  1121. switch (keyconf->alg) {
  1122. case ALG_CCMP:
  1123. key_flags |= STA_KEY_FLG_CCMP;
  1124. key_flags |= cpu_to_le16(
  1125. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1126. key_flags &= ~STA_KEY_FLG_INVALID;
  1127. break;
  1128. case ALG_TKIP:
  1129. case ALG_WEP:
  1130. return -EINVAL;
  1131. default:
  1132. return -EINVAL;
  1133. }
  1134. spin_lock_irqsave(&priv->sta_lock, flags);
  1135. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1136. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1137. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1138. keyconf->keylen);
  1139. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1140. keyconf->keylen);
  1141. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1142. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1143. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1144. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1145. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1146. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1147. return 0;
  1148. }
  1149. static int iwl_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  1150. {
  1151. unsigned long flags;
  1152. spin_lock_irqsave(&priv->sta_lock, flags);
  1153. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  1154. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl_keyinfo));
  1155. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1156. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1157. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1158. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1159. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1160. iwl_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1161. return 0;
  1162. }
  1163. static void iwl_clear_free_frames(struct iwl_priv *priv)
  1164. {
  1165. struct list_head *element;
  1166. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1167. priv->frames_count);
  1168. while (!list_empty(&priv->free_frames)) {
  1169. element = priv->free_frames.next;
  1170. list_del(element);
  1171. kfree(list_entry(element, struct iwl_frame, list));
  1172. priv->frames_count--;
  1173. }
  1174. if (priv->frames_count) {
  1175. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1176. priv->frames_count);
  1177. priv->frames_count = 0;
  1178. }
  1179. }
  1180. static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
  1181. {
  1182. struct iwl_frame *frame;
  1183. struct list_head *element;
  1184. if (list_empty(&priv->free_frames)) {
  1185. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1186. if (!frame) {
  1187. IWL_ERROR("Could not allocate frame!\n");
  1188. return NULL;
  1189. }
  1190. priv->frames_count++;
  1191. return frame;
  1192. }
  1193. element = priv->free_frames.next;
  1194. list_del(element);
  1195. return list_entry(element, struct iwl_frame, list);
  1196. }
  1197. static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
  1198. {
  1199. memset(frame, 0, sizeof(*frame));
  1200. list_add(&frame->list, &priv->free_frames);
  1201. }
  1202. unsigned int iwl_fill_beacon_frame(struct iwl_priv *priv,
  1203. struct ieee80211_hdr *hdr,
  1204. const u8 *dest, int left)
  1205. {
  1206. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  1207. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1208. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1209. return 0;
  1210. if (priv->ibss_beacon->len > left)
  1211. return 0;
  1212. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1213. return priv->ibss_beacon->len;
  1214. }
  1215. static int iwl_rate_index_from_plcp(int plcp)
  1216. {
  1217. int i = 0;
  1218. for (i = 0; i < IWL_RATE_COUNT; i++)
  1219. if (iwl_rates[i].plcp == plcp)
  1220. return i;
  1221. return -1;
  1222. }
  1223. static u8 iwl_rate_get_lowest_plcp(int rate_mask)
  1224. {
  1225. u8 i;
  1226. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1227. i = iwl_rates[i].next_ieee) {
  1228. if (rate_mask & (1 << i))
  1229. return iwl_rates[i].plcp;
  1230. }
  1231. return IWL_RATE_INVALID;
  1232. }
  1233. static int iwl_send_beacon_cmd(struct iwl_priv *priv)
  1234. {
  1235. struct iwl_frame *frame;
  1236. unsigned int frame_size;
  1237. int rc;
  1238. u8 rate;
  1239. frame = iwl_get_free_frame(priv);
  1240. if (!frame) {
  1241. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1242. "command.\n");
  1243. return -ENOMEM;
  1244. }
  1245. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1246. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic &
  1247. 0xFF0);
  1248. if (rate == IWL_INVALID_RATE)
  1249. rate = IWL_RATE_6M_PLCP;
  1250. } else {
  1251. rate = iwl_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1252. if (rate == IWL_INVALID_RATE)
  1253. rate = IWL_RATE_1M_PLCP;
  1254. }
  1255. frame_size = iwl_hw_get_beacon_cmd(priv, frame, rate);
  1256. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1257. &frame->u.cmd[0]);
  1258. iwl_free_frame(priv, frame);
  1259. return rc;
  1260. }
  1261. /******************************************************************************
  1262. *
  1263. * EEPROM related functions
  1264. *
  1265. ******************************************************************************/
  1266. static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
  1267. {
  1268. memcpy(mac, priv->eeprom.mac_address, 6);
  1269. }
  1270. /**
  1271. * iwl_eeprom_init - read EEPROM contents
  1272. *
  1273. * Load the EEPROM from adapter into priv->eeprom
  1274. *
  1275. * NOTE: This routine uses the non-debug IO access functions.
  1276. */
  1277. int iwl_eeprom_init(struct iwl_priv *priv)
  1278. {
  1279. u16 *e = (u16 *)&priv->eeprom;
  1280. u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
  1281. u32 r;
  1282. int sz = sizeof(priv->eeprom);
  1283. int rc;
  1284. int i;
  1285. u16 addr;
  1286. /* The EEPROM structure has several padding buffers within it
  1287. * and when adding new EEPROM maps is subject to programmer errors
  1288. * which may be very difficult to identify without explicitly
  1289. * checking the resulting size of the eeprom map. */
  1290. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1291. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1292. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1293. return -ENOENT;
  1294. }
  1295. rc = iwl_eeprom_aqcuire_semaphore(priv);
  1296. if (rc < 0) {
  1297. IWL_ERROR("Failed to aqcuire EEPROM semaphore.\n");
  1298. return -ENOENT;
  1299. }
  1300. /* eeprom is an array of 16bit values */
  1301. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1302. _iwl_write32(priv, CSR_EEPROM_REG, addr << 1);
  1303. _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1304. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1305. i += IWL_EEPROM_ACCESS_DELAY) {
  1306. r = _iwl_read_restricted(priv, CSR_EEPROM_REG);
  1307. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1308. break;
  1309. udelay(IWL_EEPROM_ACCESS_DELAY);
  1310. }
  1311. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1312. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1313. return -ETIMEDOUT;
  1314. }
  1315. e[addr / 2] = le16_to_cpu(r >> 16);
  1316. }
  1317. return 0;
  1318. }
  1319. /******************************************************************************
  1320. *
  1321. * Misc. internal state and helper functions
  1322. *
  1323. ******************************************************************************/
  1324. #ifdef CONFIG_IWLWIFI_DEBUG
  1325. /**
  1326. * iwl_report_frame - dump frame to syslog during debug sessions
  1327. *
  1328. * hack this function to show different aspects of received frames,
  1329. * including selective frame dumps.
  1330. * group100 parameter selects whether to show 1 out of 100 good frames.
  1331. *
  1332. * TODO: ieee80211_hdr stuff is common to 3945 and 4965, so frame type
  1333. * info output is okay, but some of this stuff (e.g. iwl_rx_frame_stats)
  1334. * is 3945-specific and gives bad output for 4965. Need to split the
  1335. * functionality, keep common stuff here.
  1336. */
  1337. void iwl_report_frame(struct iwl_priv *priv,
  1338. struct iwl_rx_packet *pkt,
  1339. struct ieee80211_hdr *header, int group100)
  1340. {
  1341. u32 to_us;
  1342. u32 print_summary = 0;
  1343. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1344. u32 hundred = 0;
  1345. u32 dataframe = 0;
  1346. u16 fc;
  1347. u16 seq_ctl;
  1348. u16 channel;
  1349. u16 phy_flags;
  1350. int rate_sym;
  1351. u16 length;
  1352. u16 status;
  1353. u16 bcn_tmr;
  1354. u32 tsf_low;
  1355. u64 tsf;
  1356. u8 rssi;
  1357. u8 agc;
  1358. u16 sig_avg;
  1359. u16 noise_diff;
  1360. struct iwl_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1361. struct iwl_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1362. struct iwl_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1363. u8 *data = IWL_RX_DATA(pkt);
  1364. /* MAC header */
  1365. fc = le16_to_cpu(header->frame_control);
  1366. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1367. /* metadata */
  1368. channel = le16_to_cpu(rx_hdr->channel);
  1369. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1370. rate_sym = rx_hdr->rate;
  1371. length = le16_to_cpu(rx_hdr->len);
  1372. /* end-of-frame status and timestamp */
  1373. status = le32_to_cpu(rx_end->status);
  1374. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1375. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1376. tsf = le64_to_cpu(rx_end->timestamp);
  1377. /* signal statistics */
  1378. rssi = rx_stats->rssi;
  1379. agc = rx_stats->agc;
  1380. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1381. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1382. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1383. /* if data frame is to us and all is good,
  1384. * (optionally) print summary for only 1 out of every 100 */
  1385. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1386. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1387. dataframe = 1;
  1388. if (!group100)
  1389. print_summary = 1; /* print each frame */
  1390. else if (priv->framecnt_to_us < 100) {
  1391. priv->framecnt_to_us++;
  1392. print_summary = 0;
  1393. } else {
  1394. priv->framecnt_to_us = 0;
  1395. print_summary = 1;
  1396. hundred = 1;
  1397. }
  1398. } else {
  1399. /* print summary for all other frames */
  1400. print_summary = 1;
  1401. }
  1402. if (print_summary) {
  1403. char *title;
  1404. u32 rate;
  1405. if (hundred)
  1406. title = "100Frames";
  1407. else if (fc & IEEE80211_FCTL_RETRY)
  1408. title = "Retry";
  1409. else if (ieee80211_is_assoc_response(fc))
  1410. title = "AscRsp";
  1411. else if (ieee80211_is_reassoc_response(fc))
  1412. title = "RasRsp";
  1413. else if (ieee80211_is_probe_response(fc)) {
  1414. title = "PrbRsp";
  1415. print_dump = 1; /* dump frame contents */
  1416. } else if (ieee80211_is_beacon(fc)) {
  1417. title = "Beacon";
  1418. print_dump = 1; /* dump frame contents */
  1419. } else if (ieee80211_is_atim(fc))
  1420. title = "ATIM";
  1421. else if (ieee80211_is_auth(fc))
  1422. title = "Auth";
  1423. else if (ieee80211_is_deauth(fc))
  1424. title = "DeAuth";
  1425. else if (ieee80211_is_disassoc(fc))
  1426. title = "DisAssoc";
  1427. else
  1428. title = "Frame";
  1429. rate = iwl_rate_index_from_plcp(rate_sym);
  1430. if (rate == -1)
  1431. rate = 0;
  1432. else
  1433. rate = iwl_rates[rate].ieee / 2;
  1434. /* print frame summary.
  1435. * MAC addresses show just the last byte (for brevity),
  1436. * but you can hack it to show more, if you'd like to. */
  1437. if (dataframe)
  1438. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1439. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1440. title, fc, header->addr1[5],
  1441. length, rssi, channel, rate);
  1442. else {
  1443. /* src/dst addresses assume managed mode */
  1444. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1445. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1446. "phy=0x%02x, chnl=%d\n",
  1447. title, fc, header->addr1[5],
  1448. header->addr3[5], rssi,
  1449. tsf_low - priv->scan_start_tsf,
  1450. phy_flags, channel);
  1451. }
  1452. }
  1453. if (print_dump)
  1454. iwl_print_hex_dump(IWL_DL_RX, data, length);
  1455. }
  1456. #endif
  1457. static void iwl_unset_hw_setting(struct iwl_priv *priv)
  1458. {
  1459. if (priv->hw_setting.shared_virt)
  1460. pci_free_consistent(priv->pci_dev,
  1461. sizeof(struct iwl_shared),
  1462. priv->hw_setting.shared_virt,
  1463. priv->hw_setting.shared_phys);
  1464. }
  1465. /**
  1466. * iwl_supported_rate_to_ie - fill in the supported rate in IE field
  1467. *
  1468. * return : set the bit for each supported rate insert in ie
  1469. */
  1470. static u16 iwl_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1471. u16 basic_rate, int max_count)
  1472. {
  1473. u16 ret_rates = 0, bit;
  1474. int i;
  1475. u8 *rates;
  1476. rates = &(ie[1]);
  1477. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1478. if (bit & supported_rate) {
  1479. ret_rates |= bit;
  1480. rates[*ie] = iwl_rates[i].ieee |
  1481. ((bit & basic_rate) ? 0x80 : 0x00);
  1482. *ie = *ie + 1;
  1483. if (*ie >= max_count)
  1484. break;
  1485. }
  1486. }
  1487. return ret_rates;
  1488. }
  1489. /**
  1490. * iwl_fill_probe_req - fill in all required fields and IE for probe request
  1491. */
  1492. static u16 iwl_fill_probe_req(struct iwl_priv *priv,
  1493. struct ieee80211_mgmt *frame,
  1494. int left, int is_direct)
  1495. {
  1496. int len = 0;
  1497. u8 *pos = NULL;
  1498. u16 ret_rates;
  1499. /* Make sure there is enough space for the probe request,
  1500. * two mandatory IEs and the data */
  1501. left -= 24;
  1502. if (left < 0)
  1503. return 0;
  1504. len += 24;
  1505. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1506. memcpy(frame->da, BROADCAST_ADDR, ETH_ALEN);
  1507. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1508. memcpy(frame->bssid, BROADCAST_ADDR, ETH_ALEN);
  1509. frame->seq_ctrl = 0;
  1510. /* fill in our indirect SSID IE */
  1511. /* ...next IE... */
  1512. left -= 2;
  1513. if (left < 0)
  1514. return 0;
  1515. len += 2;
  1516. pos = &(frame->u.probe_req.variable[0]);
  1517. *pos++ = WLAN_EID_SSID;
  1518. *pos++ = 0;
  1519. /* fill in our direct SSID IE... */
  1520. if (is_direct) {
  1521. /* ...next IE... */
  1522. left -= 2 + priv->essid_len;
  1523. if (left < 0)
  1524. return 0;
  1525. /* ... fill it in... */
  1526. *pos++ = WLAN_EID_SSID;
  1527. *pos++ = priv->essid_len;
  1528. memcpy(pos, priv->essid, priv->essid_len);
  1529. pos += priv->essid_len;
  1530. len += 2 + priv->essid_len;
  1531. }
  1532. /* fill in supported rate */
  1533. /* ...next IE... */
  1534. left -= 2;
  1535. if (left < 0)
  1536. return 0;
  1537. /* ... fill it in... */
  1538. *pos++ = WLAN_EID_SUPP_RATES;
  1539. *pos = 0;
  1540. ret_rates = priv->active_rate = priv->rates_mask;
  1541. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  1542. iwl_supported_rate_to_ie(pos, priv->active_rate,
  1543. priv->active_rate_basic, left);
  1544. len += 2 + *pos;
  1545. pos += (*pos) + 1;
  1546. ret_rates = ~ret_rates & priv->active_rate;
  1547. if (ret_rates == 0)
  1548. goto fill_end;
  1549. /* fill in supported extended rate */
  1550. /* ...next IE... */
  1551. left -= 2;
  1552. if (left < 0)
  1553. return 0;
  1554. /* ... fill it in... */
  1555. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1556. *pos = 0;
  1557. iwl_supported_rate_to_ie(pos, ret_rates, priv->active_rate_basic, left);
  1558. if (*pos > 0)
  1559. len += 2 + *pos;
  1560. fill_end:
  1561. return (u16)len;
  1562. }
  1563. /*
  1564. * QoS support
  1565. */
  1566. #ifdef CONFIG_IWLWIFI_QOS
  1567. static int iwl_send_qos_params_command(struct iwl_priv *priv,
  1568. struct iwl_qosparam_cmd *qos)
  1569. {
  1570. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1571. sizeof(struct iwl_qosparam_cmd), qos);
  1572. }
  1573. static void iwl_reset_qos(struct iwl_priv *priv)
  1574. {
  1575. u16 cw_min = 15;
  1576. u16 cw_max = 1023;
  1577. u8 aifs = 2;
  1578. u8 is_legacy = 0;
  1579. unsigned long flags;
  1580. int i;
  1581. spin_lock_irqsave(&priv->lock, flags);
  1582. priv->qos_data.qos_active = 0;
  1583. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1584. if (priv->qos_data.qos_enable)
  1585. priv->qos_data.qos_active = 1;
  1586. if (!(priv->active_rate & 0xfff0)) {
  1587. cw_min = 31;
  1588. is_legacy = 1;
  1589. }
  1590. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1591. if (priv->qos_data.qos_enable)
  1592. priv->qos_data.qos_active = 1;
  1593. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1594. cw_min = 31;
  1595. is_legacy = 1;
  1596. }
  1597. if (priv->qos_data.qos_active)
  1598. aifs = 3;
  1599. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1600. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1601. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1602. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1603. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1604. if (priv->qos_data.qos_active) {
  1605. i = 1;
  1606. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1607. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1608. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1609. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1610. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1611. i = 2;
  1612. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1613. cpu_to_le16((cw_min + 1) / 2 - 1);
  1614. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1615. cpu_to_le16(cw_max);
  1616. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1617. if (is_legacy)
  1618. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1619. cpu_to_le16(6016);
  1620. else
  1621. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1622. cpu_to_le16(3008);
  1623. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1624. i = 3;
  1625. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1626. cpu_to_le16((cw_min + 1) / 4 - 1);
  1627. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1628. cpu_to_le16((cw_max + 1) / 2 - 1);
  1629. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1630. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1631. if (is_legacy)
  1632. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1633. cpu_to_le16(3264);
  1634. else
  1635. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1636. cpu_to_le16(1504);
  1637. } else {
  1638. for (i = 1; i < 4; i++) {
  1639. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1640. cpu_to_le16(cw_min);
  1641. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1642. cpu_to_le16(cw_max);
  1643. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1644. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1645. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1646. }
  1647. }
  1648. IWL_DEBUG_QOS("set QoS to default \n");
  1649. spin_unlock_irqrestore(&priv->lock, flags);
  1650. }
  1651. static void iwl_activate_qos(struct iwl_priv *priv, u8 force)
  1652. {
  1653. unsigned long flags;
  1654. if (priv == NULL)
  1655. return;
  1656. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1657. return;
  1658. if (!priv->qos_data.qos_enable)
  1659. return;
  1660. spin_lock_irqsave(&priv->lock, flags);
  1661. priv->qos_data.def_qos_parm.qos_flags = 0;
  1662. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1663. !priv->qos_data.qos_cap.q_AP.txop_request)
  1664. priv->qos_data.def_qos_parm.qos_flags |=
  1665. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1666. if (priv->qos_data.qos_active)
  1667. priv->qos_data.def_qos_parm.qos_flags |=
  1668. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1669. spin_unlock_irqrestore(&priv->lock, flags);
  1670. if (force || iwl_is_associated(priv)) {
  1671. IWL_DEBUG_QOS("send QoS cmd with Qos active %d \n",
  1672. priv->qos_data.qos_active);
  1673. iwl_send_qos_params_command(priv,
  1674. &(priv->qos_data.def_qos_parm));
  1675. }
  1676. }
  1677. #endif /* CONFIG_IWLWIFI_QOS */
  1678. /*
  1679. * Power management (not Tx power!) functions
  1680. */
  1681. #define MSEC_TO_USEC 1024
  1682. #define NOSLP __constant_cpu_to_le32(0)
  1683. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK
  1684. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1685. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1686. __constant_cpu_to_le32(X1), \
  1687. __constant_cpu_to_le32(X2), \
  1688. __constant_cpu_to_le32(X3), \
  1689. __constant_cpu_to_le32(X4)}
  1690. /* default power management (not Tx power) table values */
  1691. /* for tim 0-10 */
  1692. static struct iwl_power_vec_entry range_0[IWL_POWER_AC] = {
  1693. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1694. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1695. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1696. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1697. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1698. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1699. };
  1700. /* for tim > 10 */
  1701. static struct iwl_power_vec_entry range_1[IWL_POWER_AC] = {
  1702. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1703. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1704. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1705. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1706. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1707. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1708. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1709. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1710. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1711. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1712. };
  1713. int iwl_power_init_handle(struct iwl_priv *priv)
  1714. {
  1715. int rc = 0, i;
  1716. struct iwl_power_mgr *pow_data;
  1717. int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_AC;
  1718. u16 pci_pm;
  1719. IWL_DEBUG_POWER("Initialize power \n");
  1720. pow_data = &(priv->power_data);
  1721. memset(pow_data, 0, sizeof(*pow_data));
  1722. pow_data->active_index = IWL_POWER_RANGE_0;
  1723. pow_data->dtim_val = 0xffff;
  1724. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1725. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1726. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1727. if (rc != 0)
  1728. return 0;
  1729. else {
  1730. struct iwl_powertable_cmd *cmd;
  1731. IWL_DEBUG_POWER("adjust power command flags\n");
  1732. for (i = 0; i < IWL_POWER_AC; i++) {
  1733. cmd = &pow_data->pwr_range_0[i].cmd;
  1734. if (pci_pm & 0x1)
  1735. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1736. else
  1737. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1738. }
  1739. }
  1740. return rc;
  1741. }
  1742. static int iwl_update_power_cmd(struct iwl_priv *priv,
  1743. struct iwl_powertable_cmd *cmd, u32 mode)
  1744. {
  1745. int rc = 0, i;
  1746. u8 skip;
  1747. u32 max_sleep = 0;
  1748. struct iwl_power_vec_entry *range;
  1749. u8 period = 0;
  1750. struct iwl_power_mgr *pow_data;
  1751. if (mode > IWL_POWER_INDEX_5) {
  1752. IWL_DEBUG_POWER("Error invalid power mode \n");
  1753. return -1;
  1754. }
  1755. pow_data = &(priv->power_data);
  1756. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1757. range = &pow_data->pwr_range_0[0];
  1758. else
  1759. range = &pow_data->pwr_range_1[1];
  1760. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl_powertable_cmd));
  1761. #ifdef IWL_MAC80211_DISABLE
  1762. if (priv->assoc_network != NULL) {
  1763. unsigned long flags;
  1764. period = priv->assoc_network->tim.tim_period;
  1765. }
  1766. #endif /*IWL_MAC80211_DISABLE */
  1767. skip = range[mode].no_dtim;
  1768. if (period == 0) {
  1769. period = 1;
  1770. skip = 0;
  1771. }
  1772. if (skip == 0) {
  1773. max_sleep = period;
  1774. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1775. } else {
  1776. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1777. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1778. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1779. }
  1780. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1781. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1782. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1783. }
  1784. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1785. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1786. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1787. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1788. le32_to_cpu(cmd->sleep_interval[0]),
  1789. le32_to_cpu(cmd->sleep_interval[1]),
  1790. le32_to_cpu(cmd->sleep_interval[2]),
  1791. le32_to_cpu(cmd->sleep_interval[3]),
  1792. le32_to_cpu(cmd->sleep_interval[4]));
  1793. return rc;
  1794. }
  1795. static int iwl_send_power_mode(struct iwl_priv *priv, u32 mode)
  1796. {
  1797. u32 final_mode = mode;
  1798. int rc;
  1799. struct iwl_powertable_cmd cmd;
  1800. /* If on battery, set to 3,
  1801. * if plugged into AC power, set to CAM ("continuosly aware mode"),
  1802. * else user level */
  1803. switch (mode) {
  1804. case IWL_POWER_BATTERY:
  1805. final_mode = IWL_POWER_INDEX_3;
  1806. break;
  1807. case IWL_POWER_AC:
  1808. final_mode = IWL_POWER_MODE_CAM;
  1809. break;
  1810. default:
  1811. final_mode = mode;
  1812. break;
  1813. }
  1814. iwl_update_power_cmd(priv, &cmd, final_mode);
  1815. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1816. if (final_mode == IWL_POWER_MODE_CAM)
  1817. clear_bit(STATUS_POWER_PMI, &priv->status);
  1818. else
  1819. set_bit(STATUS_POWER_PMI, &priv->status);
  1820. return rc;
  1821. }
  1822. int iwl_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1823. {
  1824. /* Filter incoming packets to determine if they are targeted toward
  1825. * this network, discarding packets coming from ourselves */
  1826. switch (priv->iw_mode) {
  1827. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1828. /* packets from our adapter are dropped (echo) */
  1829. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1830. return 0;
  1831. /* {broad,multi}cast packets to our IBSS go through */
  1832. if (is_multicast_ether_addr(header->addr1))
  1833. return !compare_ether_addr(header->addr3, priv->bssid);
  1834. /* packets to our adapter go through */
  1835. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1836. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1837. /* packets from our adapter are dropped (echo) */
  1838. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1839. return 0;
  1840. /* {broad,multi}cast packets to our BSS go through */
  1841. if (is_multicast_ether_addr(header->addr1))
  1842. return !compare_ether_addr(header->addr2, priv->bssid);
  1843. /* packets to our adapter go through */
  1844. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1845. }
  1846. return 1;
  1847. }
  1848. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1849. const char *iwl_get_tx_fail_reason(u32 status)
  1850. {
  1851. switch (status & TX_STATUS_MSK) {
  1852. case TX_STATUS_SUCCESS:
  1853. return "SUCCESS";
  1854. TX_STATUS_ENTRY(SHORT_LIMIT);
  1855. TX_STATUS_ENTRY(LONG_LIMIT);
  1856. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1857. TX_STATUS_ENTRY(MGMNT_ABORT);
  1858. TX_STATUS_ENTRY(NEXT_FRAG);
  1859. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1860. TX_STATUS_ENTRY(DEST_PS);
  1861. TX_STATUS_ENTRY(ABORTED);
  1862. TX_STATUS_ENTRY(BT_RETRY);
  1863. TX_STATUS_ENTRY(STA_INVALID);
  1864. TX_STATUS_ENTRY(FRAG_DROPPED);
  1865. TX_STATUS_ENTRY(TID_DISABLE);
  1866. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1867. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1868. TX_STATUS_ENTRY(TX_LOCKED);
  1869. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1870. }
  1871. return "UNKNOWN";
  1872. }
  1873. /**
  1874. * iwl_scan_cancel - Cancel any currently executing HW scan
  1875. *
  1876. * NOTE: priv->mutex is not required before calling this function
  1877. */
  1878. static int iwl_scan_cancel(struct iwl_priv *priv)
  1879. {
  1880. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1881. clear_bit(STATUS_SCANNING, &priv->status);
  1882. return 0;
  1883. }
  1884. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1885. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1886. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1887. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1888. queue_work(priv->workqueue, &priv->abort_scan);
  1889. } else
  1890. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1891. return test_bit(STATUS_SCANNING, &priv->status);
  1892. }
  1893. return 0;
  1894. }
  1895. /**
  1896. * iwl_scan_cancel_timeout - Cancel any currently executing HW scan
  1897. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1898. *
  1899. * NOTE: priv->mutex must be held before calling this function
  1900. */
  1901. static int iwl_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1902. {
  1903. unsigned long now = jiffies;
  1904. int ret;
  1905. ret = iwl_scan_cancel(priv);
  1906. if (ret && ms) {
  1907. mutex_unlock(&priv->mutex);
  1908. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1909. test_bit(STATUS_SCANNING, &priv->status))
  1910. msleep(1);
  1911. mutex_lock(&priv->mutex);
  1912. return test_bit(STATUS_SCANNING, &priv->status);
  1913. }
  1914. return ret;
  1915. }
  1916. static void iwl_sequence_reset(struct iwl_priv *priv)
  1917. {
  1918. /* Reset ieee stats */
  1919. /* We don't reset the net_device_stats (ieee->stats) on
  1920. * re-association */
  1921. priv->last_seq_num = -1;
  1922. priv->last_frag_num = -1;
  1923. priv->last_packet_time = 0;
  1924. iwl_scan_cancel(priv);
  1925. }
  1926. #define MAX_UCODE_BEACON_INTERVAL 1024
  1927. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1928. static __le16 iwl_adjust_beacon_interval(u16 beacon_val)
  1929. {
  1930. u16 new_val = 0;
  1931. u16 beacon_factor = 0;
  1932. beacon_factor =
  1933. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1934. / MAX_UCODE_BEACON_INTERVAL;
  1935. new_val = beacon_val / beacon_factor;
  1936. return cpu_to_le16(new_val);
  1937. }
  1938. static void iwl_setup_rxon_timing(struct iwl_priv *priv)
  1939. {
  1940. u64 interval_tm_unit;
  1941. u64 tsf, result;
  1942. unsigned long flags;
  1943. struct ieee80211_conf *conf = NULL;
  1944. u16 beacon_int = 0;
  1945. conf = ieee80211_get_hw_conf(priv->hw);
  1946. spin_lock_irqsave(&priv->lock, flags);
  1947. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  1948. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  1949. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1950. tsf = priv->timestamp1;
  1951. tsf = ((tsf << 32) | priv->timestamp0);
  1952. beacon_int = priv->beacon_int;
  1953. spin_unlock_irqrestore(&priv->lock, flags);
  1954. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1955. if (beacon_int == 0) {
  1956. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1957. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1958. } else {
  1959. priv->rxon_timing.beacon_interval =
  1960. cpu_to_le16(beacon_int);
  1961. priv->rxon_timing.beacon_interval =
  1962. iwl_adjust_beacon_interval(
  1963. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1964. }
  1965. priv->rxon_timing.atim_window = 0;
  1966. } else {
  1967. priv->rxon_timing.beacon_interval =
  1968. iwl_adjust_beacon_interval(conf->beacon_int);
  1969. /* TODO: we need to get atim_window from upper stack
  1970. * for now we set to 0 */
  1971. priv->rxon_timing.atim_window = 0;
  1972. }
  1973. interval_tm_unit =
  1974. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1975. result = do_div(tsf, interval_tm_unit);
  1976. priv->rxon_timing.beacon_init_val =
  1977. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1978. IWL_DEBUG_ASSOC
  1979. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1980. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1981. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1982. le16_to_cpu(priv->rxon_timing.atim_window));
  1983. }
  1984. static int iwl_scan_initiate(struct iwl_priv *priv)
  1985. {
  1986. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1987. IWL_ERROR("APs don't scan.\n");
  1988. return 0;
  1989. }
  1990. if (!iwl_is_ready_rf(priv)) {
  1991. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1992. return -EIO;
  1993. }
  1994. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1995. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1996. return -EAGAIN;
  1997. }
  1998. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1999. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2000. "Queuing.\n");
  2001. return -EAGAIN;
  2002. }
  2003. IWL_DEBUG_INFO("Starting scan...\n");
  2004. priv->scan_bands = 2;
  2005. set_bit(STATUS_SCANNING, &priv->status);
  2006. priv->scan_start = jiffies;
  2007. priv->scan_pass_start = priv->scan_start;
  2008. queue_work(priv->workqueue, &priv->request_scan);
  2009. return 0;
  2010. }
  2011. static int iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  2012. {
  2013. struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
  2014. if (hw_decrypt)
  2015. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2016. else
  2017. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2018. return 0;
  2019. }
  2020. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode)
  2021. {
  2022. if (phymode == MODE_IEEE80211A) {
  2023. priv->staging_rxon.flags &=
  2024. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2025. | RXON_FLG_CCK_MSK);
  2026. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2027. } else {
  2028. /* Copied from iwl_bg_post_associate() */
  2029. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2030. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2031. else
  2032. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2033. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2034. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2035. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2036. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2037. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2038. }
  2039. }
  2040. /*
  2041. * initilize rxon structure with default values fromm eeprom
  2042. */
  2043. static void iwl_connection_init_rx_config(struct iwl_priv *priv)
  2044. {
  2045. const struct iwl_channel_info *ch_info;
  2046. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2047. switch (priv->iw_mode) {
  2048. case IEEE80211_IF_TYPE_AP:
  2049. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2050. break;
  2051. case IEEE80211_IF_TYPE_STA:
  2052. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2053. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2054. break;
  2055. case IEEE80211_IF_TYPE_IBSS:
  2056. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2057. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2058. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2059. RXON_FILTER_ACCEPT_GRP_MSK;
  2060. break;
  2061. case IEEE80211_IF_TYPE_MNTR:
  2062. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2063. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2064. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2065. break;
  2066. }
  2067. #if 0
  2068. /* TODO: Figure out when short_preamble would be set and cache from
  2069. * that */
  2070. if (!hw_to_local(priv->hw)->short_preamble)
  2071. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2072. else
  2073. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2074. #endif
  2075. ch_info = iwl_get_channel_info(priv, priv->phymode,
  2076. le16_to_cpu(priv->staging_rxon.channel));
  2077. if (!ch_info)
  2078. ch_info = &priv->channel_info[0];
  2079. /*
  2080. * in some case A channels are all non IBSS
  2081. * in this case force B/G channel
  2082. */
  2083. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2084. !(is_channel_ibss(ch_info)))
  2085. ch_info = &priv->channel_info[0];
  2086. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2087. if (is_channel_a_band(ch_info))
  2088. priv->phymode = MODE_IEEE80211A;
  2089. else
  2090. priv->phymode = MODE_IEEE80211G;
  2091. iwl_set_flags_for_phymode(priv, priv->phymode);
  2092. priv->staging_rxon.ofdm_basic_rates =
  2093. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2094. priv->staging_rxon.cck_basic_rates =
  2095. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2096. }
  2097. static int iwl_set_mode(struct iwl_priv *priv, int mode)
  2098. {
  2099. if (!iwl_is_ready_rf(priv))
  2100. return -EAGAIN;
  2101. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2102. const struct iwl_channel_info *ch_info;
  2103. ch_info = iwl_get_channel_info(priv,
  2104. priv->phymode,
  2105. le16_to_cpu(priv->staging_rxon.channel));
  2106. if (!ch_info || !is_channel_ibss(ch_info)) {
  2107. IWL_ERROR("channel %d not IBSS channel\n",
  2108. le16_to_cpu(priv->staging_rxon.channel));
  2109. return -EINVAL;
  2110. }
  2111. }
  2112. cancel_delayed_work(&priv->scan_check);
  2113. if (iwl_scan_cancel_timeout(priv, 100)) {
  2114. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2115. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2116. return -EAGAIN;
  2117. }
  2118. priv->iw_mode = mode;
  2119. iwl_connection_init_rx_config(priv);
  2120. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2121. iwl_clear_stations_table(priv);
  2122. iwl_commit_rxon(priv);
  2123. return 0;
  2124. }
  2125. static void iwl_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  2126. struct ieee80211_tx_control *ctl,
  2127. struct iwl_cmd *cmd,
  2128. struct sk_buff *skb_frag,
  2129. int last_frag)
  2130. {
  2131. struct iwl_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2132. switch (keyinfo->alg) {
  2133. case ALG_CCMP:
  2134. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2135. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2136. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2137. break;
  2138. case ALG_TKIP:
  2139. #if 0
  2140. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2141. if (last_frag)
  2142. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2143. 8);
  2144. else
  2145. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2146. #endif
  2147. break;
  2148. case ALG_WEP:
  2149. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2150. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2151. if (keyinfo->keylen == 13)
  2152. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2153. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2154. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2155. "with key %d\n", ctl->key_idx);
  2156. break;
  2157. default:
  2158. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2159. break;
  2160. }
  2161. }
  2162. /*
  2163. * handle build REPLY_TX command notification.
  2164. */
  2165. static void iwl_build_tx_cmd_basic(struct iwl_priv *priv,
  2166. struct iwl_cmd *cmd,
  2167. struct ieee80211_tx_control *ctrl,
  2168. struct ieee80211_hdr *hdr,
  2169. int is_unicast, u8 std_id)
  2170. {
  2171. __le16 *qc;
  2172. u16 fc = le16_to_cpu(hdr->frame_control);
  2173. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2174. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2175. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2176. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2177. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2178. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2179. if (ieee80211_is_probe_response(fc) &&
  2180. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2181. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2182. } else {
  2183. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2184. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2185. }
  2186. cmd->cmd.tx.sta_id = std_id;
  2187. if (ieee80211_get_morefrag(hdr))
  2188. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2189. qc = ieee80211_get_qos_ctrl(hdr);
  2190. if (qc) {
  2191. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2192. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2193. } else
  2194. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2195. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2196. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2197. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2198. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2199. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2200. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2201. }
  2202. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2203. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2204. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2205. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2206. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2207. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2208. cmd->cmd.tx.timeout.pm_frame_timeout =
  2209. cpu_to_le16(3);
  2210. else
  2211. cmd->cmd.tx.timeout.pm_frame_timeout =
  2212. cpu_to_le16(2);
  2213. } else
  2214. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2215. cmd->cmd.tx.driver_txop = 0;
  2216. cmd->cmd.tx.tx_flags = tx_flags;
  2217. cmd->cmd.tx.next_frame_len = 0;
  2218. }
  2219. static int iwl_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  2220. {
  2221. int sta_id;
  2222. u16 fc = le16_to_cpu(hdr->frame_control);
  2223. /* If this frame is broadcast or not data then use the broadcast
  2224. * station id */
  2225. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2226. is_multicast_ether_addr(hdr->addr1))
  2227. return priv->hw_setting.bcast_sta_id;
  2228. switch (priv->iw_mode) {
  2229. /* If this frame is part of a BSS network (we're a station), then
  2230. * we use the AP's station id */
  2231. case IEEE80211_IF_TYPE_STA:
  2232. return IWL_AP_ID;
  2233. /* If we are an AP, then find the station, or use BCAST */
  2234. case IEEE80211_IF_TYPE_AP:
  2235. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2236. if (sta_id != IWL_INVALID_STATION)
  2237. return sta_id;
  2238. return priv->hw_setting.bcast_sta_id;
  2239. /* If this frame is part of a IBSS network, then we use the
  2240. * target specific station id */
  2241. case IEEE80211_IF_TYPE_IBSS: {
  2242. DECLARE_MAC_BUF(mac);
  2243. sta_id = iwl_hw_find_station(priv, hdr->addr1);
  2244. if (sta_id != IWL_INVALID_STATION)
  2245. return sta_id;
  2246. sta_id = iwl_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  2247. if (sta_id != IWL_INVALID_STATION)
  2248. return sta_id;
  2249. IWL_DEBUG_DROP("Station %s not in station map. "
  2250. "Defaulting to broadcast...\n",
  2251. print_mac(mac, hdr->addr1));
  2252. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2253. return priv->hw_setting.bcast_sta_id;
  2254. }
  2255. default:
  2256. IWL_WARNING("Unkown mode of operation: %d", priv->iw_mode);
  2257. return priv->hw_setting.bcast_sta_id;
  2258. }
  2259. }
  2260. /*
  2261. * start REPLY_TX command process
  2262. */
  2263. static int iwl_tx_skb(struct iwl_priv *priv,
  2264. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2265. {
  2266. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2267. struct iwl_tfd_frame *tfd;
  2268. u32 *control_flags;
  2269. int txq_id = ctl->queue;
  2270. struct iwl_tx_queue *txq = NULL;
  2271. struct iwl_queue *q = NULL;
  2272. dma_addr_t phys_addr;
  2273. dma_addr_t txcmd_phys;
  2274. struct iwl_cmd *out_cmd = NULL;
  2275. u16 len, idx, len_org;
  2276. u8 id, hdr_len, unicast;
  2277. u8 sta_id;
  2278. u16 seq_number = 0;
  2279. u16 fc;
  2280. __le16 *qc;
  2281. u8 wait_write_ptr = 0;
  2282. unsigned long flags;
  2283. int rc;
  2284. spin_lock_irqsave(&priv->lock, flags);
  2285. if (iwl_is_rfkill(priv)) {
  2286. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2287. goto drop_unlock;
  2288. }
  2289. if (!priv->interface_id) {
  2290. IWL_DEBUG_DROP("Dropping - !priv->interface_id\n");
  2291. goto drop_unlock;
  2292. }
  2293. if ((ctl->tx_rate & 0xFF) == IWL_INVALID_RATE) {
  2294. IWL_ERROR("ERROR: No TX rate available.\n");
  2295. goto drop_unlock;
  2296. }
  2297. unicast = !is_multicast_ether_addr(hdr->addr1);
  2298. id = 0;
  2299. fc = le16_to_cpu(hdr->frame_control);
  2300. #ifdef CONFIG_IWLWIFI_DEBUG
  2301. if (ieee80211_is_auth(fc))
  2302. IWL_DEBUG_TX("Sending AUTH frame\n");
  2303. else if (ieee80211_is_assoc_request(fc))
  2304. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2305. else if (ieee80211_is_reassoc_request(fc))
  2306. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2307. #endif
  2308. if (!iwl_is_associated(priv) &&
  2309. ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA)) {
  2310. IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
  2311. goto drop_unlock;
  2312. }
  2313. spin_unlock_irqrestore(&priv->lock, flags);
  2314. hdr_len = ieee80211_get_hdrlen(fc);
  2315. sta_id = iwl_get_sta_id(priv, hdr);
  2316. if (sta_id == IWL_INVALID_STATION) {
  2317. DECLARE_MAC_BUF(mac);
  2318. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2319. print_mac(mac, hdr->addr1));
  2320. goto drop;
  2321. }
  2322. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2323. qc = ieee80211_get_qos_ctrl(hdr);
  2324. if (qc) {
  2325. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2326. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2327. IEEE80211_SCTL_SEQ;
  2328. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2329. (hdr->seq_ctrl &
  2330. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2331. seq_number += 0x10;
  2332. }
  2333. txq = &priv->txq[txq_id];
  2334. q = &txq->q;
  2335. spin_lock_irqsave(&priv->lock, flags);
  2336. tfd = &txq->bd[q->first_empty];
  2337. memset(tfd, 0, sizeof(*tfd));
  2338. control_flags = (u32 *) tfd;
  2339. idx = get_cmd_index(q, q->first_empty, 0);
  2340. memset(&(txq->txb[q->first_empty]), 0, sizeof(struct iwl_tx_info));
  2341. txq->txb[q->first_empty].skb[0] = skb;
  2342. memcpy(&(txq->txb[q->first_empty].status.control),
  2343. ctl, sizeof(struct ieee80211_tx_control));
  2344. out_cmd = &txq->cmd[idx];
  2345. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2346. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2347. out_cmd->hdr.cmd = REPLY_TX;
  2348. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2349. INDEX_TO_SEQ(q->first_empty)));
  2350. /* copy frags header */
  2351. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2352. /* hdr = (struct ieee80211_hdr *)out_cmd->cmd.tx.hdr; */
  2353. len = priv->hw_setting.tx_cmd_len +
  2354. sizeof(struct iwl_cmd_header) + hdr_len;
  2355. len_org = len;
  2356. len = (len + 3) & ~3;
  2357. if (len_org != len)
  2358. len_org = 1;
  2359. else
  2360. len_org = 0;
  2361. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  2362. offsetof(struct iwl_cmd, hdr);
  2363. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2364. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2365. iwl_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2366. /* 802.11 null functions have no payload... */
  2367. len = skb->len - hdr_len;
  2368. if (len) {
  2369. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2370. len, PCI_DMA_TODEVICE);
  2371. iwl_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2372. }
  2373. /* If there is no payload, then only one TFD is used */
  2374. if (!len)
  2375. *control_flags = TFD_CTL_COUNT_SET(1);
  2376. else
  2377. *control_flags = TFD_CTL_COUNT_SET(2) |
  2378. TFD_CTL_PAD_SET(U32_PAD(len));
  2379. len = (u16)skb->len;
  2380. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2381. /* TODO need this for burst mode later on */
  2382. iwl_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2383. /* set is_hcca to 0; it probably will never be implemented */
  2384. iwl_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2385. out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  2386. out_cmd->cmd.tx.tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  2387. if (!ieee80211_get_morefrag(hdr)) {
  2388. txq->need_update = 1;
  2389. if (qc) {
  2390. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2391. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2392. }
  2393. } else {
  2394. wait_write_ptr = 1;
  2395. txq->need_update = 0;
  2396. }
  2397. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2398. sizeof(out_cmd->cmd.tx));
  2399. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2400. ieee80211_get_hdrlen(fc));
  2401. q->first_empty = iwl_queue_inc_wrap(q->first_empty, q->n_bd);
  2402. rc = iwl_tx_queue_update_write_ptr(priv, txq);
  2403. spin_unlock_irqrestore(&priv->lock, flags);
  2404. if (rc)
  2405. return rc;
  2406. if ((iwl_queue_space(q) < q->high_mark)
  2407. && priv->mac80211_registered) {
  2408. if (wait_write_ptr) {
  2409. spin_lock_irqsave(&priv->lock, flags);
  2410. txq->need_update = 1;
  2411. iwl_tx_queue_update_write_ptr(priv, txq);
  2412. spin_unlock_irqrestore(&priv->lock, flags);
  2413. }
  2414. ieee80211_stop_queue(priv->hw, ctl->queue);
  2415. }
  2416. return 0;
  2417. drop_unlock:
  2418. spin_unlock_irqrestore(&priv->lock, flags);
  2419. drop:
  2420. return -1;
  2421. }
  2422. static void iwl_set_rate(struct iwl_priv *priv)
  2423. {
  2424. const struct ieee80211_hw_mode *hw = NULL;
  2425. struct ieee80211_rate *rate;
  2426. int i;
  2427. hw = iwl_get_hw_mode(priv, priv->phymode);
  2428. priv->active_rate = 0;
  2429. priv->active_rate_basic = 0;
  2430. IWL_DEBUG_RATE("Setting rates for 802.11%c\n",
  2431. hw->mode == MODE_IEEE80211A ?
  2432. 'a' : ((hw->mode == MODE_IEEE80211B) ? 'b' : 'g'));
  2433. for (i = 0; i < hw->num_rates; i++) {
  2434. rate = &(hw->rates[i]);
  2435. if ((rate->val < IWL_RATE_COUNT) &&
  2436. (rate->flags & IEEE80211_RATE_SUPPORTED)) {
  2437. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)%s\n",
  2438. rate->val, iwl_rates[rate->val].plcp,
  2439. (rate->flags & IEEE80211_RATE_BASIC) ?
  2440. "*" : "");
  2441. priv->active_rate |= (1 << rate->val);
  2442. if (rate->flags & IEEE80211_RATE_BASIC)
  2443. priv->active_rate_basic |= (1 << rate->val);
  2444. } else
  2445. IWL_DEBUG_RATE("Not adding rate %d (plcp %d)\n",
  2446. rate->val, iwl_rates[rate->val].plcp);
  2447. }
  2448. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2449. priv->active_rate, priv->active_rate_basic);
  2450. /*
  2451. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2452. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2453. * OFDM
  2454. */
  2455. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2456. priv->staging_rxon.cck_basic_rates =
  2457. ((priv->active_rate_basic &
  2458. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2459. else
  2460. priv->staging_rxon.cck_basic_rates =
  2461. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2462. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2463. priv->staging_rxon.ofdm_basic_rates =
  2464. ((priv->active_rate_basic &
  2465. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2466. IWL_FIRST_OFDM_RATE) & 0xFF;
  2467. else
  2468. priv->staging_rxon.ofdm_basic_rates =
  2469. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2470. }
  2471. static void iwl_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2472. {
  2473. unsigned long flags;
  2474. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2475. return;
  2476. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2477. disable_radio ? "OFF" : "ON");
  2478. if (disable_radio) {
  2479. iwl_scan_cancel(priv);
  2480. /* FIXME: This is a workaround for AP */
  2481. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2482. spin_lock_irqsave(&priv->lock, flags);
  2483. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2484. CSR_UCODE_SW_BIT_RFKILL);
  2485. spin_unlock_irqrestore(&priv->lock, flags);
  2486. iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2487. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2488. }
  2489. return;
  2490. }
  2491. spin_lock_irqsave(&priv->lock, flags);
  2492. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2493. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2494. spin_unlock_irqrestore(&priv->lock, flags);
  2495. /* wake up ucode */
  2496. msleep(10);
  2497. spin_lock_irqsave(&priv->lock, flags);
  2498. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2499. if (!iwl_grab_restricted_access(priv))
  2500. iwl_release_restricted_access(priv);
  2501. spin_unlock_irqrestore(&priv->lock, flags);
  2502. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2503. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2504. "disabled by HW switch\n");
  2505. return;
  2506. }
  2507. queue_work(priv->workqueue, &priv->restart);
  2508. return;
  2509. }
  2510. void iwl_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2511. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2512. {
  2513. u16 fc =
  2514. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2515. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2516. return;
  2517. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2518. return;
  2519. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2520. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2521. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2522. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2523. RX_RES_STATUS_BAD_ICV_MIC)
  2524. stats->flag |= RX_FLAG_MMIC_ERROR;
  2525. case RX_RES_STATUS_SEC_TYPE_WEP:
  2526. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2527. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2528. RX_RES_STATUS_DECRYPT_OK) {
  2529. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2530. stats->flag |= RX_FLAG_DECRYPTED;
  2531. }
  2532. break;
  2533. default:
  2534. break;
  2535. }
  2536. }
  2537. void iwl_handle_data_packet_monitor(struct iwl_priv *priv,
  2538. struct iwl_rx_mem_buffer *rxb,
  2539. void *data, short len,
  2540. struct ieee80211_rx_status *stats,
  2541. u16 phy_flags)
  2542. {
  2543. struct iwl_rt_rx_hdr *iwl_rt;
  2544. /* First cache any information we need before we overwrite
  2545. * the information provided in the skb from the hardware */
  2546. s8 signal = stats->ssi;
  2547. s8 noise = 0;
  2548. int rate = stats->rate;
  2549. u64 tsf = stats->mactime;
  2550. __le16 phy_flags_hw = cpu_to_le16(phy_flags);
  2551. /* We received data from the HW, so stop the watchdog */
  2552. if (len > IWL_RX_BUF_SIZE - sizeof(*iwl_rt)) {
  2553. IWL_DEBUG_DROP("Dropping too large packet in monitor\n");
  2554. return;
  2555. }
  2556. /* copy the frame data to write after where the radiotap header goes */
  2557. iwl_rt = (void *)rxb->skb->data;
  2558. memmove(iwl_rt->payload, data, len);
  2559. iwl_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  2560. iwl_rt->rt_hdr.it_pad = 0; /* always good to zero */
  2561. /* total header + data */
  2562. iwl_rt->rt_hdr.it_len = cpu_to_le16(sizeof(*iwl_rt));
  2563. /* Set the size of the skb to the size of the frame */
  2564. skb_put(rxb->skb, sizeof(*iwl_rt) + len);
  2565. /* Big bitfield of all the fields we provide in radiotap */
  2566. iwl_rt->rt_hdr.it_present =
  2567. cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  2568. (1 << IEEE80211_RADIOTAP_FLAGS) |
  2569. (1 << IEEE80211_RADIOTAP_RATE) |
  2570. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  2571. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  2572. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  2573. (1 << IEEE80211_RADIOTAP_ANTENNA));
  2574. /* Zero the flags, we'll add to them as we go */
  2575. iwl_rt->rt_flags = 0;
  2576. iwl_rt->rt_tsf = cpu_to_le64(tsf);
  2577. /* Convert to dBm */
  2578. iwl_rt->rt_dbmsignal = signal;
  2579. iwl_rt->rt_dbmnoise = noise;
  2580. /* Convert the channel frequency and set the flags */
  2581. iwl_rt->rt_channelMHz = cpu_to_le16(stats->freq);
  2582. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  2583. iwl_rt->rt_chbitmask =
  2584. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_5GHZ));
  2585. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  2586. iwl_rt->rt_chbitmask =
  2587. cpu_to_le16((IEEE80211_CHAN_CCK | IEEE80211_CHAN_2GHZ));
  2588. else /* 802.11g */
  2589. iwl_rt->rt_chbitmask =
  2590. cpu_to_le16((IEEE80211_CHAN_OFDM | IEEE80211_CHAN_2GHZ));
  2591. rate = iwl_rate_index_from_plcp(rate);
  2592. if (rate == -1)
  2593. iwl_rt->rt_rate = 0;
  2594. else
  2595. iwl_rt->rt_rate = iwl_rates[rate].ieee;
  2596. /* antenna number */
  2597. iwl_rt->rt_antenna =
  2598. le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
  2599. /* set the preamble flag if we have it */
  2600. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  2601. iwl_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  2602. IWL_DEBUG_RX("Rx packet of %d bytes.\n", rxb->skb->len);
  2603. stats->flag |= RX_FLAG_RADIOTAP;
  2604. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2605. rxb->skb = NULL;
  2606. }
  2607. #define IWL_PACKET_RETRY_TIME HZ
  2608. int is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2609. {
  2610. u16 sc = le16_to_cpu(header->seq_ctrl);
  2611. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2612. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2613. u16 *last_seq, *last_frag;
  2614. unsigned long *last_time;
  2615. switch (priv->iw_mode) {
  2616. case IEEE80211_IF_TYPE_IBSS:{
  2617. struct list_head *p;
  2618. struct iwl_ibss_seq *entry = NULL;
  2619. u8 *mac = header->addr2;
  2620. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2621. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2622. entry =
  2623. list_entry(p, struct iwl_ibss_seq, list);
  2624. if (!compare_ether_addr(entry->mac, mac))
  2625. break;
  2626. }
  2627. if (p == &priv->ibss_mac_hash[index]) {
  2628. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2629. if (!entry) {
  2630. IWL_ERROR
  2631. ("Cannot malloc new mac entry\n");
  2632. return 0;
  2633. }
  2634. memcpy(entry->mac, mac, ETH_ALEN);
  2635. entry->seq_num = seq;
  2636. entry->frag_num = frag;
  2637. entry->packet_time = jiffies;
  2638. list_add(&entry->list,
  2639. &priv->ibss_mac_hash[index]);
  2640. return 0;
  2641. }
  2642. last_seq = &entry->seq_num;
  2643. last_frag = &entry->frag_num;
  2644. last_time = &entry->packet_time;
  2645. break;
  2646. }
  2647. case IEEE80211_IF_TYPE_STA:
  2648. last_seq = &priv->last_seq_num;
  2649. last_frag = &priv->last_frag_num;
  2650. last_time = &priv->last_packet_time;
  2651. break;
  2652. default:
  2653. return 0;
  2654. }
  2655. if ((*last_seq == seq) &&
  2656. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2657. if (*last_frag == frag)
  2658. goto drop;
  2659. if (*last_frag + 1 != frag)
  2660. /* out-of-order fragment */
  2661. goto drop;
  2662. } else
  2663. *last_seq = seq;
  2664. *last_frag = frag;
  2665. *last_time = jiffies;
  2666. return 0;
  2667. drop:
  2668. return 1;
  2669. }
  2670. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  2671. #include "iwl-spectrum.h"
  2672. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2673. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2674. #define TIME_UNIT 1024
  2675. /*
  2676. * extended beacon time format
  2677. * time in usec will be changed into a 32-bit value in 8:24 format
  2678. * the high 1 byte is the beacon counts
  2679. * the lower 3 bytes is the time in usec within one beacon interval
  2680. */
  2681. static u32 iwl_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2682. {
  2683. u32 quot;
  2684. u32 rem;
  2685. u32 interval = beacon_interval * 1024;
  2686. if (!interval || !usec)
  2687. return 0;
  2688. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2689. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2690. return (quot << 24) + rem;
  2691. }
  2692. /* base is usually what we get from ucode with each received frame,
  2693. * the same as HW timer counter counting down
  2694. */
  2695. static __le32 iwl_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2696. {
  2697. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2698. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2699. u32 interval = beacon_interval * TIME_UNIT;
  2700. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2701. (addon & BEACON_TIME_MASK_HIGH);
  2702. if (base_low > addon_low)
  2703. res += base_low - addon_low;
  2704. else if (base_low < addon_low) {
  2705. res += interval + base_low - addon_low;
  2706. res += (1 << 24);
  2707. } else
  2708. res += (1 << 24);
  2709. return cpu_to_le32(res);
  2710. }
  2711. static int iwl_get_measurement(struct iwl_priv *priv,
  2712. struct ieee80211_measurement_params *params,
  2713. u8 type)
  2714. {
  2715. struct iwl_spectrum_cmd spectrum;
  2716. struct iwl_rx_packet *res;
  2717. struct iwl_host_cmd cmd = {
  2718. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2719. .data = (void *)&spectrum,
  2720. .meta.flags = CMD_WANT_SKB,
  2721. };
  2722. u32 add_time = le64_to_cpu(params->start_time);
  2723. int rc;
  2724. int spectrum_resp_status;
  2725. int duration = le16_to_cpu(params->duration);
  2726. if (iwl_is_associated(priv))
  2727. add_time =
  2728. iwl_usecs_to_beacons(
  2729. le64_to_cpu(params->start_time) - priv->last_tsf,
  2730. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2731. memset(&spectrum, 0, sizeof(spectrum));
  2732. spectrum.channel_count = cpu_to_le16(1);
  2733. spectrum.flags =
  2734. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2735. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2736. cmd.len = sizeof(spectrum);
  2737. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2738. if (iwl_is_associated(priv))
  2739. spectrum.start_time =
  2740. iwl_add_beacon_time(priv->last_beacon_time,
  2741. add_time,
  2742. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2743. else
  2744. spectrum.start_time = 0;
  2745. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2746. spectrum.channels[0].channel = params->channel;
  2747. spectrum.channels[0].type = type;
  2748. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2749. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2750. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2751. rc = iwl_send_cmd_sync(priv, &cmd);
  2752. if (rc)
  2753. return rc;
  2754. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  2755. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2756. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2757. rc = -EIO;
  2758. }
  2759. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2760. switch (spectrum_resp_status) {
  2761. case 0: /* Command will be handled */
  2762. if (res->u.spectrum.id != 0xff) {
  2763. IWL_DEBUG_INFO
  2764. ("Replaced existing measurement: %d\n",
  2765. res->u.spectrum.id);
  2766. priv->measurement_status &= ~MEASUREMENT_READY;
  2767. }
  2768. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2769. rc = 0;
  2770. break;
  2771. case 1: /* Command will not be handled */
  2772. rc = -EAGAIN;
  2773. break;
  2774. }
  2775. dev_kfree_skb_any(cmd.meta.u.skb);
  2776. return rc;
  2777. }
  2778. #endif
  2779. static void iwl_txstatus_to_ieee(struct iwl_priv *priv,
  2780. struct iwl_tx_info *tx_sta)
  2781. {
  2782. tx_sta->status.ack_signal = 0;
  2783. tx_sta->status.excessive_retries = 0;
  2784. tx_sta->status.queue_length = 0;
  2785. tx_sta->status.queue_number = 0;
  2786. if (in_interrupt())
  2787. ieee80211_tx_status_irqsafe(priv->hw,
  2788. tx_sta->skb[0], &(tx_sta->status));
  2789. else
  2790. ieee80211_tx_status(priv->hw,
  2791. tx_sta->skb[0], &(tx_sta->status));
  2792. tx_sta->skb[0] = NULL;
  2793. }
  2794. /**
  2795. * iwl_tx_queue_reclaim - Reclaim Tx queue entries no more used by NIC.
  2796. *
  2797. * When FW advances 'R' index, all entries between old and
  2798. * new 'R' index need to be reclaimed. As result, some free space
  2799. * forms. If there is enough free space (> low mark), wake Tx queue.
  2800. */
  2801. int iwl_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2802. {
  2803. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2804. struct iwl_queue *q = &txq->q;
  2805. int nfreed = 0;
  2806. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2807. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2808. "is out of range [0-%d] %d %d.\n", txq_id,
  2809. index, q->n_bd, q->first_empty, q->last_used);
  2810. return 0;
  2811. }
  2812. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2813. q->last_used != index;
  2814. q->last_used = iwl_queue_inc_wrap(q->last_used, q->n_bd)) {
  2815. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2816. iwl_txstatus_to_ieee(priv,
  2817. &(txq->txb[txq->q.last_used]));
  2818. iwl_hw_txq_free_tfd(priv, txq);
  2819. } else if (nfreed > 1) {
  2820. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2821. q->first_empty, q->last_used);
  2822. queue_work(priv->workqueue, &priv->restart);
  2823. }
  2824. nfreed++;
  2825. }
  2826. if (iwl_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2827. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2828. priv->mac80211_registered)
  2829. ieee80211_wake_queue(priv->hw, txq_id);
  2830. return nfreed;
  2831. }
  2832. static int iwl_is_tx_success(u32 status)
  2833. {
  2834. return (status & 0xFF) == 0x1;
  2835. }
  2836. /******************************************************************************
  2837. *
  2838. * Generic RX handler implementations
  2839. *
  2840. ******************************************************************************/
  2841. static void iwl_rx_reply_tx(struct iwl_priv *priv,
  2842. struct iwl_rx_mem_buffer *rxb)
  2843. {
  2844. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2845. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2846. int txq_id = SEQ_TO_QUEUE(sequence);
  2847. int index = SEQ_TO_INDEX(sequence);
  2848. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2849. struct ieee80211_tx_status *tx_status;
  2850. struct iwl_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2851. u32 status = le32_to_cpu(tx_resp->status);
  2852. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2853. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2854. "is out of range [0-%d] %d %d\n", txq_id,
  2855. index, txq->q.n_bd, txq->q.first_empty,
  2856. txq->q.last_used);
  2857. return;
  2858. }
  2859. tx_status = &(txq->txb[txq->q.last_used].status);
  2860. tx_status->retry_count = tx_resp->failure_frame;
  2861. tx_status->queue_number = status;
  2862. tx_status->queue_length = tx_resp->bt_kill_count;
  2863. tx_status->queue_length |= tx_resp->failure_rts;
  2864. tx_status->flags =
  2865. iwl_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2866. tx_status->control.tx_rate = iwl_rate_index_from_plcp(tx_resp->rate);
  2867. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) plcp rate %d retries %d\n",
  2868. txq_id, iwl_get_tx_fail_reason(status), status,
  2869. tx_resp->rate, tx_resp->failure_frame);
  2870. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2871. if (index != -1)
  2872. iwl_tx_queue_reclaim(priv, txq_id, index);
  2873. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2874. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2875. }
  2876. static void iwl_rx_reply_alive(struct iwl_priv *priv,
  2877. struct iwl_rx_mem_buffer *rxb)
  2878. {
  2879. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2880. struct iwl_alive_resp *palive;
  2881. struct delayed_work *pwork;
  2882. palive = &pkt->u.alive_frame;
  2883. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2884. "0x%01X 0x%01X\n",
  2885. palive->is_valid, palive->ver_type,
  2886. palive->ver_subtype);
  2887. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2888. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2889. memcpy(&priv->card_alive_init,
  2890. &pkt->u.alive_frame,
  2891. sizeof(struct iwl_init_alive_resp));
  2892. pwork = &priv->init_alive_start;
  2893. } else {
  2894. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2895. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2896. sizeof(struct iwl_alive_resp));
  2897. pwork = &priv->alive_start;
  2898. iwl_disable_events(priv);
  2899. }
  2900. /* We delay the ALIVE response by 5ms to
  2901. * give the HW RF Kill time to activate... */
  2902. if (palive->is_valid == UCODE_VALID_OK)
  2903. queue_delayed_work(priv->workqueue, pwork,
  2904. msecs_to_jiffies(5));
  2905. else
  2906. IWL_WARNING("uCode did not respond OK.\n");
  2907. }
  2908. static void iwl_rx_reply_add_sta(struct iwl_priv *priv,
  2909. struct iwl_rx_mem_buffer *rxb)
  2910. {
  2911. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2912. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2913. return;
  2914. }
  2915. static void iwl_rx_reply_error(struct iwl_priv *priv,
  2916. struct iwl_rx_mem_buffer *rxb)
  2917. {
  2918. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2919. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2920. "seq 0x%04X ser 0x%08X\n",
  2921. le32_to_cpu(pkt->u.err_resp.error_type),
  2922. get_cmd_string(pkt->u.err_resp.cmd_id),
  2923. pkt->u.err_resp.cmd_id,
  2924. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2925. le32_to_cpu(pkt->u.err_resp.error_info));
  2926. }
  2927. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2928. static void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  2929. {
  2930. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2931. struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2932. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  2933. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2934. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2935. rxon->channel = csa->channel;
  2936. priv->staging_rxon.channel = csa->channel;
  2937. }
  2938. static void iwl_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2939. struct iwl_rx_mem_buffer *rxb)
  2940. {
  2941. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  2942. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2943. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2944. if (!report->state) {
  2945. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2946. "Spectrum Measure Notification: Start\n");
  2947. return;
  2948. }
  2949. memcpy(&priv->measure_report, report, sizeof(*report));
  2950. priv->measurement_status |= MEASUREMENT_READY;
  2951. #endif
  2952. }
  2953. static void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  2954. struct iwl_rx_mem_buffer *rxb)
  2955. {
  2956. #ifdef CONFIG_IWLWIFI_DEBUG
  2957. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2958. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2959. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2960. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2961. #endif
  2962. }
  2963. static void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2964. struct iwl_rx_mem_buffer *rxb)
  2965. {
  2966. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2967. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2968. "notification for %s:\n",
  2969. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2970. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  2971. }
  2972. static void iwl_bg_beacon_update(struct work_struct *work)
  2973. {
  2974. struct iwl_priv *priv =
  2975. container_of(work, struct iwl_priv, beacon_update);
  2976. struct sk_buff *beacon;
  2977. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2978. beacon = ieee80211_beacon_get(priv->hw, priv->interface_id, NULL);
  2979. if (!beacon) {
  2980. IWL_ERROR("update beacon failed\n");
  2981. return;
  2982. }
  2983. mutex_lock(&priv->mutex);
  2984. /* new beacon skb is allocated every time; dispose previous.*/
  2985. if (priv->ibss_beacon)
  2986. dev_kfree_skb(priv->ibss_beacon);
  2987. priv->ibss_beacon = beacon;
  2988. mutex_unlock(&priv->mutex);
  2989. iwl_send_beacon_cmd(priv);
  2990. }
  2991. static void iwl_rx_beacon_notif(struct iwl_priv *priv,
  2992. struct iwl_rx_mem_buffer *rxb)
  2993. {
  2994. #ifdef CONFIG_IWLWIFI_DEBUG
  2995. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2996. struct iwl_beacon_notif *beacon = &(pkt->u.beacon_status);
  2997. u8 rate = beacon->beacon_notify_hdr.rate;
  2998. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  2999. "tsf %d %d rate %d\n",
  3000. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3001. beacon->beacon_notify_hdr.failure_frame,
  3002. le32_to_cpu(beacon->ibss_mgr_status),
  3003. le32_to_cpu(beacon->high_tsf),
  3004. le32_to_cpu(beacon->low_tsf), rate);
  3005. #endif
  3006. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3007. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3008. queue_work(priv->workqueue, &priv->beacon_update);
  3009. }
  3010. /* Service response to REPLY_SCAN_CMD (0x80) */
  3011. static void iwl_rx_reply_scan(struct iwl_priv *priv,
  3012. struct iwl_rx_mem_buffer *rxb)
  3013. {
  3014. #ifdef CONFIG_IWLWIFI_DEBUG
  3015. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3016. struct iwl_scanreq_notification *notif =
  3017. (struct iwl_scanreq_notification *)pkt->u.raw;
  3018. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3019. #endif
  3020. }
  3021. /* Service SCAN_START_NOTIFICATION (0x82) */
  3022. static void iwl_rx_scan_start_notif(struct iwl_priv *priv,
  3023. struct iwl_rx_mem_buffer *rxb)
  3024. {
  3025. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3026. struct iwl_scanstart_notification *notif =
  3027. (struct iwl_scanstart_notification *)pkt->u.raw;
  3028. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3029. IWL_DEBUG_SCAN("Scan start: "
  3030. "%d [802.11%s] "
  3031. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3032. notif->channel,
  3033. notif->band ? "bg" : "a",
  3034. notif->tsf_high,
  3035. notif->tsf_low, notif->status, notif->beacon_timer);
  3036. }
  3037. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3038. static void iwl_rx_scan_results_notif(struct iwl_priv *priv,
  3039. struct iwl_rx_mem_buffer *rxb)
  3040. {
  3041. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3042. struct iwl_scanresults_notification *notif =
  3043. (struct iwl_scanresults_notification *)pkt->u.raw;
  3044. IWL_DEBUG_SCAN("Scan ch.res: "
  3045. "%d [802.11%s] "
  3046. "(TSF: 0x%08X:%08X) - %d "
  3047. "elapsed=%lu usec (%dms since last)\n",
  3048. notif->channel,
  3049. notif->band ? "bg" : "a",
  3050. le32_to_cpu(notif->tsf_high),
  3051. le32_to_cpu(notif->tsf_low),
  3052. le32_to_cpu(notif->statistics[0]),
  3053. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3054. jiffies_to_msecs(elapsed_jiffies
  3055. (priv->last_scan_jiffies, jiffies)));
  3056. priv->last_scan_jiffies = jiffies;
  3057. }
  3058. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3059. static void iwl_rx_scan_complete_notif(struct iwl_priv *priv,
  3060. struct iwl_rx_mem_buffer *rxb)
  3061. {
  3062. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3063. struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3064. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3065. scan_notif->scanned_channels,
  3066. scan_notif->tsf_low,
  3067. scan_notif->tsf_high, scan_notif->status);
  3068. /* The HW is no longer scanning */
  3069. clear_bit(STATUS_SCAN_HW, &priv->status);
  3070. /* The scan completion notification came in, so kill that timer... */
  3071. cancel_delayed_work(&priv->scan_check);
  3072. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3073. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3074. jiffies_to_msecs(elapsed_jiffies
  3075. (priv->scan_pass_start, jiffies)));
  3076. /* Remove this scanned band from the list
  3077. * of pending bands to scan */
  3078. priv->scan_bands--;
  3079. /* If a request to abort was given, or the scan did not succeed
  3080. * then we reset the scan state machine and terminate,
  3081. * re-queuing another scan if one has been requested */
  3082. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3083. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3084. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3085. } else {
  3086. /* If there are more bands on this scan pass reschedule */
  3087. if (priv->scan_bands > 0)
  3088. goto reschedule;
  3089. }
  3090. priv->last_scan_jiffies = jiffies;
  3091. IWL_DEBUG_INFO("Setting scan to off\n");
  3092. clear_bit(STATUS_SCANNING, &priv->status);
  3093. IWL_DEBUG_INFO("Scan took %dms\n",
  3094. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3095. queue_work(priv->workqueue, &priv->scan_completed);
  3096. return;
  3097. reschedule:
  3098. priv->scan_pass_start = jiffies;
  3099. queue_work(priv->workqueue, &priv->request_scan);
  3100. }
  3101. /* Handle notification from uCode that card's power state is changing
  3102. * due to software, hardware, or critical temperature RFKILL */
  3103. static void iwl_rx_card_state_notif(struct iwl_priv *priv,
  3104. struct iwl_rx_mem_buffer *rxb)
  3105. {
  3106. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  3107. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3108. unsigned long status = priv->status;
  3109. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3110. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3111. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3112. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3113. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3114. if (flags & HW_CARD_DISABLED)
  3115. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3116. else
  3117. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3118. if (flags & SW_CARD_DISABLED)
  3119. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3120. else
  3121. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3122. iwl_scan_cancel(priv);
  3123. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3124. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3125. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3126. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3127. queue_work(priv->workqueue, &priv->rf_kill);
  3128. else
  3129. wake_up_interruptible(&priv->wait_command_queue);
  3130. }
  3131. /**
  3132. * iwl_setup_rx_handlers - Initialize Rx handler callbacks
  3133. *
  3134. * Setup the RX handlers for each of the reply types sent from the uCode
  3135. * to the host.
  3136. *
  3137. * This function chains into the hardware specific files for them to setup
  3138. * any hardware specific handlers as well.
  3139. */
  3140. static void iwl_setup_rx_handlers(struct iwl_priv *priv)
  3141. {
  3142. priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
  3143. priv->rx_handlers[REPLY_ADD_STA] = iwl_rx_reply_add_sta;
  3144. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  3145. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  3146. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3147. iwl_rx_spectrum_measure_notif;
  3148. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  3149. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3150. iwl_rx_pm_debug_statistics_notif;
  3151. priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
  3152. /* NOTE: iwl_rx_statistics is different based on whether
  3153. * the build is for the 3945 or the 4965. See the
  3154. * corresponding implementation in iwl-XXXX.c
  3155. *
  3156. * The same handler is used for both the REPLY to a
  3157. * discrete statistics request from the host as well as
  3158. * for the periodic statistics notification from the uCode
  3159. */
  3160. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_hw_rx_statistics;
  3161. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_hw_rx_statistics;
  3162. priv->rx_handlers[REPLY_SCAN_CMD] = iwl_rx_reply_scan;
  3163. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl_rx_scan_start_notif;
  3164. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3165. iwl_rx_scan_results_notif;
  3166. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3167. iwl_rx_scan_complete_notif;
  3168. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
  3169. priv->rx_handlers[REPLY_TX] = iwl_rx_reply_tx;
  3170. /* Setup hardware specific Rx handlers */
  3171. iwl_hw_rx_handler_setup(priv);
  3172. }
  3173. /**
  3174. * iwl_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3175. * @rxb: Rx buffer to reclaim
  3176. *
  3177. * If an Rx buffer has an async callback associated with it the callback
  3178. * will be executed. The attached skb (if present) will only be freed
  3179. * if the callback returns 1
  3180. */
  3181. static void iwl_tx_cmd_complete(struct iwl_priv *priv,
  3182. struct iwl_rx_mem_buffer *rxb)
  3183. {
  3184. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3185. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3186. int txq_id = SEQ_TO_QUEUE(sequence);
  3187. int index = SEQ_TO_INDEX(sequence);
  3188. int huge = sequence & SEQ_HUGE_FRAME;
  3189. int cmd_index;
  3190. struct iwl_cmd *cmd;
  3191. /* If a Tx command is being handled and it isn't in the actual
  3192. * command queue then there a command routing bug has been introduced
  3193. * in the queue management code. */
  3194. if (txq_id != IWL_CMD_QUEUE_NUM)
  3195. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3196. txq_id, pkt->hdr.cmd);
  3197. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3198. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3199. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3200. /* Input error checking is done when commands are added to queue. */
  3201. if (cmd->meta.flags & CMD_WANT_SKB) {
  3202. cmd->meta.source->u.skb = rxb->skb;
  3203. rxb->skb = NULL;
  3204. } else if (cmd->meta.u.callback &&
  3205. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3206. rxb->skb = NULL;
  3207. iwl_tx_queue_reclaim(priv, txq_id, index);
  3208. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3209. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3210. wake_up_interruptible(&priv->wait_command_queue);
  3211. }
  3212. }
  3213. /************************** RX-FUNCTIONS ****************************/
  3214. /*
  3215. * Rx theory of operation
  3216. *
  3217. * The host allocates 32 DMA target addresses and passes the host address
  3218. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  3219. * 0 to 31
  3220. *
  3221. * Rx Queue Indexes
  3222. * The host/firmware share two index registers for managing the Rx buffers.
  3223. *
  3224. * The READ index maps to the first position that the firmware may be writing
  3225. * to -- the driver can read up to (but not including) this position and get
  3226. * good data.
  3227. * The READ index is managed by the firmware once the card is enabled.
  3228. *
  3229. * The WRITE index maps to the last position the driver has read from -- the
  3230. * position preceding WRITE is the last slot the firmware can place a packet.
  3231. *
  3232. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3233. * WRITE = READ.
  3234. *
  3235. * During initialization the host sets up the READ queue position to the first
  3236. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3237. *
  3238. * When the firmware places a packet in a buffer it will advance the READ index
  3239. * and fire the RX interrupt. The driver can then query the READ index and
  3240. * process as many packets as possible, moving the WRITE index forward as it
  3241. * resets the Rx queue buffers with new memory.
  3242. *
  3243. * The management in the driver is as follows:
  3244. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3245. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3246. * to replensish the iwl->rxq->rx_free.
  3247. * + In iwl_rx_replenish (scheduled) if 'processed' != 'read' then the
  3248. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3249. * 'processed' and 'read' driver indexes as well)
  3250. * + A received packet is processed and handed to the kernel network stack,
  3251. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3252. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3253. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3254. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3255. * were enough free buffers and RX_STALLED is set it is cleared.
  3256. *
  3257. *
  3258. * Driver sequence:
  3259. *
  3260. * iwl_rx_queue_alloc() Allocates rx_free
  3261. * iwl_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3262. * iwl_rx_queue_restock
  3263. * iwl_rx_queue_restock() Moves available buffers from rx_free into Rx
  3264. * queue, updates firmware pointers, and updates
  3265. * the WRITE index. If insufficient rx_free buffers
  3266. * are available, schedules iwl_rx_replenish
  3267. *
  3268. * -- enable interrupts --
  3269. * ISR - iwl_rx() Detach iwl_rx_mem_buffers from pool up to the
  3270. * READ INDEX, detaching the SKB from the pool.
  3271. * Moves the packet buffer from queue to rx_used.
  3272. * Calls iwl_rx_queue_restock to refill any empty
  3273. * slots.
  3274. * ...
  3275. *
  3276. */
  3277. /**
  3278. * iwl_rx_queue_space - Return number of free slots available in queue.
  3279. */
  3280. static int iwl_rx_queue_space(const struct iwl_rx_queue *q)
  3281. {
  3282. int s = q->read - q->write;
  3283. if (s <= 0)
  3284. s += RX_QUEUE_SIZE;
  3285. /* keep some buffer to not confuse full and empty queue */
  3286. s -= 2;
  3287. if (s < 0)
  3288. s = 0;
  3289. return s;
  3290. }
  3291. /**
  3292. * iwl_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3293. *
  3294. * NOTE: This function has 3945 and 4965 specific code sections
  3295. * but is declared in base due to the majority of the
  3296. * implementation being the same (only a numeric constant is
  3297. * different)
  3298. *
  3299. */
  3300. int iwl_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl_rx_queue *q)
  3301. {
  3302. u32 reg = 0;
  3303. int rc = 0;
  3304. unsigned long flags;
  3305. spin_lock_irqsave(&q->lock, flags);
  3306. if (q->need_update == 0)
  3307. goto exit_unlock;
  3308. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3309. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3310. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3311. iwl_set_bit(priv, CSR_GP_CNTRL,
  3312. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3313. goto exit_unlock;
  3314. }
  3315. rc = iwl_grab_restricted_access(priv);
  3316. if (rc)
  3317. goto exit_unlock;
  3318. iwl_write_restricted(priv, FH_RSCSR_CHNL0_WPTR,
  3319. q->write & ~0x7);
  3320. iwl_release_restricted_access(priv);
  3321. } else
  3322. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3323. q->need_update = 0;
  3324. exit_unlock:
  3325. spin_unlock_irqrestore(&q->lock, flags);
  3326. return rc;
  3327. }
  3328. /**
  3329. * iwl_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer pointer.
  3330. *
  3331. * NOTE: This function has 3945 and 4965 specific code paths in it.
  3332. */
  3333. static inline __le32 iwl_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3334. dma_addr_t dma_addr)
  3335. {
  3336. return cpu_to_le32((u32)dma_addr);
  3337. }
  3338. /**
  3339. * iwl_rx_queue_restock - refill RX queue from pre-allocated pool
  3340. *
  3341. * If there are slots in the RX queue that need to be restocked,
  3342. * and we have free pre-allocated buffers, fill the ranks as much
  3343. * as we can pulling from rx_free.
  3344. *
  3345. * This moves the 'write' index forward to catch up with 'processed', and
  3346. * also updates the memory address in the firmware to reference the new
  3347. * target buffer.
  3348. */
  3349. int iwl_rx_queue_restock(struct iwl_priv *priv)
  3350. {
  3351. struct iwl_rx_queue *rxq = &priv->rxq;
  3352. struct list_head *element;
  3353. struct iwl_rx_mem_buffer *rxb;
  3354. unsigned long flags;
  3355. int write, rc;
  3356. spin_lock_irqsave(&rxq->lock, flags);
  3357. write = rxq->write & ~0x7;
  3358. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3359. element = rxq->rx_free.next;
  3360. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3361. list_del(element);
  3362. rxq->bd[rxq->write] = iwl_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3363. rxq->queue[rxq->write] = rxb;
  3364. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3365. rxq->free_count--;
  3366. }
  3367. spin_unlock_irqrestore(&rxq->lock, flags);
  3368. /* If the pre-allocated buffer pool is dropping low, schedule to
  3369. * refill it */
  3370. if (rxq->free_count <= RX_LOW_WATERMARK)
  3371. queue_work(priv->workqueue, &priv->rx_replenish);
  3372. /* If we've added more space for the firmware to place data, tell it */
  3373. if ((write != (rxq->write & ~0x7))
  3374. || (abs(rxq->write - rxq->read) > 7)) {
  3375. spin_lock_irqsave(&rxq->lock, flags);
  3376. rxq->need_update = 1;
  3377. spin_unlock_irqrestore(&rxq->lock, flags);
  3378. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  3379. if (rc)
  3380. return rc;
  3381. }
  3382. return 0;
  3383. }
  3384. /**
  3385. * iwl_rx_replensih - Move all used packet from rx_used to rx_free
  3386. *
  3387. * When moving to rx_free an SKB is allocated for the slot.
  3388. *
  3389. * Also restock the Rx queue via iwl_rx_queue_restock.
  3390. * This is called as a scheduled work item (except for during intialization)
  3391. */
  3392. void iwl_rx_replenish(void *data)
  3393. {
  3394. struct iwl_priv *priv = data;
  3395. struct iwl_rx_queue *rxq = &priv->rxq;
  3396. struct list_head *element;
  3397. struct iwl_rx_mem_buffer *rxb;
  3398. unsigned long flags;
  3399. spin_lock_irqsave(&rxq->lock, flags);
  3400. while (!list_empty(&rxq->rx_used)) {
  3401. element = rxq->rx_used.next;
  3402. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  3403. rxb->skb =
  3404. alloc_skb(IWL_RX_BUF_SIZE, __GFP_NOWARN | GFP_ATOMIC);
  3405. if (!rxb->skb) {
  3406. if (net_ratelimit())
  3407. printk(KERN_CRIT DRV_NAME
  3408. ": Can not allocate SKB buffers\n");
  3409. /* We don't reschedule replenish work here -- we will
  3410. * call the restock method and if it still needs
  3411. * more buffers it will schedule replenish */
  3412. break;
  3413. }
  3414. priv->alloc_rxb_skb++;
  3415. list_del(element);
  3416. rxb->dma_addr =
  3417. pci_map_single(priv->pci_dev, rxb->skb->data,
  3418. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3419. list_add_tail(&rxb->list, &rxq->rx_free);
  3420. rxq->free_count++;
  3421. }
  3422. spin_unlock_irqrestore(&rxq->lock, flags);
  3423. spin_lock_irqsave(&priv->lock, flags);
  3424. iwl_rx_queue_restock(priv);
  3425. spin_unlock_irqrestore(&priv->lock, flags);
  3426. }
  3427. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3428. * If an SKB has been detached, the POOL needs to have it's SKB set to NULL
  3429. * This free routine walks the list of POOL entries and if SKB is set to
  3430. * non NULL it is unmapped and freed
  3431. */
  3432. void iwl_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3433. {
  3434. int i;
  3435. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3436. if (rxq->pool[i].skb != NULL) {
  3437. pci_unmap_single(priv->pci_dev,
  3438. rxq->pool[i].dma_addr,
  3439. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3440. dev_kfree_skb(rxq->pool[i].skb);
  3441. }
  3442. }
  3443. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3444. rxq->dma_addr);
  3445. rxq->bd = NULL;
  3446. }
  3447. int iwl_rx_queue_alloc(struct iwl_priv *priv)
  3448. {
  3449. struct iwl_rx_queue *rxq = &priv->rxq;
  3450. struct pci_dev *dev = priv->pci_dev;
  3451. int i;
  3452. spin_lock_init(&rxq->lock);
  3453. INIT_LIST_HEAD(&rxq->rx_free);
  3454. INIT_LIST_HEAD(&rxq->rx_used);
  3455. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3456. if (!rxq->bd)
  3457. return -ENOMEM;
  3458. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3459. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3460. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3461. /* Set us so that we have processed and used all buffers, but have
  3462. * not restocked the Rx queue with fresh buffers */
  3463. rxq->read = rxq->write = 0;
  3464. rxq->free_count = 0;
  3465. rxq->need_update = 0;
  3466. return 0;
  3467. }
  3468. void iwl_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  3469. {
  3470. unsigned long flags;
  3471. int i;
  3472. spin_lock_irqsave(&rxq->lock, flags);
  3473. INIT_LIST_HEAD(&rxq->rx_free);
  3474. INIT_LIST_HEAD(&rxq->rx_used);
  3475. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3476. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3477. /* In the reset function, these buffers may have been allocated
  3478. * to an SKB, so we need to unmap and free potential storage */
  3479. if (rxq->pool[i].skb != NULL) {
  3480. pci_unmap_single(priv->pci_dev,
  3481. rxq->pool[i].dma_addr,
  3482. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3483. priv->alloc_rxb_skb--;
  3484. dev_kfree_skb(rxq->pool[i].skb);
  3485. rxq->pool[i].skb = NULL;
  3486. }
  3487. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3488. }
  3489. /* Set us so that we have processed and used all buffers, but have
  3490. * not restocked the Rx queue with fresh buffers */
  3491. rxq->read = rxq->write = 0;
  3492. rxq->free_count = 0;
  3493. spin_unlock_irqrestore(&rxq->lock, flags);
  3494. }
  3495. /* Convert linear signal-to-noise ratio into dB */
  3496. static u8 ratio2dB[100] = {
  3497. /* 0 1 2 3 4 5 6 7 8 9 */
  3498. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3499. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3500. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3501. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3502. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3503. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3504. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3505. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3506. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3507. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3508. };
  3509. /* Calculates a relative dB value from a ratio of linear
  3510. * (i.e. not dB) signal levels.
  3511. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3512. int iwl_calc_db_from_ratio(int sig_ratio)
  3513. {
  3514. /* Anything above 1000:1 just report as 60 dB */
  3515. if (sig_ratio > 1000)
  3516. return 60;
  3517. /* Above 100:1, divide by 10 and use table,
  3518. * add 20 dB to make up for divide by 10 */
  3519. if (sig_ratio > 100)
  3520. return (20 + (int)ratio2dB[sig_ratio/10]);
  3521. /* We shouldn't see this */
  3522. if (sig_ratio < 1)
  3523. return 0;
  3524. /* Use table for ratios 1:1 - 99:1 */
  3525. return (int)ratio2dB[sig_ratio];
  3526. }
  3527. #define PERFECT_RSSI (-20) /* dBm */
  3528. #define WORST_RSSI (-95) /* dBm */
  3529. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3530. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3531. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3532. * about formulas used below. */
  3533. int iwl_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3534. {
  3535. int sig_qual;
  3536. int degradation = PERFECT_RSSI - rssi_dbm;
  3537. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3538. * as indicator; formula is (signal dbm - noise dbm).
  3539. * SNR at or above 40 is a great signal (100%).
  3540. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3541. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3542. if (noise_dbm) {
  3543. if (rssi_dbm - noise_dbm >= 40)
  3544. return 100;
  3545. else if (rssi_dbm < noise_dbm)
  3546. return 0;
  3547. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3548. /* Else use just the signal level.
  3549. * This formula is a least squares fit of data points collected and
  3550. * compared with a reference system that had a percentage (%) display
  3551. * for signal quality. */
  3552. } else
  3553. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3554. (15 * RSSI_RANGE + 62 * degradation)) /
  3555. (RSSI_RANGE * RSSI_RANGE);
  3556. if (sig_qual > 100)
  3557. sig_qual = 100;
  3558. else if (sig_qual < 1)
  3559. sig_qual = 0;
  3560. return sig_qual;
  3561. }
  3562. /**
  3563. * iwl_rx_handle - Main entry function for receiving responses from the uCode
  3564. *
  3565. * Uses the priv->rx_handlers callback function array to invoke
  3566. * the appropriate handlers, including command responses,
  3567. * frame-received notifications, and other notifications.
  3568. */
  3569. static void iwl_rx_handle(struct iwl_priv *priv)
  3570. {
  3571. struct iwl_rx_mem_buffer *rxb;
  3572. struct iwl_rx_packet *pkt;
  3573. struct iwl_rx_queue *rxq = &priv->rxq;
  3574. u32 r, i;
  3575. int reclaim;
  3576. unsigned long flags;
  3577. r = iwl_hw_get_rx_read(priv);
  3578. i = rxq->read;
  3579. /* Rx interrupt, but nothing sent from uCode */
  3580. if (i == r)
  3581. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3582. while (i != r) {
  3583. rxb = rxq->queue[i];
  3584. /* If an RXB doesn't have a queue slot associated with it
  3585. * then a bug has been introduced in the queue refilling
  3586. * routines -- catch it here */
  3587. BUG_ON(rxb == NULL);
  3588. rxq->queue[i] = NULL;
  3589. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3590. IWL_RX_BUF_SIZE,
  3591. PCI_DMA_FROMDEVICE);
  3592. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  3593. /* Reclaim a command buffer only if this packet is a response
  3594. * to a (driver-originated) command.
  3595. * If the packet (e.g. Rx frame) originated from uCode,
  3596. * there is no command buffer to reclaim.
  3597. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3598. * but apparently a few don't get set; catch them here. */
  3599. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3600. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3601. (pkt->hdr.cmd != REPLY_TX);
  3602. /* Based on type of command response or notification,
  3603. * handle those that need handling via function in
  3604. * rx_handlers table. See iwl_setup_rx_handlers() */
  3605. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3606. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3607. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3608. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3609. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3610. } else {
  3611. /* No handling needed */
  3612. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3613. "r %d i %d No handler needed for %s, 0x%02x\n",
  3614. r, i, get_cmd_string(pkt->hdr.cmd),
  3615. pkt->hdr.cmd);
  3616. }
  3617. if (reclaim) {
  3618. /* Invoke any callbacks, transfer the skb to caller,
  3619. * and fire off the (possibly) blocking iwl_send_cmd()
  3620. * as we reclaim the driver command queue */
  3621. if (rxb && rxb->skb)
  3622. iwl_tx_cmd_complete(priv, rxb);
  3623. else
  3624. IWL_WARNING("Claim null rxb?\n");
  3625. }
  3626. /* For now we just don't re-use anything. We can tweak this
  3627. * later to try and re-use notification packets and SKBs that
  3628. * fail to Rx correctly */
  3629. if (rxb->skb != NULL) {
  3630. priv->alloc_rxb_skb--;
  3631. dev_kfree_skb_any(rxb->skb);
  3632. rxb->skb = NULL;
  3633. }
  3634. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3635. IWL_RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  3636. spin_lock_irqsave(&rxq->lock, flags);
  3637. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3638. spin_unlock_irqrestore(&rxq->lock, flags);
  3639. i = (i + 1) & RX_QUEUE_MASK;
  3640. }
  3641. /* Backtrack one entry */
  3642. priv->rxq.read = i;
  3643. iwl_rx_queue_restock(priv);
  3644. }
  3645. int iwl_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3646. struct iwl_tx_queue *txq)
  3647. {
  3648. u32 reg = 0;
  3649. int rc = 0;
  3650. int txq_id = txq->q.id;
  3651. if (txq->need_update == 0)
  3652. return rc;
  3653. /* if we're trying to save power */
  3654. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3655. /* wake up nic if it's powered down ...
  3656. * uCode will wake up, and interrupt us again, so next
  3657. * time we'll skip this part. */
  3658. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3659. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3660. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3661. iwl_set_bit(priv, CSR_GP_CNTRL,
  3662. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3663. return rc;
  3664. }
  3665. /* restore this queue's parameters in nic hardware. */
  3666. rc = iwl_grab_restricted_access(priv);
  3667. if (rc)
  3668. return rc;
  3669. iwl_write_restricted(priv, HBUS_TARG_WRPTR,
  3670. txq->q.first_empty | (txq_id << 8));
  3671. iwl_release_restricted_access(priv);
  3672. /* else not in power-save mode, uCode will never sleep when we're
  3673. * trying to tx (during RFKILL, we're not trying to tx). */
  3674. } else
  3675. iwl_write32(priv, HBUS_TARG_WRPTR,
  3676. txq->q.first_empty | (txq_id << 8));
  3677. txq->need_update = 0;
  3678. return rc;
  3679. }
  3680. #ifdef CONFIG_IWLWIFI_DEBUG
  3681. static void iwl_print_rx_config_cmd(struct iwl_rxon_cmd *rxon)
  3682. {
  3683. DECLARE_MAC_BUF(mac);
  3684. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3685. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3686. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3687. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3688. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3689. le32_to_cpu(rxon->filter_flags));
  3690. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3691. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3692. rxon->ofdm_basic_rates);
  3693. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3694. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3695. print_mac(mac, rxon->node_addr));
  3696. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3697. print_mac(mac, rxon->bssid_addr));
  3698. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3699. }
  3700. #endif
  3701. static void iwl_enable_interrupts(struct iwl_priv *priv)
  3702. {
  3703. IWL_DEBUG_ISR("Enabling interrupts\n");
  3704. set_bit(STATUS_INT_ENABLED, &priv->status);
  3705. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3706. }
  3707. static inline void iwl_disable_interrupts(struct iwl_priv *priv)
  3708. {
  3709. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3710. /* disable interrupts from uCode/NIC to host */
  3711. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3712. /* acknowledge/clear/reset any interrupts still pending
  3713. * from uCode or flow handler (Rx/Tx DMA) */
  3714. iwl_write32(priv, CSR_INT, 0xffffffff);
  3715. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3716. IWL_DEBUG_ISR("Disabled interrupts\n");
  3717. }
  3718. static const char *desc_lookup(int i)
  3719. {
  3720. switch (i) {
  3721. case 1:
  3722. return "FAIL";
  3723. case 2:
  3724. return "BAD_PARAM";
  3725. case 3:
  3726. return "BAD_CHECKSUM";
  3727. case 4:
  3728. return "NMI_INTERRUPT";
  3729. case 5:
  3730. return "SYSASSERT";
  3731. case 6:
  3732. return "FATAL_ERROR";
  3733. }
  3734. return "UNKNOWN";
  3735. }
  3736. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3737. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3738. static void iwl_dump_nic_error_log(struct iwl_priv *priv)
  3739. {
  3740. u32 i;
  3741. u32 desc, time, count, base, data1;
  3742. u32 blink1, blink2, ilink1, ilink2;
  3743. int rc;
  3744. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3745. if (!iwl_hw_valid_rtc_data_addr(base)) {
  3746. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3747. return;
  3748. }
  3749. rc = iwl_grab_restricted_access(priv);
  3750. if (rc) {
  3751. IWL_WARNING("Can not read from adapter at this time.\n");
  3752. return;
  3753. }
  3754. count = iwl_read_restricted_mem(priv, base);
  3755. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3756. IWL_ERROR("Start IWL Error Log Dump:\n");
  3757. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  3758. priv->status, priv->config, count);
  3759. }
  3760. IWL_ERROR("Desc Time asrtPC blink2 "
  3761. "ilink1 nmiPC Line\n");
  3762. for (i = ERROR_START_OFFSET;
  3763. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  3764. i += ERROR_ELEM_SIZE) {
  3765. desc = iwl_read_restricted_mem(priv, base + i);
  3766. time =
  3767. iwl_read_restricted_mem(priv, base + i + 1 * sizeof(u32));
  3768. blink1 =
  3769. iwl_read_restricted_mem(priv, base + i + 2 * sizeof(u32));
  3770. blink2 =
  3771. iwl_read_restricted_mem(priv, base + i + 3 * sizeof(u32));
  3772. ilink1 =
  3773. iwl_read_restricted_mem(priv, base + i + 4 * sizeof(u32));
  3774. ilink2 =
  3775. iwl_read_restricted_mem(priv, base + i + 5 * sizeof(u32));
  3776. data1 =
  3777. iwl_read_restricted_mem(priv, base + i + 6 * sizeof(u32));
  3778. IWL_ERROR
  3779. ("%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  3780. desc_lookup(desc), desc, time, blink1, blink2,
  3781. ilink1, ilink2, data1);
  3782. }
  3783. iwl_release_restricted_access(priv);
  3784. }
  3785. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3786. /**
  3787. * iwl_print_event_log - Dump error event log to syslog
  3788. *
  3789. * NOTE: Must be called with iwl_grab_restricted_access() already obtained!
  3790. */
  3791. static void iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3792. u32 num_events, u32 mode)
  3793. {
  3794. u32 i;
  3795. u32 base; /* SRAM byte address of event log header */
  3796. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3797. u32 ptr; /* SRAM byte address of log data */
  3798. u32 ev, time, data; /* event log data */
  3799. if (num_events == 0)
  3800. return;
  3801. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3802. if (mode == 0)
  3803. event_size = 2 * sizeof(u32);
  3804. else
  3805. event_size = 3 * sizeof(u32);
  3806. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3807. /* "time" is actually "data" for mode 0 (no timestamp).
  3808. * place event id # at far right for easier visual parsing. */
  3809. for (i = 0; i < num_events; i++) {
  3810. ev = iwl_read_restricted_mem(priv, ptr);
  3811. ptr += sizeof(u32);
  3812. time = iwl_read_restricted_mem(priv, ptr);
  3813. ptr += sizeof(u32);
  3814. if (mode == 0)
  3815. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3816. else {
  3817. data = iwl_read_restricted_mem(priv, ptr);
  3818. ptr += sizeof(u32);
  3819. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3820. }
  3821. }
  3822. }
  3823. static void iwl_dump_nic_event_log(struct iwl_priv *priv)
  3824. {
  3825. int rc;
  3826. u32 base; /* SRAM byte address of event log header */
  3827. u32 capacity; /* event log capacity in # entries */
  3828. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3829. u32 num_wraps; /* # times uCode wrapped to top of log */
  3830. u32 next_entry; /* index of next entry to be written by uCode */
  3831. u32 size; /* # entries that we'll print */
  3832. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3833. if (!iwl_hw_valid_rtc_data_addr(base)) {
  3834. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3835. return;
  3836. }
  3837. rc = iwl_grab_restricted_access(priv);
  3838. if (rc) {
  3839. IWL_WARNING("Can not read from adapter at this time.\n");
  3840. return;
  3841. }
  3842. /* event log header */
  3843. capacity = iwl_read_restricted_mem(priv, base);
  3844. mode = iwl_read_restricted_mem(priv, base + (1 * sizeof(u32)));
  3845. num_wraps = iwl_read_restricted_mem(priv, base + (2 * sizeof(u32)));
  3846. next_entry = iwl_read_restricted_mem(priv, base + (3 * sizeof(u32)));
  3847. size = num_wraps ? capacity : next_entry;
  3848. /* bail out if nothing in log */
  3849. if (size == 0) {
  3850. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  3851. iwl_release_restricted_access(priv);
  3852. return;
  3853. }
  3854. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  3855. size, num_wraps);
  3856. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3857. * i.e the next one that uCode would fill. */
  3858. if (num_wraps)
  3859. iwl_print_event_log(priv, next_entry,
  3860. capacity - next_entry, mode);
  3861. /* (then/else) start at top of log */
  3862. iwl_print_event_log(priv, 0, next_entry, mode);
  3863. iwl_release_restricted_access(priv);
  3864. }
  3865. /**
  3866. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  3867. */
  3868. static void iwl_irq_handle_error(struct iwl_priv *priv)
  3869. {
  3870. /* Set the FW error flag -- cleared on iwl_down */
  3871. set_bit(STATUS_FW_ERROR, &priv->status);
  3872. /* Cancel currently queued command. */
  3873. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3874. #ifdef CONFIG_IWLWIFI_DEBUG
  3875. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  3876. iwl_dump_nic_error_log(priv);
  3877. iwl_dump_nic_event_log(priv);
  3878. iwl_print_rx_config_cmd(&priv->staging_rxon);
  3879. }
  3880. #endif
  3881. wake_up_interruptible(&priv->wait_command_queue);
  3882. /* Keep the restart process from trying to send host
  3883. * commands by clearing the INIT status bit */
  3884. clear_bit(STATUS_READY, &priv->status);
  3885. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3886. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3887. "Restarting adapter due to uCode error.\n");
  3888. if (iwl_is_associated(priv)) {
  3889. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  3890. sizeof(priv->recovery_rxon));
  3891. priv->error_recovering = 1;
  3892. }
  3893. queue_work(priv->workqueue, &priv->restart);
  3894. }
  3895. }
  3896. static void iwl_error_recovery(struct iwl_priv *priv)
  3897. {
  3898. unsigned long flags;
  3899. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  3900. sizeof(priv->staging_rxon));
  3901. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3902. iwl_commit_rxon(priv);
  3903. iwl_add_station(priv, priv->bssid, 1, 0);
  3904. spin_lock_irqsave(&priv->lock, flags);
  3905. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  3906. priv->error_recovering = 0;
  3907. spin_unlock_irqrestore(&priv->lock, flags);
  3908. }
  3909. static void iwl_irq_tasklet(struct iwl_priv *priv)
  3910. {
  3911. u32 inta, handled = 0;
  3912. u32 inta_fh;
  3913. unsigned long flags;
  3914. #ifdef CONFIG_IWLWIFI_DEBUG
  3915. u32 inta_mask;
  3916. #endif
  3917. spin_lock_irqsave(&priv->lock, flags);
  3918. /* Ack/clear/reset pending uCode interrupts.
  3919. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  3920. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  3921. inta = iwl_read32(priv, CSR_INT);
  3922. iwl_write32(priv, CSR_INT, inta);
  3923. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  3924. * Any new interrupts that happen after this, either while we're
  3925. * in this tasklet, or later, will show up in next ISR/tasklet. */
  3926. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3927. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  3928. #ifdef CONFIG_IWLWIFI_DEBUG
  3929. if (iwl_debug_level & IWL_DL_ISR) {
  3930. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  3931. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3932. inta, inta_mask, inta_fh);
  3933. }
  3934. #endif
  3935. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  3936. * atomic, make sure that inta covers all the interrupts that
  3937. * we've discovered, even if FH interrupt came in just after
  3938. * reading CSR_INT. */
  3939. if (inta_fh & CSR_FH_INT_RX_MASK)
  3940. inta |= CSR_INT_BIT_FH_RX;
  3941. if (inta_fh & CSR_FH_INT_TX_MASK)
  3942. inta |= CSR_INT_BIT_FH_TX;
  3943. /* Now service all interrupt bits discovered above. */
  3944. if (inta & CSR_INT_BIT_HW_ERR) {
  3945. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  3946. /* Tell the device to stop sending interrupts */
  3947. iwl_disable_interrupts(priv);
  3948. iwl_irq_handle_error(priv);
  3949. handled |= CSR_INT_BIT_HW_ERR;
  3950. spin_unlock_irqrestore(&priv->lock, flags);
  3951. return;
  3952. }
  3953. #ifdef CONFIG_IWLWIFI_DEBUG
  3954. if (iwl_debug_level & (IWL_DL_ISR)) {
  3955. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3956. if (inta & CSR_INT_BIT_MAC_CLK_ACTV)
  3957. IWL_DEBUG_ISR("Microcode started or stopped.\n");
  3958. /* Alive notification via Rx interrupt will do the real work */
  3959. if (inta & CSR_INT_BIT_ALIVE)
  3960. IWL_DEBUG_ISR("Alive interrupt\n");
  3961. }
  3962. #endif
  3963. /* Safely ignore these bits for debug checks below */
  3964. inta &= ~(CSR_INT_BIT_MAC_CLK_ACTV | CSR_INT_BIT_ALIVE);
  3965. /* HW RF KILL switch toggled (4965 only) */
  3966. if (inta & CSR_INT_BIT_RF_KILL) {
  3967. int hw_rf_kill = 0;
  3968. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  3969. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  3970. hw_rf_kill = 1;
  3971. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  3972. "RF_KILL bit toggled to %s.\n",
  3973. hw_rf_kill ? "disable radio":"enable radio");
  3974. /* Queue restart only if RF_KILL switch was set to "kill"
  3975. * when we loaded driver, and is now set to "enable".
  3976. * After we're Alive, RF_KILL gets handled by
  3977. * iwl_rx_card_state_notif() */
  3978. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status))
  3979. queue_work(priv->workqueue, &priv->restart);
  3980. handled |= CSR_INT_BIT_RF_KILL;
  3981. }
  3982. /* Chip got too hot and stopped itself (4965 only) */
  3983. if (inta & CSR_INT_BIT_CT_KILL) {
  3984. IWL_ERROR("Microcode CT kill error detected.\n");
  3985. handled |= CSR_INT_BIT_CT_KILL;
  3986. }
  3987. /* Error detected by uCode */
  3988. if (inta & CSR_INT_BIT_SW_ERR) {
  3989. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  3990. inta);
  3991. iwl_irq_handle_error(priv);
  3992. handled |= CSR_INT_BIT_SW_ERR;
  3993. }
  3994. /* uCode wakes up after power-down sleep */
  3995. if (inta & CSR_INT_BIT_WAKEUP) {
  3996. IWL_DEBUG_ISR("Wakeup interrupt\n");
  3997. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  3998. iwl_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  3999. iwl_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4000. iwl_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4001. iwl_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4002. iwl_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4003. iwl_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4004. handled |= CSR_INT_BIT_WAKEUP;
  4005. }
  4006. /* All uCode command responses, including Tx command responses,
  4007. * Rx "responses" (frame-received notification), and other
  4008. * notifications from uCode come through here*/
  4009. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4010. iwl_rx_handle(priv);
  4011. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4012. }
  4013. if (inta & CSR_INT_BIT_FH_TX) {
  4014. IWL_DEBUG_ISR("Tx interrupt\n");
  4015. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  4016. if (!iwl_grab_restricted_access(priv)) {
  4017. iwl_write_restricted(priv,
  4018. FH_TCSR_CREDIT
  4019. (ALM_FH_SRVC_CHNL), 0x0);
  4020. iwl_release_restricted_access(priv);
  4021. }
  4022. handled |= CSR_INT_BIT_FH_TX;
  4023. }
  4024. if (inta & ~handled)
  4025. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4026. if (inta & ~CSR_INI_SET_MASK) {
  4027. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4028. inta & ~CSR_INI_SET_MASK);
  4029. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4030. }
  4031. /* Re-enable all interrupts */
  4032. iwl_enable_interrupts(priv);
  4033. #ifdef CONFIG_IWLWIFI_DEBUG
  4034. if (iwl_debug_level & (IWL_DL_ISR)) {
  4035. inta = iwl_read32(priv, CSR_INT);
  4036. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  4037. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4038. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4039. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4040. }
  4041. #endif
  4042. spin_unlock_irqrestore(&priv->lock, flags);
  4043. }
  4044. static irqreturn_t iwl_isr(int irq, void *data)
  4045. {
  4046. struct iwl_priv *priv = data;
  4047. u32 inta, inta_mask;
  4048. u32 inta_fh;
  4049. if (!priv)
  4050. return IRQ_NONE;
  4051. spin_lock(&priv->lock);
  4052. /* Disable (but don't clear!) interrupts here to avoid
  4053. * back-to-back ISRs and sporadic interrupts from our NIC.
  4054. * If we have something to service, the tasklet will re-enable ints.
  4055. * If we *don't* have something, we'll re-enable before leaving here. */
  4056. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  4057. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  4058. /* Discover which interrupts are active/pending */
  4059. inta = iwl_read32(priv, CSR_INT);
  4060. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  4061. /* Ignore interrupt if there's nothing in NIC to service.
  4062. * This may be due to IRQ shared with another device,
  4063. * or due to sporadic interrupts thrown from our NIC. */
  4064. if (!inta && !inta_fh) {
  4065. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4066. goto none;
  4067. }
  4068. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4069. /* Hardware disappeared */
  4070. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4071. goto none;
  4072. }
  4073. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4074. inta, inta_mask, inta_fh);
  4075. /* iwl_irq_tasklet() will service interrupts and re-enable them */
  4076. tasklet_schedule(&priv->irq_tasklet);
  4077. spin_unlock(&priv->lock);
  4078. return IRQ_HANDLED;
  4079. none:
  4080. /* re-enable interrupts here since we don't have anything to service. */
  4081. iwl_enable_interrupts(priv);
  4082. spin_unlock(&priv->lock);
  4083. return IRQ_NONE;
  4084. }
  4085. /************************** EEPROM BANDS ****************************
  4086. *
  4087. * The iwl_eeprom_band definitions below provide the mapping from the
  4088. * EEPROM contents to the specific channel number supported for each
  4089. * band.
  4090. *
  4091. * For example, iwl_priv->eeprom.band_3_channels[4] from the band_3
  4092. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4093. * The specific geography and calibration information for that channel
  4094. * is contained in the eeprom map itself.
  4095. *
  4096. * During init, we copy the eeprom information and channel map
  4097. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4098. *
  4099. * channel_map_24/52 provides the index in the channel_info array for a
  4100. * given channel. We have to have two separate maps as there is channel
  4101. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4102. * band_2
  4103. *
  4104. * A value of 0xff stored in the channel_map indicates that the channel
  4105. * is not supported by the hardware at all.
  4106. *
  4107. * A value of 0xfe in the channel_map indicates that the channel is not
  4108. * valid for Tx with the current hardware. This means that
  4109. * while the system can tune and receive on a given channel, it may not
  4110. * be able to associate or transmit any frames on that
  4111. * channel. There is no corresponding channel information for that
  4112. * entry.
  4113. *
  4114. *********************************************************************/
  4115. /* 2.4 GHz */
  4116. static const u8 iwl_eeprom_band_1[14] = {
  4117. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4118. };
  4119. /* 5.2 GHz bands */
  4120. static const u8 iwl_eeprom_band_2[] = {
  4121. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4122. };
  4123. static const u8 iwl_eeprom_band_3[] = { /* 5205-5320MHz */
  4124. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4125. };
  4126. static const u8 iwl_eeprom_band_4[] = { /* 5500-5700MHz */
  4127. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4128. };
  4129. static const u8 iwl_eeprom_band_5[] = { /* 5725-5825MHz */
  4130. 145, 149, 153, 157, 161, 165
  4131. };
  4132. static void iwl_init_band_reference(const struct iwl_priv *priv, int band,
  4133. int *eeprom_ch_count,
  4134. const struct iwl_eeprom_channel
  4135. **eeprom_ch_info,
  4136. const u8 **eeprom_ch_index)
  4137. {
  4138. switch (band) {
  4139. case 1: /* 2.4GHz band */
  4140. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_1);
  4141. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4142. *eeprom_ch_index = iwl_eeprom_band_1;
  4143. break;
  4144. case 2: /* 5.2GHz band */
  4145. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_2);
  4146. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4147. *eeprom_ch_index = iwl_eeprom_band_2;
  4148. break;
  4149. case 3: /* 5.2GHz band */
  4150. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_3);
  4151. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4152. *eeprom_ch_index = iwl_eeprom_band_3;
  4153. break;
  4154. case 4: /* 5.2GHz band */
  4155. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_4);
  4156. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4157. *eeprom_ch_index = iwl_eeprom_band_4;
  4158. break;
  4159. case 5: /* 5.2GHz band */
  4160. *eeprom_ch_count = ARRAY_SIZE(iwl_eeprom_band_5);
  4161. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4162. *eeprom_ch_index = iwl_eeprom_band_5;
  4163. break;
  4164. default:
  4165. BUG();
  4166. return;
  4167. }
  4168. }
  4169. const struct iwl_channel_info *iwl_get_channel_info(const struct iwl_priv *priv,
  4170. int phymode, u16 channel)
  4171. {
  4172. int i;
  4173. switch (phymode) {
  4174. case MODE_IEEE80211A:
  4175. for (i = 14; i < priv->channel_count; i++) {
  4176. if (priv->channel_info[i].channel == channel)
  4177. return &priv->channel_info[i];
  4178. }
  4179. break;
  4180. case MODE_IEEE80211B:
  4181. case MODE_IEEE80211G:
  4182. if (channel >= 1 && channel <= 14)
  4183. return &priv->channel_info[channel - 1];
  4184. break;
  4185. }
  4186. return NULL;
  4187. }
  4188. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4189. ? # x " " : "")
  4190. static int iwl_init_channel_map(struct iwl_priv *priv)
  4191. {
  4192. int eeprom_ch_count = 0;
  4193. const u8 *eeprom_ch_index = NULL;
  4194. const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
  4195. int band, ch;
  4196. struct iwl_channel_info *ch_info;
  4197. if (priv->channel_count) {
  4198. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4199. return 0;
  4200. }
  4201. if (priv->eeprom.version < 0x2f) {
  4202. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4203. priv->eeprom.version);
  4204. return -EINVAL;
  4205. }
  4206. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4207. priv->channel_count =
  4208. ARRAY_SIZE(iwl_eeprom_band_1) +
  4209. ARRAY_SIZE(iwl_eeprom_band_2) +
  4210. ARRAY_SIZE(iwl_eeprom_band_3) +
  4211. ARRAY_SIZE(iwl_eeprom_band_4) +
  4212. ARRAY_SIZE(iwl_eeprom_band_5);
  4213. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4214. priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
  4215. priv->channel_count, GFP_KERNEL);
  4216. if (!priv->channel_info) {
  4217. IWL_ERROR("Could not allocate channel_info\n");
  4218. priv->channel_count = 0;
  4219. return -ENOMEM;
  4220. }
  4221. ch_info = priv->channel_info;
  4222. /* Loop through the 5 EEPROM bands adding them in order to the
  4223. * channel map we maintain (that contains additional information than
  4224. * what just in the EEPROM) */
  4225. for (band = 1; band <= 5; band++) {
  4226. iwl_init_band_reference(priv, band, &eeprom_ch_count,
  4227. &eeprom_ch_info, &eeprom_ch_index);
  4228. /* Loop through each band adding each of the channels */
  4229. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4230. ch_info->channel = eeprom_ch_index[ch];
  4231. ch_info->phymode = (band == 1) ? MODE_IEEE80211B :
  4232. MODE_IEEE80211A;
  4233. /* permanently store EEPROM's channel regulatory flags
  4234. * and max power in channel info database. */
  4235. ch_info->eeprom = eeprom_ch_info[ch];
  4236. /* Copy the run-time flags so they are there even on
  4237. * invalid channels */
  4238. ch_info->flags = eeprom_ch_info[ch].flags;
  4239. if (!(is_channel_valid(ch_info))) {
  4240. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4241. "No traffic\n",
  4242. ch_info->channel,
  4243. ch_info->flags,
  4244. is_channel_a_band(ch_info) ?
  4245. "5.2" : "2.4");
  4246. ch_info++;
  4247. continue;
  4248. }
  4249. /* Initialize regulatory-based run-time data */
  4250. ch_info->max_power_avg = ch_info->curr_txpow =
  4251. eeprom_ch_info[ch].max_power_avg;
  4252. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4253. ch_info->min_power = 0;
  4254. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4255. " %ddBm): Ad-Hoc %ssupported\n",
  4256. ch_info->channel,
  4257. is_channel_a_band(ch_info) ?
  4258. "5.2" : "2.4",
  4259. CHECK_AND_PRINT(IBSS),
  4260. CHECK_AND_PRINT(ACTIVE),
  4261. CHECK_AND_PRINT(RADAR),
  4262. CHECK_AND_PRINT(WIDE),
  4263. CHECK_AND_PRINT(NARROW),
  4264. CHECK_AND_PRINT(DFS),
  4265. eeprom_ch_info[ch].flags,
  4266. eeprom_ch_info[ch].max_power_avg,
  4267. ((eeprom_ch_info[ch].
  4268. flags & EEPROM_CHANNEL_IBSS)
  4269. && !(eeprom_ch_info[ch].
  4270. flags & EEPROM_CHANNEL_RADAR))
  4271. ? "" : "not ");
  4272. /* Set the user_txpower_limit to the highest power
  4273. * supported by any channel */
  4274. if (eeprom_ch_info[ch].max_power_avg >
  4275. priv->user_txpower_limit)
  4276. priv->user_txpower_limit =
  4277. eeprom_ch_info[ch].max_power_avg;
  4278. ch_info++;
  4279. }
  4280. }
  4281. if (iwl3945_txpower_set_from_eeprom(priv))
  4282. return -EIO;
  4283. return 0;
  4284. }
  4285. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4286. * sending probe req. This should be set long enough to hear probe responses
  4287. * from more than one AP. */
  4288. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4289. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4290. /* For faster active scanning, scan will move to the next channel if fewer than
  4291. * PLCP_QUIET_THRESH packets are heard on this channel within
  4292. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4293. * time if it's a quiet channel (nothing responded to our probe, and there's
  4294. * no other traffic).
  4295. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4296. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4297. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4298. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4299. * Must be set longer than active dwell time.
  4300. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4301. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4302. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4303. #define IWL_PASSIVE_DWELL_BASE (100)
  4304. #define IWL_CHANNEL_TUNE_TIME 5
  4305. static inline u16 iwl_get_active_dwell_time(struct iwl_priv *priv, int phymode)
  4306. {
  4307. if (phymode == MODE_IEEE80211A)
  4308. return IWL_ACTIVE_DWELL_TIME_52;
  4309. else
  4310. return IWL_ACTIVE_DWELL_TIME_24;
  4311. }
  4312. static u16 iwl_get_passive_dwell_time(struct iwl_priv *priv, int phymode)
  4313. {
  4314. u16 active = iwl_get_active_dwell_time(priv, phymode);
  4315. u16 passive = (phymode != MODE_IEEE80211A) ?
  4316. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4317. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4318. if (iwl_is_associated(priv)) {
  4319. /* If we're associated, we clamp the maximum passive
  4320. * dwell time to be 98% of the beacon interval (minus
  4321. * 2 * channel tune time) */
  4322. passive = priv->beacon_int;
  4323. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4324. passive = IWL_PASSIVE_DWELL_BASE;
  4325. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4326. }
  4327. if (passive <= active)
  4328. passive = active + 1;
  4329. return passive;
  4330. }
  4331. static int iwl_get_channels_for_scan(struct iwl_priv *priv, int phymode,
  4332. u8 is_active, u8 direct_mask,
  4333. struct iwl_scan_channel *scan_ch)
  4334. {
  4335. const struct ieee80211_channel *channels = NULL;
  4336. const struct ieee80211_hw_mode *hw_mode;
  4337. const struct iwl_channel_info *ch_info;
  4338. u16 passive_dwell = 0;
  4339. u16 active_dwell = 0;
  4340. int added, i;
  4341. hw_mode = iwl_get_hw_mode(priv, phymode);
  4342. if (!hw_mode)
  4343. return 0;
  4344. channels = hw_mode->channels;
  4345. active_dwell = iwl_get_active_dwell_time(priv, phymode);
  4346. passive_dwell = iwl_get_passive_dwell_time(priv, phymode);
  4347. for (i = 0, added = 0; i < hw_mode->num_channels; i++) {
  4348. if (channels[i].chan ==
  4349. le16_to_cpu(priv->active_rxon.channel)) {
  4350. if (iwl_is_associated(priv)) {
  4351. IWL_DEBUG_SCAN
  4352. ("Skipping current channel %d\n",
  4353. le16_to_cpu(priv->active_rxon.channel));
  4354. continue;
  4355. }
  4356. } else if (priv->only_active_channel)
  4357. continue;
  4358. scan_ch->channel = channels[i].chan;
  4359. ch_info = iwl_get_channel_info(priv, phymode, scan_ch->channel);
  4360. if (!is_channel_valid(ch_info)) {
  4361. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4362. scan_ch->channel);
  4363. continue;
  4364. }
  4365. if (!is_active || is_channel_passive(ch_info) ||
  4366. !(channels[i].flag & IEEE80211_CHAN_W_ACTIVE_SCAN))
  4367. scan_ch->type = 0; /* passive */
  4368. else
  4369. scan_ch->type = 1; /* active */
  4370. if (scan_ch->type & 1)
  4371. scan_ch->type |= (direct_mask << 1);
  4372. if (is_channel_narrow(ch_info))
  4373. scan_ch->type |= (1 << 7);
  4374. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4375. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4376. /* Set power levels to defaults */
  4377. scan_ch->tpc.dsp_atten = 110;
  4378. /* scan_pwr_info->tpc.dsp_atten; */
  4379. /*scan_pwr_info->tpc.tx_gain; */
  4380. if (phymode == MODE_IEEE80211A)
  4381. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4382. else {
  4383. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4384. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4385. * power level
  4386. scan_ch->tpc.tx_gain = ((1<<5) | (2 << 3)) | 3;
  4387. */
  4388. }
  4389. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4390. scan_ch->channel,
  4391. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4392. (scan_ch->type & 1) ?
  4393. active_dwell : passive_dwell);
  4394. scan_ch++;
  4395. added++;
  4396. }
  4397. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4398. return added;
  4399. }
  4400. static void iwl_reset_channel_flag(struct iwl_priv *priv)
  4401. {
  4402. int i, j;
  4403. for (i = 0; i < 3; i++) {
  4404. struct ieee80211_hw_mode *hw_mode = (void *)&priv->modes[i];
  4405. for (j = 0; j < hw_mode->num_channels; j++)
  4406. hw_mode->channels[j].flag = hw_mode->channels[j].val;
  4407. }
  4408. }
  4409. static void iwl_init_hw_rates(struct iwl_priv *priv,
  4410. struct ieee80211_rate *rates)
  4411. {
  4412. int i;
  4413. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4414. rates[i].rate = iwl_rates[i].ieee * 5;
  4415. rates[i].val = i; /* Rate scaling will work on indexes */
  4416. rates[i].val2 = i;
  4417. rates[i].flags = IEEE80211_RATE_SUPPORTED;
  4418. /* Only OFDM have the bits-per-symbol set */
  4419. if ((i <= IWL_LAST_OFDM_RATE) && (i >= IWL_FIRST_OFDM_RATE))
  4420. rates[i].flags |= IEEE80211_RATE_OFDM;
  4421. else {
  4422. /*
  4423. * If CCK 1M then set rate flag to CCK else CCK_2
  4424. * which is CCK | PREAMBLE2
  4425. */
  4426. rates[i].flags |= (iwl_rates[i].plcp == 10) ?
  4427. IEEE80211_RATE_CCK : IEEE80211_RATE_CCK_2;
  4428. }
  4429. /* Set up which ones are basic rates... */
  4430. if (IWL_BASIC_RATES_MASK & (1 << i))
  4431. rates[i].flags |= IEEE80211_RATE_BASIC;
  4432. }
  4433. }
  4434. /**
  4435. * iwl_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4436. */
  4437. static int iwl_init_geos(struct iwl_priv *priv)
  4438. {
  4439. struct iwl_channel_info *ch;
  4440. struct ieee80211_hw_mode *modes;
  4441. struct ieee80211_channel *channels;
  4442. struct ieee80211_channel *geo_ch;
  4443. struct ieee80211_rate *rates;
  4444. int i = 0;
  4445. enum {
  4446. A = 0,
  4447. B = 1,
  4448. G = 2,
  4449. };
  4450. int mode_count = 3;
  4451. if (priv->modes) {
  4452. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4453. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4454. return 0;
  4455. }
  4456. modes = kzalloc(sizeof(struct ieee80211_hw_mode) * mode_count,
  4457. GFP_KERNEL);
  4458. if (!modes)
  4459. return -ENOMEM;
  4460. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4461. priv->channel_count, GFP_KERNEL);
  4462. if (!channels) {
  4463. kfree(modes);
  4464. return -ENOMEM;
  4465. }
  4466. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4467. GFP_KERNEL);
  4468. if (!rates) {
  4469. kfree(modes);
  4470. kfree(channels);
  4471. return -ENOMEM;
  4472. }
  4473. /* 0 = 802.11a
  4474. * 1 = 802.11b
  4475. * 2 = 802.11g
  4476. */
  4477. /* 5.2GHz channels start after the 2.4GHz channels */
  4478. modes[A].mode = MODE_IEEE80211A;
  4479. modes[A].channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4480. modes[A].rates = rates;
  4481. modes[A].num_rates = 8; /* just OFDM */
  4482. modes[A].num_channels = 0;
  4483. modes[B].mode = MODE_IEEE80211B;
  4484. modes[B].channels = channels;
  4485. modes[B].rates = &rates[8];
  4486. modes[B].num_rates = 4; /* just CCK */
  4487. modes[B].num_channels = 0;
  4488. modes[G].mode = MODE_IEEE80211G;
  4489. modes[G].channels = channels;
  4490. modes[G].rates = rates;
  4491. modes[G].num_rates = 12; /* OFDM & CCK */
  4492. modes[G].num_channels = 0;
  4493. priv->ieee_channels = channels;
  4494. priv->ieee_rates = rates;
  4495. iwl_init_hw_rates(priv, rates);
  4496. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4497. ch = &priv->channel_info[i];
  4498. if (!is_channel_valid(ch)) {
  4499. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4500. "skipping.\n",
  4501. ch->channel, is_channel_a_band(ch) ?
  4502. "5.2" : "2.4");
  4503. continue;
  4504. }
  4505. if (is_channel_a_band(ch))
  4506. geo_ch = &modes[A].channels[modes[A].num_channels++];
  4507. else {
  4508. geo_ch = &modes[B].channels[modes[B].num_channels++];
  4509. modes[G].num_channels++;
  4510. }
  4511. geo_ch->freq = ieee80211chan2mhz(ch->channel);
  4512. geo_ch->chan = ch->channel;
  4513. geo_ch->power_level = ch->max_power_avg;
  4514. geo_ch->antenna_max = 0xff;
  4515. if (is_channel_valid(ch)) {
  4516. geo_ch->flag = IEEE80211_CHAN_W_SCAN;
  4517. if (ch->flags & EEPROM_CHANNEL_IBSS)
  4518. geo_ch->flag |= IEEE80211_CHAN_W_IBSS;
  4519. if (ch->flags & EEPROM_CHANNEL_ACTIVE)
  4520. geo_ch->flag |= IEEE80211_CHAN_W_ACTIVE_SCAN;
  4521. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4522. geo_ch->flag |= IEEE80211_CHAN_W_RADAR_DETECT;
  4523. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4524. priv->max_channel_txpower_limit =
  4525. ch->max_power_avg;
  4526. }
  4527. geo_ch->val = geo_ch->flag;
  4528. }
  4529. if ((modes[A].num_channels == 0) && priv->is_abg) {
  4530. printk(KERN_INFO DRV_NAME
  4531. ": Incorrectly detected BG card as ABG. Please send "
  4532. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4533. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4534. priv->is_abg = 0;
  4535. }
  4536. printk(KERN_INFO DRV_NAME
  4537. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4538. modes[G].num_channels, modes[A].num_channels);
  4539. /*
  4540. * NOTE: We register these in preference of order -- the
  4541. * stack doesn't currently (as of 7.0.6 / Apr 24 '07) pick
  4542. * a phymode based on rates or AP capabilities but seems to
  4543. * configure it purely on if the channel being configured
  4544. * is supported by a mode -- and the first match is taken
  4545. */
  4546. if (modes[G].num_channels)
  4547. ieee80211_register_hwmode(priv->hw, &modes[G]);
  4548. if (modes[B].num_channels)
  4549. ieee80211_register_hwmode(priv->hw, &modes[B]);
  4550. if (modes[A].num_channels)
  4551. ieee80211_register_hwmode(priv->hw, &modes[A]);
  4552. priv->modes = modes;
  4553. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4554. return 0;
  4555. }
  4556. /******************************************************************************
  4557. *
  4558. * uCode download functions
  4559. *
  4560. ******************************************************************************/
  4561. static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
  4562. {
  4563. if (priv->ucode_code.v_addr != NULL) {
  4564. pci_free_consistent(priv->pci_dev,
  4565. priv->ucode_code.len,
  4566. priv->ucode_code.v_addr,
  4567. priv->ucode_code.p_addr);
  4568. priv->ucode_code.v_addr = NULL;
  4569. }
  4570. if (priv->ucode_data.v_addr != NULL) {
  4571. pci_free_consistent(priv->pci_dev,
  4572. priv->ucode_data.len,
  4573. priv->ucode_data.v_addr,
  4574. priv->ucode_data.p_addr);
  4575. priv->ucode_data.v_addr = NULL;
  4576. }
  4577. if (priv->ucode_data_backup.v_addr != NULL) {
  4578. pci_free_consistent(priv->pci_dev,
  4579. priv->ucode_data_backup.len,
  4580. priv->ucode_data_backup.v_addr,
  4581. priv->ucode_data_backup.p_addr);
  4582. priv->ucode_data_backup.v_addr = NULL;
  4583. }
  4584. if (priv->ucode_init.v_addr != NULL) {
  4585. pci_free_consistent(priv->pci_dev,
  4586. priv->ucode_init.len,
  4587. priv->ucode_init.v_addr,
  4588. priv->ucode_init.p_addr);
  4589. priv->ucode_init.v_addr = NULL;
  4590. }
  4591. if (priv->ucode_init_data.v_addr != NULL) {
  4592. pci_free_consistent(priv->pci_dev,
  4593. priv->ucode_init_data.len,
  4594. priv->ucode_init_data.v_addr,
  4595. priv->ucode_init_data.p_addr);
  4596. priv->ucode_init_data.v_addr = NULL;
  4597. }
  4598. if (priv->ucode_boot.v_addr != NULL) {
  4599. pci_free_consistent(priv->pci_dev,
  4600. priv->ucode_boot.len,
  4601. priv->ucode_boot.v_addr,
  4602. priv->ucode_boot.p_addr);
  4603. priv->ucode_boot.v_addr = NULL;
  4604. }
  4605. }
  4606. /**
  4607. * iwl_verify_inst_full - verify runtime uCode image in card vs. host,
  4608. * looking at all data.
  4609. */
  4610. static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 * image, u32 len)
  4611. {
  4612. u32 val;
  4613. u32 save_len = len;
  4614. int rc = 0;
  4615. u32 errcnt;
  4616. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4617. rc = iwl_grab_restricted_access(priv);
  4618. if (rc)
  4619. return rc;
  4620. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4621. errcnt = 0;
  4622. for (; len > 0; len -= sizeof(u32), image++) {
  4623. /* read data comes through single port, auto-incr addr */
  4624. /* NOTE: Use the debugless read so we don't flood kernel log
  4625. * if IWL_DL_IO is set */
  4626. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4627. if (val != le32_to_cpu(*image)) {
  4628. IWL_ERROR("uCode INST section is invalid at "
  4629. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4630. save_len - len, val, le32_to_cpu(*image));
  4631. rc = -EIO;
  4632. errcnt++;
  4633. if (errcnt >= 20)
  4634. break;
  4635. }
  4636. }
  4637. iwl_release_restricted_access(priv);
  4638. if (!errcnt)
  4639. IWL_DEBUG_INFO
  4640. ("ucode image in INSTRUCTION memory is good\n");
  4641. return rc;
  4642. }
  4643. /**
  4644. * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4645. * using sample data 100 bytes apart. If these sample points are good,
  4646. * it's a pretty good bet that everything between them is good, too.
  4647. */
  4648. static int iwl_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4649. {
  4650. u32 val;
  4651. int rc = 0;
  4652. u32 errcnt = 0;
  4653. u32 i;
  4654. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4655. rc = iwl_grab_restricted_access(priv);
  4656. if (rc)
  4657. return rc;
  4658. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4659. /* read data comes through single port, auto-incr addr */
  4660. /* NOTE: Use the debugless read so we don't flood kernel log
  4661. * if IWL_DL_IO is set */
  4662. iwl_write_restricted(priv, HBUS_TARG_MEM_RADDR,
  4663. i + RTC_INST_LOWER_BOUND);
  4664. val = _iwl_read_restricted(priv, HBUS_TARG_MEM_RDAT);
  4665. if (val != le32_to_cpu(*image)) {
  4666. #if 0 /* Enable this if you want to see details */
  4667. IWL_ERROR("uCode INST section is invalid at "
  4668. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4669. i, val, *image);
  4670. #endif
  4671. rc = -EIO;
  4672. errcnt++;
  4673. if (errcnt >= 3)
  4674. break;
  4675. }
  4676. }
  4677. iwl_release_restricted_access(priv);
  4678. return rc;
  4679. }
  4680. /**
  4681. * iwl_verify_ucode - determine which instruction image is in SRAM,
  4682. * and verify its contents
  4683. */
  4684. static int iwl_verify_ucode(struct iwl_priv *priv)
  4685. {
  4686. __le32 *image;
  4687. u32 len;
  4688. int rc = 0;
  4689. /* Try bootstrap */
  4690. image = (__le32 *)priv->ucode_boot.v_addr;
  4691. len = priv->ucode_boot.len;
  4692. rc = iwl_verify_inst_sparse(priv, image, len);
  4693. if (rc == 0) {
  4694. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4695. return 0;
  4696. }
  4697. /* Try initialize */
  4698. image = (__le32 *)priv->ucode_init.v_addr;
  4699. len = priv->ucode_init.len;
  4700. rc = iwl_verify_inst_sparse(priv, image, len);
  4701. if (rc == 0) {
  4702. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4703. return 0;
  4704. }
  4705. /* Try runtime/protocol */
  4706. image = (__le32 *)priv->ucode_code.v_addr;
  4707. len = priv->ucode_code.len;
  4708. rc = iwl_verify_inst_sparse(priv, image, len);
  4709. if (rc == 0) {
  4710. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4711. return 0;
  4712. }
  4713. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4714. /* Show first several data entries in instruction SRAM.
  4715. * Selection of bootstrap image is arbitrary. */
  4716. image = (__le32 *)priv->ucode_boot.v_addr;
  4717. len = priv->ucode_boot.len;
  4718. rc = iwl_verify_inst_full(priv, image, len);
  4719. return rc;
  4720. }
  4721. /* check contents of special bootstrap uCode SRAM */
  4722. static int iwl_verify_bsm(struct iwl_priv *priv)
  4723. {
  4724. __le32 *image = priv->ucode_boot.v_addr;
  4725. u32 len = priv->ucode_boot.len;
  4726. u32 reg;
  4727. u32 val;
  4728. IWL_DEBUG_INFO("Begin verify bsm\n");
  4729. /* verify BSM SRAM contents */
  4730. val = iwl_read_restricted_reg(priv, BSM_WR_DWCOUNT_REG);
  4731. for (reg = BSM_SRAM_LOWER_BOUND;
  4732. reg < BSM_SRAM_LOWER_BOUND + len;
  4733. reg += sizeof(u32), image ++) {
  4734. val = iwl_read_restricted_reg(priv, reg);
  4735. if (val != le32_to_cpu(*image)) {
  4736. IWL_ERROR("BSM uCode verification failed at "
  4737. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  4738. BSM_SRAM_LOWER_BOUND,
  4739. reg - BSM_SRAM_LOWER_BOUND, len,
  4740. val, le32_to_cpu(*image));
  4741. return -EIO;
  4742. }
  4743. }
  4744. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  4745. return 0;
  4746. }
  4747. /**
  4748. * iwl_load_bsm - Load bootstrap instructions
  4749. *
  4750. * BSM operation:
  4751. *
  4752. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  4753. * in special SRAM that does not power down during RFKILL. When powering back
  4754. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  4755. * the bootstrap program into the on-board processor, and starts it.
  4756. *
  4757. * The bootstrap program loads (via DMA) instructions and data for a new
  4758. * program from host DRAM locations indicated by the host driver in the
  4759. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  4760. * automatically.
  4761. *
  4762. * When initializing the NIC, the host driver points the BSM to the
  4763. * "initialize" uCode image. This uCode sets up some internal data, then
  4764. * notifies host via "initialize alive" that it is complete.
  4765. *
  4766. * The host then replaces the BSM_DRAM_* pointer values to point to the
  4767. * normal runtime uCode instructions and a backup uCode data cache buffer
  4768. * (filled initially with starting data values for the on-board processor),
  4769. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  4770. * which begins normal operation.
  4771. *
  4772. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  4773. * the backup data cache in DRAM before SRAM is powered down.
  4774. *
  4775. * When powering back up, the BSM loads the bootstrap program. This reloads
  4776. * the runtime uCode instructions and the backup data cache into SRAM,
  4777. * and re-launches the runtime uCode from where it left off.
  4778. */
  4779. static int iwl_load_bsm(struct iwl_priv *priv)
  4780. {
  4781. __le32 *image = priv->ucode_boot.v_addr;
  4782. u32 len = priv->ucode_boot.len;
  4783. dma_addr_t pinst;
  4784. dma_addr_t pdata;
  4785. u32 inst_len;
  4786. u32 data_len;
  4787. int rc;
  4788. int i;
  4789. u32 done;
  4790. u32 reg_offset;
  4791. IWL_DEBUG_INFO("Begin load bsm\n");
  4792. /* make sure bootstrap program is no larger than BSM's SRAM size */
  4793. if (len > IWL_MAX_BSM_SIZE)
  4794. return -EINVAL;
  4795. /* Tell bootstrap uCode where to find the "Initialize" uCode
  4796. * in host DRAM ... bits 31:0 for 3945, bits 35:4 for 4965.
  4797. * NOTE: iwl_initialize_alive_start() will replace these values,
  4798. * after the "initialize" uCode has run, to point to
  4799. * runtime/protocol instructions and backup data cache. */
  4800. pinst = priv->ucode_init.p_addr;
  4801. pdata = priv->ucode_init_data.p_addr;
  4802. inst_len = priv->ucode_init.len;
  4803. data_len = priv->ucode_init_data.len;
  4804. rc = iwl_grab_restricted_access(priv);
  4805. if (rc)
  4806. return rc;
  4807. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4808. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4809. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  4810. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  4811. /* Fill BSM memory with bootstrap instructions */
  4812. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  4813. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  4814. reg_offset += sizeof(u32), image++)
  4815. _iwl_write_restricted_reg(priv, reg_offset,
  4816. le32_to_cpu(*image));
  4817. rc = iwl_verify_bsm(priv);
  4818. if (rc) {
  4819. iwl_release_restricted_access(priv);
  4820. return rc;
  4821. }
  4822. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  4823. iwl_write_restricted_reg(priv, BSM_WR_MEM_SRC_REG, 0x0);
  4824. iwl_write_restricted_reg(priv, BSM_WR_MEM_DST_REG,
  4825. RTC_INST_LOWER_BOUND);
  4826. iwl_write_restricted_reg(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  4827. /* Load bootstrap code into instruction SRAM now,
  4828. * to prepare to load "initialize" uCode */
  4829. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  4830. BSM_WR_CTRL_REG_BIT_START);
  4831. /* Wait for load of bootstrap uCode to finish */
  4832. for (i = 0; i < 100; i++) {
  4833. done = iwl_read_restricted_reg(priv, BSM_WR_CTRL_REG);
  4834. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  4835. break;
  4836. udelay(10);
  4837. }
  4838. if (i < 100)
  4839. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  4840. else {
  4841. IWL_ERROR("BSM write did not complete!\n");
  4842. return -EIO;
  4843. }
  4844. /* Enable future boot loads whenever power management unit triggers it
  4845. * (e.g. when powering back up after power-save shutdown) */
  4846. iwl_write_restricted_reg(priv, BSM_WR_CTRL_REG,
  4847. BSM_WR_CTRL_REG_BIT_START_EN);
  4848. iwl_release_restricted_access(priv);
  4849. return 0;
  4850. }
  4851. static void iwl_nic_start(struct iwl_priv *priv)
  4852. {
  4853. /* Remove all resets to allow NIC to operate */
  4854. iwl_write32(priv, CSR_RESET, 0);
  4855. }
  4856. /**
  4857. * iwl_read_ucode - Read uCode images from disk file.
  4858. *
  4859. * Copy into buffers for card to fetch via bus-mastering
  4860. */
  4861. static int iwl_read_ucode(struct iwl_priv *priv)
  4862. {
  4863. struct iwl_ucode *ucode;
  4864. int rc = 0;
  4865. const struct firmware *ucode_raw;
  4866. /* firmware file name contains uCode/driver compatibility version */
  4867. const char *name = "iwlwifi-3945" IWL3945_UCODE_API ".ucode";
  4868. u8 *src;
  4869. size_t len;
  4870. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4871. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4872. * request_firmware() is synchronous, file is in memory on return. */
  4873. rc = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4874. if (rc < 0) {
  4875. IWL_ERROR("%s firmware file req failed: Reason %d\n", name, rc);
  4876. goto error;
  4877. }
  4878. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4879. name, ucode_raw->size);
  4880. /* Make sure that we got at least our header! */
  4881. if (ucode_raw->size < sizeof(*ucode)) {
  4882. IWL_ERROR("File size way too small!\n");
  4883. rc = -EINVAL;
  4884. goto err_release;
  4885. }
  4886. /* Data from ucode file: header followed by uCode images */
  4887. ucode = (void *)ucode_raw->data;
  4888. ver = le32_to_cpu(ucode->ver);
  4889. inst_size = le32_to_cpu(ucode->inst_size);
  4890. data_size = le32_to_cpu(ucode->data_size);
  4891. init_size = le32_to_cpu(ucode->init_size);
  4892. init_data_size = le32_to_cpu(ucode->init_data_size);
  4893. boot_size = le32_to_cpu(ucode->boot_size);
  4894. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  4895. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  4896. inst_size);
  4897. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  4898. data_size);
  4899. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  4900. init_size);
  4901. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  4902. init_data_size);
  4903. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  4904. boot_size);
  4905. /* Verify size of file vs. image size info in file's header */
  4906. if (ucode_raw->size < sizeof(*ucode) +
  4907. inst_size + data_size + init_size +
  4908. init_data_size + boot_size) {
  4909. IWL_DEBUG_INFO("uCode file size %d too small\n",
  4910. (int)ucode_raw->size);
  4911. rc = -EINVAL;
  4912. goto err_release;
  4913. }
  4914. /* Verify that uCode images will fit in card's SRAM */
  4915. if (inst_size > IWL_MAX_INST_SIZE) {
  4916. IWL_DEBUG_INFO("uCode instr len %d too large to fit in card\n",
  4917. (int)inst_size);
  4918. rc = -EINVAL;
  4919. goto err_release;
  4920. }
  4921. if (data_size > IWL_MAX_DATA_SIZE) {
  4922. IWL_DEBUG_INFO("uCode data len %d too large to fit in card\n",
  4923. (int)data_size);
  4924. rc = -EINVAL;
  4925. goto err_release;
  4926. }
  4927. if (init_size > IWL_MAX_INST_SIZE) {
  4928. IWL_DEBUG_INFO
  4929. ("uCode init instr len %d too large to fit in card\n",
  4930. (int)init_size);
  4931. rc = -EINVAL;
  4932. goto err_release;
  4933. }
  4934. if (init_data_size > IWL_MAX_DATA_SIZE) {
  4935. IWL_DEBUG_INFO
  4936. ("uCode init data len %d too large to fit in card\n",
  4937. (int)init_data_size);
  4938. rc = -EINVAL;
  4939. goto err_release;
  4940. }
  4941. if (boot_size > IWL_MAX_BSM_SIZE) {
  4942. IWL_DEBUG_INFO
  4943. ("uCode boot instr len %d too large to fit in bsm\n",
  4944. (int)boot_size);
  4945. rc = -EINVAL;
  4946. goto err_release;
  4947. }
  4948. /* Allocate ucode buffers for card's bus-master loading ... */
  4949. /* Runtime instructions and 2 copies of data:
  4950. * 1) unmodified from disk
  4951. * 2) backup cache for save/restore during power-downs */
  4952. priv->ucode_code.len = inst_size;
  4953. priv->ucode_code.v_addr =
  4954. pci_alloc_consistent(priv->pci_dev,
  4955. priv->ucode_code.len,
  4956. &(priv->ucode_code.p_addr));
  4957. priv->ucode_data.len = data_size;
  4958. priv->ucode_data.v_addr =
  4959. pci_alloc_consistent(priv->pci_dev,
  4960. priv->ucode_data.len,
  4961. &(priv->ucode_data.p_addr));
  4962. priv->ucode_data_backup.len = data_size;
  4963. priv->ucode_data_backup.v_addr =
  4964. pci_alloc_consistent(priv->pci_dev,
  4965. priv->ucode_data_backup.len,
  4966. &(priv->ucode_data_backup.p_addr));
  4967. /* Initialization instructions and data */
  4968. priv->ucode_init.len = init_size;
  4969. priv->ucode_init.v_addr =
  4970. pci_alloc_consistent(priv->pci_dev,
  4971. priv->ucode_init.len,
  4972. &(priv->ucode_init.p_addr));
  4973. priv->ucode_init_data.len = init_data_size;
  4974. priv->ucode_init_data.v_addr =
  4975. pci_alloc_consistent(priv->pci_dev,
  4976. priv->ucode_init_data.len,
  4977. &(priv->ucode_init_data.p_addr));
  4978. /* Bootstrap (instructions only, no data) */
  4979. priv->ucode_boot.len = boot_size;
  4980. priv->ucode_boot.v_addr =
  4981. pci_alloc_consistent(priv->pci_dev,
  4982. priv->ucode_boot.len,
  4983. &(priv->ucode_boot.p_addr));
  4984. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  4985. !priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr ||
  4986. !priv->ucode_boot.v_addr || !priv->ucode_data_backup.v_addr)
  4987. goto err_pci_alloc;
  4988. /* Copy images into buffers for card's bus-master reads ... */
  4989. /* Runtime instructions (first block of data in file) */
  4990. src = &ucode->data[0];
  4991. len = priv->ucode_code.len;
  4992. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %d\n",
  4993. (int)len);
  4994. memcpy(priv->ucode_code.v_addr, src, len);
  4995. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  4996. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  4997. /* Runtime data (2nd block)
  4998. * NOTE: Copy into backup buffer will be done in iwl_up() */
  4999. src = &ucode->data[inst_size];
  5000. len = priv->ucode_data.len;
  5001. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %d\n",
  5002. (int)len);
  5003. memcpy(priv->ucode_data.v_addr, src, len);
  5004. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5005. /* Initialization instructions (3rd block) */
  5006. if (init_size) {
  5007. src = &ucode->data[inst_size + data_size];
  5008. len = priv->ucode_init.len;
  5009. IWL_DEBUG_INFO("Copying (but not loading) init instr len %d\n",
  5010. (int)len);
  5011. memcpy(priv->ucode_init.v_addr, src, len);
  5012. }
  5013. /* Initialization data (4th block) */
  5014. if (init_data_size) {
  5015. src = &ucode->data[inst_size + data_size + init_size];
  5016. len = priv->ucode_init_data.len;
  5017. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  5018. (int)len);
  5019. memcpy(priv->ucode_init_data.v_addr, src, len);
  5020. }
  5021. /* Bootstrap instructions (5th block) */
  5022. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5023. len = priv->ucode_boot.len;
  5024. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  5025. (int)len);
  5026. memcpy(priv->ucode_boot.v_addr, src, len);
  5027. /* We have our copies now, allow OS release its copies */
  5028. release_firmware(ucode_raw);
  5029. return 0;
  5030. err_pci_alloc:
  5031. IWL_ERROR("failed to allocate pci memory\n");
  5032. rc = -ENOMEM;
  5033. iwl_dealloc_ucode_pci(priv);
  5034. err_release:
  5035. release_firmware(ucode_raw);
  5036. error:
  5037. return rc;
  5038. }
  5039. /**
  5040. * iwl_set_ucode_ptrs - Set uCode address location
  5041. *
  5042. * Tell initialization uCode where to find runtime uCode.
  5043. *
  5044. * BSM registers initially contain pointers to initialization uCode.
  5045. * We need to replace them to load runtime uCode inst and data,
  5046. * and to save runtime data when powering down.
  5047. */
  5048. static int iwl_set_ucode_ptrs(struct iwl_priv *priv)
  5049. {
  5050. dma_addr_t pinst;
  5051. dma_addr_t pdata;
  5052. int rc = 0;
  5053. unsigned long flags;
  5054. /* bits 31:0 for 3945 */
  5055. pinst = priv->ucode_code.p_addr;
  5056. pdata = priv->ucode_data_backup.p_addr;
  5057. spin_lock_irqsave(&priv->lock, flags);
  5058. rc = iwl_grab_restricted_access(priv);
  5059. if (rc) {
  5060. spin_unlock_irqrestore(&priv->lock, flags);
  5061. return rc;
  5062. }
  5063. /* Tell bootstrap uCode where to find image to load */
  5064. iwl_write_restricted_reg(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5065. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5066. iwl_write_restricted_reg(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5067. priv->ucode_data.len);
  5068. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5069. * that all new ptr/size info is in place */
  5070. iwl_write_restricted_reg(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5071. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5072. iwl_release_restricted_access(priv);
  5073. spin_unlock_irqrestore(&priv->lock, flags);
  5074. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5075. return rc;
  5076. }
  5077. /**
  5078. * iwl_init_alive_start - Called after REPLY_ALIVE notification receieved
  5079. *
  5080. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5081. *
  5082. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5083. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5084. * (3945 does not contain this data).
  5085. *
  5086. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5087. */
  5088. static void iwl_init_alive_start(struct iwl_priv *priv)
  5089. {
  5090. /* Check alive response for "valid" sign from uCode */
  5091. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5092. /* We had an error bringing up the hardware, so take it
  5093. * all the way back down so we can try again */
  5094. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5095. goto restart;
  5096. }
  5097. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5098. * This is a paranoid check, because we would not have gotten the
  5099. * "initialize" alive if code weren't properly loaded. */
  5100. if (iwl_verify_ucode(priv)) {
  5101. /* Runtime instruction load was bad;
  5102. * take it all the way back down so we can try again */
  5103. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5104. goto restart;
  5105. }
  5106. /* Send pointers to protocol/runtime uCode image ... init code will
  5107. * load and launch runtime uCode, which will send us another "Alive"
  5108. * notification. */
  5109. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5110. if (iwl_set_ucode_ptrs(priv)) {
  5111. /* Runtime instruction load won't happen;
  5112. * take it all the way back down so we can try again */
  5113. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5114. goto restart;
  5115. }
  5116. return;
  5117. restart:
  5118. queue_work(priv->workqueue, &priv->restart);
  5119. }
  5120. /**
  5121. * iwl_alive_start - called after REPLY_ALIVE notification received
  5122. * from protocol/runtime uCode (initialization uCode's
  5123. * Alive gets handled by iwl_init_alive_start()).
  5124. */
  5125. static void iwl_alive_start(struct iwl_priv *priv)
  5126. {
  5127. int rc = 0;
  5128. int thermal_spin = 0;
  5129. u32 rfkill;
  5130. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5131. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5132. /* We had an error bringing up the hardware, so take it
  5133. * all the way back down so we can try again */
  5134. IWL_DEBUG_INFO("Alive failed.\n");
  5135. goto restart;
  5136. }
  5137. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5138. * This is a paranoid check, because we would not have gotten the
  5139. * "runtime" alive if code weren't properly loaded. */
  5140. if (iwl_verify_ucode(priv)) {
  5141. /* Runtime instruction load was bad;
  5142. * take it all the way back down so we can try again */
  5143. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5144. goto restart;
  5145. }
  5146. iwl_clear_stations_table(priv);
  5147. rc = iwl_grab_restricted_access(priv);
  5148. if (rc) {
  5149. IWL_WARNING("Can not read rfkill status from adapter\n");
  5150. return;
  5151. }
  5152. rfkill = iwl_read_restricted_reg(priv, APMG_RFKILL_REG);
  5153. IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
  5154. iwl_release_restricted_access(priv);
  5155. if (rfkill & 0x1) {
  5156. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5157. /* if rfkill is not on, then wait for thermal
  5158. * sensor in adapter to kick in */
  5159. while (iwl_hw_get_temperature(priv) == 0) {
  5160. thermal_spin++;
  5161. udelay(10);
  5162. }
  5163. if (thermal_spin)
  5164. IWL_DEBUG_INFO("Thermal calibration took %dus\n",
  5165. thermal_spin * 10);
  5166. } else
  5167. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5168. /* After the ALIVE response, we can process host commands */
  5169. set_bit(STATUS_ALIVE, &priv->status);
  5170. /* Clear out the uCode error bit if it is set */
  5171. clear_bit(STATUS_FW_ERROR, &priv->status);
  5172. rc = iwl_init_channel_map(priv);
  5173. if (rc) {
  5174. IWL_ERROR("initializing regulatory failed: %d\n", rc);
  5175. return;
  5176. }
  5177. iwl_init_geos(priv);
  5178. if (iwl_is_rfkill(priv))
  5179. return;
  5180. if (!priv->mac80211_registered) {
  5181. /* Unlock so any user space entry points can call back into
  5182. * the driver without a deadlock... */
  5183. mutex_unlock(&priv->mutex);
  5184. iwl_rate_control_register(priv->hw);
  5185. rc = ieee80211_register_hw(priv->hw);
  5186. priv->hw->conf.beacon_int = 100;
  5187. mutex_lock(&priv->mutex);
  5188. if (rc) {
  5189. IWL_ERROR("Failed to register network "
  5190. "device (error %d)\n", rc);
  5191. return;
  5192. }
  5193. priv->mac80211_registered = 1;
  5194. iwl_reset_channel_flag(priv);
  5195. } else
  5196. ieee80211_start_queues(priv->hw);
  5197. priv->active_rate = priv->rates_mask;
  5198. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5199. iwl_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5200. if (iwl_is_associated(priv)) {
  5201. struct iwl_rxon_cmd *active_rxon =
  5202. (struct iwl_rxon_cmd *)(&priv->active_rxon);
  5203. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5204. sizeof(priv->staging_rxon));
  5205. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5206. } else {
  5207. /* Initialize our rx_config data */
  5208. iwl_connection_init_rx_config(priv);
  5209. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5210. }
  5211. /* Configure BT coexistence */
  5212. iwl_send_bt_config(priv);
  5213. /* Configure the adapter for unassociated operation */
  5214. iwl_commit_rxon(priv);
  5215. /* At this point, the NIC is initialized and operational */
  5216. priv->notif_missed_beacons = 0;
  5217. set_bit(STATUS_READY, &priv->status);
  5218. iwl3945_reg_txpower_periodic(priv);
  5219. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5220. if (priv->error_recovering)
  5221. iwl_error_recovery(priv);
  5222. return;
  5223. restart:
  5224. queue_work(priv->workqueue, &priv->restart);
  5225. }
  5226. static void iwl_cancel_deferred_work(struct iwl_priv *priv);
  5227. static void __iwl_down(struct iwl_priv *priv)
  5228. {
  5229. unsigned long flags;
  5230. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5231. struct ieee80211_conf *conf = NULL;
  5232. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5233. conf = ieee80211_get_hw_conf(priv->hw);
  5234. if (!exit_pending)
  5235. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5236. iwl_clear_stations_table(priv);
  5237. /* Unblock any waiting calls */
  5238. wake_up_interruptible_all(&priv->wait_command_queue);
  5239. iwl_cancel_deferred_work(priv);
  5240. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5241. * exiting the module */
  5242. if (!exit_pending)
  5243. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5244. /* stop and reset the on-board processor */
  5245. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5246. /* tell the device to stop sending interrupts */
  5247. iwl_disable_interrupts(priv);
  5248. if (priv->mac80211_registered)
  5249. ieee80211_stop_queues(priv->hw);
  5250. /* If we have not previously called iwl_init() then
  5251. * clear all bits but the RF Kill and SUSPEND bits and return */
  5252. if (!iwl_is_init(priv)) {
  5253. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5254. STATUS_RF_KILL_HW |
  5255. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5256. STATUS_RF_KILL_SW |
  5257. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5258. STATUS_IN_SUSPEND;
  5259. goto exit;
  5260. }
  5261. /* ...otherwise clear out all the status bits but the RF Kill and
  5262. * SUSPEND bits and continue taking the NIC down. */
  5263. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5264. STATUS_RF_KILL_HW |
  5265. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5266. STATUS_RF_KILL_SW |
  5267. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5268. STATUS_IN_SUSPEND |
  5269. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5270. STATUS_FW_ERROR;
  5271. spin_lock_irqsave(&priv->lock, flags);
  5272. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5273. spin_unlock_irqrestore(&priv->lock, flags);
  5274. iwl_hw_txq_ctx_stop(priv);
  5275. iwl_hw_rxq_stop(priv);
  5276. spin_lock_irqsave(&priv->lock, flags);
  5277. if (!iwl_grab_restricted_access(priv)) {
  5278. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  5279. APMG_CLK_VAL_DMA_CLK_RQT);
  5280. iwl_release_restricted_access(priv);
  5281. }
  5282. spin_unlock_irqrestore(&priv->lock, flags);
  5283. udelay(5);
  5284. iwl_hw_nic_stop_master(priv);
  5285. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5286. iwl_hw_nic_reset(priv);
  5287. exit:
  5288. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  5289. if (priv->ibss_beacon)
  5290. dev_kfree_skb(priv->ibss_beacon);
  5291. priv->ibss_beacon = NULL;
  5292. /* clear out any free frames */
  5293. iwl_clear_free_frames(priv);
  5294. }
  5295. static void iwl_down(struct iwl_priv *priv)
  5296. {
  5297. mutex_lock(&priv->mutex);
  5298. __iwl_down(priv);
  5299. mutex_unlock(&priv->mutex);
  5300. }
  5301. #define MAX_HW_RESTARTS 5
  5302. static int __iwl_up(struct iwl_priv *priv)
  5303. {
  5304. DECLARE_MAC_BUF(mac);
  5305. int rc, i;
  5306. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5307. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5308. return -EIO;
  5309. }
  5310. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5311. IWL_WARNING("Radio disabled by SW RF kill (module "
  5312. "parameter)\n");
  5313. return 0;
  5314. }
  5315. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5316. rc = iwl_hw_nic_init(priv);
  5317. if (rc) {
  5318. IWL_ERROR("Unable to int nic\n");
  5319. return rc;
  5320. }
  5321. /* make sure rfkill handshake bits are cleared */
  5322. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5323. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5324. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5325. /* clear (again), then enable host interrupts */
  5326. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  5327. iwl_enable_interrupts(priv);
  5328. /* really make sure rfkill handshake bits are cleared */
  5329. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5330. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5331. /* Copy original ucode data image from disk into backup cache.
  5332. * This will be used to initialize the on-board processor's
  5333. * data SRAM for a clean start when the runtime program first loads. */
  5334. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5335. priv->ucode_data.len);
  5336. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5337. iwl_clear_stations_table(priv);
  5338. /* load bootstrap state machine,
  5339. * load bootstrap program into processor's memory,
  5340. * prepare to load the "initialize" uCode */
  5341. rc = iwl_load_bsm(priv);
  5342. if (rc) {
  5343. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5344. continue;
  5345. }
  5346. /* start card; "initialize" will load runtime ucode */
  5347. iwl_nic_start(priv);
  5348. /* MAC Address location in EEPROM same for 3945/4965 */
  5349. get_eeprom_mac(priv, priv->mac_addr);
  5350. IWL_DEBUG_INFO("MAC address: %s\n",
  5351. print_mac(mac, priv->mac_addr));
  5352. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5353. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5354. return 0;
  5355. }
  5356. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5357. __iwl_down(priv);
  5358. /* tried to restart and config the device for as long as our
  5359. * patience could withstand */
  5360. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5361. return -EIO;
  5362. }
  5363. /*****************************************************************************
  5364. *
  5365. * Workqueue callbacks
  5366. *
  5367. *****************************************************************************/
  5368. static void iwl_bg_init_alive_start(struct work_struct *data)
  5369. {
  5370. struct iwl_priv *priv =
  5371. container_of(data, struct iwl_priv, init_alive_start.work);
  5372. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5373. return;
  5374. mutex_lock(&priv->mutex);
  5375. iwl_init_alive_start(priv);
  5376. mutex_unlock(&priv->mutex);
  5377. }
  5378. static void iwl_bg_alive_start(struct work_struct *data)
  5379. {
  5380. struct iwl_priv *priv =
  5381. container_of(data, struct iwl_priv, alive_start.work);
  5382. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5383. return;
  5384. mutex_lock(&priv->mutex);
  5385. iwl_alive_start(priv);
  5386. mutex_unlock(&priv->mutex);
  5387. }
  5388. static void iwl_bg_rf_kill(struct work_struct *work)
  5389. {
  5390. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  5391. wake_up_interruptible(&priv->wait_command_queue);
  5392. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5393. return;
  5394. mutex_lock(&priv->mutex);
  5395. if (!iwl_is_rfkill(priv)) {
  5396. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5397. "HW and/or SW RF Kill no longer active, restarting "
  5398. "device\n");
  5399. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5400. queue_work(priv->workqueue, &priv->restart);
  5401. } else {
  5402. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5403. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5404. "disabled by SW switch\n");
  5405. else
  5406. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5407. "Kill switch must be turned off for "
  5408. "wireless networking to work.\n");
  5409. }
  5410. mutex_unlock(&priv->mutex);
  5411. }
  5412. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5413. static void iwl_bg_scan_check(struct work_struct *data)
  5414. {
  5415. struct iwl_priv *priv =
  5416. container_of(data, struct iwl_priv, scan_check.work);
  5417. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5418. return;
  5419. mutex_lock(&priv->mutex);
  5420. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5421. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5422. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5423. "Scan completion watchdog resetting adapter (%dms)\n",
  5424. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5425. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5426. queue_work(priv->workqueue, &priv->restart);
  5427. }
  5428. mutex_unlock(&priv->mutex);
  5429. }
  5430. static void iwl_bg_request_scan(struct work_struct *data)
  5431. {
  5432. struct iwl_priv *priv =
  5433. container_of(data, struct iwl_priv, request_scan);
  5434. struct iwl_host_cmd cmd = {
  5435. .id = REPLY_SCAN_CMD,
  5436. .len = sizeof(struct iwl_scan_cmd),
  5437. .meta.flags = CMD_SIZE_HUGE,
  5438. };
  5439. int rc = 0;
  5440. struct iwl_scan_cmd *scan;
  5441. struct ieee80211_conf *conf = NULL;
  5442. u8 direct_mask;
  5443. int phymode;
  5444. conf = ieee80211_get_hw_conf(priv->hw);
  5445. mutex_lock(&priv->mutex);
  5446. if (!iwl_is_ready(priv)) {
  5447. IWL_WARNING("request scan called when driver not ready.\n");
  5448. goto done;
  5449. }
  5450. /* Make sure the scan wasn't cancelled before this queued work
  5451. * was given the chance to run... */
  5452. if (!test_bit(STATUS_SCANNING, &priv->status))
  5453. goto done;
  5454. /* This should never be called or scheduled if there is currently
  5455. * a scan active in the hardware. */
  5456. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5457. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5458. "Ignoring second request.\n");
  5459. rc = -EIO;
  5460. goto done;
  5461. }
  5462. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5463. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5464. goto done;
  5465. }
  5466. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5467. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5468. goto done;
  5469. }
  5470. if (iwl_is_rfkill(priv)) {
  5471. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5472. goto done;
  5473. }
  5474. if (!test_bit(STATUS_READY, &priv->status)) {
  5475. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5476. goto done;
  5477. }
  5478. if (!priv->scan_bands) {
  5479. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5480. goto done;
  5481. }
  5482. if (!priv->scan) {
  5483. priv->scan = kmalloc(sizeof(struct iwl_scan_cmd) +
  5484. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5485. if (!priv->scan) {
  5486. rc = -ENOMEM;
  5487. goto done;
  5488. }
  5489. }
  5490. scan = priv->scan;
  5491. memset(scan, 0, sizeof(struct iwl_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5492. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5493. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5494. if (iwl_is_associated(priv)) {
  5495. u16 interval = 0;
  5496. u32 extra;
  5497. u32 suspend_time = 100;
  5498. u32 scan_suspend_time = 100;
  5499. unsigned long flags;
  5500. IWL_DEBUG_INFO("Scanning while associated...\n");
  5501. spin_lock_irqsave(&priv->lock, flags);
  5502. interval = priv->beacon_int;
  5503. spin_unlock_irqrestore(&priv->lock, flags);
  5504. scan->suspend_time = 0;
  5505. scan->max_out_time = cpu_to_le32(600 * 1024);
  5506. if (!interval)
  5507. interval = suspend_time;
  5508. /*
  5509. * suspend time format:
  5510. * 0-19: beacon interval in usec (time before exec.)
  5511. * 20-23: 0
  5512. * 24-31: number of beacons (suspend between channels)
  5513. */
  5514. extra = (suspend_time / interval) << 24;
  5515. scan_suspend_time = 0xFF0FFFFF &
  5516. (extra | ((suspend_time % interval) * 1024));
  5517. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5518. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5519. scan_suspend_time, interval);
  5520. }
  5521. /* We should add the ability for user to lock to PASSIVE ONLY */
  5522. if (priv->one_direct_scan) {
  5523. IWL_DEBUG_SCAN
  5524. ("Kicking off one direct scan for '%s'\n",
  5525. iwl_escape_essid(priv->direct_ssid,
  5526. priv->direct_ssid_len));
  5527. scan->direct_scan[0].id = WLAN_EID_SSID;
  5528. scan->direct_scan[0].len = priv->direct_ssid_len;
  5529. memcpy(scan->direct_scan[0].ssid,
  5530. priv->direct_ssid, priv->direct_ssid_len);
  5531. direct_mask = 1;
  5532. } else if (!iwl_is_associated(priv)) {
  5533. scan->direct_scan[0].id = WLAN_EID_SSID;
  5534. scan->direct_scan[0].len = priv->essid_len;
  5535. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5536. direct_mask = 1;
  5537. } else
  5538. direct_mask = 0;
  5539. /* We don't build a direct scan probe request; the uCode will do
  5540. * that based on the direct_mask added to each channel entry */
  5541. scan->tx_cmd.len = cpu_to_le16(
  5542. iwl_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5543. IWL_MAX_SCAN_SIZE - sizeof(scan), 0));
  5544. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5545. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5546. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5547. /* flags + rate selection */
  5548. switch (priv->scan_bands) {
  5549. case 2:
  5550. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5551. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  5552. scan->good_CRC_th = 0;
  5553. phymode = MODE_IEEE80211G;
  5554. break;
  5555. case 1:
  5556. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  5557. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5558. phymode = MODE_IEEE80211A;
  5559. break;
  5560. default:
  5561. IWL_WARNING("Invalid scan band count\n");
  5562. goto done;
  5563. }
  5564. /* select Rx antennas */
  5565. scan->flags |= iwl3945_get_antenna_flags(priv);
  5566. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5567. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5568. if (direct_mask)
  5569. IWL_DEBUG_SCAN
  5570. ("Initiating direct scan for %s.\n",
  5571. iwl_escape_essid(priv->essid, priv->essid_len));
  5572. else
  5573. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5574. scan->channel_count =
  5575. iwl_get_channels_for_scan(
  5576. priv, phymode, 1, /* active */
  5577. direct_mask,
  5578. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5579. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5580. scan->channel_count * sizeof(struct iwl_scan_channel);
  5581. cmd.data = scan;
  5582. scan->len = cpu_to_le16(cmd.len);
  5583. set_bit(STATUS_SCAN_HW, &priv->status);
  5584. rc = iwl_send_cmd_sync(priv, &cmd);
  5585. if (rc)
  5586. goto done;
  5587. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5588. IWL_SCAN_CHECK_WATCHDOG);
  5589. mutex_unlock(&priv->mutex);
  5590. return;
  5591. done:
  5592. /* inform mac80211 sacn aborted */
  5593. queue_work(priv->workqueue, &priv->scan_completed);
  5594. mutex_unlock(&priv->mutex);
  5595. }
  5596. static void iwl_bg_up(struct work_struct *data)
  5597. {
  5598. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  5599. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5600. return;
  5601. mutex_lock(&priv->mutex);
  5602. __iwl_up(priv);
  5603. mutex_unlock(&priv->mutex);
  5604. }
  5605. static void iwl_bg_restart(struct work_struct *data)
  5606. {
  5607. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  5608. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5609. return;
  5610. iwl_down(priv);
  5611. queue_work(priv->workqueue, &priv->up);
  5612. }
  5613. static void iwl_bg_rx_replenish(struct work_struct *data)
  5614. {
  5615. struct iwl_priv *priv =
  5616. container_of(data, struct iwl_priv, rx_replenish);
  5617. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5618. return;
  5619. mutex_lock(&priv->mutex);
  5620. iwl_rx_replenish(priv);
  5621. mutex_unlock(&priv->mutex);
  5622. }
  5623. static void iwl_bg_post_associate(struct work_struct *data)
  5624. {
  5625. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5626. post_associate.work);
  5627. int rc = 0;
  5628. struct ieee80211_conf *conf = NULL;
  5629. DECLARE_MAC_BUF(mac);
  5630. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5631. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5632. return;
  5633. }
  5634. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5635. priv->assoc_id,
  5636. print_mac(mac, priv->active_rxon.bssid_addr));
  5637. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5638. return;
  5639. mutex_lock(&priv->mutex);
  5640. conf = ieee80211_get_hw_conf(priv->hw);
  5641. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5642. iwl_commit_rxon(priv);
  5643. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  5644. iwl_setup_rxon_timing(priv);
  5645. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5646. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5647. if (rc)
  5648. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5649. "Attempting to continue.\n");
  5650. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5651. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5652. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5653. priv->assoc_id, priv->beacon_int);
  5654. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5655. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5656. else
  5657. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5658. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5659. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5660. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5661. else
  5662. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5663. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5664. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5665. }
  5666. iwl_commit_rxon(priv);
  5667. switch (priv->iw_mode) {
  5668. case IEEE80211_IF_TYPE_STA:
  5669. iwl_rate_scale_init(priv->hw, IWL_AP_ID);
  5670. break;
  5671. case IEEE80211_IF_TYPE_IBSS:
  5672. /* clear out the station table */
  5673. iwl_clear_stations_table(priv);
  5674. iwl_add_station(priv, BROADCAST_ADDR, 0, 0);
  5675. iwl_add_station(priv, priv->bssid, 0, 0);
  5676. iwl3945_sync_sta(priv, IWL_STA_ID,
  5677. (priv->phymode == MODE_IEEE80211A)?
  5678. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  5679. CMD_ASYNC);
  5680. iwl_rate_scale_init(priv->hw, IWL_STA_ID);
  5681. iwl_send_beacon_cmd(priv);
  5682. break;
  5683. default:
  5684. IWL_ERROR("%s Should not be called in %d mode\n",
  5685. __FUNCTION__, priv->iw_mode);
  5686. break;
  5687. }
  5688. iwl_sequence_reset(priv);
  5689. #ifdef CONFIG_IWLWIFI_QOS
  5690. iwl_activate_qos(priv, 0);
  5691. #endif /* CONFIG_IWLWIFI_QOS */
  5692. mutex_unlock(&priv->mutex);
  5693. }
  5694. static void iwl_bg_abort_scan(struct work_struct *work)
  5695. {
  5696. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  5697. abort_scan);
  5698. if (!iwl_is_ready(priv))
  5699. return;
  5700. mutex_lock(&priv->mutex);
  5701. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5702. iwl_send_scan_abort(priv);
  5703. mutex_unlock(&priv->mutex);
  5704. }
  5705. static void iwl_bg_scan_completed(struct work_struct *work)
  5706. {
  5707. struct iwl_priv *priv =
  5708. container_of(work, struct iwl_priv, scan_completed);
  5709. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5710. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5711. return;
  5712. ieee80211_scan_completed(priv->hw);
  5713. /* Since setting the TXPOWER may have been deferred while
  5714. * performing the scan, fire one off */
  5715. mutex_lock(&priv->mutex);
  5716. iwl_hw_reg_send_txpower(priv);
  5717. mutex_unlock(&priv->mutex);
  5718. }
  5719. /*****************************************************************************
  5720. *
  5721. * mac80211 entry point functions
  5722. *
  5723. *****************************************************************************/
  5724. static int iwl_mac_start(struct ieee80211_hw *hw)
  5725. {
  5726. struct iwl_priv *priv = hw->priv;
  5727. IWL_DEBUG_MAC80211("enter\n");
  5728. /* we should be verifying the device is ready to be opened */
  5729. mutex_lock(&priv->mutex);
  5730. priv->is_open = 1;
  5731. if (!iwl_is_rfkill(priv))
  5732. ieee80211_start_queues(priv->hw);
  5733. mutex_unlock(&priv->mutex);
  5734. IWL_DEBUG_MAC80211("leave\n");
  5735. return 0;
  5736. }
  5737. static void iwl_mac_stop(struct ieee80211_hw *hw)
  5738. {
  5739. struct iwl_priv *priv = hw->priv;
  5740. IWL_DEBUG_MAC80211("enter\n");
  5741. priv->is_open = 0;
  5742. /*netif_stop_queue(dev); */
  5743. flush_workqueue(priv->workqueue);
  5744. IWL_DEBUG_MAC80211("leave\n");
  5745. }
  5746. static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5747. struct ieee80211_tx_control *ctl)
  5748. {
  5749. struct iwl_priv *priv = hw->priv;
  5750. IWL_DEBUG_MAC80211("enter\n");
  5751. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5752. IWL_DEBUG_MAC80211("leave - monitor\n");
  5753. return -1;
  5754. }
  5755. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5756. ctl->tx_rate);
  5757. if (iwl_tx_skb(priv, skb, ctl))
  5758. dev_kfree_skb_any(skb);
  5759. IWL_DEBUG_MAC80211("leave\n");
  5760. return 0;
  5761. }
  5762. static int iwl_mac_add_interface(struct ieee80211_hw *hw,
  5763. struct ieee80211_if_init_conf *conf)
  5764. {
  5765. struct iwl_priv *priv = hw->priv;
  5766. unsigned long flags;
  5767. DECLARE_MAC_BUF(mac);
  5768. IWL_DEBUG_MAC80211("enter: id %d, type %d\n", conf->if_id, conf->type);
  5769. if (conf->mac_addr)
  5770. IWL_DEBUG_MAC80211("enter: MAC %s\n",
  5771. print_mac(mac, conf->mac_addr));
  5772. if (priv->interface_id) {
  5773. IWL_DEBUG_MAC80211("leave - interface_id != 0\n");
  5774. return 0;
  5775. }
  5776. spin_lock_irqsave(&priv->lock, flags);
  5777. priv->interface_id = conf->if_id;
  5778. spin_unlock_irqrestore(&priv->lock, flags);
  5779. mutex_lock(&priv->mutex);
  5780. iwl_set_mode(priv, conf->type);
  5781. IWL_DEBUG_MAC80211("leave\n");
  5782. mutex_unlock(&priv->mutex);
  5783. return 0;
  5784. }
  5785. /**
  5786. * iwl_mac_config - mac80211 config callback
  5787. *
  5788. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5789. * be set inappropriately and the driver currently sets the hardware up to
  5790. * use it whenever needed.
  5791. */
  5792. static int iwl_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5793. {
  5794. struct iwl_priv *priv = hw->priv;
  5795. const struct iwl_channel_info *ch_info;
  5796. unsigned long flags;
  5797. mutex_lock(&priv->mutex);
  5798. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel);
  5799. if (!iwl_is_ready(priv)) {
  5800. IWL_DEBUG_MAC80211("leave - not ready\n");
  5801. mutex_unlock(&priv->mutex);
  5802. return -EIO;
  5803. }
  5804. /* TODO: Figure out how to get ieee80211_local->sta_scanning w/ only
  5805. * what is exposed through include/ declrations */
  5806. if (unlikely(!iwl_param_disable_hw_scan &&
  5807. test_bit(STATUS_SCANNING, &priv->status))) {
  5808. IWL_DEBUG_MAC80211("leave - scanning\n");
  5809. mutex_unlock(&priv->mutex);
  5810. return 0;
  5811. }
  5812. spin_lock_irqsave(&priv->lock, flags);
  5813. ch_info = iwl_get_channel_info(priv, conf->phymode, conf->channel);
  5814. if (!is_channel_valid(ch_info)) {
  5815. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n",
  5816. conf->channel, conf->phymode);
  5817. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5818. spin_unlock_irqrestore(&priv->lock, flags);
  5819. mutex_unlock(&priv->mutex);
  5820. return -EINVAL;
  5821. }
  5822. iwl_set_rxon_channel(priv, conf->phymode, conf->channel);
  5823. iwl_set_flags_for_phymode(priv, conf->phymode);
  5824. /* The list of supported rates and rate mask can be different
  5825. * for each phymode; since the phymode may have changed, reset
  5826. * the rate mask to what mac80211 lists */
  5827. iwl_set_rate(priv);
  5828. spin_unlock_irqrestore(&priv->lock, flags);
  5829. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5830. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  5831. iwl_hw_channel_switch(priv, conf->channel);
  5832. mutex_unlock(&priv->mutex);
  5833. return 0;
  5834. }
  5835. #endif
  5836. iwl_radio_kill_sw(priv, !conf->radio_enabled);
  5837. if (!conf->radio_enabled) {
  5838. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  5839. mutex_unlock(&priv->mutex);
  5840. return 0;
  5841. }
  5842. if (iwl_is_rfkill(priv)) {
  5843. IWL_DEBUG_MAC80211("leave - RF kill\n");
  5844. mutex_unlock(&priv->mutex);
  5845. return -EIO;
  5846. }
  5847. iwl_set_rate(priv);
  5848. if (memcmp(&priv->active_rxon,
  5849. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  5850. iwl_commit_rxon(priv);
  5851. else
  5852. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  5853. IWL_DEBUG_MAC80211("leave\n");
  5854. mutex_unlock(&priv->mutex);
  5855. return 0;
  5856. }
  5857. static void iwl_config_ap(struct iwl_priv *priv)
  5858. {
  5859. int rc = 0;
  5860. if (priv->status & STATUS_EXIT_PENDING)
  5861. return;
  5862. /* The following should be done only at AP bring up */
  5863. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  5864. /* RXON - unassoc (to set timing command) */
  5865. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5866. iwl_commit_rxon(priv);
  5867. /* RXON Timing */
  5868. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  5869. iwl_setup_rxon_timing(priv);
  5870. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5871. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5872. if (rc)
  5873. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5874. "Attempting to continue.\n");
  5875. /* FIXME: what should be the assoc_id for AP? */
  5876. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5877. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5878. priv->staging_rxon.flags |=
  5879. RXON_FLG_SHORT_PREAMBLE_MSK;
  5880. else
  5881. priv->staging_rxon.flags &=
  5882. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5883. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5884. if (priv->assoc_capability &
  5885. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5886. priv->staging_rxon.flags |=
  5887. RXON_FLG_SHORT_SLOT_MSK;
  5888. else
  5889. priv->staging_rxon.flags &=
  5890. ~RXON_FLG_SHORT_SLOT_MSK;
  5891. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5892. priv->staging_rxon.flags &=
  5893. ~RXON_FLG_SHORT_SLOT_MSK;
  5894. }
  5895. /* restore RXON assoc */
  5896. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5897. iwl_commit_rxon(priv);
  5898. iwl_add_station(priv, BROADCAST_ADDR, 0, 0);
  5899. }
  5900. iwl_send_beacon_cmd(priv);
  5901. /* FIXME - we need to add code here to detect a totally new
  5902. * configuration, reset the AP, unassoc, rxon timing, assoc,
  5903. * clear sta table, add BCAST sta... */
  5904. }
  5905. static int iwl_mac_config_interface(struct ieee80211_hw *hw, int if_id,
  5906. struct ieee80211_if_conf *conf)
  5907. {
  5908. struct iwl_priv *priv = hw->priv;
  5909. DECLARE_MAC_BUF(mac);
  5910. unsigned long flags;
  5911. int rc;
  5912. if (conf == NULL)
  5913. return -EIO;
  5914. /* XXX: this MUST use conf->mac_addr */
  5915. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  5916. (!conf->beacon || !conf->ssid_len)) {
  5917. IWL_DEBUG_MAC80211
  5918. ("Leaving in AP mode because HostAPD is not ready.\n");
  5919. return 0;
  5920. }
  5921. mutex_lock(&priv->mutex);
  5922. IWL_DEBUG_MAC80211("enter: interface id %d\n", if_id);
  5923. if (conf->bssid)
  5924. IWL_DEBUG_MAC80211("bssid: %s\n",
  5925. print_mac(mac, conf->bssid));
  5926. /*
  5927. * very dubious code was here; the probe filtering flag is never set:
  5928. *
  5929. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  5930. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  5931. */
  5932. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  5933. IWL_DEBUG_MAC80211("leave - scanning\n");
  5934. mutex_unlock(&priv->mutex);
  5935. return 0;
  5936. }
  5937. if (priv->interface_id != if_id) {
  5938. IWL_DEBUG_MAC80211("leave - interface_id != if_id\n");
  5939. mutex_unlock(&priv->mutex);
  5940. return 0;
  5941. }
  5942. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5943. if (!conf->bssid) {
  5944. conf->bssid = priv->mac_addr;
  5945. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  5946. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  5947. print_mac(mac, conf->bssid));
  5948. }
  5949. if (priv->ibss_beacon)
  5950. dev_kfree_skb(priv->ibss_beacon);
  5951. priv->ibss_beacon = conf->beacon;
  5952. }
  5953. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  5954. !is_multicast_ether_addr(conf->bssid)) {
  5955. /* If there is currently a HW scan going on in the background
  5956. * then we need to cancel it else the RXON below will fail. */
  5957. if (iwl_scan_cancel_timeout(priv, 100)) {
  5958. IWL_WARNING("Aborted scan still in progress "
  5959. "after 100ms\n");
  5960. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  5961. mutex_unlock(&priv->mutex);
  5962. return -EAGAIN;
  5963. }
  5964. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  5965. /* TODO: Audit driver for usage of these members and see
  5966. * if mac80211 deprecates them (priv->bssid looks like it
  5967. * shouldn't be there, but I haven't scanned the IBSS code
  5968. * to verify) - jpk */
  5969. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  5970. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5971. iwl_config_ap(priv);
  5972. else {
  5973. priv->staging_rxon.filter_flags |=
  5974. RXON_FILTER_ASSOC_MSK;
  5975. rc = iwl_commit_rxon(priv);
  5976. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  5977. iwl_add_station(priv,
  5978. priv->active_rxon.bssid_addr, 1, 0);
  5979. }
  5980. } else {
  5981. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5982. iwl_commit_rxon(priv);
  5983. }
  5984. spin_lock_irqsave(&priv->lock, flags);
  5985. if (!conf->ssid_len)
  5986. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5987. else
  5988. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  5989. priv->essid_len = conf->ssid_len;
  5990. spin_unlock_irqrestore(&priv->lock, flags);
  5991. IWL_DEBUG_MAC80211("leave\n");
  5992. mutex_unlock(&priv->mutex);
  5993. return 0;
  5994. }
  5995. static void iwl_configure_filter(struct ieee80211_hw *hw,
  5996. unsigned int changed_flags,
  5997. unsigned int *total_flags,
  5998. int mc_count, struct dev_addr_list *mc_list)
  5999. {
  6000. /*
  6001. * XXX: dummy
  6002. * see also iwl_connection_init_rx_config
  6003. */
  6004. *total_flags = 0;
  6005. }
  6006. static void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  6007. struct ieee80211_if_init_conf *conf)
  6008. {
  6009. struct iwl_priv *priv = hw->priv;
  6010. IWL_DEBUG_MAC80211("enter\n");
  6011. mutex_lock(&priv->mutex);
  6012. if (priv->interface_id == conf->if_id) {
  6013. priv->interface_id = 0;
  6014. memset(priv->bssid, 0, ETH_ALEN);
  6015. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6016. priv->essid_len = 0;
  6017. }
  6018. mutex_unlock(&priv->mutex);
  6019. IWL_DEBUG_MAC80211("leave\n");
  6020. }
  6021. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  6022. static int iwl_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6023. {
  6024. int rc = 0;
  6025. unsigned long flags;
  6026. struct iwl_priv *priv = hw->priv;
  6027. IWL_DEBUG_MAC80211("enter\n");
  6028. spin_lock_irqsave(&priv->lock, flags);
  6029. if (!iwl_is_ready_rf(priv)) {
  6030. rc = -EIO;
  6031. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6032. goto out_unlock;
  6033. }
  6034. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6035. rc = -EIO;
  6036. IWL_ERROR("ERROR: APs don't scan\n");
  6037. goto out_unlock;
  6038. }
  6039. /* if we just finished scan ask for delay */
  6040. if (priv->last_scan_jiffies &&
  6041. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  6042. jiffies)) {
  6043. rc = -EAGAIN;
  6044. goto out_unlock;
  6045. }
  6046. if (len) {
  6047. IWL_DEBUG_SCAN("direct scan for "
  6048. "%s [%d]\n ",
  6049. iwl_escape_essid(ssid, len), (int)len);
  6050. priv->one_direct_scan = 1;
  6051. priv->direct_ssid_len = (u8)
  6052. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6053. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6054. }
  6055. rc = iwl_scan_initiate(priv);
  6056. IWL_DEBUG_MAC80211("leave\n");
  6057. out_unlock:
  6058. spin_unlock_irqrestore(&priv->lock, flags);
  6059. return rc;
  6060. }
  6061. static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6062. const u8 *local_addr, const u8 *addr,
  6063. struct ieee80211_key_conf *key)
  6064. {
  6065. struct iwl_priv *priv = hw->priv;
  6066. int rc = 0;
  6067. u8 sta_id;
  6068. IWL_DEBUG_MAC80211("enter\n");
  6069. if (!iwl_param_hwcrypto) {
  6070. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6071. return -EOPNOTSUPP;
  6072. }
  6073. if (is_zero_ether_addr(addr))
  6074. /* only support pairwise keys */
  6075. return -EOPNOTSUPP;
  6076. sta_id = iwl_hw_find_station(priv, addr);
  6077. if (sta_id == IWL_INVALID_STATION) {
  6078. DECLARE_MAC_BUF(mac);
  6079. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6080. print_mac(mac, addr));
  6081. return -EINVAL;
  6082. }
  6083. mutex_lock(&priv->mutex);
  6084. switch (cmd) {
  6085. case SET_KEY:
  6086. rc = iwl_update_sta_key_info(priv, key, sta_id);
  6087. if (!rc) {
  6088. iwl_set_rxon_hwcrypto(priv, 1);
  6089. iwl_commit_rxon(priv);
  6090. key->hw_key_idx = sta_id;
  6091. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6092. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6093. }
  6094. break;
  6095. case DISABLE_KEY:
  6096. rc = iwl_clear_sta_key_info(priv, sta_id);
  6097. if (!rc) {
  6098. iwl_set_rxon_hwcrypto(priv, 0);
  6099. iwl_commit_rxon(priv);
  6100. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6101. }
  6102. break;
  6103. default:
  6104. rc = -EINVAL;
  6105. }
  6106. IWL_DEBUG_MAC80211("leave\n");
  6107. mutex_unlock(&priv->mutex);
  6108. return rc;
  6109. }
  6110. static int iwl_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6111. const struct ieee80211_tx_queue_params *params)
  6112. {
  6113. struct iwl_priv *priv = hw->priv;
  6114. #ifdef CONFIG_IWLWIFI_QOS
  6115. unsigned long flags;
  6116. int q;
  6117. #endif /* CONFIG_IWL_QOS */
  6118. IWL_DEBUG_MAC80211("enter\n");
  6119. if (!iwl_is_ready_rf(priv)) {
  6120. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6121. return -EIO;
  6122. }
  6123. if (queue >= AC_NUM) {
  6124. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6125. return 0;
  6126. }
  6127. #ifdef CONFIG_IWLWIFI_QOS
  6128. if (!priv->qos_data.qos_enable) {
  6129. priv->qos_data.qos_active = 0;
  6130. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6131. return 0;
  6132. }
  6133. q = AC_NUM - 1 - queue;
  6134. spin_lock_irqsave(&priv->lock, flags);
  6135. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6136. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6137. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6138. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6139. cpu_to_le16((params->burst_time * 100));
  6140. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6141. priv->qos_data.qos_active = 1;
  6142. spin_unlock_irqrestore(&priv->lock, flags);
  6143. mutex_lock(&priv->mutex);
  6144. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6145. iwl_activate_qos(priv, 1);
  6146. else if (priv->assoc_id && iwl_is_associated(priv))
  6147. iwl_activate_qos(priv, 0);
  6148. mutex_unlock(&priv->mutex);
  6149. #endif /*CONFIG_IWLWIFI_QOS */
  6150. IWL_DEBUG_MAC80211("leave\n");
  6151. return 0;
  6152. }
  6153. static int iwl_mac_get_tx_stats(struct ieee80211_hw *hw,
  6154. struct ieee80211_tx_queue_stats *stats)
  6155. {
  6156. struct iwl_priv *priv = hw->priv;
  6157. int i, avail;
  6158. struct iwl_tx_queue *txq;
  6159. struct iwl_queue *q;
  6160. unsigned long flags;
  6161. IWL_DEBUG_MAC80211("enter\n");
  6162. if (!iwl_is_ready_rf(priv)) {
  6163. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6164. return -EIO;
  6165. }
  6166. spin_lock_irqsave(&priv->lock, flags);
  6167. for (i = 0; i < AC_NUM; i++) {
  6168. txq = &priv->txq[i];
  6169. q = &txq->q;
  6170. avail = iwl_queue_space(q);
  6171. stats->data[i].len = q->n_window - avail;
  6172. stats->data[i].limit = q->n_window - q->high_mark;
  6173. stats->data[i].count = q->n_window;
  6174. }
  6175. spin_unlock_irqrestore(&priv->lock, flags);
  6176. IWL_DEBUG_MAC80211("leave\n");
  6177. return 0;
  6178. }
  6179. static int iwl_mac_get_stats(struct ieee80211_hw *hw,
  6180. struct ieee80211_low_level_stats *stats)
  6181. {
  6182. IWL_DEBUG_MAC80211("enter\n");
  6183. IWL_DEBUG_MAC80211("leave\n");
  6184. return 0;
  6185. }
  6186. static u64 iwl_mac_get_tsf(struct ieee80211_hw *hw)
  6187. {
  6188. IWL_DEBUG_MAC80211("enter\n");
  6189. IWL_DEBUG_MAC80211("leave\n");
  6190. return 0;
  6191. }
  6192. static void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
  6193. {
  6194. struct iwl_priv *priv = hw->priv;
  6195. unsigned long flags;
  6196. mutex_lock(&priv->mutex);
  6197. IWL_DEBUG_MAC80211("enter\n");
  6198. #ifdef CONFIG_IWLWIFI_QOS
  6199. iwl_reset_qos(priv);
  6200. #endif
  6201. cancel_delayed_work(&priv->post_associate);
  6202. spin_lock_irqsave(&priv->lock, flags);
  6203. priv->assoc_id = 0;
  6204. priv->assoc_capability = 0;
  6205. priv->call_post_assoc_from_beacon = 0;
  6206. /* new association get rid of ibss beacon skb */
  6207. if (priv->ibss_beacon)
  6208. dev_kfree_skb(priv->ibss_beacon);
  6209. priv->ibss_beacon = NULL;
  6210. priv->beacon_int = priv->hw->conf.beacon_int;
  6211. priv->timestamp1 = 0;
  6212. priv->timestamp0 = 0;
  6213. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6214. priv->beacon_int = 0;
  6215. spin_unlock_irqrestore(&priv->lock, flags);
  6216. /* Per mac80211.h: This is only used in IBSS mode... */
  6217. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6218. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6219. mutex_unlock(&priv->mutex);
  6220. return;
  6221. }
  6222. if (!iwl_is_ready_rf(priv)) {
  6223. IWL_DEBUG_MAC80211("leave - not ready\n");
  6224. mutex_unlock(&priv->mutex);
  6225. return;
  6226. }
  6227. priv->only_active_channel = 0;
  6228. iwl_set_rate(priv);
  6229. mutex_unlock(&priv->mutex);
  6230. IWL_DEBUG_MAC80211("leave\n");
  6231. }
  6232. static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6233. struct ieee80211_tx_control *control)
  6234. {
  6235. struct iwl_priv *priv = hw->priv;
  6236. unsigned long flags;
  6237. mutex_lock(&priv->mutex);
  6238. IWL_DEBUG_MAC80211("enter\n");
  6239. if (!iwl_is_ready_rf(priv)) {
  6240. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6241. mutex_unlock(&priv->mutex);
  6242. return -EIO;
  6243. }
  6244. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6245. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6246. mutex_unlock(&priv->mutex);
  6247. return -EIO;
  6248. }
  6249. spin_lock_irqsave(&priv->lock, flags);
  6250. if (priv->ibss_beacon)
  6251. dev_kfree_skb(priv->ibss_beacon);
  6252. priv->ibss_beacon = skb;
  6253. priv->assoc_id = 0;
  6254. IWL_DEBUG_MAC80211("leave\n");
  6255. spin_unlock_irqrestore(&priv->lock, flags);
  6256. #ifdef CONFIG_IWLWIFI_QOS
  6257. iwl_reset_qos(priv);
  6258. #endif
  6259. queue_work(priv->workqueue, &priv->post_associate.work);
  6260. mutex_unlock(&priv->mutex);
  6261. return 0;
  6262. }
  6263. /*****************************************************************************
  6264. *
  6265. * sysfs attributes
  6266. *
  6267. *****************************************************************************/
  6268. #ifdef CONFIG_IWLWIFI_DEBUG
  6269. /*
  6270. * The following adds a new attribute to the sysfs representation
  6271. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6272. * used for controlling the debug level.
  6273. *
  6274. * See the level definitions in iwl for details.
  6275. */
  6276. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6277. {
  6278. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  6279. }
  6280. static ssize_t store_debug_level(struct device_driver *d,
  6281. const char *buf, size_t count)
  6282. {
  6283. char *p = (char *)buf;
  6284. u32 val;
  6285. val = simple_strtoul(p, &p, 0);
  6286. if (p == buf)
  6287. printk(KERN_INFO DRV_NAME
  6288. ": %s is not in hex or decimal form.\n", buf);
  6289. else
  6290. iwl_debug_level = val;
  6291. return strnlen(buf, count);
  6292. }
  6293. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6294. show_debug_level, store_debug_level);
  6295. #endif /* CONFIG_IWLWIFI_DEBUG */
  6296. static ssize_t show_rf_kill(struct device *d,
  6297. struct device_attribute *attr, char *buf)
  6298. {
  6299. /*
  6300. * 0 - RF kill not enabled
  6301. * 1 - SW based RF kill active (sysfs)
  6302. * 2 - HW based RF kill active
  6303. * 3 - Both HW and SW based RF kill active
  6304. */
  6305. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6306. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6307. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6308. return sprintf(buf, "%i\n", val);
  6309. }
  6310. static ssize_t store_rf_kill(struct device *d,
  6311. struct device_attribute *attr,
  6312. const char *buf, size_t count)
  6313. {
  6314. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6315. mutex_lock(&priv->mutex);
  6316. iwl_radio_kill_sw(priv, buf[0] == '1');
  6317. mutex_unlock(&priv->mutex);
  6318. return count;
  6319. }
  6320. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6321. static ssize_t show_temperature(struct device *d,
  6322. struct device_attribute *attr, char *buf)
  6323. {
  6324. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6325. if (!iwl_is_alive(priv))
  6326. return -EAGAIN;
  6327. return sprintf(buf, "%d\n", iwl_hw_get_temperature(priv));
  6328. }
  6329. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6330. static ssize_t show_rs_window(struct device *d,
  6331. struct device_attribute *attr,
  6332. char *buf)
  6333. {
  6334. struct iwl_priv *priv = d->driver_data;
  6335. return iwl_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6336. }
  6337. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6338. static ssize_t show_tx_power(struct device *d,
  6339. struct device_attribute *attr, char *buf)
  6340. {
  6341. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6342. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6343. }
  6344. static ssize_t store_tx_power(struct device *d,
  6345. struct device_attribute *attr,
  6346. const char *buf, size_t count)
  6347. {
  6348. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6349. char *p = (char *)buf;
  6350. u32 val;
  6351. val = simple_strtoul(p, &p, 10);
  6352. if (p == buf)
  6353. printk(KERN_INFO DRV_NAME
  6354. ": %s is not in decimal form.\n", buf);
  6355. else
  6356. iwl_hw_reg_set_txpower(priv, val);
  6357. return count;
  6358. }
  6359. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6360. static ssize_t show_flags(struct device *d,
  6361. struct device_attribute *attr, char *buf)
  6362. {
  6363. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6364. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6365. }
  6366. static ssize_t store_flags(struct device *d,
  6367. struct device_attribute *attr,
  6368. const char *buf, size_t count)
  6369. {
  6370. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6371. u32 flags = simple_strtoul(buf, NULL, 0);
  6372. mutex_lock(&priv->mutex);
  6373. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6374. /* Cancel any currently running scans... */
  6375. if (iwl_scan_cancel_timeout(priv, 100))
  6376. IWL_WARNING("Could not cancel scan.\n");
  6377. else {
  6378. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6379. flags);
  6380. priv->staging_rxon.flags = cpu_to_le32(flags);
  6381. iwl_commit_rxon(priv);
  6382. }
  6383. }
  6384. mutex_unlock(&priv->mutex);
  6385. return count;
  6386. }
  6387. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6388. static ssize_t show_filter_flags(struct device *d,
  6389. struct device_attribute *attr, char *buf)
  6390. {
  6391. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6392. return sprintf(buf, "0x%04X\n",
  6393. le32_to_cpu(priv->active_rxon.filter_flags));
  6394. }
  6395. static ssize_t store_filter_flags(struct device *d,
  6396. struct device_attribute *attr,
  6397. const char *buf, size_t count)
  6398. {
  6399. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6400. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6401. mutex_lock(&priv->mutex);
  6402. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6403. /* Cancel any currently running scans... */
  6404. if (iwl_scan_cancel_timeout(priv, 100))
  6405. IWL_WARNING("Could not cancel scan.\n");
  6406. else {
  6407. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6408. "0x%04X\n", filter_flags);
  6409. priv->staging_rxon.filter_flags =
  6410. cpu_to_le32(filter_flags);
  6411. iwl_commit_rxon(priv);
  6412. }
  6413. }
  6414. mutex_unlock(&priv->mutex);
  6415. return count;
  6416. }
  6417. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6418. store_filter_flags);
  6419. static ssize_t show_tune(struct device *d,
  6420. struct device_attribute *attr, char *buf)
  6421. {
  6422. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6423. return sprintf(buf, "0x%04X\n",
  6424. (priv->phymode << 8) |
  6425. le16_to_cpu(priv->active_rxon.channel));
  6426. }
  6427. static void iwl_set_flags_for_phymode(struct iwl_priv *priv, u8 phymode);
  6428. static ssize_t store_tune(struct device *d,
  6429. struct device_attribute *attr,
  6430. const char *buf, size_t count)
  6431. {
  6432. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6433. char *p = (char *)buf;
  6434. u16 tune = simple_strtoul(p, &p, 0);
  6435. u8 phymode = (tune >> 8) & 0xff;
  6436. u16 channel = tune & 0xff;
  6437. IWL_DEBUG_INFO("Tune request to:%d channel:%d\n", phymode, channel);
  6438. mutex_lock(&priv->mutex);
  6439. if ((le16_to_cpu(priv->staging_rxon.channel) != channel) ||
  6440. (priv->phymode != phymode)) {
  6441. const struct iwl_channel_info *ch_info;
  6442. ch_info = iwl_get_channel_info(priv, phymode, channel);
  6443. if (!ch_info) {
  6444. IWL_WARNING("Requested invalid phymode/channel "
  6445. "combination: %d %d\n", phymode, channel);
  6446. mutex_unlock(&priv->mutex);
  6447. return -EINVAL;
  6448. }
  6449. /* Cancel any currently running scans... */
  6450. if (iwl_scan_cancel_timeout(priv, 100))
  6451. IWL_WARNING("Could not cancel scan.\n");
  6452. else {
  6453. IWL_DEBUG_INFO("Committing phymode and "
  6454. "rxon.channel = %d %d\n",
  6455. phymode, channel);
  6456. iwl_set_rxon_channel(priv, phymode, channel);
  6457. iwl_set_flags_for_phymode(priv, phymode);
  6458. iwl_set_rate(priv);
  6459. iwl_commit_rxon(priv);
  6460. }
  6461. }
  6462. mutex_unlock(&priv->mutex);
  6463. return count;
  6464. }
  6465. static DEVICE_ATTR(tune, S_IWUSR | S_IRUGO, show_tune, store_tune);
  6466. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  6467. static ssize_t show_measurement(struct device *d,
  6468. struct device_attribute *attr, char *buf)
  6469. {
  6470. struct iwl_priv *priv = dev_get_drvdata(d);
  6471. struct iwl_spectrum_notification measure_report;
  6472. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6473. u8 *data = (u8 *) & measure_report;
  6474. unsigned long flags;
  6475. spin_lock_irqsave(&priv->lock, flags);
  6476. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6477. spin_unlock_irqrestore(&priv->lock, flags);
  6478. return 0;
  6479. }
  6480. memcpy(&measure_report, &priv->measure_report, size);
  6481. priv->measurement_status = 0;
  6482. spin_unlock_irqrestore(&priv->lock, flags);
  6483. while (size && (PAGE_SIZE - len)) {
  6484. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6485. PAGE_SIZE - len, 1);
  6486. len = strlen(buf);
  6487. if (PAGE_SIZE - len)
  6488. buf[len++] = '\n';
  6489. ofs += 16;
  6490. size -= min(size, 16U);
  6491. }
  6492. return len;
  6493. }
  6494. static ssize_t store_measurement(struct device *d,
  6495. struct device_attribute *attr,
  6496. const char *buf, size_t count)
  6497. {
  6498. struct iwl_priv *priv = dev_get_drvdata(d);
  6499. struct ieee80211_measurement_params params = {
  6500. .channel = le16_to_cpu(priv->active_rxon.channel),
  6501. .start_time = cpu_to_le64(priv->last_tsf),
  6502. .duration = cpu_to_le16(1),
  6503. };
  6504. u8 type = IWL_MEASURE_BASIC;
  6505. u8 buffer[32];
  6506. u8 channel;
  6507. if (count) {
  6508. char *p = buffer;
  6509. strncpy(buffer, buf, min(sizeof(buffer), count));
  6510. channel = simple_strtoul(p, NULL, 0);
  6511. if (channel)
  6512. params.channel = channel;
  6513. p = buffer;
  6514. while (*p && *p != ' ')
  6515. p++;
  6516. if (*p)
  6517. type = simple_strtoul(p + 1, NULL, 0);
  6518. }
  6519. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6520. "channel %d (for '%s')\n", type, params.channel, buf);
  6521. iwl_get_measurement(priv, &params, type);
  6522. return count;
  6523. }
  6524. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6525. show_measurement, store_measurement);
  6526. #endif /* CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT */
  6527. static ssize_t show_rate(struct device *d,
  6528. struct device_attribute *attr, char *buf)
  6529. {
  6530. struct iwl_priv *priv = dev_get_drvdata(d);
  6531. unsigned long flags;
  6532. int i;
  6533. spin_lock_irqsave(&priv->sta_lock, flags);
  6534. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  6535. i = priv->stations[IWL_AP_ID].current_rate.s.rate;
  6536. else
  6537. i = priv->stations[IWL_STA_ID].current_rate.s.rate;
  6538. spin_unlock_irqrestore(&priv->sta_lock, flags);
  6539. i = iwl_rate_index_from_plcp(i);
  6540. if (i == -1)
  6541. return sprintf(buf, "0\n");
  6542. return sprintf(buf, "%d%s\n",
  6543. (iwl_rates[i].ieee >> 1),
  6544. (iwl_rates[i].ieee & 0x1) ? ".5" : "");
  6545. }
  6546. static DEVICE_ATTR(rate, S_IRUSR, show_rate, NULL);
  6547. static ssize_t store_retry_rate(struct device *d,
  6548. struct device_attribute *attr,
  6549. const char *buf, size_t count)
  6550. {
  6551. struct iwl_priv *priv = dev_get_drvdata(d);
  6552. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6553. if (priv->retry_rate <= 0)
  6554. priv->retry_rate = 1;
  6555. return count;
  6556. }
  6557. static ssize_t show_retry_rate(struct device *d,
  6558. struct device_attribute *attr, char *buf)
  6559. {
  6560. struct iwl_priv *priv = dev_get_drvdata(d);
  6561. return sprintf(buf, "%d", priv->retry_rate);
  6562. }
  6563. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6564. store_retry_rate);
  6565. static ssize_t store_power_level(struct device *d,
  6566. struct device_attribute *attr,
  6567. const char *buf, size_t count)
  6568. {
  6569. struct iwl_priv *priv = dev_get_drvdata(d);
  6570. int rc;
  6571. int mode;
  6572. mode = simple_strtoul(buf, NULL, 0);
  6573. mutex_lock(&priv->mutex);
  6574. if (!iwl_is_ready(priv)) {
  6575. rc = -EAGAIN;
  6576. goto out;
  6577. }
  6578. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6579. mode = IWL_POWER_AC;
  6580. else
  6581. mode |= IWL_POWER_ENABLED;
  6582. if (mode != priv->power_mode) {
  6583. rc = iwl_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6584. if (rc) {
  6585. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6586. goto out;
  6587. }
  6588. priv->power_mode = mode;
  6589. }
  6590. rc = count;
  6591. out:
  6592. mutex_unlock(&priv->mutex);
  6593. return rc;
  6594. }
  6595. #define MAX_WX_STRING 80
  6596. /* Values are in microsecond */
  6597. static const s32 timeout_duration[] = {
  6598. 350000,
  6599. 250000,
  6600. 75000,
  6601. 37000,
  6602. 25000,
  6603. };
  6604. static const s32 period_duration[] = {
  6605. 400000,
  6606. 700000,
  6607. 1000000,
  6608. 1000000,
  6609. 1000000
  6610. };
  6611. static ssize_t show_power_level(struct device *d,
  6612. struct device_attribute *attr, char *buf)
  6613. {
  6614. struct iwl_priv *priv = dev_get_drvdata(d);
  6615. int level = IWL_POWER_LEVEL(priv->power_mode);
  6616. char *p = buf;
  6617. p += sprintf(p, "%d ", level);
  6618. switch (level) {
  6619. case IWL_POWER_MODE_CAM:
  6620. case IWL_POWER_AC:
  6621. p += sprintf(p, "(AC)");
  6622. break;
  6623. case IWL_POWER_BATTERY:
  6624. p += sprintf(p, "(BATTERY)");
  6625. break;
  6626. default:
  6627. p += sprintf(p,
  6628. "(Timeout %dms, Period %dms)",
  6629. timeout_duration[level - 1] / 1000,
  6630. period_duration[level - 1] / 1000);
  6631. }
  6632. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6633. p += sprintf(p, " OFF\n");
  6634. else
  6635. p += sprintf(p, " \n");
  6636. return (p - buf + 1);
  6637. }
  6638. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6639. store_power_level);
  6640. static ssize_t show_channels(struct device *d,
  6641. struct device_attribute *attr, char *buf)
  6642. {
  6643. struct iwl_priv *priv = dev_get_drvdata(d);
  6644. int len = 0, i;
  6645. struct ieee80211_channel *channels = NULL;
  6646. const struct ieee80211_hw_mode *hw_mode = NULL;
  6647. int count = 0;
  6648. if (!iwl_is_ready(priv))
  6649. return -EAGAIN;
  6650. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211G);
  6651. if (!hw_mode)
  6652. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211B);
  6653. if (hw_mode) {
  6654. channels = hw_mode->channels;
  6655. count = hw_mode->num_channels;
  6656. }
  6657. len +=
  6658. sprintf(&buf[len],
  6659. "Displaying %d channels in 2.4GHz band "
  6660. "(802.11bg):\n", count);
  6661. for (i = 0; i < count; i++)
  6662. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  6663. channels[i].chan,
  6664. channels[i].power_level,
  6665. channels[i].
  6666. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  6667. " (IEEE 802.11h required)" : "",
  6668. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  6669. || (channels[i].
  6670. flag &
  6671. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  6672. ", IBSS",
  6673. channels[i].
  6674. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  6675. "active/passive" : "passive only");
  6676. hw_mode = iwl_get_hw_mode(priv, MODE_IEEE80211A);
  6677. if (hw_mode) {
  6678. channels = hw_mode->channels;
  6679. count = hw_mode->num_channels;
  6680. } else {
  6681. channels = NULL;
  6682. count = 0;
  6683. }
  6684. len += sprintf(&buf[len], "Displaying %d channels in 5.2GHz band "
  6685. "(802.11a):\n", count);
  6686. for (i = 0; i < count; i++)
  6687. len += sprintf(&buf[len], "%d: %ddBm: BSS%s%s, %s.\n",
  6688. channels[i].chan,
  6689. channels[i].power_level,
  6690. channels[i].
  6691. flag & IEEE80211_CHAN_W_RADAR_DETECT ?
  6692. " (IEEE 802.11h required)" : "",
  6693. (!(channels[i].flag & IEEE80211_CHAN_W_IBSS)
  6694. || (channels[i].
  6695. flag &
  6696. IEEE80211_CHAN_W_RADAR_DETECT)) ? "" :
  6697. ", IBSS",
  6698. channels[i].
  6699. flag & IEEE80211_CHAN_W_ACTIVE_SCAN ?
  6700. "active/passive" : "passive only");
  6701. return len;
  6702. }
  6703. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6704. static ssize_t show_statistics(struct device *d,
  6705. struct device_attribute *attr, char *buf)
  6706. {
  6707. struct iwl_priv *priv = dev_get_drvdata(d);
  6708. u32 size = sizeof(struct iwl_notif_statistics);
  6709. u32 len = 0, ofs = 0;
  6710. u8 *data = (u8 *) & priv->statistics;
  6711. int rc = 0;
  6712. if (!iwl_is_alive(priv))
  6713. return -EAGAIN;
  6714. mutex_lock(&priv->mutex);
  6715. rc = iwl_send_statistics_request(priv);
  6716. mutex_unlock(&priv->mutex);
  6717. if (rc) {
  6718. len = sprintf(buf,
  6719. "Error sending statistics request: 0x%08X\n", rc);
  6720. return len;
  6721. }
  6722. while (size && (PAGE_SIZE - len)) {
  6723. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6724. PAGE_SIZE - len, 1);
  6725. len = strlen(buf);
  6726. if (PAGE_SIZE - len)
  6727. buf[len++] = '\n';
  6728. ofs += 16;
  6729. size -= min(size, 16U);
  6730. }
  6731. return len;
  6732. }
  6733. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6734. static ssize_t show_antenna(struct device *d,
  6735. struct device_attribute *attr, char *buf)
  6736. {
  6737. struct iwl_priv *priv = dev_get_drvdata(d);
  6738. if (!iwl_is_alive(priv))
  6739. return -EAGAIN;
  6740. return sprintf(buf, "%d\n", priv->antenna);
  6741. }
  6742. static ssize_t store_antenna(struct device *d,
  6743. struct device_attribute *attr,
  6744. const char *buf, size_t count)
  6745. {
  6746. int ant;
  6747. struct iwl_priv *priv = dev_get_drvdata(d);
  6748. if (count == 0)
  6749. return 0;
  6750. if (sscanf(buf, "%1i", &ant) != 1) {
  6751. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6752. return count;
  6753. }
  6754. if ((ant >= 0) && (ant <= 2)) {
  6755. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6756. priv->antenna = (enum iwl_antenna)ant;
  6757. } else
  6758. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6759. return count;
  6760. }
  6761. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6762. static ssize_t show_status(struct device *d,
  6763. struct device_attribute *attr, char *buf)
  6764. {
  6765. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6766. if (!iwl_is_alive(priv))
  6767. return -EAGAIN;
  6768. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6769. }
  6770. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6771. static ssize_t dump_error_log(struct device *d,
  6772. struct device_attribute *attr,
  6773. const char *buf, size_t count)
  6774. {
  6775. char *p = (char *)buf;
  6776. if (p[0] == '1')
  6777. iwl_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  6778. return strnlen(buf, count);
  6779. }
  6780. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6781. static ssize_t dump_event_log(struct device *d,
  6782. struct device_attribute *attr,
  6783. const char *buf, size_t count)
  6784. {
  6785. char *p = (char *)buf;
  6786. if (p[0] == '1')
  6787. iwl_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  6788. return strnlen(buf, count);
  6789. }
  6790. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6791. /*****************************************************************************
  6792. *
  6793. * driver setup and teardown
  6794. *
  6795. *****************************************************************************/
  6796. static void iwl_setup_deferred_work(struct iwl_priv *priv)
  6797. {
  6798. priv->workqueue = create_workqueue(DRV_NAME);
  6799. init_waitqueue_head(&priv->wait_command_queue);
  6800. INIT_WORK(&priv->up, iwl_bg_up);
  6801. INIT_WORK(&priv->restart, iwl_bg_restart);
  6802. INIT_WORK(&priv->rx_replenish, iwl_bg_rx_replenish);
  6803. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  6804. INIT_WORK(&priv->request_scan, iwl_bg_request_scan);
  6805. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  6806. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  6807. INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
  6808. INIT_DELAYED_WORK(&priv->post_associate, iwl_bg_post_associate);
  6809. INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
  6810. INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
  6811. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  6812. iwl_hw_setup_deferred_work(priv);
  6813. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6814. iwl_irq_tasklet, (unsigned long)priv);
  6815. }
  6816. static void iwl_cancel_deferred_work(struct iwl_priv *priv)
  6817. {
  6818. iwl_hw_cancel_deferred_work(priv);
  6819. cancel_delayed_work(&priv->scan_check);
  6820. cancel_delayed_work(&priv->alive_start);
  6821. cancel_delayed_work(&priv->post_associate);
  6822. cancel_work_sync(&priv->beacon_update);
  6823. }
  6824. static struct attribute *iwl_sysfs_entries[] = {
  6825. &dev_attr_antenna.attr,
  6826. &dev_attr_channels.attr,
  6827. &dev_attr_dump_errors.attr,
  6828. &dev_attr_dump_events.attr,
  6829. &dev_attr_flags.attr,
  6830. &dev_attr_filter_flags.attr,
  6831. #ifdef CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT
  6832. &dev_attr_measurement.attr,
  6833. #endif
  6834. &dev_attr_power_level.attr,
  6835. &dev_attr_rate.attr,
  6836. &dev_attr_retry_rate.attr,
  6837. &dev_attr_rf_kill.attr,
  6838. &dev_attr_rs_window.attr,
  6839. &dev_attr_statistics.attr,
  6840. &dev_attr_status.attr,
  6841. &dev_attr_temperature.attr,
  6842. &dev_attr_tune.attr,
  6843. &dev_attr_tx_power.attr,
  6844. NULL
  6845. };
  6846. static struct attribute_group iwl_attribute_group = {
  6847. .name = NULL, /* put in device directory */
  6848. .attrs = iwl_sysfs_entries,
  6849. };
  6850. static struct ieee80211_ops iwl_hw_ops = {
  6851. .tx = iwl_mac_tx,
  6852. .start = iwl_mac_start,
  6853. .stop = iwl_mac_stop,
  6854. .add_interface = iwl_mac_add_interface,
  6855. .remove_interface = iwl_mac_remove_interface,
  6856. .config = iwl_mac_config,
  6857. .config_interface = iwl_mac_config_interface,
  6858. .configure_filter = iwl_configure_filter,
  6859. .set_key = iwl_mac_set_key,
  6860. .get_stats = iwl_mac_get_stats,
  6861. .get_tx_stats = iwl_mac_get_tx_stats,
  6862. .conf_tx = iwl_mac_conf_tx,
  6863. .get_tsf = iwl_mac_get_tsf,
  6864. .reset_tsf = iwl_mac_reset_tsf,
  6865. .beacon_update = iwl_mac_beacon_update,
  6866. .hw_scan = iwl_mac_hw_scan
  6867. };
  6868. static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  6869. {
  6870. int err = 0;
  6871. u32 pci_id;
  6872. struct iwl_priv *priv;
  6873. struct ieee80211_hw *hw;
  6874. int i;
  6875. if (iwl_param_disable_hw_scan) {
  6876. IWL_DEBUG_INFO("Disabling hw_scan\n");
  6877. iwl_hw_ops.hw_scan = NULL;
  6878. }
  6879. if ((iwl_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  6880. (iwl_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  6881. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  6882. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  6883. err = -EINVAL;
  6884. goto out;
  6885. }
  6886. /* mac80211 allocates memory for this device instance, including
  6887. * space for this driver's private structure */
  6888. hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwl_hw_ops);
  6889. if (hw == NULL) {
  6890. IWL_ERROR("Can not allocate network device\n");
  6891. err = -ENOMEM;
  6892. goto out;
  6893. }
  6894. SET_IEEE80211_DEV(hw, &pdev->dev);
  6895. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  6896. priv = hw->priv;
  6897. priv->hw = hw;
  6898. priv->pci_dev = pdev;
  6899. priv->antenna = (enum iwl_antenna)iwl_param_antenna;
  6900. #ifdef CONFIG_IWLWIFI_DEBUG
  6901. iwl_debug_level = iwl_param_debug;
  6902. atomic_set(&priv->restrict_refcnt, 0);
  6903. #endif
  6904. priv->retry_rate = 1;
  6905. priv->ibss_beacon = NULL;
  6906. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  6907. * the range of signal quality values that we'll provide.
  6908. * Negative values for level/noise indicate that we'll provide dBm.
  6909. * For WE, at least, non-0 values here *enable* display of values
  6910. * in app (iwconfig). */
  6911. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  6912. hw->max_noise = -20; /* noise level, negative indicates dBm */
  6913. hw->max_signal = 100; /* link quality indication (%) */
  6914. /* Tell mac80211 our Tx characteristics */
  6915. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  6916. hw->queues = 4;
  6917. spin_lock_init(&priv->lock);
  6918. spin_lock_init(&priv->power_data.lock);
  6919. spin_lock_init(&priv->sta_lock);
  6920. spin_lock_init(&priv->hcmd_lock);
  6921. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  6922. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  6923. INIT_LIST_HEAD(&priv->free_frames);
  6924. mutex_init(&priv->mutex);
  6925. if (pci_enable_device(pdev)) {
  6926. err = -ENODEV;
  6927. goto out_ieee80211_free_hw;
  6928. }
  6929. pci_set_master(pdev);
  6930. iwl_clear_stations_table(priv);
  6931. priv->data_retry_limit = -1;
  6932. priv->ieee_channels = NULL;
  6933. priv->ieee_rates = NULL;
  6934. priv->phymode = -1;
  6935. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  6936. if (!err)
  6937. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  6938. if (err) {
  6939. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  6940. goto out_pci_disable_device;
  6941. }
  6942. pci_set_drvdata(pdev, priv);
  6943. err = pci_request_regions(pdev, DRV_NAME);
  6944. if (err)
  6945. goto out_pci_disable_device;
  6946. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  6947. * PCI Tx retries from interfering with C3 CPU state */
  6948. pci_write_config_byte(pdev, 0x41, 0x00);
  6949. priv->hw_base = pci_iomap(pdev, 0, 0);
  6950. if (!priv->hw_base) {
  6951. err = -ENODEV;
  6952. goto out_pci_release_regions;
  6953. }
  6954. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  6955. (unsigned long long) pci_resource_len(pdev, 0));
  6956. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  6957. /* Initialize module parameter values here */
  6958. if (iwl_param_disable) {
  6959. set_bit(STATUS_RF_KILL_SW, &priv->status);
  6960. IWL_DEBUG_INFO("Radio disabled.\n");
  6961. }
  6962. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  6963. pci_id =
  6964. (priv->pci_dev->device << 16) | priv->pci_dev->subsystem_device;
  6965. switch (pci_id) {
  6966. case 0x42221005: /* 0x4222 0x8086 0x1005 is BG SKU */
  6967. case 0x42221034: /* 0x4222 0x8086 0x1034 is BG SKU */
  6968. case 0x42271014: /* 0x4227 0x8086 0x1014 is BG SKU */
  6969. case 0x42221044: /* 0x4222 0x8086 0x1044 is BG SKU */
  6970. priv->is_abg = 0;
  6971. break;
  6972. /*
  6973. * Rest are assumed ABG SKU -- if this is not the
  6974. * case then the card will get the wrong 'Detected'
  6975. * line in the kernel log however the code that
  6976. * initializes the GEO table will detect no A-band
  6977. * channels and remove the is_abg mask.
  6978. */
  6979. default:
  6980. priv->is_abg = 1;
  6981. break;
  6982. }
  6983. printk(KERN_INFO DRV_NAME
  6984. ": Detected Intel PRO/Wireless 3945%sBG Network Connection\n",
  6985. priv->is_abg ? "A" : "");
  6986. /* Device-specific setup */
  6987. if (iwl_hw_set_hw_setting(priv)) {
  6988. IWL_ERROR("failed to set hw settings\n");
  6989. mutex_unlock(&priv->mutex);
  6990. goto out_iounmap;
  6991. }
  6992. #ifdef CONFIG_IWLWIFI_QOS
  6993. if (iwl_param_qos_enable)
  6994. priv->qos_data.qos_enable = 1;
  6995. iwl_reset_qos(priv);
  6996. priv->qos_data.qos_active = 0;
  6997. priv->qos_data.qos_cap.val = 0;
  6998. #endif /* CONFIG_IWLWIFI_QOS */
  6999. iwl_set_rxon_channel(priv, MODE_IEEE80211G, 6);
  7000. iwl_setup_deferred_work(priv);
  7001. iwl_setup_rx_handlers(priv);
  7002. priv->rates_mask = IWL_RATES_MASK;
  7003. /* If power management is turned on, default to AC mode */
  7004. priv->power_mode = IWL_POWER_AC;
  7005. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7006. pci_enable_msi(pdev);
  7007. err = request_irq(pdev->irq, iwl_isr, IRQF_SHARED, DRV_NAME, priv);
  7008. if (err) {
  7009. IWL_ERROR("Error allocating IRQ %d\n", pdev->irq);
  7010. goto out_disable_msi;
  7011. }
  7012. mutex_lock(&priv->mutex);
  7013. err = sysfs_create_group(&pdev->dev.kobj, &iwl_attribute_group);
  7014. if (err) {
  7015. IWL_ERROR("failed to create sysfs device attributes\n");
  7016. mutex_unlock(&priv->mutex);
  7017. goto out_release_irq;
  7018. }
  7019. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  7020. * ucode filename and max sizes are card-specific. */
  7021. err = iwl_read_ucode(priv);
  7022. if (err) {
  7023. IWL_ERROR("Could not read microcode: %d\n", err);
  7024. mutex_unlock(&priv->mutex);
  7025. goto out_pci_alloc;
  7026. }
  7027. mutex_unlock(&priv->mutex);
  7028. IWL_DEBUG_INFO("Queing UP work.\n");
  7029. queue_work(priv->workqueue, &priv->up);
  7030. return 0;
  7031. out_pci_alloc:
  7032. iwl_dealloc_ucode_pci(priv);
  7033. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7034. out_release_irq:
  7035. free_irq(pdev->irq, priv);
  7036. out_disable_msi:
  7037. pci_disable_msi(pdev);
  7038. destroy_workqueue(priv->workqueue);
  7039. priv->workqueue = NULL;
  7040. iwl_unset_hw_setting(priv);
  7041. out_iounmap:
  7042. pci_iounmap(pdev, priv->hw_base);
  7043. out_pci_release_regions:
  7044. pci_release_regions(pdev);
  7045. out_pci_disable_device:
  7046. pci_disable_device(pdev);
  7047. pci_set_drvdata(pdev, NULL);
  7048. out_ieee80211_free_hw:
  7049. ieee80211_free_hw(priv->hw);
  7050. out:
  7051. return err;
  7052. }
  7053. static void iwl_pci_remove(struct pci_dev *pdev)
  7054. {
  7055. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7056. struct list_head *p, *q;
  7057. int i;
  7058. if (!priv)
  7059. return;
  7060. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7061. mutex_lock(&priv->mutex);
  7062. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7063. __iwl_down(priv);
  7064. mutex_unlock(&priv->mutex);
  7065. /* Free MAC hash list for ADHOC */
  7066. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7067. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7068. list_del(p);
  7069. kfree(list_entry(p, struct iwl_ibss_seq, list));
  7070. }
  7071. }
  7072. sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  7073. iwl_dealloc_ucode_pci(priv);
  7074. if (priv->rxq.bd)
  7075. iwl_rx_queue_free(priv, &priv->rxq);
  7076. iwl_hw_txq_ctx_free(priv);
  7077. iwl_unset_hw_setting(priv);
  7078. iwl_clear_stations_table(priv);
  7079. if (priv->mac80211_registered) {
  7080. ieee80211_unregister_hw(priv->hw);
  7081. iwl_rate_control_unregister(priv->hw);
  7082. }
  7083. /* ieee80211_unregister_hw calls iwl_mac_stop, which flushes
  7084. * priv->workqueue... so we can't take down the workqueue
  7085. * until now... */
  7086. destroy_workqueue(priv->workqueue);
  7087. priv->workqueue = NULL;
  7088. free_irq(pdev->irq, priv);
  7089. pci_disable_msi(pdev);
  7090. pci_iounmap(pdev, priv->hw_base);
  7091. pci_release_regions(pdev);
  7092. pci_disable_device(pdev);
  7093. pci_set_drvdata(pdev, NULL);
  7094. kfree(priv->channel_info);
  7095. kfree(priv->ieee_channels);
  7096. kfree(priv->ieee_rates);
  7097. if (priv->ibss_beacon)
  7098. dev_kfree_skb(priv->ibss_beacon);
  7099. ieee80211_free_hw(priv->hw);
  7100. }
  7101. #ifdef CONFIG_PM
  7102. static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7103. {
  7104. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7105. mutex_lock(&priv->mutex);
  7106. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7107. /* Take down the device; powers it off, etc. */
  7108. __iwl_down(priv);
  7109. if (priv->mac80211_registered)
  7110. ieee80211_stop_queues(priv->hw);
  7111. pci_save_state(pdev);
  7112. pci_disable_device(pdev);
  7113. pci_set_power_state(pdev, PCI_D3hot);
  7114. mutex_unlock(&priv->mutex);
  7115. return 0;
  7116. }
  7117. static void iwl_resume(struct iwl_priv *priv)
  7118. {
  7119. unsigned long flags;
  7120. /* The following it a temporary work around due to the
  7121. * suspend / resume not fully initializing the NIC correctly.
  7122. * Without all of the following, resume will not attempt to take
  7123. * down the NIC (it shouldn't really need to) and will just try
  7124. * and bring the NIC back up. However that fails during the
  7125. * ucode verification process. This then causes iwl_down to be
  7126. * called *after* iwl_hw_nic_init() has succeeded -- which
  7127. * then lets the next init sequence succeed. So, we've
  7128. * replicated all of that NIC init code here... */
  7129. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7130. iwl_hw_nic_init(priv);
  7131. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7132. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  7133. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  7134. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  7135. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7136. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  7137. /* tell the device to stop sending interrupts */
  7138. iwl_disable_interrupts(priv);
  7139. spin_lock_irqsave(&priv->lock, flags);
  7140. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  7141. if (!iwl_grab_restricted_access(priv)) {
  7142. iwl_write_restricted_reg(priv, APMG_CLK_DIS_REG,
  7143. APMG_CLK_VAL_DMA_CLK_RQT);
  7144. iwl_release_restricted_access(priv);
  7145. }
  7146. spin_unlock_irqrestore(&priv->lock, flags);
  7147. udelay(5);
  7148. iwl_hw_nic_reset(priv);
  7149. /* Bring the device back up */
  7150. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7151. queue_work(priv->workqueue, &priv->up);
  7152. }
  7153. static int iwl_pci_resume(struct pci_dev *pdev)
  7154. {
  7155. struct iwl_priv *priv = pci_get_drvdata(pdev);
  7156. int err;
  7157. printk(KERN_INFO "Coming out of suspend...\n");
  7158. mutex_lock(&priv->mutex);
  7159. pci_set_power_state(pdev, PCI_D0);
  7160. err = pci_enable_device(pdev);
  7161. pci_restore_state(pdev);
  7162. /*
  7163. * Suspend/Resume resets the PCI configuration space, so we have to
  7164. * re-disable the RETRY_TIMEOUT register (0x41) to keep PCI Tx retries
  7165. * from interfering with C3 CPU state. pci_restore_state won't help
  7166. * here since it only restores the first 64 bytes pci config header.
  7167. */
  7168. pci_write_config_byte(pdev, 0x41, 0x00);
  7169. iwl_resume(priv);
  7170. mutex_unlock(&priv->mutex);
  7171. return 0;
  7172. }
  7173. #endif /* CONFIG_PM */
  7174. /*****************************************************************************
  7175. *
  7176. * driver and module entry point
  7177. *
  7178. *****************************************************************************/
  7179. static struct pci_driver iwl_driver = {
  7180. .name = DRV_NAME,
  7181. .id_table = iwl_hw_card_ids,
  7182. .probe = iwl_pci_probe,
  7183. .remove = __devexit_p(iwl_pci_remove),
  7184. #ifdef CONFIG_PM
  7185. .suspend = iwl_pci_suspend,
  7186. .resume = iwl_pci_resume,
  7187. #endif
  7188. };
  7189. static int __init iwl_init(void)
  7190. {
  7191. int ret;
  7192. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7193. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7194. ret = pci_register_driver(&iwl_driver);
  7195. if (ret) {
  7196. IWL_ERROR("Unable to initialize PCI module\n");
  7197. return ret;
  7198. }
  7199. #ifdef CONFIG_IWLWIFI_DEBUG
  7200. ret = driver_create_file(&iwl_driver.driver, &driver_attr_debug_level);
  7201. if (ret) {
  7202. IWL_ERROR("Unable to create driver sysfs file\n");
  7203. pci_unregister_driver(&iwl_driver);
  7204. return ret;
  7205. }
  7206. #endif
  7207. return ret;
  7208. }
  7209. static void __exit iwl_exit(void)
  7210. {
  7211. #ifdef CONFIG_IWLWIFI_DEBUG
  7212. driver_remove_file(&iwl_driver.driver, &driver_attr_debug_level);
  7213. #endif
  7214. pci_unregister_driver(&iwl_driver);
  7215. }
  7216. module_param_named(antenna, iwl_param_antenna, int, 0444);
  7217. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7218. module_param_named(disable, iwl_param_disable, int, 0444);
  7219. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7220. module_param_named(hwcrypto, iwl_param_hwcrypto, int, 0444);
  7221. MODULE_PARM_DESC(hwcrypto,
  7222. "using hardware crypto engine (default 0 [software])\n");
  7223. module_param_named(debug, iwl_param_debug, int, 0444);
  7224. MODULE_PARM_DESC(debug, "debug output mask");
  7225. module_param_named(disable_hw_scan, iwl_param_disable_hw_scan, int, 0444);
  7226. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7227. module_param_named(queues_num, iwl_param_queues_num, int, 0444);
  7228. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7229. /* QoS */
  7230. module_param_named(qos_enable, iwl_param_qos_enable, int, 0444);
  7231. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7232. module_exit(iwl_exit);
  7233. module_init(iwl_init);