patch_sigmatel.c 90 KB

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  1. /*
  2. * Universal Interface for Intel High Definition Audio Codec
  3. *
  4. * HD audio interface patch for SigmaTel STAC92xx
  5. *
  6. * Copyright (c) 2005 Embedded Alley Solutions, Inc.
  7. * Matt Porter <mporter@embeddedalley.com>
  8. *
  9. * Based on patch_cmedia.c and patch_realtek.c
  10. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  11. *
  12. * This driver is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This driver is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <sound/driver.h>
  27. #include <linux/init.h>
  28. #include <linux/delay.h>
  29. #include <linux/slab.h>
  30. #include <linux/pci.h>
  31. #include <sound/core.h>
  32. #include <sound/asoundef.h>
  33. #include "hda_codec.h"
  34. #include "hda_local.h"
  35. #define NUM_CONTROL_ALLOC 32
  36. #define STAC_HP_EVENT 0x37
  37. enum {
  38. STAC_REF,
  39. STAC_9200_DELL_D21,
  40. STAC_9200_DELL_D22,
  41. STAC_9200_DELL_D23,
  42. STAC_9200_DELL_M21,
  43. STAC_9200_DELL_M22,
  44. STAC_9200_DELL_M23,
  45. STAC_9200_DELL_M24,
  46. STAC_9200_DELL_M25,
  47. STAC_9200_DELL_M26,
  48. STAC_9200_DELL_M27,
  49. STAC_9200_GATEWAY,
  50. STAC_9200_MODELS
  51. };
  52. enum {
  53. STAC_9205_REF,
  54. STAC_9205_DELL_M42,
  55. STAC_9205_DELL_M43,
  56. STAC_9205_DELL_M44,
  57. STAC_9205_MODELS
  58. };
  59. enum {
  60. STAC_925x_REF,
  61. STAC_M2_2,
  62. STAC_MA6,
  63. STAC_PA6,
  64. STAC_925x_MODELS
  65. };
  66. enum {
  67. STAC_D945_REF,
  68. STAC_D945GTP3,
  69. STAC_D945GTP5,
  70. STAC_INTEL_MAC_V1,
  71. STAC_INTEL_MAC_V2,
  72. STAC_INTEL_MAC_V3,
  73. STAC_INTEL_MAC_V4,
  74. STAC_INTEL_MAC_V5,
  75. /* for backward compatibility */
  76. STAC_MACMINI,
  77. STAC_MACBOOK,
  78. STAC_MACBOOK_PRO_V1,
  79. STAC_MACBOOK_PRO_V2,
  80. STAC_IMAC_INTEL,
  81. STAC_IMAC_INTEL_20,
  82. STAC_922X_DELL_D81,
  83. STAC_922X_DELL_D82,
  84. STAC_922X_DELL_M81,
  85. STAC_922X_DELL_M82,
  86. STAC_922X_MODELS
  87. };
  88. enum {
  89. STAC_D965_REF,
  90. STAC_D965_3ST,
  91. STAC_D965_5ST,
  92. STAC_DELL_3ST,
  93. STAC_927X_MODELS
  94. };
  95. struct sigmatel_spec {
  96. struct snd_kcontrol_new *mixers[4];
  97. unsigned int num_mixers;
  98. int board_config;
  99. unsigned int surr_switch: 1;
  100. unsigned int line_switch: 1;
  101. unsigned int mic_switch: 1;
  102. unsigned int alt_switch: 1;
  103. unsigned int hp_detect: 1;
  104. unsigned int gpio_mute: 1;
  105. unsigned int gpio_mask, gpio_data;
  106. /* playback */
  107. struct hda_multi_out multiout;
  108. hda_nid_t dac_nids[5];
  109. /* capture */
  110. hda_nid_t *adc_nids;
  111. unsigned int num_adcs;
  112. hda_nid_t *mux_nids;
  113. unsigned int num_muxes;
  114. hda_nid_t *dmic_nids;
  115. unsigned int num_dmics;
  116. hda_nid_t dmux_nid;
  117. hda_nid_t dig_in_nid;
  118. /* pin widgets */
  119. hda_nid_t *pin_nids;
  120. unsigned int num_pins;
  121. unsigned int *pin_configs;
  122. unsigned int *bios_pin_configs;
  123. /* codec specific stuff */
  124. struct hda_verb *init;
  125. struct snd_kcontrol_new *mixer;
  126. /* capture source */
  127. struct hda_input_mux *dinput_mux;
  128. unsigned int cur_dmux;
  129. struct hda_input_mux *input_mux;
  130. unsigned int cur_mux[3];
  131. /* i/o switches */
  132. unsigned int io_switch[2];
  133. unsigned int clfe_swap;
  134. unsigned int aloopback;
  135. struct hda_pcm pcm_rec[2]; /* PCM information */
  136. /* dynamic controls and input_mux */
  137. struct auto_pin_cfg autocfg;
  138. unsigned int num_kctl_alloc, num_kctl_used;
  139. struct snd_kcontrol_new *kctl_alloc;
  140. struct hda_input_mux private_dimux;
  141. struct hda_input_mux private_imux;
  142. };
  143. static hda_nid_t stac9200_adc_nids[1] = {
  144. 0x03,
  145. };
  146. static hda_nid_t stac9200_mux_nids[1] = {
  147. 0x0c,
  148. };
  149. static hda_nid_t stac9200_dac_nids[1] = {
  150. 0x02,
  151. };
  152. static hda_nid_t stac925x_adc_nids[1] = {
  153. 0x03,
  154. };
  155. static hda_nid_t stac925x_mux_nids[1] = {
  156. 0x0f,
  157. };
  158. static hda_nid_t stac925x_dac_nids[1] = {
  159. 0x02,
  160. };
  161. static hda_nid_t stac925x_dmic_nids[1] = {
  162. 0x15,
  163. };
  164. static hda_nid_t stac922x_adc_nids[2] = {
  165. 0x06, 0x07,
  166. };
  167. static hda_nid_t stac922x_mux_nids[2] = {
  168. 0x12, 0x13,
  169. };
  170. static hda_nid_t stac927x_adc_nids[3] = {
  171. 0x07, 0x08, 0x09
  172. };
  173. static hda_nid_t stac927x_mux_nids[3] = {
  174. 0x15, 0x16, 0x17
  175. };
  176. static hda_nid_t stac9205_adc_nids[2] = {
  177. 0x12, 0x13
  178. };
  179. static hda_nid_t stac9205_mux_nids[2] = {
  180. 0x19, 0x1a
  181. };
  182. static hda_nid_t stac9205_dmic_nids[2] = {
  183. 0x17, 0x18,
  184. };
  185. static hda_nid_t stac9200_pin_nids[8] = {
  186. 0x08, 0x09, 0x0d, 0x0e,
  187. 0x0f, 0x10, 0x11, 0x12,
  188. };
  189. static hda_nid_t stac925x_pin_nids[8] = {
  190. 0x07, 0x08, 0x0a, 0x0b,
  191. 0x0c, 0x0d, 0x10, 0x11,
  192. };
  193. static hda_nid_t stac922x_pin_nids[10] = {
  194. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  195. 0x0f, 0x10, 0x11, 0x15, 0x1b,
  196. };
  197. static hda_nid_t stac927x_pin_nids[14] = {
  198. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  199. 0x0f, 0x10, 0x11, 0x12, 0x13,
  200. 0x14, 0x21, 0x22, 0x23,
  201. };
  202. static hda_nid_t stac9205_pin_nids[12] = {
  203. 0x0a, 0x0b, 0x0c, 0x0d, 0x0e,
  204. 0x0f, 0x14, 0x16, 0x17, 0x18,
  205. 0x21, 0x22,
  206. };
  207. static int stac92xx_dmux_enum_info(struct snd_kcontrol *kcontrol,
  208. struct snd_ctl_elem_info *uinfo)
  209. {
  210. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  211. struct sigmatel_spec *spec = codec->spec;
  212. return snd_hda_input_mux_info(spec->dinput_mux, uinfo);
  213. }
  214. static int stac92xx_dmux_enum_get(struct snd_kcontrol *kcontrol,
  215. struct snd_ctl_elem_value *ucontrol)
  216. {
  217. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  218. struct sigmatel_spec *spec = codec->spec;
  219. ucontrol->value.enumerated.item[0] = spec->cur_dmux;
  220. return 0;
  221. }
  222. static int stac92xx_dmux_enum_put(struct snd_kcontrol *kcontrol,
  223. struct snd_ctl_elem_value *ucontrol)
  224. {
  225. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  226. struct sigmatel_spec *spec = codec->spec;
  227. return snd_hda_input_mux_put(codec, spec->dinput_mux, ucontrol,
  228. spec->dmux_nid, &spec->cur_dmux);
  229. }
  230. static int stac92xx_mux_enum_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  231. {
  232. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  233. struct sigmatel_spec *spec = codec->spec;
  234. return snd_hda_input_mux_info(spec->input_mux, uinfo);
  235. }
  236. static int stac92xx_mux_enum_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  237. {
  238. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  239. struct sigmatel_spec *spec = codec->spec;
  240. unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  241. ucontrol->value.enumerated.item[0] = spec->cur_mux[adc_idx];
  242. return 0;
  243. }
  244. static int stac92xx_mux_enum_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  245. {
  246. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  247. struct sigmatel_spec *spec = codec->spec;
  248. unsigned int adc_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  249. return snd_hda_input_mux_put(codec, spec->input_mux, ucontrol,
  250. spec->mux_nids[adc_idx], &spec->cur_mux[adc_idx]);
  251. }
  252. #define stac92xx_aloopback_info snd_ctl_boolean_mono_info
  253. static int stac92xx_aloopback_get(struct snd_kcontrol *kcontrol,
  254. struct snd_ctl_elem_value *ucontrol)
  255. {
  256. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  257. struct sigmatel_spec *spec = codec->spec;
  258. ucontrol->value.integer.value[0] = spec->aloopback;
  259. return 0;
  260. }
  261. static int stac92xx_aloopback_put(struct snd_kcontrol *kcontrol,
  262. struct snd_ctl_elem_value *ucontrol)
  263. {
  264. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  265. struct sigmatel_spec *spec = codec->spec;
  266. unsigned int dac_mode;
  267. if (spec->aloopback == ucontrol->value.integer.value[0])
  268. return 0;
  269. spec->aloopback = ucontrol->value.integer.value[0];
  270. dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
  271. kcontrol->private_value & 0xFFFF, 0x0);
  272. if (spec->aloopback) {
  273. snd_hda_power_up(codec);
  274. dac_mode |= 0x40;
  275. } else {
  276. snd_hda_power_down(codec);
  277. dac_mode &= ~0x40;
  278. }
  279. snd_hda_codec_write_cache(codec, codec->afg, 0,
  280. kcontrol->private_value >> 16, dac_mode);
  281. return 1;
  282. }
  283. static int stac92xx_volknob_info(struct snd_kcontrol *kcontrol,
  284. struct snd_ctl_elem_info *uinfo)
  285. {
  286. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  287. uinfo->count = 1;
  288. uinfo->value.integer.min = 0;
  289. uinfo->value.integer.max = 127;
  290. return 0;
  291. }
  292. static int stac92xx_volknob_get(struct snd_kcontrol *kcontrol,
  293. struct snd_ctl_elem_value *ucontrol)
  294. {
  295. ucontrol->value.integer.value[0] = kcontrol->private_value & 0xff;
  296. return 0;
  297. }
  298. static int stac92xx_volknob_put(struct snd_kcontrol *kcontrol,
  299. struct snd_ctl_elem_value *ucontrol)
  300. {
  301. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  302. unsigned int val = kcontrol->private_value & 0xff;
  303. if (val == ucontrol->value.integer.value[0])
  304. return 0;
  305. val = ucontrol->value.integer.value[0];
  306. kcontrol->private_value &= ~0xff;
  307. kcontrol->private_value |= val;
  308. snd_hda_codec_write_cache(codec, kcontrol->private_value >> 16, 0,
  309. AC_VERB_SET_VOLUME_KNOB_CONTROL, val | 0x80);
  310. return 1;
  311. }
  312. static struct hda_verb stac9200_core_init[] = {
  313. /* set dac0mux for dac converter */
  314. { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  315. {}
  316. };
  317. static struct hda_verb stac9200_eapd_init[] = {
  318. /* set dac0mux for dac converter */
  319. {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  320. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  321. {}
  322. };
  323. static struct hda_verb stac925x_core_init[] = {
  324. /* set dac0mux for dac converter */
  325. { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
  326. {}
  327. };
  328. static struct hda_verb stac922x_core_init[] = {
  329. /* set master volume and direct control */
  330. { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  331. {}
  332. };
  333. static struct hda_verb d965_core_init[] = {
  334. /* set master volume and direct control */
  335. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  336. /* unmute node 0x1b */
  337. { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  338. /* select node 0x03 as DAC */
  339. { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  340. {}
  341. };
  342. static struct hda_verb stac927x_core_init[] = {
  343. /* set master volume and direct control */
  344. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  345. {}
  346. };
  347. static struct hda_verb stac9205_core_init[] = {
  348. /* set master volume and direct control */
  349. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  350. {}
  351. };
  352. #define STAC_INPUT_SOURCE(cnt) \
  353. { \
  354. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  355. .name = "Input Source", \
  356. .count = cnt, \
  357. .info = stac92xx_mux_enum_info, \
  358. .get = stac92xx_mux_enum_get, \
  359. .put = stac92xx_mux_enum_put, \
  360. }
  361. #define STAC_ANALOG_LOOPBACK(verb_read,verb_write) \
  362. { \
  363. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  364. .name = "Analog Loopback", \
  365. .count = 1, \
  366. .info = stac92xx_aloopback_info, \
  367. .get = stac92xx_aloopback_get, \
  368. .put = stac92xx_aloopback_put, \
  369. .private_value = verb_read | (verb_write << 16), \
  370. }
  371. #define STAC_VOLKNOB(knob_nid) \
  372. { \
  373. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  374. .name = "Master Playback Volume", \
  375. .count = 1, \
  376. .info = stac92xx_volknob_info, \
  377. .get = stac92xx_volknob_get, \
  378. .put = stac92xx_volknob_put, \
  379. .private_value = 127 | (knob_nid << 16), \
  380. }
  381. static struct snd_kcontrol_new stac9200_mixer[] = {
  382. HDA_CODEC_VOLUME("Master Playback Volume", 0xb, 0, HDA_OUTPUT),
  383. HDA_CODEC_MUTE("Master Playback Switch", 0xb, 0, HDA_OUTPUT),
  384. STAC_INPUT_SOURCE(1),
  385. HDA_CODEC_VOLUME("Capture Volume", 0x0a, 0, HDA_OUTPUT),
  386. HDA_CODEC_MUTE("Capture Switch", 0x0a, 0, HDA_OUTPUT),
  387. HDA_CODEC_VOLUME("Capture Mux Volume", 0x0c, 0, HDA_OUTPUT),
  388. { } /* end */
  389. };
  390. static struct snd_kcontrol_new stac925x_mixer[] = {
  391. STAC_INPUT_SOURCE(1),
  392. HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_OUTPUT),
  393. HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_OUTPUT),
  394. HDA_CODEC_VOLUME("Capture Mux Volume", 0x0f, 0, HDA_OUTPUT),
  395. { } /* end */
  396. };
  397. static struct snd_kcontrol_new stac9205_mixer[] = {
  398. {
  399. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  400. .name = "Digital Input Source",
  401. .count = 1,
  402. .info = stac92xx_dmux_enum_info,
  403. .get = stac92xx_dmux_enum_get,
  404. .put = stac92xx_dmux_enum_put,
  405. },
  406. STAC_INPUT_SOURCE(2),
  407. STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0),
  408. STAC_VOLKNOB(0x24),
  409. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x1b, 0x0, HDA_INPUT),
  410. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1d, 0x0, HDA_OUTPUT),
  411. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x19, 0x0, HDA_OUTPUT),
  412. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x1c, 0x0, HDA_INPUT),
  413. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1e, 0x0, HDA_OUTPUT),
  414. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x1A, 0x0, HDA_OUTPUT),
  415. { } /* end */
  416. };
  417. /* This needs to be generated dynamically based on sequence */
  418. static struct snd_kcontrol_new stac922x_mixer[] = {
  419. STAC_INPUT_SOURCE(2),
  420. STAC_VOLKNOB(0x16),
  421. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x17, 0x0, HDA_INPUT),
  422. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x17, 0x0, HDA_INPUT),
  423. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x12, 0x0, HDA_OUTPUT),
  424. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x18, 0x0, HDA_INPUT),
  425. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x18, 0x0, HDA_INPUT),
  426. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x13, 0x0, HDA_OUTPUT),
  427. { } /* end */
  428. };
  429. static struct snd_kcontrol_new stac927x_mixer[] = {
  430. STAC_INPUT_SOURCE(3),
  431. STAC_VOLKNOB(0x24),
  432. STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB),
  433. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x0, 0x18, 0x0, HDA_INPUT),
  434. HDA_CODEC_MUTE_IDX("Capture Switch", 0x0, 0x1b, 0x0, HDA_OUTPUT),
  435. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x0, 0x15, 0x0, HDA_OUTPUT),
  436. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x1, 0x19, 0x0, HDA_INPUT),
  437. HDA_CODEC_MUTE_IDX("Capture Switch", 0x1, 0x1c, 0x0, HDA_OUTPUT),
  438. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x1, 0x16, 0x0, HDA_OUTPUT),
  439. HDA_CODEC_VOLUME_IDX("Capture Volume", 0x2, 0x1A, 0x0, HDA_INPUT),
  440. HDA_CODEC_MUTE_IDX("Capture Switch", 0x2, 0x1d, 0x0, HDA_OUTPUT),
  441. HDA_CODEC_VOLUME_IDX("Mux Capture Volume", 0x2, 0x17, 0x0, HDA_OUTPUT),
  442. { } /* end */
  443. };
  444. static int stac92xx_build_controls(struct hda_codec *codec)
  445. {
  446. struct sigmatel_spec *spec = codec->spec;
  447. int err;
  448. int i;
  449. err = snd_hda_add_new_ctls(codec, spec->mixer);
  450. if (err < 0)
  451. return err;
  452. for (i = 0; i < spec->num_mixers; i++) {
  453. err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
  454. if (err < 0)
  455. return err;
  456. }
  457. if (spec->multiout.dig_out_nid) {
  458. err = snd_hda_create_spdif_out_ctls(codec, spec->multiout.dig_out_nid);
  459. if (err < 0)
  460. return err;
  461. }
  462. if (spec->dig_in_nid) {
  463. err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in_nid);
  464. if (err < 0)
  465. return err;
  466. }
  467. return 0;
  468. }
  469. static unsigned int ref9200_pin_configs[8] = {
  470. 0x01c47010, 0x01447010, 0x0221401f, 0x01114010,
  471. 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
  472. };
  473. /*
  474. STAC 9200 pin configs for
  475. 102801A8
  476. 102801DE
  477. 102801E8
  478. */
  479. static unsigned int dell9200_d21_pin_configs[8] = {
  480. 0x400001f0, 0x400001f1, 0x02214030, 0x01014010,
  481. 0x02a19020, 0x01a19021, 0x90100140, 0x01813122,
  482. };
  483. /*
  484. STAC 9200 pin configs for
  485. 102801C0
  486. 102801C1
  487. */
  488. static unsigned int dell9200_d22_pin_configs[8] = {
  489. 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
  490. 0x01813020, 0x02a19021, 0x90100140, 0x400001f2,
  491. };
  492. /*
  493. STAC 9200 pin configs for
  494. 102801C4 (Dell Dimension E310)
  495. 102801C5
  496. 102801C7
  497. 102801D9
  498. 102801DA
  499. 102801E3
  500. */
  501. static unsigned int dell9200_d23_pin_configs[8] = {
  502. 0x400001f0, 0x400001f1, 0x0221401f, 0x01014010,
  503. 0x01813020, 0x01a19021, 0x90100140, 0x400001f2,
  504. };
  505. /*
  506. STAC 9200-32 pin configs for
  507. 102801B5 (Dell Inspiron 630m)
  508. 102801D8 (Dell Inspiron 640m)
  509. */
  510. static unsigned int dell9200_m21_pin_configs[8] = {
  511. 0x40c003fa, 0x03441340, 0x0321121f, 0x90170310,
  512. 0x408003fb, 0x03a11020, 0x401003fc, 0x403003fd,
  513. };
  514. /*
  515. STAC 9200-32 pin configs for
  516. 102801C2 (Dell Latitude D620)
  517. 102801C8
  518. 102801CC (Dell Latitude D820)
  519. 102801D4
  520. 102801D6
  521. */
  522. static unsigned int dell9200_m22_pin_configs[8] = {
  523. 0x40c003fa, 0x0144131f, 0x0321121f, 0x90170310,
  524. 0x90a70321, 0x03a11020, 0x401003fb, 0x40f000fc,
  525. };
  526. /*
  527. STAC 9200-32 pin configs for
  528. 102801CE (Dell XPS M1710)
  529. 102801CF (Dell Precision M90)
  530. */
  531. static unsigned int dell9200_m23_pin_configs[8] = {
  532. 0x40c003fa, 0x01441340, 0x0421421f, 0x90170310,
  533. 0x408003fb, 0x04a1102e, 0x90170311, 0x403003fc,
  534. };
  535. /*
  536. STAC 9200-32 pin configs for
  537. 102801C9
  538. 102801CA
  539. 102801CB (Dell Latitude 120L)
  540. 102801D3
  541. */
  542. static unsigned int dell9200_m24_pin_configs[8] = {
  543. 0x40c003fa, 0x404003fb, 0x0321121f, 0x90170310,
  544. 0x408003fc, 0x03a11020, 0x401003fd, 0x403003fe,
  545. };
  546. /*
  547. STAC 9200-32 pin configs for
  548. 102801BD (Dell Inspiron E1505n)
  549. 102801EE
  550. 102801EF
  551. */
  552. static unsigned int dell9200_m25_pin_configs[8] = {
  553. 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
  554. 0x408003fb, 0x04a11020, 0x401003fc, 0x403003fd,
  555. };
  556. /*
  557. STAC 9200-32 pin configs for
  558. 102801F5 (Dell Inspiron 1501)
  559. 102801F6
  560. */
  561. static unsigned int dell9200_m26_pin_configs[8] = {
  562. 0x40c003fa, 0x404003fb, 0x0421121f, 0x90170310,
  563. 0x408003fc, 0x04a11020, 0x401003fd, 0x403003fe,
  564. };
  565. /*
  566. STAC 9200-32
  567. 102801CD (Dell Inspiron E1705/9400)
  568. */
  569. static unsigned int dell9200_m27_pin_configs[8] = {
  570. 0x40c003fa, 0x01441340, 0x0421121f, 0x90170310,
  571. 0x90170310, 0x04a11020, 0x90170310, 0x40f003fc,
  572. };
  573. static unsigned int *stac9200_brd_tbl[STAC_9200_MODELS] = {
  574. [STAC_REF] = ref9200_pin_configs,
  575. [STAC_9200_DELL_D21] = dell9200_d21_pin_configs,
  576. [STAC_9200_DELL_D22] = dell9200_d22_pin_configs,
  577. [STAC_9200_DELL_D23] = dell9200_d23_pin_configs,
  578. [STAC_9200_DELL_M21] = dell9200_m21_pin_configs,
  579. [STAC_9200_DELL_M22] = dell9200_m22_pin_configs,
  580. [STAC_9200_DELL_M23] = dell9200_m23_pin_configs,
  581. [STAC_9200_DELL_M24] = dell9200_m24_pin_configs,
  582. [STAC_9200_DELL_M25] = dell9200_m25_pin_configs,
  583. [STAC_9200_DELL_M26] = dell9200_m26_pin_configs,
  584. [STAC_9200_DELL_M27] = dell9200_m27_pin_configs,
  585. };
  586. static const char *stac9200_models[STAC_9200_MODELS] = {
  587. [STAC_REF] = "ref",
  588. [STAC_9200_DELL_D21] = "dell-d21",
  589. [STAC_9200_DELL_D22] = "dell-d22",
  590. [STAC_9200_DELL_D23] = "dell-d23",
  591. [STAC_9200_DELL_M21] = "dell-m21",
  592. [STAC_9200_DELL_M22] = "dell-m22",
  593. [STAC_9200_DELL_M23] = "dell-m23",
  594. [STAC_9200_DELL_M24] = "dell-m24",
  595. [STAC_9200_DELL_M25] = "dell-m25",
  596. [STAC_9200_DELL_M26] = "dell-m26",
  597. [STAC_9200_DELL_M27] = "dell-m27",
  598. [STAC_9200_GATEWAY] = "gateway",
  599. };
  600. static struct snd_pci_quirk stac9200_cfg_tbl[] = {
  601. /* SigmaTel reference board */
  602. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  603. "DFI LanParty", STAC_REF),
  604. /* Dell laptops have BIOS problem */
  605. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
  606. "unknown Dell", STAC_9200_DELL_D21),
  607. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
  608. "Dell Inspiron 630m", STAC_9200_DELL_M21),
  609. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
  610. "Dell Inspiron E1505n", STAC_9200_DELL_M25),
  611. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
  612. "unknown Dell", STAC_9200_DELL_D22),
  613. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
  614. "unknown Dell", STAC_9200_DELL_D22),
  615. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
  616. "Dell Latitude D620", STAC_9200_DELL_M22),
  617. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
  618. "unknown Dell", STAC_9200_DELL_D23),
  619. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
  620. "unknown Dell", STAC_9200_DELL_D23),
  621. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
  622. "unknown Dell", STAC_9200_DELL_M22),
  623. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
  624. "unknown Dell", STAC_9200_DELL_M24),
  625. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
  626. "unknown Dell", STAC_9200_DELL_M24),
  627. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
  628. "Dell Latitude 120L", STAC_9200_DELL_M24),
  629. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
  630. "Dell Latitude D820", STAC_9200_DELL_M22),
  631. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
  632. "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
  633. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
  634. "Dell XPS M1710", STAC_9200_DELL_M23),
  635. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
  636. "Dell Precision M90", STAC_9200_DELL_M23),
  637. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
  638. "unknown Dell", STAC_9200_DELL_M22),
  639. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
  640. "unknown Dell", STAC_9200_DELL_M22),
  641. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
  642. "unknown Dell", STAC_9200_DELL_M22),
  643. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
  644. "Dell Inspiron 640m", STAC_9200_DELL_M21),
  645. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
  646. "unknown Dell", STAC_9200_DELL_D23),
  647. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
  648. "unknown Dell", STAC_9200_DELL_D23),
  649. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
  650. "unknown Dell", STAC_9200_DELL_D21),
  651. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
  652. "unknown Dell", STAC_9200_DELL_D23),
  653. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
  654. "unknown Dell", STAC_9200_DELL_D21),
  655. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
  656. "unknown Dell", STAC_9200_DELL_M25),
  657. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
  658. "unknown Dell", STAC_9200_DELL_M25),
  659. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
  660. "Dell Inspiron 1501", STAC_9200_DELL_M26),
  661. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
  662. "unknown Dell", STAC_9200_DELL_M26),
  663. /* Panasonic */
  664. SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_REF),
  665. /* Gateway machines needs EAPD to be set on resume */
  666. SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_GATEWAY),
  667. SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*",
  668. STAC_9200_GATEWAY),
  669. SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707",
  670. STAC_9200_GATEWAY),
  671. {} /* terminator */
  672. };
  673. static unsigned int ref925x_pin_configs[8] = {
  674. 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
  675. 0x90a70320, 0x02214210, 0x400003f1, 0x9033032e,
  676. };
  677. static unsigned int stac925x_MA6_pin_configs[8] = {
  678. 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
  679. 0x90a70320, 0x90100211, 0x400003f1, 0x9033032e,
  680. };
  681. static unsigned int stac925x_PA6_pin_configs[8] = {
  682. 0x40c003f0, 0x424503f2, 0x01813022, 0x02a19021,
  683. 0x50a103f0, 0x90100211, 0x400003f1, 0x9033032e,
  684. };
  685. static unsigned int stac925xM2_2_pin_configs[8] = {
  686. 0x40c003f3, 0x424503f2, 0x04180011, 0x02a19020,
  687. 0x50a103f0, 0x90100212, 0x400003f1, 0x9033032e,
  688. };
  689. static unsigned int *stac925x_brd_tbl[STAC_925x_MODELS] = {
  690. [STAC_REF] = ref925x_pin_configs,
  691. [STAC_M2_2] = stac925xM2_2_pin_configs,
  692. [STAC_MA6] = stac925x_MA6_pin_configs,
  693. [STAC_PA6] = stac925x_PA6_pin_configs,
  694. };
  695. static const char *stac925x_models[STAC_925x_MODELS] = {
  696. [STAC_REF] = "ref",
  697. [STAC_M2_2] = "m2-2",
  698. [STAC_MA6] = "m6",
  699. [STAC_PA6] = "pa6",
  700. };
  701. static struct snd_pci_quirk stac925x_cfg_tbl[] = {
  702. /* SigmaTel reference board */
  703. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
  704. SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
  705. SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_REF),
  706. SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_REF),
  707. SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_MA6),
  708. SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_PA6),
  709. SND_PCI_QUIRK(0x1002, 0x437b, "Gateway MX6453", STAC_M2_2),
  710. {} /* terminator */
  711. };
  712. static unsigned int ref922x_pin_configs[10] = {
  713. 0x01014010, 0x01016011, 0x01012012, 0x0221401f,
  714. 0x01813122, 0x01011014, 0x01441030, 0x01c41030,
  715. 0x40000100, 0x40000100,
  716. };
  717. /*
  718. STAC 922X pin configs for
  719. 102801A7
  720. 102801AB
  721. 102801A9
  722. 102801D1
  723. 102801D2
  724. */
  725. static unsigned int dell_922x_d81_pin_configs[10] = {
  726. 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
  727. 0x02a19020, 0x01117011, 0x400001f0, 0x400001f1,
  728. 0x01813122, 0x400001f2,
  729. };
  730. /*
  731. STAC 922X pin configs for
  732. 102801AC
  733. 102801D0
  734. */
  735. static unsigned int dell_922x_d82_pin_configs[10] = {
  736. 0x02214030, 0x01a19021, 0x01111012, 0x01114010,
  737. 0x02a19020, 0x01117011, 0x01451140, 0x400001f0,
  738. 0x01813122, 0x400001f1,
  739. };
  740. /*
  741. STAC 922X pin configs for
  742. 102801BF
  743. */
  744. static unsigned int dell_922x_m81_pin_configs[10] = {
  745. 0x0321101f, 0x01112024, 0x01111222, 0x91174220,
  746. 0x03a11050, 0x01116221, 0x90a70330, 0x01452340,
  747. 0x40C003f1, 0x405003f0,
  748. };
  749. /*
  750. STAC 9221 A1 pin configs for
  751. 102801D7 (Dell XPS M1210)
  752. */
  753. static unsigned int dell_922x_m82_pin_configs[10] = {
  754. 0x0221121f, 0x408103ff, 0x02111212, 0x90100310,
  755. 0x408003f1, 0x02111211, 0x03451340, 0x40c003f2,
  756. 0x508003f3, 0x405003f4,
  757. };
  758. static unsigned int d945gtp3_pin_configs[10] = {
  759. 0x0221401f, 0x01a19022, 0x01813021, 0x01014010,
  760. 0x40000100, 0x40000100, 0x40000100, 0x40000100,
  761. 0x02a19120, 0x40000100,
  762. };
  763. static unsigned int d945gtp5_pin_configs[10] = {
  764. 0x0221401f, 0x01011012, 0x01813024, 0x01014010,
  765. 0x01a19021, 0x01016011, 0x01452130, 0x40000100,
  766. 0x02a19320, 0x40000100,
  767. };
  768. static unsigned int intel_mac_v1_pin_configs[10] = {
  769. 0x0121e21f, 0x400000ff, 0x9017e110, 0x400000fd,
  770. 0x400000fe, 0x0181e020, 0x1145e030, 0x11c5e240,
  771. 0x400000fc, 0x400000fb,
  772. };
  773. static unsigned int intel_mac_v2_pin_configs[10] = {
  774. 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
  775. 0x400000fe, 0x0181e020, 0x1145e230, 0x500000fa,
  776. 0x400000fc, 0x400000fb,
  777. };
  778. static unsigned int intel_mac_v3_pin_configs[10] = {
  779. 0x0121e21f, 0x90a7012e, 0x9017e110, 0x400000fd,
  780. 0x400000fe, 0x0181e020, 0x1145e230, 0x11c5e240,
  781. 0x400000fc, 0x400000fb,
  782. };
  783. static unsigned int intel_mac_v4_pin_configs[10] = {
  784. 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
  785. 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
  786. 0x400000fc, 0x400000fb,
  787. };
  788. static unsigned int intel_mac_v5_pin_configs[10] = {
  789. 0x0321e21f, 0x03a1e02e, 0x9017e110, 0x9017e11f,
  790. 0x400000fe, 0x0381e020, 0x1345e230, 0x13c5e240,
  791. 0x400000fc, 0x400000fb,
  792. };
  793. static unsigned int *stac922x_brd_tbl[STAC_922X_MODELS] = {
  794. [STAC_D945_REF] = ref922x_pin_configs,
  795. [STAC_D945GTP3] = d945gtp3_pin_configs,
  796. [STAC_D945GTP5] = d945gtp5_pin_configs,
  797. [STAC_INTEL_MAC_V1] = intel_mac_v1_pin_configs,
  798. [STAC_INTEL_MAC_V2] = intel_mac_v2_pin_configs,
  799. [STAC_INTEL_MAC_V3] = intel_mac_v3_pin_configs,
  800. [STAC_INTEL_MAC_V4] = intel_mac_v4_pin_configs,
  801. [STAC_INTEL_MAC_V5] = intel_mac_v5_pin_configs,
  802. /* for backward compatibility */
  803. [STAC_MACMINI] = intel_mac_v3_pin_configs,
  804. [STAC_MACBOOK] = intel_mac_v5_pin_configs,
  805. [STAC_MACBOOK_PRO_V1] = intel_mac_v3_pin_configs,
  806. [STAC_MACBOOK_PRO_V2] = intel_mac_v3_pin_configs,
  807. [STAC_IMAC_INTEL] = intel_mac_v2_pin_configs,
  808. [STAC_IMAC_INTEL_20] = intel_mac_v3_pin_configs,
  809. [STAC_922X_DELL_D81] = dell_922x_d81_pin_configs,
  810. [STAC_922X_DELL_D82] = dell_922x_d82_pin_configs,
  811. [STAC_922X_DELL_M81] = dell_922x_m81_pin_configs,
  812. [STAC_922X_DELL_M82] = dell_922x_m82_pin_configs,
  813. };
  814. static const char *stac922x_models[STAC_922X_MODELS] = {
  815. [STAC_D945_REF] = "ref",
  816. [STAC_D945GTP5] = "5stack",
  817. [STAC_D945GTP3] = "3stack",
  818. [STAC_INTEL_MAC_V1] = "intel-mac-v1",
  819. [STAC_INTEL_MAC_V2] = "intel-mac-v2",
  820. [STAC_INTEL_MAC_V3] = "intel-mac-v3",
  821. [STAC_INTEL_MAC_V4] = "intel-mac-v4",
  822. [STAC_INTEL_MAC_V5] = "intel-mac-v5",
  823. /* for backward compatibility */
  824. [STAC_MACMINI] = "macmini",
  825. [STAC_MACBOOK] = "macbook",
  826. [STAC_MACBOOK_PRO_V1] = "macbook-pro-v1",
  827. [STAC_MACBOOK_PRO_V2] = "macbook-pro",
  828. [STAC_IMAC_INTEL] = "imac-intel",
  829. [STAC_IMAC_INTEL_20] = "imac-intel-20",
  830. [STAC_922X_DELL_D81] = "dell-d81",
  831. [STAC_922X_DELL_D82] = "dell-d82",
  832. [STAC_922X_DELL_M81] = "dell-m81",
  833. [STAC_922X_DELL_M82] = "dell-m82",
  834. };
  835. static struct snd_pci_quirk stac922x_cfg_tbl[] = {
  836. /* SigmaTel reference board */
  837. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  838. "DFI LanParty", STAC_D945_REF),
  839. /* Intel 945G based systems */
  840. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
  841. "Intel D945G", STAC_D945GTP3),
  842. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
  843. "Intel D945G", STAC_D945GTP3),
  844. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
  845. "Intel D945G", STAC_D945GTP3),
  846. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
  847. "Intel D945G", STAC_D945GTP3),
  848. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
  849. "Intel D945G", STAC_D945GTP3),
  850. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
  851. "Intel D945G", STAC_D945GTP3),
  852. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
  853. "Intel D945G", STAC_D945GTP3),
  854. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
  855. "Intel D945G", STAC_D945GTP3),
  856. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
  857. "Intel D945G", STAC_D945GTP3),
  858. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
  859. "Intel D945G", STAC_D945GTP3),
  860. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
  861. "Intel D945G", STAC_D945GTP3),
  862. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
  863. "Intel D945G", STAC_D945GTP3),
  864. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
  865. "Intel D945G", STAC_D945GTP3),
  866. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
  867. "Intel D945G", STAC_D945GTP3),
  868. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
  869. "Intel D945G", STAC_D945GTP3),
  870. /* Intel D945G 5-stack systems */
  871. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
  872. "Intel D945G", STAC_D945GTP5),
  873. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
  874. "Intel D945G", STAC_D945GTP5),
  875. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
  876. "Intel D945G", STAC_D945GTP5),
  877. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
  878. "Intel D945G", STAC_D945GTP5),
  879. /* Intel 945P based systems */
  880. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
  881. "Intel D945P", STAC_D945GTP3),
  882. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
  883. "Intel D945P", STAC_D945GTP3),
  884. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
  885. "Intel D945P", STAC_D945GTP3),
  886. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
  887. "Intel D945P", STAC_D945GTP3),
  888. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
  889. "Intel D945P", STAC_D945GTP3),
  890. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
  891. "Intel D945P", STAC_D945GTP5),
  892. /* other systems */
  893. /* Apple Mac Mini (early 2006) */
  894. SND_PCI_QUIRK(0x8384, 0x7680,
  895. "Mac Mini", STAC_INTEL_MAC_V3),
  896. /* Dell systems */
  897. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
  898. "unknown Dell", STAC_922X_DELL_D81),
  899. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
  900. "unknown Dell", STAC_922X_DELL_D81),
  901. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
  902. "unknown Dell", STAC_922X_DELL_D81),
  903. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
  904. "unknown Dell", STAC_922X_DELL_D82),
  905. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
  906. "unknown Dell", STAC_922X_DELL_M81),
  907. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
  908. "unknown Dell", STAC_922X_DELL_D82),
  909. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
  910. "unknown Dell", STAC_922X_DELL_D81),
  911. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
  912. "unknown Dell", STAC_922X_DELL_D81),
  913. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
  914. "Dell XPS M1210", STAC_922X_DELL_M82),
  915. {} /* terminator */
  916. };
  917. static unsigned int ref927x_pin_configs[14] = {
  918. 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
  919. 0x01a19040, 0x01011012, 0x01016011, 0x0101201f,
  920. 0x183301f0, 0x18a001f0, 0x18a001f0, 0x01442070,
  921. 0x01c42190, 0x40000100,
  922. };
  923. static unsigned int d965_3st_pin_configs[14] = {
  924. 0x0221401f, 0x02a19120, 0x40000100, 0x01014011,
  925. 0x01a19021, 0x01813024, 0x40000100, 0x40000100,
  926. 0x40000100, 0x40000100, 0x40000100, 0x40000100,
  927. 0x40000100, 0x40000100
  928. };
  929. static unsigned int d965_5st_pin_configs[14] = {
  930. 0x02214020, 0x02a19080, 0x0181304e, 0x01014010,
  931. 0x01a19040, 0x01011012, 0x01016011, 0x40000100,
  932. 0x40000100, 0x40000100, 0x40000100, 0x01442070,
  933. 0x40000100, 0x40000100
  934. };
  935. static unsigned int dell_3st_pin_configs[14] = {
  936. 0x02211230, 0x02a11220, 0x01a19040, 0x01114210,
  937. 0x01111212, 0x01116211, 0x01813050, 0x01112214,
  938. 0x403003fa, 0x40000100, 0x40000100, 0x404003fb,
  939. 0x40c003fc, 0x40000100
  940. };
  941. static unsigned int *stac927x_brd_tbl[STAC_927X_MODELS] = {
  942. [STAC_D965_REF] = ref927x_pin_configs,
  943. [STAC_D965_3ST] = d965_3st_pin_configs,
  944. [STAC_D965_5ST] = d965_5st_pin_configs,
  945. [STAC_DELL_3ST] = dell_3st_pin_configs,
  946. };
  947. static const char *stac927x_models[STAC_927X_MODELS] = {
  948. [STAC_D965_REF] = "ref",
  949. [STAC_D965_3ST] = "3stack",
  950. [STAC_D965_5ST] = "5stack",
  951. [STAC_DELL_3ST] = "dell-3stack",
  952. };
  953. static struct snd_pci_quirk stac927x_cfg_tbl[] = {
  954. /* SigmaTel reference board */
  955. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  956. "DFI LanParty", STAC_D965_REF),
  957. /* Intel 946 based systems */
  958. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
  959. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
  960. /* 965 based 3 stack systems */
  961. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2116, "Intel D965", STAC_D965_3ST),
  962. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2115, "Intel D965", STAC_D965_3ST),
  963. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2114, "Intel D965", STAC_D965_3ST),
  964. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2113, "Intel D965", STAC_D965_3ST),
  965. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2112, "Intel D965", STAC_D965_3ST),
  966. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2111, "Intel D965", STAC_D965_3ST),
  967. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2110, "Intel D965", STAC_D965_3ST),
  968. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2009, "Intel D965", STAC_D965_3ST),
  969. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2008, "Intel D965", STAC_D965_3ST),
  970. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2007, "Intel D965", STAC_D965_3ST),
  971. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2006, "Intel D965", STAC_D965_3ST),
  972. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2005, "Intel D965", STAC_D965_3ST),
  973. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2004, "Intel D965", STAC_D965_3ST),
  974. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2003, "Intel D965", STAC_D965_3ST),
  975. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2002, "Intel D965", STAC_D965_3ST),
  976. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2001, "Intel D965", STAC_D965_3ST),
  977. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_D965_3ST),
  978. /* Dell 3 stack systems */
  979. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
  980. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
  981. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
  982. /* 965 based 5 stack systems */
  983. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_D965_5ST),
  984. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2301, "Intel D965", STAC_D965_5ST),
  985. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2302, "Intel D965", STAC_D965_5ST),
  986. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2303, "Intel D965", STAC_D965_5ST),
  987. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2304, "Intel D965", STAC_D965_5ST),
  988. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2305, "Intel D965", STAC_D965_5ST),
  989. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2501, "Intel D965", STAC_D965_5ST),
  990. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2502, "Intel D965", STAC_D965_5ST),
  991. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2503, "Intel D965", STAC_D965_5ST),
  992. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2504, "Intel D965", STAC_D965_5ST),
  993. {} /* terminator */
  994. };
  995. static unsigned int ref9205_pin_configs[12] = {
  996. 0x40000100, 0x40000100, 0x01016011, 0x01014010,
  997. 0x01813122, 0x01a19021, 0x40000100, 0x40000100,
  998. 0x90a000f0, 0x90a000f0, 0x01441030, 0x01c41030
  999. };
  1000. /*
  1001. STAC 9205 pin configs for
  1002. 102801F1
  1003. 102801F2
  1004. 102801FC
  1005. 102801FD
  1006. 10280204
  1007. 1028021F
  1008. */
  1009. static unsigned int dell_9205_m42_pin_configs[12] = {
  1010. 0x0321101F, 0x03A11020, 0x400003FA, 0x90170310,
  1011. 0x400003FB, 0x400003FC, 0x400003FD, 0x40F000F9,
  1012. 0x90A60330, 0x400003FF, 0x0144131F, 0x40C003FE,
  1013. };
  1014. /*
  1015. STAC 9205 pin configs for
  1016. 102801F9
  1017. 102801FA
  1018. 102801FE
  1019. 102801FF (Dell Precision M4300)
  1020. 10280206
  1021. 10280200
  1022. 10280201
  1023. */
  1024. static unsigned int dell_9205_m43_pin_configs[12] = {
  1025. 0x0321101f, 0x03a11020, 0x90a70330, 0x90170310,
  1026. 0x400000fe, 0x400000ff, 0x400000fd, 0x40f000f9,
  1027. 0x400000fa, 0x400000fc, 0x0144131f, 0x40c003f8,
  1028. };
  1029. static unsigned int dell_9205_m44_pin_configs[12] = {
  1030. 0x0421101f, 0x04a11020, 0x400003fa, 0x90170310,
  1031. 0x400003fb, 0x400003fc, 0x400003fd, 0x400003f9,
  1032. 0x90a60330, 0x400003ff, 0x01441340, 0x40c003fe,
  1033. };
  1034. static unsigned int *stac9205_brd_tbl[STAC_9205_MODELS] = {
  1035. [STAC_9205_REF] = ref9205_pin_configs,
  1036. [STAC_9205_DELL_M42] = dell_9205_m42_pin_configs,
  1037. [STAC_9205_DELL_M43] = dell_9205_m43_pin_configs,
  1038. [STAC_9205_DELL_M44] = dell_9205_m44_pin_configs,
  1039. };
  1040. static const char *stac9205_models[STAC_9205_MODELS] = {
  1041. [STAC_9205_REF] = "ref",
  1042. [STAC_9205_DELL_M42] = "dell-m42",
  1043. [STAC_9205_DELL_M43] = "dell-m43",
  1044. [STAC_9205_DELL_M44] = "dell-m44",
  1045. };
  1046. static struct snd_pci_quirk stac9205_cfg_tbl[] = {
  1047. /* SigmaTel reference board */
  1048. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1049. "DFI LanParty", STAC_9205_REF),
  1050. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
  1051. "unknown Dell", STAC_9205_DELL_M42),
  1052. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
  1053. "unknown Dell", STAC_9205_DELL_M42),
  1054. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
  1055. "Dell Precision", STAC_9205_DELL_M43),
  1056. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
  1057. "Dell Precision", STAC_9205_DELL_M43),
  1058. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
  1059. "Dell Precision", STAC_9205_DELL_M43),
  1060. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
  1061. "Dell Precision", STAC_9205_DELL_M43),
  1062. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
  1063. "Dell Precision", STAC_9205_DELL_M43),
  1064. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
  1065. "unknown Dell", STAC_9205_DELL_M42),
  1066. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
  1067. "unknown Dell", STAC_9205_DELL_M42),
  1068. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
  1069. "Dell Precision", STAC_9205_DELL_M43),
  1070. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
  1071. "Dell Precision M4300", STAC_9205_DELL_M43),
  1072. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
  1073. "Dell Precision", STAC_9205_DELL_M43),
  1074. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
  1075. "Dell Inspiron", STAC_9205_DELL_M44),
  1076. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
  1077. "Dell Inspiron", STAC_9205_DELL_M44),
  1078. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
  1079. "Dell Inspiron", STAC_9205_DELL_M44),
  1080. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
  1081. "Dell Inspiron", STAC_9205_DELL_M44),
  1082. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
  1083. "unknown Dell", STAC_9205_DELL_M42),
  1084. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
  1085. "Dell Inspiron", STAC_9205_DELL_M44),
  1086. {} /* terminator */
  1087. };
  1088. static int stac92xx_save_bios_config_regs(struct hda_codec *codec)
  1089. {
  1090. int i;
  1091. struct sigmatel_spec *spec = codec->spec;
  1092. if (! spec->bios_pin_configs) {
  1093. spec->bios_pin_configs = kcalloc(spec->num_pins,
  1094. sizeof(*spec->bios_pin_configs), GFP_KERNEL);
  1095. if (! spec->bios_pin_configs)
  1096. return -ENOMEM;
  1097. }
  1098. for (i = 0; i < spec->num_pins; i++) {
  1099. hda_nid_t nid = spec->pin_nids[i];
  1100. unsigned int pin_cfg;
  1101. pin_cfg = snd_hda_codec_read(codec, nid, 0,
  1102. AC_VERB_GET_CONFIG_DEFAULT, 0x00);
  1103. snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x bios pin config %8.8x\n",
  1104. nid, pin_cfg);
  1105. spec->bios_pin_configs[i] = pin_cfg;
  1106. }
  1107. return 0;
  1108. }
  1109. static void stac92xx_set_config_reg(struct hda_codec *codec,
  1110. hda_nid_t pin_nid, unsigned int pin_config)
  1111. {
  1112. int i;
  1113. snd_hda_codec_write(codec, pin_nid, 0,
  1114. AC_VERB_SET_CONFIG_DEFAULT_BYTES_0,
  1115. pin_config & 0x000000ff);
  1116. snd_hda_codec_write(codec, pin_nid, 0,
  1117. AC_VERB_SET_CONFIG_DEFAULT_BYTES_1,
  1118. (pin_config & 0x0000ff00) >> 8);
  1119. snd_hda_codec_write(codec, pin_nid, 0,
  1120. AC_VERB_SET_CONFIG_DEFAULT_BYTES_2,
  1121. (pin_config & 0x00ff0000) >> 16);
  1122. snd_hda_codec_write(codec, pin_nid, 0,
  1123. AC_VERB_SET_CONFIG_DEFAULT_BYTES_3,
  1124. pin_config >> 24);
  1125. i = snd_hda_codec_read(codec, pin_nid, 0,
  1126. AC_VERB_GET_CONFIG_DEFAULT,
  1127. 0x00);
  1128. snd_printdd(KERN_INFO "hda_codec: pin nid %2.2x pin config %8.8x\n",
  1129. pin_nid, i);
  1130. }
  1131. static void stac92xx_set_config_regs(struct hda_codec *codec)
  1132. {
  1133. int i;
  1134. struct sigmatel_spec *spec = codec->spec;
  1135. if (!spec->pin_configs)
  1136. return;
  1137. for (i = 0; i < spec->num_pins; i++)
  1138. stac92xx_set_config_reg(codec, spec->pin_nids[i],
  1139. spec->pin_configs[i]);
  1140. }
  1141. static void stac92xx_enable_gpio_mask(struct hda_codec *codec)
  1142. {
  1143. struct sigmatel_spec *spec = codec->spec;
  1144. /* Configure GPIOx as output */
  1145. snd_hda_codec_write_cache(codec, codec->afg, 0,
  1146. AC_VERB_SET_GPIO_DIRECTION, spec->gpio_mask);
  1147. /* Configure GPIOx as CMOS */
  1148. snd_hda_codec_write_cache(codec, codec->afg, 0, 0x7e7, 0x00000000);
  1149. /* Assert GPIOx */
  1150. snd_hda_codec_write_cache(codec, codec->afg, 0,
  1151. AC_VERB_SET_GPIO_DATA, spec->gpio_data);
  1152. /* Enable GPIOx */
  1153. snd_hda_codec_write_cache(codec, codec->afg, 0,
  1154. AC_VERB_SET_GPIO_MASK, spec->gpio_mask);
  1155. }
  1156. /*
  1157. * Analog playback callbacks
  1158. */
  1159. static int stac92xx_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1160. struct hda_codec *codec,
  1161. struct snd_pcm_substream *substream)
  1162. {
  1163. struct sigmatel_spec *spec = codec->spec;
  1164. return snd_hda_multi_out_analog_open(codec, &spec->multiout, substream);
  1165. }
  1166. static int stac92xx_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1167. struct hda_codec *codec,
  1168. unsigned int stream_tag,
  1169. unsigned int format,
  1170. struct snd_pcm_substream *substream)
  1171. {
  1172. struct sigmatel_spec *spec = codec->spec;
  1173. return snd_hda_multi_out_analog_prepare(codec, &spec->multiout, stream_tag, format, substream);
  1174. }
  1175. static int stac92xx_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1176. struct hda_codec *codec,
  1177. struct snd_pcm_substream *substream)
  1178. {
  1179. struct sigmatel_spec *spec = codec->spec;
  1180. return snd_hda_multi_out_analog_cleanup(codec, &spec->multiout);
  1181. }
  1182. /*
  1183. * Digital playback callbacks
  1184. */
  1185. static int stac92xx_dig_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1186. struct hda_codec *codec,
  1187. struct snd_pcm_substream *substream)
  1188. {
  1189. struct sigmatel_spec *spec = codec->spec;
  1190. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  1191. }
  1192. static int stac92xx_dig_playback_pcm_close(struct hda_pcm_stream *hinfo,
  1193. struct hda_codec *codec,
  1194. struct snd_pcm_substream *substream)
  1195. {
  1196. struct sigmatel_spec *spec = codec->spec;
  1197. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1198. }
  1199. static int stac92xx_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1200. struct hda_codec *codec,
  1201. unsigned int stream_tag,
  1202. unsigned int format,
  1203. struct snd_pcm_substream *substream)
  1204. {
  1205. struct sigmatel_spec *spec = codec->spec;
  1206. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  1207. stream_tag, format, substream);
  1208. }
  1209. /*
  1210. * Analog capture callbacks
  1211. */
  1212. static int stac92xx_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
  1213. struct hda_codec *codec,
  1214. unsigned int stream_tag,
  1215. unsigned int format,
  1216. struct snd_pcm_substream *substream)
  1217. {
  1218. struct sigmatel_spec *spec = codec->spec;
  1219. snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number],
  1220. stream_tag, 0, format);
  1221. return 0;
  1222. }
  1223. static int stac92xx_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1224. struct hda_codec *codec,
  1225. struct snd_pcm_substream *substream)
  1226. {
  1227. struct sigmatel_spec *spec = codec->spec;
  1228. snd_hda_codec_setup_stream(codec, spec->adc_nids[substream->number], 0, 0, 0);
  1229. return 0;
  1230. }
  1231. static struct hda_pcm_stream stac92xx_pcm_digital_playback = {
  1232. .substreams = 1,
  1233. .channels_min = 2,
  1234. .channels_max = 2,
  1235. /* NID is set in stac92xx_build_pcms */
  1236. .ops = {
  1237. .open = stac92xx_dig_playback_pcm_open,
  1238. .close = stac92xx_dig_playback_pcm_close,
  1239. .prepare = stac92xx_dig_playback_pcm_prepare
  1240. },
  1241. };
  1242. static struct hda_pcm_stream stac92xx_pcm_digital_capture = {
  1243. .substreams = 1,
  1244. .channels_min = 2,
  1245. .channels_max = 2,
  1246. /* NID is set in stac92xx_build_pcms */
  1247. };
  1248. static struct hda_pcm_stream stac92xx_pcm_analog_playback = {
  1249. .substreams = 1,
  1250. .channels_min = 2,
  1251. .channels_max = 8,
  1252. .nid = 0x02, /* NID to query formats and rates */
  1253. .ops = {
  1254. .open = stac92xx_playback_pcm_open,
  1255. .prepare = stac92xx_playback_pcm_prepare,
  1256. .cleanup = stac92xx_playback_pcm_cleanup
  1257. },
  1258. };
  1259. static struct hda_pcm_stream stac92xx_pcm_analog_alt_playback = {
  1260. .substreams = 1,
  1261. .channels_min = 2,
  1262. .channels_max = 2,
  1263. .nid = 0x06, /* NID to query formats and rates */
  1264. .ops = {
  1265. .open = stac92xx_playback_pcm_open,
  1266. .prepare = stac92xx_playback_pcm_prepare,
  1267. .cleanup = stac92xx_playback_pcm_cleanup
  1268. },
  1269. };
  1270. static struct hda_pcm_stream stac92xx_pcm_analog_capture = {
  1271. .channels_min = 2,
  1272. .channels_max = 2,
  1273. /* NID + .substreams is set in stac92xx_build_pcms */
  1274. .ops = {
  1275. .prepare = stac92xx_capture_pcm_prepare,
  1276. .cleanup = stac92xx_capture_pcm_cleanup
  1277. },
  1278. };
  1279. static int stac92xx_build_pcms(struct hda_codec *codec)
  1280. {
  1281. struct sigmatel_spec *spec = codec->spec;
  1282. struct hda_pcm *info = spec->pcm_rec;
  1283. codec->num_pcms = 1;
  1284. codec->pcm_info = info;
  1285. info->name = "STAC92xx Analog";
  1286. info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_playback;
  1287. info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_analog_capture;
  1288. info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adc_nids[0];
  1289. info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_adcs;
  1290. if (spec->alt_switch) {
  1291. codec->num_pcms++;
  1292. info++;
  1293. info->name = "STAC92xx Analog Alt";
  1294. info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_analog_alt_playback;
  1295. }
  1296. if (spec->multiout.dig_out_nid || spec->dig_in_nid) {
  1297. codec->num_pcms++;
  1298. info++;
  1299. info->name = "STAC92xx Digital";
  1300. if (spec->multiout.dig_out_nid) {
  1301. info->stream[SNDRV_PCM_STREAM_PLAYBACK] = stac92xx_pcm_digital_playback;
  1302. info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->multiout.dig_out_nid;
  1303. }
  1304. if (spec->dig_in_nid) {
  1305. info->stream[SNDRV_PCM_STREAM_CAPTURE] = stac92xx_pcm_digital_capture;
  1306. info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in_nid;
  1307. }
  1308. }
  1309. return 0;
  1310. }
  1311. static unsigned int stac92xx_get_vref(struct hda_codec *codec, hda_nid_t nid)
  1312. {
  1313. unsigned int pincap = snd_hda_param_read(codec, nid,
  1314. AC_PAR_PIN_CAP);
  1315. pincap = (pincap & AC_PINCAP_VREF) >> AC_PINCAP_VREF_SHIFT;
  1316. if (pincap & AC_PINCAP_VREF_100)
  1317. return AC_PINCTL_VREF_100;
  1318. if (pincap & AC_PINCAP_VREF_80)
  1319. return AC_PINCTL_VREF_80;
  1320. if (pincap & AC_PINCAP_VREF_50)
  1321. return AC_PINCTL_VREF_50;
  1322. if (pincap & AC_PINCAP_VREF_GRD)
  1323. return AC_PINCTL_VREF_GRD;
  1324. return 0;
  1325. }
  1326. static void stac92xx_auto_set_pinctl(struct hda_codec *codec, hda_nid_t nid, int pin_type)
  1327. {
  1328. snd_hda_codec_write_cache(codec, nid, 0,
  1329. AC_VERB_SET_PIN_WIDGET_CONTROL, pin_type);
  1330. }
  1331. #define stac92xx_io_switch_info snd_ctl_boolean_mono_info
  1332. static int stac92xx_io_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1333. {
  1334. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1335. struct sigmatel_spec *spec = codec->spec;
  1336. int io_idx = kcontrol-> private_value & 0xff;
  1337. ucontrol->value.integer.value[0] = spec->io_switch[io_idx];
  1338. return 0;
  1339. }
  1340. static int stac92xx_io_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1341. {
  1342. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1343. struct sigmatel_spec *spec = codec->spec;
  1344. hda_nid_t nid = kcontrol->private_value >> 8;
  1345. int io_idx = kcontrol-> private_value & 0xff;
  1346. unsigned short val = ucontrol->value.integer.value[0];
  1347. spec->io_switch[io_idx] = val;
  1348. if (val)
  1349. stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
  1350. else {
  1351. unsigned int pinctl = AC_PINCTL_IN_EN;
  1352. if (io_idx) /* set VREF for mic */
  1353. pinctl |= stac92xx_get_vref(codec, nid);
  1354. stac92xx_auto_set_pinctl(codec, nid, pinctl);
  1355. }
  1356. return 1;
  1357. }
  1358. #define stac92xx_clfe_switch_info snd_ctl_boolean_mono_info
  1359. static int stac92xx_clfe_switch_get(struct snd_kcontrol *kcontrol,
  1360. struct snd_ctl_elem_value *ucontrol)
  1361. {
  1362. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1363. struct sigmatel_spec *spec = codec->spec;
  1364. ucontrol->value.integer.value[0] = spec->clfe_swap;
  1365. return 0;
  1366. }
  1367. static int stac92xx_clfe_switch_put(struct snd_kcontrol *kcontrol,
  1368. struct snd_ctl_elem_value *ucontrol)
  1369. {
  1370. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  1371. struct sigmatel_spec *spec = codec->spec;
  1372. hda_nid_t nid = kcontrol->private_value & 0xff;
  1373. if (spec->clfe_swap == ucontrol->value.integer.value[0])
  1374. return 0;
  1375. spec->clfe_swap = ucontrol->value.integer.value[0];
  1376. snd_hda_codec_write_cache(codec, nid, 0, AC_VERB_SET_EAPD_BTLENABLE,
  1377. spec->clfe_swap ? 0x4 : 0x0);
  1378. return 1;
  1379. }
  1380. #define STAC_CODEC_IO_SWITCH(xname, xpval) \
  1381. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  1382. .name = xname, \
  1383. .index = 0, \
  1384. .info = stac92xx_io_switch_info, \
  1385. .get = stac92xx_io_switch_get, \
  1386. .put = stac92xx_io_switch_put, \
  1387. .private_value = xpval, \
  1388. }
  1389. #define STAC_CODEC_CLFE_SWITCH(xname, xpval) \
  1390. { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  1391. .name = xname, \
  1392. .index = 0, \
  1393. .info = stac92xx_clfe_switch_info, \
  1394. .get = stac92xx_clfe_switch_get, \
  1395. .put = stac92xx_clfe_switch_put, \
  1396. .private_value = xpval, \
  1397. }
  1398. enum {
  1399. STAC_CTL_WIDGET_VOL,
  1400. STAC_CTL_WIDGET_MUTE,
  1401. STAC_CTL_WIDGET_IO_SWITCH,
  1402. STAC_CTL_WIDGET_CLFE_SWITCH
  1403. };
  1404. static struct snd_kcontrol_new stac92xx_control_templates[] = {
  1405. HDA_CODEC_VOLUME(NULL, 0, 0, 0),
  1406. HDA_CODEC_MUTE(NULL, 0, 0, 0),
  1407. STAC_CODEC_IO_SWITCH(NULL, 0),
  1408. STAC_CODEC_CLFE_SWITCH(NULL, 0),
  1409. };
  1410. /* add dynamic controls */
  1411. static int stac92xx_add_control(struct sigmatel_spec *spec, int type, const char *name, unsigned long val)
  1412. {
  1413. struct snd_kcontrol_new *knew;
  1414. if (spec->num_kctl_used >= spec->num_kctl_alloc) {
  1415. int num = spec->num_kctl_alloc + NUM_CONTROL_ALLOC;
  1416. knew = kcalloc(num + 1, sizeof(*knew), GFP_KERNEL); /* array + terminator */
  1417. if (! knew)
  1418. return -ENOMEM;
  1419. if (spec->kctl_alloc) {
  1420. memcpy(knew, spec->kctl_alloc, sizeof(*knew) * spec->num_kctl_alloc);
  1421. kfree(spec->kctl_alloc);
  1422. }
  1423. spec->kctl_alloc = knew;
  1424. spec->num_kctl_alloc = num;
  1425. }
  1426. knew = &spec->kctl_alloc[spec->num_kctl_used];
  1427. *knew = stac92xx_control_templates[type];
  1428. knew->name = kstrdup(name, GFP_KERNEL);
  1429. if (! knew->name)
  1430. return -ENOMEM;
  1431. knew->private_value = val;
  1432. spec->num_kctl_used++;
  1433. return 0;
  1434. }
  1435. /* flag inputs as additional dynamic lineouts */
  1436. static int stac92xx_add_dyn_out_pins(struct hda_codec *codec, struct auto_pin_cfg *cfg)
  1437. {
  1438. struct sigmatel_spec *spec = codec->spec;
  1439. unsigned int wcaps, wtype;
  1440. int i, num_dacs = 0;
  1441. /* use the wcaps cache to count all DACs available for line-outs */
  1442. for (i = 0; i < codec->num_nodes; i++) {
  1443. wcaps = codec->wcaps[i];
  1444. wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
  1445. if (wtype == AC_WID_AUD_OUT && !(wcaps & AC_WCAP_DIGITAL))
  1446. num_dacs++;
  1447. }
  1448. snd_printdd("%s: total dac count=%d\n", __func__, num_dacs);
  1449. switch (cfg->line_outs) {
  1450. case 3:
  1451. /* add line-in as side */
  1452. if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 3) {
  1453. cfg->line_out_pins[cfg->line_outs] =
  1454. cfg->input_pins[AUTO_PIN_LINE];
  1455. spec->line_switch = 1;
  1456. cfg->line_outs++;
  1457. }
  1458. break;
  1459. case 2:
  1460. /* add line-in as clfe and mic as side */
  1461. if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 2) {
  1462. cfg->line_out_pins[cfg->line_outs] =
  1463. cfg->input_pins[AUTO_PIN_LINE];
  1464. spec->line_switch = 1;
  1465. cfg->line_outs++;
  1466. }
  1467. if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 3) {
  1468. cfg->line_out_pins[cfg->line_outs] =
  1469. cfg->input_pins[AUTO_PIN_MIC];
  1470. spec->mic_switch = 1;
  1471. cfg->line_outs++;
  1472. }
  1473. break;
  1474. case 1:
  1475. /* add line-in as surr and mic as clfe */
  1476. if (cfg->input_pins[AUTO_PIN_LINE] && num_dacs > 1) {
  1477. cfg->line_out_pins[cfg->line_outs] =
  1478. cfg->input_pins[AUTO_PIN_LINE];
  1479. spec->line_switch = 1;
  1480. cfg->line_outs++;
  1481. }
  1482. if (cfg->input_pins[AUTO_PIN_MIC] && num_dacs > 2) {
  1483. cfg->line_out_pins[cfg->line_outs] =
  1484. cfg->input_pins[AUTO_PIN_MIC];
  1485. spec->mic_switch = 1;
  1486. cfg->line_outs++;
  1487. }
  1488. break;
  1489. }
  1490. return 0;
  1491. }
  1492. static int is_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
  1493. {
  1494. int i;
  1495. for (i = 0; i < spec->multiout.num_dacs; i++) {
  1496. if (spec->multiout.dac_nids[i] == nid)
  1497. return 1;
  1498. }
  1499. return 0;
  1500. }
  1501. /*
  1502. * Fill in the dac_nids table from the parsed pin configuration
  1503. * This function only works when every pin in line_out_pins[]
  1504. * contains atleast one DAC in its connection list. Some 92xx
  1505. * codecs are not connected directly to a DAC, such as the 9200
  1506. * and 9202/925x. For those, dac_nids[] must be hard-coded.
  1507. */
  1508. static int stac92xx_auto_fill_dac_nids(struct hda_codec *codec,
  1509. struct auto_pin_cfg *cfg)
  1510. {
  1511. struct sigmatel_spec *spec = codec->spec;
  1512. int i, j, conn_len = 0;
  1513. hda_nid_t nid, conn[HDA_MAX_CONNECTIONS];
  1514. unsigned int wcaps, wtype;
  1515. for (i = 0; i < cfg->line_outs; i++) {
  1516. nid = cfg->line_out_pins[i];
  1517. conn_len = snd_hda_get_connections(codec, nid, conn,
  1518. HDA_MAX_CONNECTIONS);
  1519. for (j = 0; j < conn_len; j++) {
  1520. wcaps = snd_hda_param_read(codec, conn[j],
  1521. AC_PAR_AUDIO_WIDGET_CAP);
  1522. wtype = (wcaps & AC_WCAP_TYPE) >> AC_WCAP_TYPE_SHIFT;
  1523. if (wtype != AC_WID_AUD_OUT ||
  1524. (wcaps & AC_WCAP_DIGITAL))
  1525. continue;
  1526. /* conn[j] is a DAC routed to this line-out */
  1527. if (!is_in_dac_nids(spec, conn[j]))
  1528. break;
  1529. }
  1530. if (j == conn_len) {
  1531. if (spec->multiout.num_dacs > 0) {
  1532. /* we have already working output pins,
  1533. * so let's drop the broken ones again
  1534. */
  1535. cfg->line_outs = spec->multiout.num_dacs;
  1536. break;
  1537. }
  1538. /* error out, no available DAC found */
  1539. snd_printk(KERN_ERR
  1540. "%s: No available DAC for pin 0x%x\n",
  1541. __func__, nid);
  1542. return -ENODEV;
  1543. }
  1544. spec->multiout.dac_nids[i] = conn[j];
  1545. spec->multiout.num_dacs++;
  1546. if (conn_len > 1) {
  1547. /* select this DAC in the pin's input mux */
  1548. snd_hda_codec_write_cache(codec, nid, 0,
  1549. AC_VERB_SET_CONNECT_SEL, j);
  1550. }
  1551. }
  1552. snd_printd("dac_nids=%d (0x%x/0x%x/0x%x/0x%x/0x%x)\n",
  1553. spec->multiout.num_dacs,
  1554. spec->multiout.dac_nids[0],
  1555. spec->multiout.dac_nids[1],
  1556. spec->multiout.dac_nids[2],
  1557. spec->multiout.dac_nids[3],
  1558. spec->multiout.dac_nids[4]);
  1559. return 0;
  1560. }
  1561. /* create volume control/switch for the given prefx type */
  1562. static int create_controls(struct sigmatel_spec *spec, const char *pfx, hda_nid_t nid, int chs)
  1563. {
  1564. char name[32];
  1565. int err;
  1566. sprintf(name, "%s Playback Volume", pfx);
  1567. err = stac92xx_add_control(spec, STAC_CTL_WIDGET_VOL, name,
  1568. HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
  1569. if (err < 0)
  1570. return err;
  1571. sprintf(name, "%s Playback Switch", pfx);
  1572. err = stac92xx_add_control(spec, STAC_CTL_WIDGET_MUTE, name,
  1573. HDA_COMPOSE_AMP_VAL(nid, chs, 0, HDA_OUTPUT));
  1574. if (err < 0)
  1575. return err;
  1576. return 0;
  1577. }
  1578. /* add playback controls from the parsed DAC table */
  1579. static int stac92xx_auto_create_multi_out_ctls(struct hda_codec *codec,
  1580. const struct auto_pin_cfg *cfg)
  1581. {
  1582. static const char *chname[4] = {
  1583. "Front", "Surround", NULL /*CLFE*/, "Side"
  1584. };
  1585. hda_nid_t nid;
  1586. int i, err;
  1587. struct sigmatel_spec *spec = codec->spec;
  1588. unsigned int wid_caps;
  1589. for (i = 0; i < cfg->line_outs; i++) {
  1590. if (!spec->multiout.dac_nids[i])
  1591. continue;
  1592. nid = spec->multiout.dac_nids[i];
  1593. if (i == 2) {
  1594. /* Center/LFE */
  1595. err = create_controls(spec, "Center", nid, 1);
  1596. if (err < 0)
  1597. return err;
  1598. err = create_controls(spec, "LFE", nid, 2);
  1599. if (err < 0)
  1600. return err;
  1601. wid_caps = get_wcaps(codec, nid);
  1602. if (wid_caps & AC_WCAP_LR_SWAP) {
  1603. err = stac92xx_add_control(spec,
  1604. STAC_CTL_WIDGET_CLFE_SWITCH,
  1605. "Swap Center/LFE Playback Switch", nid);
  1606. if (err < 0)
  1607. return err;
  1608. }
  1609. } else {
  1610. err = create_controls(spec, chname[i], nid, 3);
  1611. if (err < 0)
  1612. return err;
  1613. }
  1614. }
  1615. if (spec->line_switch)
  1616. if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Line In as Output Switch", cfg->input_pins[AUTO_PIN_LINE] << 8)) < 0)
  1617. return err;
  1618. if (spec->mic_switch)
  1619. if ((err = stac92xx_add_control(spec, STAC_CTL_WIDGET_IO_SWITCH, "Mic as Output Switch", (cfg->input_pins[AUTO_PIN_MIC] << 8) | 1)) < 0)
  1620. return err;
  1621. return 0;
  1622. }
  1623. static int check_in_dac_nids(struct sigmatel_spec *spec, hda_nid_t nid)
  1624. {
  1625. if (is_in_dac_nids(spec, nid))
  1626. return 1;
  1627. if (spec->multiout.hp_nid == nid)
  1628. return 1;
  1629. return 0;
  1630. }
  1631. static int add_spec_dacs(struct sigmatel_spec *spec, hda_nid_t nid)
  1632. {
  1633. if (!spec->multiout.hp_nid)
  1634. spec->multiout.hp_nid = nid;
  1635. else if (spec->multiout.num_dacs > 4) {
  1636. printk(KERN_WARNING "stac92xx: No space for DAC 0x%x\n", nid);
  1637. return 1;
  1638. } else {
  1639. spec->multiout.dac_nids[spec->multiout.num_dacs] = nid;
  1640. spec->multiout.num_dacs++;
  1641. }
  1642. return 0;
  1643. }
  1644. /* add playback controls for Speaker and HP outputs */
  1645. static int stac92xx_auto_create_hp_ctls(struct hda_codec *codec,
  1646. struct auto_pin_cfg *cfg)
  1647. {
  1648. struct sigmatel_spec *spec = codec->spec;
  1649. hda_nid_t nid;
  1650. int i, old_num_dacs, err;
  1651. old_num_dacs = spec->multiout.num_dacs;
  1652. for (i = 0; i < cfg->hp_outs; i++) {
  1653. unsigned int wid_caps = get_wcaps(codec, cfg->hp_pins[i]);
  1654. if (wid_caps & AC_WCAP_UNSOL_CAP)
  1655. spec->hp_detect = 1;
  1656. nid = snd_hda_codec_read(codec, cfg->hp_pins[i], 0,
  1657. AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
  1658. if (check_in_dac_nids(spec, nid))
  1659. nid = 0;
  1660. if (! nid)
  1661. continue;
  1662. add_spec_dacs(spec, nid);
  1663. }
  1664. for (i = 0; i < cfg->speaker_outs; i++) {
  1665. nid = snd_hda_codec_read(codec, cfg->speaker_pins[i], 0,
  1666. AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
  1667. if (check_in_dac_nids(spec, nid))
  1668. nid = 0;
  1669. if (! nid)
  1670. continue;
  1671. add_spec_dacs(spec, nid);
  1672. }
  1673. for (i = 0; i < cfg->line_outs; i++) {
  1674. nid = snd_hda_codec_read(codec, cfg->line_out_pins[i], 0,
  1675. AC_VERB_GET_CONNECT_LIST, 0) & 0xff;
  1676. if (check_in_dac_nids(spec, nid))
  1677. nid = 0;
  1678. if (! nid)
  1679. continue;
  1680. add_spec_dacs(spec, nid);
  1681. }
  1682. for (i = old_num_dacs; i < spec->multiout.num_dacs; i++) {
  1683. static const char *pfxs[] = {
  1684. "Speaker", "External Speaker", "Speaker2",
  1685. };
  1686. err = create_controls(spec, pfxs[i - old_num_dacs],
  1687. spec->multiout.dac_nids[i], 3);
  1688. if (err < 0)
  1689. return err;
  1690. }
  1691. if (spec->multiout.hp_nid) {
  1692. const char *pfx;
  1693. if (old_num_dacs == spec->multiout.num_dacs)
  1694. pfx = "Master";
  1695. else
  1696. pfx = "Headphone";
  1697. err = create_controls(spec, pfx, spec->multiout.hp_nid, 3);
  1698. if (err < 0)
  1699. return err;
  1700. }
  1701. return 0;
  1702. }
  1703. /* labels for dmic mux inputs */
  1704. static const char *stac92xx_dmic_labels[5] = {
  1705. "Analog Inputs", "Digital Mic 1", "Digital Mic 2",
  1706. "Digital Mic 3", "Digital Mic 4"
  1707. };
  1708. /* create playback/capture controls for input pins on dmic capable codecs */
  1709. static int stac92xx_auto_create_dmic_input_ctls(struct hda_codec *codec,
  1710. const struct auto_pin_cfg *cfg)
  1711. {
  1712. struct sigmatel_spec *spec = codec->spec;
  1713. struct hda_input_mux *dimux = &spec->private_dimux;
  1714. hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
  1715. int i, j;
  1716. dimux->items[dimux->num_items].label = stac92xx_dmic_labels[0];
  1717. dimux->items[dimux->num_items].index = 0;
  1718. dimux->num_items++;
  1719. for (i = 0; i < spec->num_dmics; i++) {
  1720. int index;
  1721. int num_cons;
  1722. unsigned int def_conf;
  1723. def_conf = snd_hda_codec_read(codec,
  1724. spec->dmic_nids[i],
  1725. 0,
  1726. AC_VERB_GET_CONFIG_DEFAULT,
  1727. 0);
  1728. if (get_defcfg_connect(def_conf) == AC_JACK_PORT_NONE)
  1729. continue;
  1730. num_cons = snd_hda_get_connections(codec,
  1731. spec->dmux_nid,
  1732. con_lst,
  1733. HDA_MAX_NUM_INPUTS);
  1734. for (j = 0; j < num_cons; j++)
  1735. if (con_lst[j] == spec->dmic_nids[i]) {
  1736. index = j;
  1737. goto found;
  1738. }
  1739. continue;
  1740. found:
  1741. dimux->items[dimux->num_items].label =
  1742. stac92xx_dmic_labels[dimux->num_items];
  1743. dimux->items[dimux->num_items].index = index;
  1744. dimux->num_items++;
  1745. }
  1746. return 0;
  1747. }
  1748. /* create playback/capture controls for input pins */
  1749. static int stac92xx_auto_create_analog_input_ctls(struct hda_codec *codec, const struct auto_pin_cfg *cfg)
  1750. {
  1751. struct sigmatel_spec *spec = codec->spec;
  1752. struct hda_input_mux *imux = &spec->private_imux;
  1753. hda_nid_t con_lst[HDA_MAX_NUM_INPUTS];
  1754. int i, j, k;
  1755. for (i = 0; i < AUTO_PIN_LAST; i++) {
  1756. int index;
  1757. if (!cfg->input_pins[i])
  1758. continue;
  1759. index = -1;
  1760. for (j = 0; j < spec->num_muxes; j++) {
  1761. int num_cons;
  1762. num_cons = snd_hda_get_connections(codec,
  1763. spec->mux_nids[j],
  1764. con_lst,
  1765. HDA_MAX_NUM_INPUTS);
  1766. for (k = 0; k < num_cons; k++)
  1767. if (con_lst[k] == cfg->input_pins[i]) {
  1768. index = k;
  1769. goto found;
  1770. }
  1771. }
  1772. continue;
  1773. found:
  1774. imux->items[imux->num_items].label = auto_pin_cfg_labels[i];
  1775. imux->items[imux->num_items].index = index;
  1776. imux->num_items++;
  1777. }
  1778. if (imux->num_items) {
  1779. /*
  1780. * Set the current input for the muxes.
  1781. * The STAC9221 has two input muxes with identical source
  1782. * NID lists. Hopefully this won't get confused.
  1783. */
  1784. for (i = 0; i < spec->num_muxes; i++) {
  1785. snd_hda_codec_write_cache(codec, spec->mux_nids[i], 0,
  1786. AC_VERB_SET_CONNECT_SEL,
  1787. imux->items[0].index);
  1788. }
  1789. }
  1790. return 0;
  1791. }
  1792. static void stac92xx_auto_init_multi_out(struct hda_codec *codec)
  1793. {
  1794. struct sigmatel_spec *spec = codec->spec;
  1795. int i;
  1796. for (i = 0; i < spec->autocfg.line_outs; i++) {
  1797. hda_nid_t nid = spec->autocfg.line_out_pins[i];
  1798. stac92xx_auto_set_pinctl(codec, nid, AC_PINCTL_OUT_EN);
  1799. }
  1800. }
  1801. static void stac92xx_auto_init_hp_out(struct hda_codec *codec)
  1802. {
  1803. struct sigmatel_spec *spec = codec->spec;
  1804. int i;
  1805. for (i = 0; i < spec->autocfg.hp_outs; i++) {
  1806. hda_nid_t pin;
  1807. pin = spec->autocfg.hp_pins[i];
  1808. if (pin) /* connect to front */
  1809. stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN | AC_PINCTL_HP_EN);
  1810. }
  1811. for (i = 0; i < spec->autocfg.speaker_outs; i++) {
  1812. hda_nid_t pin;
  1813. pin = spec->autocfg.speaker_pins[i];
  1814. if (pin) /* connect to front */
  1815. stac92xx_auto_set_pinctl(codec, pin, AC_PINCTL_OUT_EN);
  1816. }
  1817. }
  1818. static int stac92xx_parse_auto_config(struct hda_codec *codec, hda_nid_t dig_out, hda_nid_t dig_in)
  1819. {
  1820. struct sigmatel_spec *spec = codec->spec;
  1821. int err;
  1822. if ((err = snd_hda_parse_pin_def_config(codec,
  1823. &spec->autocfg,
  1824. spec->dmic_nids)) < 0)
  1825. return err;
  1826. if (! spec->autocfg.line_outs)
  1827. return 0; /* can't find valid pin config */
  1828. if ((err = stac92xx_add_dyn_out_pins(codec, &spec->autocfg)) < 0)
  1829. return err;
  1830. if (spec->multiout.num_dacs == 0)
  1831. if ((err = stac92xx_auto_fill_dac_nids(codec, &spec->autocfg)) < 0)
  1832. return err;
  1833. err = stac92xx_auto_create_multi_out_ctls(codec, &spec->autocfg);
  1834. if (err < 0)
  1835. return err;
  1836. err = stac92xx_auto_create_hp_ctls(codec, &spec->autocfg);
  1837. if (err < 0)
  1838. return err;
  1839. err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg);
  1840. if (err < 0)
  1841. return err;
  1842. if (spec->num_dmics > 0)
  1843. if ((err = stac92xx_auto_create_dmic_input_ctls(codec,
  1844. &spec->autocfg)) < 0)
  1845. return err;
  1846. spec->multiout.max_channels = spec->multiout.num_dacs * 2;
  1847. if (spec->multiout.max_channels > 2)
  1848. spec->surr_switch = 1;
  1849. if (spec->autocfg.dig_out_pin)
  1850. spec->multiout.dig_out_nid = dig_out;
  1851. if (spec->autocfg.dig_in_pin)
  1852. spec->dig_in_nid = dig_in;
  1853. if (spec->kctl_alloc)
  1854. spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
  1855. spec->input_mux = &spec->private_imux;
  1856. spec->dinput_mux = &spec->private_dimux;
  1857. return 1;
  1858. }
  1859. /* add playback controls for HP output */
  1860. static int stac9200_auto_create_hp_ctls(struct hda_codec *codec,
  1861. struct auto_pin_cfg *cfg)
  1862. {
  1863. struct sigmatel_spec *spec = codec->spec;
  1864. hda_nid_t pin = cfg->hp_pins[0];
  1865. unsigned int wid_caps;
  1866. if (! pin)
  1867. return 0;
  1868. wid_caps = get_wcaps(codec, pin);
  1869. if (wid_caps & AC_WCAP_UNSOL_CAP)
  1870. spec->hp_detect = 1;
  1871. return 0;
  1872. }
  1873. /* add playback controls for LFE output */
  1874. static int stac9200_auto_create_lfe_ctls(struct hda_codec *codec,
  1875. struct auto_pin_cfg *cfg)
  1876. {
  1877. struct sigmatel_spec *spec = codec->spec;
  1878. int err;
  1879. hda_nid_t lfe_pin = 0x0;
  1880. int i;
  1881. /*
  1882. * search speaker outs and line outs for a mono speaker pin
  1883. * with an amp. If one is found, add LFE controls
  1884. * for it.
  1885. */
  1886. for (i = 0; i < spec->autocfg.speaker_outs && lfe_pin == 0x0; i++) {
  1887. hda_nid_t pin = spec->autocfg.speaker_pins[i];
  1888. unsigned long wcaps = get_wcaps(codec, pin);
  1889. wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
  1890. if (wcaps == AC_WCAP_OUT_AMP)
  1891. /* found a mono speaker with an amp, must be lfe */
  1892. lfe_pin = pin;
  1893. }
  1894. /* if speaker_outs is 0, then speakers may be in line_outs */
  1895. if (lfe_pin == 0 && spec->autocfg.speaker_outs == 0) {
  1896. for (i = 0; i < spec->autocfg.line_outs && lfe_pin == 0x0; i++) {
  1897. hda_nid_t pin = spec->autocfg.line_out_pins[i];
  1898. unsigned long cfg;
  1899. cfg = snd_hda_codec_read(codec, pin, 0,
  1900. AC_VERB_GET_CONFIG_DEFAULT,
  1901. 0x00);
  1902. if (get_defcfg_device(cfg) == AC_JACK_SPEAKER) {
  1903. unsigned long wcaps = get_wcaps(codec, pin);
  1904. wcaps &= (AC_WCAP_STEREO | AC_WCAP_OUT_AMP);
  1905. if (wcaps == AC_WCAP_OUT_AMP)
  1906. /* found a mono speaker with an amp,
  1907. must be lfe */
  1908. lfe_pin = pin;
  1909. }
  1910. }
  1911. }
  1912. if (lfe_pin) {
  1913. err = create_controls(spec, "LFE", lfe_pin, 1);
  1914. if (err < 0)
  1915. return err;
  1916. }
  1917. return 0;
  1918. }
  1919. static int stac9200_parse_auto_config(struct hda_codec *codec)
  1920. {
  1921. struct sigmatel_spec *spec = codec->spec;
  1922. int err;
  1923. if ((err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL)) < 0)
  1924. return err;
  1925. if ((err = stac92xx_auto_create_analog_input_ctls(codec, &spec->autocfg)) < 0)
  1926. return err;
  1927. if ((err = stac9200_auto_create_hp_ctls(codec, &spec->autocfg)) < 0)
  1928. return err;
  1929. if ((err = stac9200_auto_create_lfe_ctls(codec, &spec->autocfg)) < 0)
  1930. return err;
  1931. if (spec->autocfg.dig_out_pin)
  1932. spec->multiout.dig_out_nid = 0x05;
  1933. if (spec->autocfg.dig_in_pin)
  1934. spec->dig_in_nid = 0x04;
  1935. if (spec->kctl_alloc)
  1936. spec->mixers[spec->num_mixers++] = spec->kctl_alloc;
  1937. spec->input_mux = &spec->private_imux;
  1938. spec->dinput_mux = &spec->private_dimux;
  1939. return 1;
  1940. }
  1941. /*
  1942. * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
  1943. * funky external mute control using GPIO pins.
  1944. */
  1945. static void stac922x_gpio_mute(struct hda_codec *codec, int pin, int muted)
  1946. {
  1947. unsigned int gpiostate, gpiomask, gpiodir;
  1948. gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
  1949. AC_VERB_GET_GPIO_DATA, 0);
  1950. if (!muted)
  1951. gpiostate |= (1 << pin);
  1952. else
  1953. gpiostate &= ~(1 << pin);
  1954. gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
  1955. AC_VERB_GET_GPIO_MASK, 0);
  1956. gpiomask |= (1 << pin);
  1957. gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
  1958. AC_VERB_GET_GPIO_DIRECTION, 0);
  1959. gpiodir |= (1 << pin);
  1960. /* AppleHDA seems to do this -- WTF is this verb?? */
  1961. snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
  1962. snd_hda_codec_write(codec, codec->afg, 0,
  1963. AC_VERB_SET_GPIO_MASK, gpiomask);
  1964. snd_hda_codec_write(codec, codec->afg, 0,
  1965. AC_VERB_SET_GPIO_DIRECTION, gpiodir);
  1966. msleep(1);
  1967. snd_hda_codec_write(codec, codec->afg, 0,
  1968. AC_VERB_SET_GPIO_DATA, gpiostate);
  1969. }
  1970. static void enable_pin_detect(struct hda_codec *codec, hda_nid_t nid,
  1971. unsigned int event)
  1972. {
  1973. if (get_wcaps(codec, nid) & AC_WCAP_UNSOL_CAP)
  1974. snd_hda_codec_write_cache(codec, nid, 0,
  1975. AC_VERB_SET_UNSOLICITED_ENABLE,
  1976. (AC_USRSP_EN | event));
  1977. }
  1978. static int stac92xx_init(struct hda_codec *codec)
  1979. {
  1980. struct sigmatel_spec *spec = codec->spec;
  1981. struct auto_pin_cfg *cfg = &spec->autocfg;
  1982. int i;
  1983. snd_hda_sequence_write(codec, spec->init);
  1984. /* set up pins */
  1985. if (spec->hp_detect) {
  1986. /* Enable unsolicited responses on the HP widget */
  1987. for (i = 0; i < cfg->hp_outs; i++)
  1988. enable_pin_detect(codec, cfg->hp_pins[i],
  1989. STAC_HP_EVENT);
  1990. /* force to enable the first line-out; the others are set up
  1991. * in unsol_event
  1992. */
  1993. stac92xx_auto_set_pinctl(codec, spec->autocfg.line_out_pins[0],
  1994. AC_PINCTL_OUT_EN);
  1995. stac92xx_auto_init_hp_out(codec);
  1996. /* fake event to set up pins */
  1997. codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
  1998. } else {
  1999. stac92xx_auto_init_multi_out(codec);
  2000. stac92xx_auto_init_hp_out(codec);
  2001. }
  2002. for (i = 0; i < AUTO_PIN_LAST; i++) {
  2003. hda_nid_t nid = cfg->input_pins[i];
  2004. if (nid) {
  2005. unsigned int pinctl = AC_PINCTL_IN_EN;
  2006. if (i == AUTO_PIN_MIC || i == AUTO_PIN_FRONT_MIC)
  2007. pinctl |= stac92xx_get_vref(codec, nid);
  2008. stac92xx_auto_set_pinctl(codec, nid, pinctl);
  2009. }
  2010. }
  2011. if (spec->num_dmics > 0)
  2012. for (i = 0; i < spec->num_dmics; i++)
  2013. stac92xx_auto_set_pinctl(codec, spec->dmic_nids[i],
  2014. AC_PINCTL_IN_EN);
  2015. if (cfg->dig_out_pin)
  2016. stac92xx_auto_set_pinctl(codec, cfg->dig_out_pin,
  2017. AC_PINCTL_OUT_EN);
  2018. if (cfg->dig_in_pin)
  2019. stac92xx_auto_set_pinctl(codec, cfg->dig_in_pin,
  2020. AC_PINCTL_IN_EN);
  2021. if (spec->gpio_mute) {
  2022. stac922x_gpio_mute(codec, 0, 0);
  2023. stac922x_gpio_mute(codec, 1, 0);
  2024. }
  2025. return 0;
  2026. }
  2027. static void stac92xx_free(struct hda_codec *codec)
  2028. {
  2029. struct sigmatel_spec *spec = codec->spec;
  2030. int i;
  2031. if (! spec)
  2032. return;
  2033. if (spec->kctl_alloc) {
  2034. for (i = 0; i < spec->num_kctl_used; i++)
  2035. kfree(spec->kctl_alloc[i].name);
  2036. kfree(spec->kctl_alloc);
  2037. }
  2038. if (spec->bios_pin_configs)
  2039. kfree(spec->bios_pin_configs);
  2040. kfree(spec);
  2041. }
  2042. static void stac92xx_set_pinctl(struct hda_codec *codec, hda_nid_t nid,
  2043. unsigned int flag)
  2044. {
  2045. unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
  2046. 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
  2047. if (pin_ctl & AC_PINCTL_IN_EN) {
  2048. /*
  2049. * we need to check the current set-up direction of
  2050. * shared input pins since they can be switched via
  2051. * "xxx as Output" mixer switch
  2052. */
  2053. struct sigmatel_spec *spec = codec->spec;
  2054. struct auto_pin_cfg *cfg = &spec->autocfg;
  2055. if ((nid == cfg->input_pins[AUTO_PIN_LINE] &&
  2056. spec->line_switch) ||
  2057. (nid == cfg->input_pins[AUTO_PIN_MIC] &&
  2058. spec->mic_switch))
  2059. return;
  2060. }
  2061. /* if setting pin direction bits, clear the current
  2062. direction bits first */
  2063. if (flag & (AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN))
  2064. pin_ctl &= ~(AC_PINCTL_IN_EN | AC_PINCTL_OUT_EN);
  2065. snd_hda_codec_write_cache(codec, nid, 0,
  2066. AC_VERB_SET_PIN_WIDGET_CONTROL,
  2067. pin_ctl | flag);
  2068. }
  2069. static void stac92xx_reset_pinctl(struct hda_codec *codec, hda_nid_t nid,
  2070. unsigned int flag)
  2071. {
  2072. unsigned int pin_ctl = snd_hda_codec_read(codec, nid,
  2073. 0, AC_VERB_GET_PIN_WIDGET_CONTROL, 0x00);
  2074. snd_hda_codec_write_cache(codec, nid, 0,
  2075. AC_VERB_SET_PIN_WIDGET_CONTROL,
  2076. pin_ctl & ~flag);
  2077. }
  2078. static int get_pin_presence(struct hda_codec *codec, hda_nid_t nid)
  2079. {
  2080. if (!nid)
  2081. return 0;
  2082. if (snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PIN_SENSE, 0x00)
  2083. & (1 << 31))
  2084. return 1;
  2085. return 0;
  2086. }
  2087. static void stac92xx_hp_detect(struct hda_codec *codec, unsigned int res)
  2088. {
  2089. struct sigmatel_spec *spec = codec->spec;
  2090. struct auto_pin_cfg *cfg = &spec->autocfg;
  2091. int i, presence;
  2092. presence = 0;
  2093. for (i = 0; i < cfg->hp_outs; i++) {
  2094. presence = get_pin_presence(codec, cfg->hp_pins[i]);
  2095. if (presence)
  2096. break;
  2097. }
  2098. if (presence) {
  2099. /* disable lineouts, enable hp */
  2100. for (i = 0; i < cfg->line_outs; i++)
  2101. stac92xx_reset_pinctl(codec, cfg->line_out_pins[i],
  2102. AC_PINCTL_OUT_EN);
  2103. for (i = 0; i < cfg->speaker_outs; i++)
  2104. stac92xx_reset_pinctl(codec, cfg->speaker_pins[i],
  2105. AC_PINCTL_OUT_EN);
  2106. } else {
  2107. /* enable lineouts, disable hp */
  2108. for (i = 0; i < cfg->line_outs; i++)
  2109. stac92xx_set_pinctl(codec, cfg->line_out_pins[i],
  2110. AC_PINCTL_OUT_EN);
  2111. for (i = 0; i < cfg->speaker_outs; i++)
  2112. stac92xx_set_pinctl(codec, cfg->speaker_pins[i],
  2113. AC_PINCTL_OUT_EN);
  2114. }
  2115. }
  2116. static void stac92xx_unsol_event(struct hda_codec *codec, unsigned int res)
  2117. {
  2118. switch (res >> 26) {
  2119. case STAC_HP_EVENT:
  2120. stac92xx_hp_detect(codec, res);
  2121. break;
  2122. }
  2123. }
  2124. #ifdef SND_HDA_NEEDS_RESUME
  2125. static int stac92xx_resume(struct hda_codec *codec)
  2126. {
  2127. struct sigmatel_spec *spec = codec->spec;
  2128. stac92xx_set_config_regs(codec);
  2129. snd_hda_sequence_write(codec, spec->init);
  2130. if (spec->gpio_mute) {
  2131. stac922x_gpio_mute(codec, 0, 0);
  2132. stac922x_gpio_mute(codec, 1, 0);
  2133. }
  2134. snd_hda_codec_resume_amp(codec);
  2135. snd_hda_codec_resume_cache(codec);
  2136. /* invoke unsolicited event to reset the HP state */
  2137. if (spec->hp_detect)
  2138. codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
  2139. return 0;
  2140. }
  2141. #endif
  2142. static struct hda_codec_ops stac92xx_patch_ops = {
  2143. .build_controls = stac92xx_build_controls,
  2144. .build_pcms = stac92xx_build_pcms,
  2145. .init = stac92xx_init,
  2146. .free = stac92xx_free,
  2147. .unsol_event = stac92xx_unsol_event,
  2148. #ifdef SND_HDA_NEEDS_RESUME
  2149. .resume = stac92xx_resume,
  2150. #endif
  2151. };
  2152. static int patch_stac9200(struct hda_codec *codec)
  2153. {
  2154. struct sigmatel_spec *spec;
  2155. int err;
  2156. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2157. if (spec == NULL)
  2158. return -ENOMEM;
  2159. codec->spec = spec;
  2160. spec->num_pins = ARRAY_SIZE(stac9200_pin_nids);
  2161. spec->pin_nids = stac9200_pin_nids;
  2162. spec->board_config = snd_hda_check_board_config(codec, STAC_9200_MODELS,
  2163. stac9200_models,
  2164. stac9200_cfg_tbl);
  2165. if (spec->board_config < 0) {
  2166. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9200, using BIOS defaults\n");
  2167. err = stac92xx_save_bios_config_regs(codec);
  2168. if (err < 0) {
  2169. stac92xx_free(codec);
  2170. return err;
  2171. }
  2172. spec->pin_configs = spec->bios_pin_configs;
  2173. } else {
  2174. spec->pin_configs = stac9200_brd_tbl[spec->board_config];
  2175. stac92xx_set_config_regs(codec);
  2176. }
  2177. spec->multiout.max_channels = 2;
  2178. spec->multiout.num_dacs = 1;
  2179. spec->multiout.dac_nids = stac9200_dac_nids;
  2180. spec->adc_nids = stac9200_adc_nids;
  2181. spec->mux_nids = stac9200_mux_nids;
  2182. spec->num_muxes = 1;
  2183. spec->num_dmics = 0;
  2184. spec->num_adcs = 1;
  2185. if (spec->board_config == STAC_9200_GATEWAY)
  2186. spec->init = stac9200_eapd_init;
  2187. else
  2188. spec->init = stac9200_core_init;
  2189. spec->mixer = stac9200_mixer;
  2190. err = stac9200_parse_auto_config(codec);
  2191. if (err < 0) {
  2192. stac92xx_free(codec);
  2193. return err;
  2194. }
  2195. codec->patch_ops = stac92xx_patch_ops;
  2196. return 0;
  2197. }
  2198. static int patch_stac925x(struct hda_codec *codec)
  2199. {
  2200. struct sigmatel_spec *spec;
  2201. int err;
  2202. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2203. if (spec == NULL)
  2204. return -ENOMEM;
  2205. codec->spec = spec;
  2206. spec->num_pins = ARRAY_SIZE(stac925x_pin_nids);
  2207. spec->pin_nids = stac925x_pin_nids;
  2208. spec->board_config = snd_hda_check_board_config(codec, STAC_925x_MODELS,
  2209. stac925x_models,
  2210. stac925x_cfg_tbl);
  2211. again:
  2212. if (spec->board_config < 0) {
  2213. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC925x,"
  2214. "using BIOS defaults\n");
  2215. err = stac92xx_save_bios_config_regs(codec);
  2216. if (err < 0) {
  2217. stac92xx_free(codec);
  2218. return err;
  2219. }
  2220. spec->pin_configs = spec->bios_pin_configs;
  2221. } else if (stac925x_brd_tbl[spec->board_config] != NULL){
  2222. spec->pin_configs = stac925x_brd_tbl[spec->board_config];
  2223. stac92xx_set_config_regs(codec);
  2224. }
  2225. spec->multiout.max_channels = 2;
  2226. spec->multiout.num_dacs = 1;
  2227. spec->multiout.dac_nids = stac925x_dac_nids;
  2228. spec->adc_nids = stac925x_adc_nids;
  2229. spec->mux_nids = stac925x_mux_nids;
  2230. spec->num_muxes = 1;
  2231. spec->num_adcs = 1;
  2232. switch (codec->vendor_id) {
  2233. case 0x83847632: /* STAC9202 */
  2234. case 0x83847633: /* STAC9202D */
  2235. case 0x83847636: /* STAC9251 */
  2236. case 0x83847637: /* STAC9251D */
  2237. spec->num_dmics = 1;
  2238. spec->dmic_nids = stac925x_dmic_nids;
  2239. break;
  2240. default:
  2241. spec->num_dmics = 0;
  2242. break;
  2243. }
  2244. spec->init = stac925x_core_init;
  2245. spec->mixer = stac925x_mixer;
  2246. err = stac92xx_parse_auto_config(codec, 0x8, 0x7);
  2247. if (!err) {
  2248. if (spec->board_config < 0) {
  2249. printk(KERN_WARNING "hda_codec: No auto-config is "
  2250. "available, default to model=ref\n");
  2251. spec->board_config = STAC_925x_REF;
  2252. goto again;
  2253. }
  2254. err = -EINVAL;
  2255. }
  2256. if (err < 0) {
  2257. stac92xx_free(codec);
  2258. return err;
  2259. }
  2260. codec->patch_ops = stac92xx_patch_ops;
  2261. return 0;
  2262. }
  2263. static int patch_stac922x(struct hda_codec *codec)
  2264. {
  2265. struct sigmatel_spec *spec;
  2266. int err;
  2267. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2268. if (spec == NULL)
  2269. return -ENOMEM;
  2270. codec->spec = spec;
  2271. spec->num_pins = ARRAY_SIZE(stac922x_pin_nids);
  2272. spec->pin_nids = stac922x_pin_nids;
  2273. spec->board_config = snd_hda_check_board_config(codec, STAC_922X_MODELS,
  2274. stac922x_models,
  2275. stac922x_cfg_tbl);
  2276. if (spec->board_config == STAC_INTEL_MAC_V3) {
  2277. spec->gpio_mute = 1;
  2278. /* Intel Macs have all same PCI SSID, so we need to check
  2279. * codec SSID to distinguish the exact models
  2280. */
  2281. printk(KERN_INFO "hda_codec: STAC922x, Apple subsys_id=%x\n", codec->subsystem_id);
  2282. switch (codec->subsystem_id) {
  2283. case 0x106b0800:
  2284. spec->board_config = STAC_INTEL_MAC_V1;
  2285. break;
  2286. case 0x106b0600:
  2287. case 0x106b0700:
  2288. spec->board_config = STAC_INTEL_MAC_V2;
  2289. break;
  2290. case 0x106b0e00:
  2291. case 0x106b0f00:
  2292. case 0x106b1600:
  2293. case 0x106b1700:
  2294. case 0x106b0200:
  2295. case 0x106b1e00:
  2296. spec->board_config = STAC_INTEL_MAC_V3;
  2297. break;
  2298. case 0x106b1a00:
  2299. case 0x00000100:
  2300. spec->board_config = STAC_INTEL_MAC_V4;
  2301. break;
  2302. case 0x106b0a00:
  2303. case 0x106b2200:
  2304. spec->board_config = STAC_INTEL_MAC_V5;
  2305. break;
  2306. }
  2307. }
  2308. again:
  2309. if (spec->board_config < 0) {
  2310. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC922x, "
  2311. "using BIOS defaults\n");
  2312. err = stac92xx_save_bios_config_regs(codec);
  2313. if (err < 0) {
  2314. stac92xx_free(codec);
  2315. return err;
  2316. }
  2317. spec->pin_configs = spec->bios_pin_configs;
  2318. } else if (stac922x_brd_tbl[spec->board_config] != NULL) {
  2319. spec->pin_configs = stac922x_brd_tbl[spec->board_config];
  2320. stac92xx_set_config_regs(codec);
  2321. }
  2322. spec->adc_nids = stac922x_adc_nids;
  2323. spec->mux_nids = stac922x_mux_nids;
  2324. spec->num_muxes = ARRAY_SIZE(stac922x_mux_nids);
  2325. spec->num_adcs = ARRAY_SIZE(stac922x_adc_nids);
  2326. spec->num_dmics = 0;
  2327. spec->init = stac922x_core_init;
  2328. spec->mixer = stac922x_mixer;
  2329. spec->multiout.dac_nids = spec->dac_nids;
  2330. err = stac92xx_parse_auto_config(codec, 0x08, 0x09);
  2331. if (!err) {
  2332. if (spec->board_config < 0) {
  2333. printk(KERN_WARNING "hda_codec: No auto-config is "
  2334. "available, default to model=ref\n");
  2335. spec->board_config = STAC_D945_REF;
  2336. goto again;
  2337. }
  2338. err = -EINVAL;
  2339. }
  2340. if (err < 0) {
  2341. stac92xx_free(codec);
  2342. return err;
  2343. }
  2344. codec->patch_ops = stac92xx_patch_ops;
  2345. /* Fix Mux capture level; max to 2 */
  2346. snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
  2347. (0 << AC_AMPCAP_OFFSET_SHIFT) |
  2348. (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
  2349. (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
  2350. (0 << AC_AMPCAP_MUTE_SHIFT));
  2351. return 0;
  2352. }
  2353. static int patch_stac927x(struct hda_codec *codec)
  2354. {
  2355. struct sigmatel_spec *spec;
  2356. int err;
  2357. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2358. if (spec == NULL)
  2359. return -ENOMEM;
  2360. codec->spec = spec;
  2361. spec->num_pins = ARRAY_SIZE(stac927x_pin_nids);
  2362. spec->pin_nids = stac927x_pin_nids;
  2363. spec->board_config = snd_hda_check_board_config(codec, STAC_927X_MODELS,
  2364. stac927x_models,
  2365. stac927x_cfg_tbl);
  2366. again:
  2367. if (spec->board_config < 0) {
  2368. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC927x, using BIOS defaults\n");
  2369. err = stac92xx_save_bios_config_regs(codec);
  2370. if (err < 0) {
  2371. stac92xx_free(codec);
  2372. return err;
  2373. }
  2374. spec->pin_configs = spec->bios_pin_configs;
  2375. } else if (stac927x_brd_tbl[spec->board_config] != NULL) {
  2376. spec->pin_configs = stac927x_brd_tbl[spec->board_config];
  2377. stac92xx_set_config_regs(codec);
  2378. }
  2379. switch (spec->board_config) {
  2380. case STAC_D965_3ST:
  2381. spec->adc_nids = stac927x_adc_nids;
  2382. spec->mux_nids = stac927x_mux_nids;
  2383. spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
  2384. spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
  2385. spec->num_dmics = 0;
  2386. spec->init = d965_core_init;
  2387. spec->mixer = stac927x_mixer;
  2388. break;
  2389. case STAC_D965_5ST:
  2390. spec->adc_nids = stac927x_adc_nids;
  2391. spec->mux_nids = stac927x_mux_nids;
  2392. spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
  2393. spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
  2394. spec->num_dmics = 0;
  2395. spec->init = d965_core_init;
  2396. spec->mixer = stac927x_mixer;
  2397. break;
  2398. default:
  2399. spec->adc_nids = stac927x_adc_nids;
  2400. spec->mux_nids = stac927x_mux_nids;
  2401. spec->num_muxes = ARRAY_SIZE(stac927x_mux_nids);
  2402. spec->num_adcs = ARRAY_SIZE(stac927x_adc_nids);
  2403. spec->num_dmics = 0;
  2404. spec->init = stac927x_core_init;
  2405. spec->mixer = stac927x_mixer;
  2406. }
  2407. spec->multiout.dac_nids = spec->dac_nids;
  2408. /* GPIO0 High = Enable EAPD */
  2409. spec->gpio_mask = spec->gpio_data = 0x00000001;
  2410. stac92xx_enable_gpio_mask(codec);
  2411. err = stac92xx_parse_auto_config(codec, 0x1e, 0x20);
  2412. if (!err) {
  2413. if (spec->board_config < 0) {
  2414. printk(KERN_WARNING "hda_codec: No auto-config is "
  2415. "available, default to model=ref\n");
  2416. spec->board_config = STAC_D965_REF;
  2417. goto again;
  2418. }
  2419. err = -EINVAL;
  2420. }
  2421. if (err < 0) {
  2422. stac92xx_free(codec);
  2423. return err;
  2424. }
  2425. codec->patch_ops = stac92xx_patch_ops;
  2426. return 0;
  2427. }
  2428. static int patch_stac9205(struct hda_codec *codec)
  2429. {
  2430. struct sigmatel_spec *spec;
  2431. int err;
  2432. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2433. if (spec == NULL)
  2434. return -ENOMEM;
  2435. codec->spec = spec;
  2436. spec->num_pins = ARRAY_SIZE(stac9205_pin_nids);
  2437. spec->pin_nids = stac9205_pin_nids;
  2438. spec->board_config = snd_hda_check_board_config(codec, STAC_9205_MODELS,
  2439. stac9205_models,
  2440. stac9205_cfg_tbl);
  2441. again:
  2442. if (spec->board_config < 0) {
  2443. snd_printdd(KERN_INFO "hda_codec: Unknown model for STAC9205, using BIOS defaults\n");
  2444. err = stac92xx_save_bios_config_regs(codec);
  2445. if (err < 0) {
  2446. stac92xx_free(codec);
  2447. return err;
  2448. }
  2449. spec->pin_configs = spec->bios_pin_configs;
  2450. } else {
  2451. spec->pin_configs = stac9205_brd_tbl[spec->board_config];
  2452. stac92xx_set_config_regs(codec);
  2453. }
  2454. spec->adc_nids = stac9205_adc_nids;
  2455. spec->num_adcs = ARRAY_SIZE(stac9205_adc_nids);
  2456. spec->mux_nids = stac9205_mux_nids;
  2457. spec->num_muxes = ARRAY_SIZE(stac9205_mux_nids);
  2458. spec->dmic_nids = stac9205_dmic_nids;
  2459. spec->num_dmics = ARRAY_SIZE(stac9205_dmic_nids);
  2460. spec->dmux_nid = 0x1d;
  2461. spec->init = stac9205_core_init;
  2462. spec->mixer = stac9205_mixer;
  2463. spec->multiout.dac_nids = spec->dac_nids;
  2464. switch (spec->board_config){
  2465. case STAC_9205_DELL_M43:
  2466. /* Enable SPDIF in/out */
  2467. stac92xx_set_config_reg(codec, 0x1f, 0x01441030);
  2468. stac92xx_set_config_reg(codec, 0x20, 0x1c410030);
  2469. spec->gpio_mask = 0x00000007; /* GPIO0-2 */
  2470. /* GPIO0 High = EAPD, GPIO1 Low = DRM,
  2471. * GPIO2 High = Headphone Mute
  2472. */
  2473. spec->gpio_data = 0x00000005;
  2474. break;
  2475. default:
  2476. /* GPIO0 High = EAPD */
  2477. spec->gpio_mask = spec->gpio_data = 0x00000001;
  2478. break;
  2479. }
  2480. stac92xx_enable_gpio_mask(codec);
  2481. err = stac92xx_parse_auto_config(codec, 0x1f, 0x20);
  2482. if (!err) {
  2483. if (spec->board_config < 0) {
  2484. printk(KERN_WARNING "hda_codec: No auto-config is "
  2485. "available, default to model=ref\n");
  2486. spec->board_config = STAC_9205_REF;
  2487. goto again;
  2488. }
  2489. err = -EINVAL;
  2490. }
  2491. if (err < 0) {
  2492. stac92xx_free(codec);
  2493. return err;
  2494. }
  2495. codec->patch_ops = stac92xx_patch_ops;
  2496. return 0;
  2497. }
  2498. /*
  2499. * STAC9872 hack
  2500. */
  2501. /* static config for Sony VAIO FE550G and Sony VAIO AR */
  2502. static hda_nid_t vaio_dacs[] = { 0x2 };
  2503. #define VAIO_HP_DAC 0x5
  2504. static hda_nid_t vaio_adcs[] = { 0x8 /*,0x6*/ };
  2505. static hda_nid_t vaio_mux_nids[] = { 0x15 };
  2506. static struct hda_input_mux vaio_mux = {
  2507. .num_items = 3,
  2508. .items = {
  2509. /* { "HP", 0x0 }, */
  2510. { "Mic Jack", 0x1 },
  2511. { "Internal Mic", 0x2 },
  2512. { "PCM", 0x3 },
  2513. }
  2514. };
  2515. static struct hda_verb vaio_init[] = {
  2516. {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
  2517. {0x0a, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | STAC_HP_EVENT},
  2518. {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
  2519. {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
  2520. {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
  2521. {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
  2522. {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
  2523. {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
  2524. {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
  2525. {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
  2526. {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
  2527. {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
  2528. {}
  2529. };
  2530. static struct hda_verb vaio_ar_init[] = {
  2531. {0x0a, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP }, /* HP <- 0x2 */
  2532. {0x0f, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT }, /* Speaker <- 0x5 */
  2533. {0x0d, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? (<- 0x2) */
  2534. {0x0e, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_IN }, /* CD */
  2535. /* {0x11, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT },*/ /* Optical Out */
  2536. {0x14, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_VREF80 }, /* Mic? */
  2537. {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
  2538. {0x02, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* HP */
  2539. {0x05, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE}, /* Speaker */
  2540. /* {0x10, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE},*/ /* Optical Out */
  2541. {0x09, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_MUTE(0)}, /* capture sw/vol -> 0x8 */
  2542. {0x07, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)}, /* CD-in -> 0x6 */
  2543. {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
  2544. {}
  2545. };
  2546. /* bind volumes of both NID 0x02 and 0x05 */
  2547. static struct hda_bind_ctls vaio_bind_master_vol = {
  2548. .ops = &snd_hda_bind_vol,
  2549. .values = {
  2550. HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
  2551. HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
  2552. 0
  2553. },
  2554. };
  2555. /* bind volumes of both NID 0x02 and 0x05 */
  2556. static struct hda_bind_ctls vaio_bind_master_sw = {
  2557. .ops = &snd_hda_bind_sw,
  2558. .values = {
  2559. HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT),
  2560. HDA_COMPOSE_AMP_VAL(0x05, 3, 0, HDA_OUTPUT),
  2561. 0,
  2562. },
  2563. };
  2564. static struct snd_kcontrol_new vaio_mixer[] = {
  2565. HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
  2566. HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
  2567. /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
  2568. HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
  2569. HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
  2570. {
  2571. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2572. .name = "Capture Source",
  2573. .count = 1,
  2574. .info = stac92xx_mux_enum_info,
  2575. .get = stac92xx_mux_enum_get,
  2576. .put = stac92xx_mux_enum_put,
  2577. },
  2578. {}
  2579. };
  2580. static struct snd_kcontrol_new vaio_ar_mixer[] = {
  2581. HDA_BIND_VOL("Master Playback Volume", &vaio_bind_master_vol),
  2582. HDA_BIND_SW("Master Playback Switch", &vaio_bind_master_sw),
  2583. /* HDA_CODEC_VOLUME("CD Capture Volume", 0x07, 0, HDA_INPUT), */
  2584. HDA_CODEC_VOLUME("Capture Volume", 0x09, 0, HDA_INPUT),
  2585. HDA_CODEC_MUTE("Capture Switch", 0x09, 0, HDA_INPUT),
  2586. /*HDA_CODEC_MUTE("Optical Out Switch", 0x10, 0, HDA_OUTPUT),
  2587. HDA_CODEC_VOLUME("Optical Out Volume", 0x10, 0, HDA_OUTPUT),*/
  2588. {
  2589. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2590. .name = "Capture Source",
  2591. .count = 1,
  2592. .info = stac92xx_mux_enum_info,
  2593. .get = stac92xx_mux_enum_get,
  2594. .put = stac92xx_mux_enum_put,
  2595. },
  2596. {}
  2597. };
  2598. static struct hda_codec_ops stac9872_patch_ops = {
  2599. .build_controls = stac92xx_build_controls,
  2600. .build_pcms = stac92xx_build_pcms,
  2601. .init = stac92xx_init,
  2602. .free = stac92xx_free,
  2603. #ifdef SND_HDA_NEEDS_RESUME
  2604. .resume = stac92xx_resume,
  2605. #endif
  2606. };
  2607. static int stac9872_vaio_init(struct hda_codec *codec)
  2608. {
  2609. int err;
  2610. err = stac92xx_init(codec);
  2611. if (err < 0)
  2612. return err;
  2613. if (codec->patch_ops.unsol_event)
  2614. codec->patch_ops.unsol_event(codec, STAC_HP_EVENT << 26);
  2615. return 0;
  2616. }
  2617. static void stac9872_vaio_hp_detect(struct hda_codec *codec, unsigned int res)
  2618. {
  2619. if (get_pin_presence(codec, 0x0a)) {
  2620. stac92xx_reset_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
  2621. stac92xx_set_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
  2622. } else {
  2623. stac92xx_reset_pinctl(codec, 0x0a, AC_PINCTL_OUT_EN);
  2624. stac92xx_set_pinctl(codec, 0x0f, AC_PINCTL_OUT_EN);
  2625. }
  2626. }
  2627. static void stac9872_vaio_unsol_event(struct hda_codec *codec, unsigned int res)
  2628. {
  2629. switch (res >> 26) {
  2630. case STAC_HP_EVENT:
  2631. stac9872_vaio_hp_detect(codec, res);
  2632. break;
  2633. }
  2634. }
  2635. static struct hda_codec_ops stac9872_vaio_patch_ops = {
  2636. .build_controls = stac92xx_build_controls,
  2637. .build_pcms = stac92xx_build_pcms,
  2638. .init = stac9872_vaio_init,
  2639. .free = stac92xx_free,
  2640. .unsol_event = stac9872_vaio_unsol_event,
  2641. #ifdef CONFIG_PM
  2642. .resume = stac92xx_resume,
  2643. #endif
  2644. };
  2645. enum { /* FE and SZ series. id=0x83847661 and subsys=0x104D0700 or 104D1000. */
  2646. CXD9872RD_VAIO,
  2647. /* Unknown. id=0x83847662 and subsys=0x104D1200 or 104D1000. */
  2648. STAC9872AK_VAIO,
  2649. /* Unknown. id=0x83847661 and subsys=0x104D1200. */
  2650. STAC9872K_VAIO,
  2651. /* AR Series. id=0x83847664 and subsys=104D1300 */
  2652. CXD9872AKD_VAIO,
  2653. STAC_9872_MODELS,
  2654. };
  2655. static const char *stac9872_models[STAC_9872_MODELS] = {
  2656. [CXD9872RD_VAIO] = "vaio",
  2657. [CXD9872AKD_VAIO] = "vaio-ar",
  2658. };
  2659. static struct snd_pci_quirk stac9872_cfg_tbl[] = {
  2660. SND_PCI_QUIRK(0x104d, 0x81e6, "Sony VAIO F/S", CXD9872RD_VAIO),
  2661. SND_PCI_QUIRK(0x104d, 0x81ef, "Sony VAIO F/S", CXD9872RD_VAIO),
  2662. SND_PCI_QUIRK(0x104d, 0x81fd, "Sony VAIO AR", CXD9872AKD_VAIO),
  2663. SND_PCI_QUIRK(0x104d, 0x8205, "Sony VAIO AR", CXD9872AKD_VAIO),
  2664. {}
  2665. };
  2666. static int patch_stac9872(struct hda_codec *codec)
  2667. {
  2668. struct sigmatel_spec *spec;
  2669. int board_config;
  2670. board_config = snd_hda_check_board_config(codec, STAC_9872_MODELS,
  2671. stac9872_models,
  2672. stac9872_cfg_tbl);
  2673. if (board_config < 0)
  2674. /* unknown config, let generic-parser do its job... */
  2675. return snd_hda_parse_generic_codec(codec);
  2676. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  2677. if (spec == NULL)
  2678. return -ENOMEM;
  2679. codec->spec = spec;
  2680. switch (board_config) {
  2681. case CXD9872RD_VAIO:
  2682. case STAC9872AK_VAIO:
  2683. case STAC9872K_VAIO:
  2684. spec->mixer = vaio_mixer;
  2685. spec->init = vaio_init;
  2686. spec->multiout.max_channels = 2;
  2687. spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
  2688. spec->multiout.dac_nids = vaio_dacs;
  2689. spec->multiout.hp_nid = VAIO_HP_DAC;
  2690. spec->num_adcs = ARRAY_SIZE(vaio_adcs);
  2691. spec->adc_nids = vaio_adcs;
  2692. spec->input_mux = &vaio_mux;
  2693. spec->mux_nids = vaio_mux_nids;
  2694. codec->patch_ops = stac9872_vaio_patch_ops;
  2695. break;
  2696. case CXD9872AKD_VAIO:
  2697. spec->mixer = vaio_ar_mixer;
  2698. spec->init = vaio_ar_init;
  2699. spec->multiout.max_channels = 2;
  2700. spec->multiout.num_dacs = ARRAY_SIZE(vaio_dacs);
  2701. spec->multiout.dac_nids = vaio_dacs;
  2702. spec->multiout.hp_nid = VAIO_HP_DAC;
  2703. spec->num_adcs = ARRAY_SIZE(vaio_adcs);
  2704. spec->adc_nids = vaio_adcs;
  2705. spec->input_mux = &vaio_mux;
  2706. spec->mux_nids = vaio_mux_nids;
  2707. codec->patch_ops = stac9872_patch_ops;
  2708. break;
  2709. }
  2710. return 0;
  2711. }
  2712. /*
  2713. * patch entries
  2714. */
  2715. struct hda_codec_preset snd_hda_preset_sigmatel[] = {
  2716. { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
  2717. { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
  2718. { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
  2719. { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
  2720. { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
  2721. { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
  2722. { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
  2723. { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
  2724. { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
  2725. { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
  2726. { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
  2727. { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
  2728. { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
  2729. { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
  2730. { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
  2731. { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
  2732. { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
  2733. { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
  2734. { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
  2735. { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
  2736. { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
  2737. { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
  2738. { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
  2739. { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
  2740. { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
  2741. { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
  2742. { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
  2743. { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
  2744. { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
  2745. /* The following does not take into account .id=0x83847661 when subsys =
  2746. * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
  2747. * currently not fully supported.
  2748. */
  2749. { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
  2750. { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
  2751. { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
  2752. { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
  2753. { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
  2754. { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
  2755. { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
  2756. { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
  2757. { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
  2758. { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
  2759. { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
  2760. {} /* terminator */
  2761. };