msm_drv.h 6.2 KB

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  1. /*
  2. * Copyright (C) 2013 Red Hat
  3. * Author: Rob Clark <robdclark@gmail.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #ifndef __MSM_DRV_H__
  18. #define __MSM_DRV_H__
  19. #include <linux/kernel.h>
  20. #include <linux/clk.h>
  21. #include <linux/cpufreq.h>
  22. #include <linux/module.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/pm.h>
  25. #include <linux/pm_runtime.h>
  26. #include <linux/slab.h>
  27. #include <linux/list.h>
  28. #include <linux/iommu.h>
  29. #include <linux/types.h>
  30. #include <asm/sizes.h>
  31. #ifndef CONFIG_OF
  32. #include <mach/board.h>
  33. #include <mach/socinfo.h>
  34. #include <mach/iommu_domains.h>
  35. #endif
  36. #include <drm/drmP.h>
  37. #include <drm/drm_crtc_helper.h>
  38. #include <drm/drm_fb_helper.h>
  39. struct msm_kms;
  40. #define NUM_DOMAINS 1 /* one for KMS, then one per gpu core (?) */
  41. struct msm_drm_private {
  42. struct msm_kms *kms;
  43. struct drm_fb_helper *fbdev;
  44. /* list of GEM objects: */
  45. struct list_head inactive_list;
  46. struct workqueue_struct *wq;
  47. /* registered IOMMU domains: */
  48. unsigned int num_iommus;
  49. struct iommu_domain *iommus[NUM_DOMAINS];
  50. unsigned int num_crtcs;
  51. struct drm_crtc *crtcs[8];
  52. unsigned int num_encoders;
  53. struct drm_encoder *encoders[8];
  54. unsigned int num_connectors;
  55. struct drm_connector *connectors[8];
  56. };
  57. struct msm_format {
  58. uint32_t pixel_format;
  59. };
  60. /* As there are different display controller blocks depending on the
  61. * snapdragon version, the kms support is split out and the appropriate
  62. * implementation is loaded at runtime. The kms module is responsible
  63. * for constructing the appropriate planes/crtcs/encoders/connectors.
  64. */
  65. struct msm_kms_funcs {
  66. /* hw initialization: */
  67. int (*hw_init)(struct msm_kms *kms);
  68. /* irq handling: */
  69. void (*irq_preinstall)(struct msm_kms *kms);
  70. int (*irq_postinstall)(struct msm_kms *kms);
  71. void (*irq_uninstall)(struct msm_kms *kms);
  72. irqreturn_t (*irq)(struct msm_kms *kms);
  73. int (*enable_vblank)(struct msm_kms *kms, struct drm_crtc *crtc);
  74. void (*disable_vblank)(struct msm_kms *kms, struct drm_crtc *crtc);
  75. /* misc: */
  76. const struct msm_format *(*get_format)(struct msm_kms *kms, uint32_t format);
  77. long (*round_pixclk)(struct msm_kms *kms, unsigned long rate,
  78. struct drm_encoder *encoder);
  79. /* cleanup: */
  80. void (*preclose)(struct msm_kms *kms, struct drm_file *file);
  81. void (*destroy)(struct msm_kms *kms);
  82. };
  83. struct msm_kms {
  84. const struct msm_kms_funcs *funcs;
  85. };
  86. struct msm_kms *mdp4_kms_init(struct drm_device *dev);
  87. int msm_register_iommu(struct drm_device *dev, struct iommu_domain *iommu);
  88. int msm_iommu_attach(struct drm_device *dev, struct iommu_domain *iommu,
  89. const char **names, int cnt);
  90. int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
  91. int msm_gem_fault(struct vm_area_struct *vma, struct vm_fault *vmf);
  92. uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj);
  93. int msm_gem_get_iova_locked(struct drm_gem_object *obj, int id,
  94. uint32_t *iova);
  95. int msm_gem_get_iova(struct drm_gem_object *obj, int id, uint32_t *iova);
  96. void msm_gem_put_iova(struct drm_gem_object *obj, int id);
  97. int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
  98. struct drm_mode_create_dumb *args);
  99. int msm_gem_dumb_destroy(struct drm_file *file, struct drm_device *dev,
  100. uint32_t handle);
  101. int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
  102. uint32_t handle, uint64_t *offset);
  103. void *msm_gem_vaddr_locked(struct drm_gem_object *obj);
  104. void *msm_gem_vaddr(struct drm_gem_object *obj);
  105. int msm_gem_queue_inactive_work(struct drm_gem_object *obj,
  106. struct work_struct *work);
  107. void msm_gem_free_object(struct drm_gem_object *obj);
  108. int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file,
  109. uint32_t size, uint32_t flags, uint32_t *handle);
  110. struct drm_gem_object *msm_gem_new(struct drm_device *dev,
  111. uint32_t size, uint32_t flags);
  112. struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane);
  113. const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb);
  114. struct drm_framebuffer *msm_framebuffer_init(struct drm_device *dev,
  115. struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object **bos);
  116. struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev,
  117. struct drm_file *file, struct drm_mode_fb_cmd2 *mode_cmd);
  118. struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
  119. struct drm_connector *hdmi_connector_init(struct drm_device *dev,
  120. struct drm_encoder *encoder);
  121. void __init hdmi_register(void);
  122. void __exit hdmi_unregister(void);
  123. #ifdef CONFIG_DEBUG_FS
  124. void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
  125. void msm_gem_describe_objects(struct list_head *list, struct seq_file *m);
  126. void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
  127. #endif
  128. void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
  129. const char *dbgname);
  130. void msm_writel(u32 data, void __iomem *addr);
  131. u32 msm_readl(const void __iomem *addr);
  132. #define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
  133. #define VERB(fmt, ...) if (0) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
  134. static inline int align_pitch(int width, int bpp)
  135. {
  136. int bytespp = (bpp + 7) / 8;
  137. /* adreno needs pitch aligned to 32 pixels: */
  138. return bytespp * ALIGN(width, 32);
  139. }
  140. /* for the generated headers: */
  141. #define INVALID_IDX(idx) ({BUG(); 0;})
  142. #define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT)
  143. /* for conditionally setting boolean flag(s): */
  144. #define COND(bool, val) ((bool) ? (val) : 0)
  145. /* just put these here until we start adding driver private ioctls: */
  146. // TODO might shuffle these around.. just need something for now..
  147. #define MSM_BO_CACHE_MASK 0x0000000f
  148. #define MSM_BO_SCANOUT 0x00010000 /* scanout capable */
  149. #define MSM_BO_CACHED 0x00000001 /* default */
  150. #define MSM_BO_WC 0x0000002
  151. #define MSM_BO_UNCACHED 0x00000004
  152. #endif /* __MSM_DRV_H__ */